CN210072002U - COC chip aging testing equipment - Google Patents

COC chip aging testing equipment Download PDF

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Publication number
CN210072002U
CN210072002U CN201920500787.6U CN201920500787U CN210072002U CN 210072002 U CN210072002 U CN 210072002U CN 201920500787 U CN201920500787 U CN 201920500787U CN 210072002 U CN210072002 U CN 210072002U
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China
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probe
chip
limiting
coc
platform
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CN201920500787.6U
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胡思强
李连城
周益平
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Jiangxi Sont Communication Technology Co ltd
Shenzhen Xunte Communication Technology Co ltd
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Shenzhen Sont Technology Co ltd
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Abstract

The utility model discloses a COC chip aging testing equipment. The COC chip burn-in test apparatus (1000) includes a plurality of test units (400) and a test rack (500); each test unit (400) comprises a chip limiting component (410) for limiting the COC chip (205) and a probe mounting component (420) for mounting the test probe (302), wherein the probe mounting component (420) is positioned right above the chip limiting component (410); the test jig (500) comprises a chip limiting platform (510) and a probe mounting platform (520) located above the chip limiting platform (510), wherein each chip limiting component (410) is arranged on the chip limiting platform (510) along the length direction (L), and each probe mounting component (420) is arranged on the probe mounting platform (520) along the length direction (L). According to the utility model discloses a COC chip aging testing equipment can reliably fix a position and add the power, can convenient and fast ground carry out the material loading operation.

Description

COC chip aging testing equipment
Technical Field
The utility model discloses optical communication trade field, concretely relates to COC chip aging testing equipment.
Background
With the rapid development of the optical communication industry, laser chip manufacturers have higher and higher chip integration. There are two common packaging forms of TOSAs (Transmitter Optical Subassembly): TO packages and BOX (housing) packages. The disadvantage of TO packages is that the rates that can be currently achieved are not high, so BOX packages still need TO be chosen for some high-rate devices. BOX packages, also called deep cavity packages, are superior TO packages in terms of transmission rate, heat dissipation, etc., but because mounting is completed in a housing with a small space, mounting difficulty and cost are much higher than those of TO packages. How to screen out bad COC (Chip On Carrier, herein referred to as COC Chip) before packaging, the COC Chip having LD (Laser Diode) becomes a major problem to be solved by COC manufacturers. High-temperature power aging is a relatively multiple screening method adopted in the industry, and is characterized in that components are electrified to simulate the working conditions of the components in an actual circuit, and aging is carried out for several hours to dozens of hours at a high temperature of between 80 and 150 ℃ so as to accelerate the exposure of potential faults in the components, then electrical parameter measurement is carried out, and the components with failures or parameter changes are screened and removed, so that early failures are eliminated as far as possible. Because the COC chip has a small size, the chip can be electrified only through the small-size gold-plated LD positive and negative electrodes exposed on the upper surface, and other conductive parts on the chip are avoided, so that the requirement on the precision of test equipment is high.
SUMMERY OF THE UTILITY MODEL
Based on this, a need exists for a COC chip aging test device which can be reliably positioned and powered up and can conveniently and quickly perform loading operation.
An object of the utility model is to provide a COC chip aging testing equipment is favorable to reliable location and add power, can convenient and fast ground carry out the material loading operation.
The utility model discloses a following technical scheme realizes: a COC chip aging test device comprises a plurality of test units and a test frame;
each test unit comprises a chip limiting component for limiting the COC chip and a probe mounting component for mounting a test probe, and the probe mounting component is positioned above the chip limiting component;
the test jig comprises a chip limiting platform and a probe mounting platform located above the chip limiting platform, wherein each chip limiting assembly is arranged on the chip limiting platform along the length direction, and each probe mounting assembly is arranged on the probe mounting platform along the length direction.
As an improvement of the above technical solution, the chip limit component includes an elastic limit mechanism and a cover plate;
the elastic limiting mechanism comprises a limiting main body, a first spring arranged on the left side surface of the limiting main body, a top block arranged on the upper surface of the limiting main body and an operating mechanism used for operating the top block;
a first containing groove for containing a limiting main body is formed in the chip limiting platform, and the left end of the first spring is pressed against the wall surface of the first containing groove;
the cover plate is provided with a second containing groove for containing the COC chip, and the top block is arranged in the second containing groove in a sliding mode.
As an improvement of the above technical solution, the cross-sectional shape of the second receiving groove is an L-shape.
As an improvement of the above technical solution, a boss for bearing the COC chip is disposed on the right side of the first accommodating groove.
As an improvement of the technical scheme, the operating mechanism comprises a movable bolt penetrating out of the front side wall of the chip limiting platform, and a long sliding groove matched with the movable bolt and extending along the length direction is formed in the front wall of the chip limiting platform.
As an improvement of the technical scheme, the probe mounting assembly comprises a probe bracket, a probe positioning hollow column and a probe pressing adjusting column;
a probe insulator surrounding the probe is arranged on the front side of the probe support, the probe positioning hollow column is arranged on the lower side of the probe support, the probe pressing adjusting column penetrates out of the probe support from top to bottom, and a second spring is sleeved on the lower portion of the probe pressing adjusting column;
the probe mounting platform comprises a probe fixing frame positioned below the probe mounting assembly and a probe protection cover positioned above the probe mounting assembly;
the probe fixing frame is provided with a third accommodating groove for accommodating the probe support, a probe positioning column matched with the probe positioning hollow column is arranged in the third accommodating groove, and the probe insulator is positioned in front of the outer side of the third accommodating groove;
the probe protection cover is fixed on the probe fixing frame, and the upper part of the probe pressing adjusting column penetrates out of the probe protection cover.
The utility model has the advantages that: the utility model discloses a COC chip aging testing equipment includes a plurality of test units and test jig; each test unit comprises a chip limiting component for limiting the COC chip and a probe mounting component for mounting a test probe, and the probe mounting component is positioned above the chip limiting component; the test jig comprises a chip limiting platform and a probe mounting platform located above the chip limiting platform, wherein each chip limiting assembly is arranged on the chip limiting platform along the length direction, and each probe mounting assembly is arranged on the probe mounting platform along the length direction, so that the test jig can be reliably positioned and powered on, and can be conveniently and quickly used for feeding.
Drawings
Fig. 1 is an assembly state diagram of a COC chip aging test apparatus according to an embodiment of the present invention;
FIG. 2 shows an exploded state diagram of the COC chip burn-in apparatus of FIG. 1;
FIG. 3 shows a cross-section of a chip spacing stage of the COC chip burn-in apparatus of FIG. 1;
FIG. 4 shows a chip limiting platform of the COC chip burn-in apparatus of FIG. 1;
FIG. 5 is an enlarged view of FIG. 4 at B;
FIG. 6 shows a spring force limiting mechanism of the COC chip burn-in apparatus of FIG. 1;
FIG. 7 is a perspective view of a COC chip;
FIG. 8 shows a probe mounting assembly of the COC chip burn-in apparatus of FIG. 1;
FIG. 9 is an enlarged view at C of FIG. 8 showing an enlarged view of the stationary probe portion of the probe mounting assembly of the COC chip burn-in apparatus of FIG. 1;
FIG. 10 is a schematic diagram illustrating a relationship between a first receiving groove of a probe mounting platform of the COC chip burn-in test apparatus of FIG. 1 and a probe;
fig. 11 is an enlarged view of a portion a in fig. 2.
The designations in the figures have the following meanings: COC chip aging test equipment-1000; a test unit-400; test jig-500; COC chip-205; chip spacing assembly-410; probe mounting assembly-420; chip spacing platform-510; a probe mounting platform-520; elastic force limiting mechanism-412; a cover plate-204; a spacing body-4122; a first spring-203; top block-202; an operating mechanism-4124; a first receiving groove-512; boss-514; moving the bolt-201; an elongated chute-4126; probe holder-301; probe positioning hollow column-304; the probe compresses the adjusting column-306; a second spring-305; a probe holder-307; a probe protection cover-105; a third receiving groove-3072; a probe positioning column-3073; a probe insulator-303; a second receiving groove-2042; length direction-L; 101-a leg; 102-a drive plate; 103-an insulated coil; 2051-a first electrode; 2052-a second electrode; 302-probe.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. The components of embodiments of the present invention, as generally described and illustrated in the figures herein, may be arranged and designed in a wide variety of different configurations. Thus, the following detailed description of the embodiments of the present invention, presented in the accompanying drawings, is not intended to limit the scope of the invention, as claimed, but is merely representative of selected embodiments of the invention. Based on the embodiment of the present invention, all other embodiments obtained by the person skilled in the art without creative work belong to the protection scope of the present invention.
Referring to fig. 1 to 3, a COC chip burn-in apparatus 1000 of the present embodiment is shown. The COC chip burn-in apparatus 1000 includes a plurality of test units 400 and a test rack 500.
As shown in fig. 2 and 8, each test unit 400 includes a chip spacing assembly 410 for spacing the COC chip 205 and a probe mounting assembly 420 for mounting a test probe. The probe mounting assembly 420 is positioned directly above the chip spacing assembly 410 so that the probes accurately contact the electrodes of the COC chip 205. The chip spacing components 410 correspond one-to-one to the probe mounting components 420.
Accordingly, the test rack 500 includes a chip spacing platform 510 and a probe mounting platform 520 located above the chip spacing platform 510. Referring to fig. 1 to 3, the chip spacing assemblies 410 are arranged on the chip spacing platform 510 along the length direction L. The probe mounting assemblies 420 are arranged on the probe mounting platform 520 along the length direction L.
In this embodiment, the chip limiting platform 510 is an integrated plate.
As shown in fig. 7, it can be clearly seen that the first electrode 2051 and the second electrode 2052 with LD are on the COC chip 205.
Specifically, as shown in fig. 1 and fig. 2, the COC chip aging test apparatus 1000 of the present invention is used for performing an electrical aging test on a microstructure for an optical device in the optical communication industry, so as to screen an optical device chip with high reliability, wherein the distance between a first electrode 2051 and a second electrode 2052 of a microstructure, such as an LD in fig. 7, of the COC chip 205 is about 0.4 mm.
The bottom of the test frame 500 is provided with 4 support feet 101 for supporting the whole equipment. The driving plate 102 and the plate-shaped chip limiting platform 510 are combined and fixed through an insulating gasket 103.
The drive board 102 can be powered by a single chip connected with an external computer, and the power supply supplies power to the COC chip 205 (with LD chip) through the probe 302 for aging test. Such a drive plate 102 is well known to those of ordinary skill in the art and will not be described in detail.
The chip spacing assembly 410 includes an elastic spacing mechanism 412 and a cover plate 204.
As shown in fig. 6, the elastic force limiting mechanism 412 includes a limiting body 4122, a first spring 203 provided at a left side surface of the limiting body 4122, a top block 202 provided at an upper surface of the limiting body 4122, and an operating mechanism 4124 for operating the top block 202. The first spring 203 is a cylindrical coil spring.
As shown in fig. 2 and fig. 3, the chip limiting platform 510 is provided with a first receiving groove 512 for receiving the limiting body 4122, and the left end of the first spring 203 is pressed against the wall surface of the first receiving groove 512.
As shown in fig. 5, a second receiving groove 2042 for placing the COC chip 205 is formed in the cover plate 204, and the top block 202 is slidably disposed in the second receiving groove 2042.
As shown in fig. 5, the cross-sectional shape of the second receiving groove 2042 is an L-shape.
As shown in fig. 5, a boss 514 for bearing the COC chip 205 is disposed at the right side of the first receiving groove 512. During testing, the COC chip 205 is positioned on the land 514.
As shown in fig. 5, the operating mechanism 4124 includes a moving pin 201 penetrating through a front side wall of the chip limiting platform 510, and an elongated sliding groove 4126 extending in the length direction L and engaged with the moving pin 201 is disposed on the front wall of the chip limiting platform 510.
The process of fixing the COC chip 205 is described below with reference to fig. 3.
Step 1: the moving bolt 201 is shifted to the left, and a space for placing the COC chip 205 (with LD) is reserved; step 2: the COC chip 205 is placed at a predetermined position on the right side of the second receiving groove 2042; and step 3: loosening the movable bolt 201; and 4, step 4: the first spring 203 pushes the top block 202 to the right; and 5: the top block 202 transmits the pressure of the first spring 203 to the COC chip 205, thereby accomplishing the purpose of fixing the COC chip 205.
Thus, the COC chip 205 can be accurately positioned by the chip stopper component 410.
Referring to fig. 8 and 11, the probe mounting assembly 420 includes a probe holder 301, a probe positioning hollow column 304, and a probe compression adjustment column 306.
The front side of the probe bracket 301 is provided with a probe insulator 303 surrounding the probe, the probe positioning hollow column 304 is arranged on the lower side of the probe bracket 301, the probe pressing adjusting column 306 penetrates out of the probe bracket 301 from top to bottom, and the lower part of the probe pressing adjusting column is sleeved with a second spring 305. The second spring 305 is a cylindrical coil spring.
The probe insulator 303 is made of insulating plastic and is baked and cured at a high temperature.
Referring to fig. 8 and 11, the probe mounting platform 520 includes a probe holder 307 positioned below the probe mounting assembly 420 and a probe protection cover 105 positioned above the probe mounting assembly 420.
The probe holder 307 is provided with a third receiving groove 3072 for receiving the probe holder 301, a probe positioning post 3073 engaged with the probe positioning hollow post 304 is disposed in the third receiving groove 3072, and the probe insulator 303 is located in front of an outer side of the third receiving groove 3072.
The probe protection cover 105 is fixed on the probe fixing frame 307, and the upper part of the probe pressing adjusting column 306 penetrates out of the probe protection cover 105.
The probe cover 105 is screwed to the probe holder 307, whereby the probe 302 can be well protected.
Thus, the probe 302 can be accurately positioned by the probe holder 307.
In summary, the COC chip 205 and the probe 302 can be accurately positioned, and reliable electrical contact between the COC chip 205 and the probe 302 is achieved, so as to screen a high-reliability optical device chip. In other words, the COC chip aging test equipment adopting the embodiment can be reliably positioned and powered up, and can conveniently and quickly perform loading operation.
In the description of the present invention, moreover, the terms "first", "second" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implying any number of indicated technical features. Thus, features defined as "first", "second", may explicitly or implicitly include one or more of the described features. In the description of the embodiments of the present invention, "a plurality" means two or more unless specifically limited otherwise.
In the description of the present invention, it is to be noted that, unless otherwise explicitly specified or limited, the terms "connected" and "connected" are to be interpreted broadly, and may be, for example, fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; may be directly connected or indirectly connected through an intermediate. The specific meaning of the above terms in the present invention can be understood in specific cases to those skilled in the art. In addition, in the description of the present invention, "a plurality" means two or more unless otherwise specified.
In the description of the embodiments of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "height", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", etc. indicate the orientation or positional relationship indicated based on the drawings, and are only for convenience of describing the embodiments of the present invention and simplifying the description, but do not indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus should not be construed as limiting the embodiments of the present invention.
In embodiments of the invention, unless expressly stated or limited otherwise, the first feature "on" or "under" the second feature may comprise direct contact between the first and second features, or may comprise direct contact between the first and second features through another feature not in direct contact. Also, the first feature being "on," "above" and "over" the second feature includes the first feature being directly on and obliquely above the second feature, or merely indicating that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature includes the first feature being directly above and obliquely above the second feature, or simply meaning that the first feature is at a lesser level than the second feature.
In the description of the present specification, reference to the description of the terms "one embodiment," "some embodiments," "an illustrative embodiment," "an example," "a specific example" or "some examples" or the like means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
While embodiments of the present invention have been shown and described, it will be understood by those of ordinary skill in the art that: various changes, modifications, substitutions and alterations can be made to the embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the claims and their equivalents.

Claims (6)

1. A COC chip burn-in apparatus (1000), characterized in that the COC chip burn-in apparatus (1000) comprises a plurality of test units (400) and a test rack (500);
each test unit (400) comprises a chip limiting component (410) for limiting a COC chip (205) and a probe mounting component (420) for mounting a test probe (302), wherein the probe mounting component (420) is positioned right above the chip limiting component (410);
the test jig (500) comprises a chip limiting platform (510) and a probe mounting platform (520) located above the chip limiting platform (510), wherein each chip limiting component (410) is arranged on the chip limiting platform (510) along the length direction (L), and each probe mounting component (420) is arranged on the probe mounting platform (520) along the length direction (L).
2. The COC chip burn-in apparatus (1000) of claim 1, wherein the chip spacing assembly (410) comprises a spring spacing mechanism (412) and a cover plate (204);
the elastic force limiting mechanism (412) comprises a limiting main body (4122), a first spring (203) arranged on the left side surface of the limiting main body (4122), an ejector block (202) arranged on the upper surface of the limiting main body (4122) and an operating mechanism (4124) used for operating the ejector block (202);
a first containing groove (512) for containing a limiting main body (4122) is formed in the chip limiting platform (510), and the left end of the first spring (203) is pressed against the wall surface of the first containing groove (512);
the cover plate (204) is provided with a second containing groove (2042) for placing a COC chip (205), and the top block (202) is arranged in the second containing groove (2042) in a sliding mode.
3. The COC chip burn-in apparatus (1000) of claim 2, wherein the cross-sectional shape of the second receiving groove (2042) is L-shaped.
4. The COC chip burn-in apparatus (1000) of claim 3, wherein a boss (514) for carrying the COC chip (205) is disposed at a right side of the first receiving groove (512).
5. The COC chip burn-in apparatus (1000) of claim 2, wherein the handling mechanism (4124) comprises a moving pin (201) protruding through a front wall of the chip retention stage (510), and wherein the front wall of the chip retention stage (510) is provided with an elongated sliding slot (4126) extending in the length direction (L) for engaging with the moving pin (201).
6. The COC chip burn-in apparatus (1000) of claim 1, wherein said probe mounting assembly (420) comprises a probe holder (301), a probe positioning hollow column (304) and a probe compression adjustment column (306);
a probe insulator (303) surrounding the probe is arranged on the front side of the probe support (301), the probe positioning hollow column (304) is arranged on the lower side of the probe support (301), the probe pressing and adjusting column (306) penetrates out of the probe support (301) from top to bottom, and a second spring (305) is sleeved on the lower portion of the probe pressing and adjusting column;
the probe mounting platform (520) comprises a probe mount (307) located below the probe mounting assembly (420) and a probe protective cover (105) located above the probe mounting assembly (420);
the probe fixing frame (307) is provided with a third accommodating groove (3072) for accommodating the probe support (301), a probe positioning column (3073) matched with the probe positioning hollow column (304) is arranged in the third accommodating groove (3072), and the probe insulator (303) is positioned in front of the outer side of the third accommodating groove (3072);
the probe protection cover (105) is fixed on the probe fixing frame (307), and the upper part of the probe pressing adjusting column (306) penetrates out of the probe protection cover (105).
CN201920500787.6U 2019-04-12 2019-04-12 COC chip aging testing equipment Active CN210072002U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201920500787.6U CN210072002U (en) 2019-04-12 2019-04-12 COC chip aging testing equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201920500787.6U CN210072002U (en) 2019-04-12 2019-04-12 COC chip aging testing equipment

Publications (1)

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CN210072002U true CN210072002U (en) 2020-02-14

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CN201920500787.6U Active CN210072002U (en) 2019-04-12 2019-04-12 COC chip aging testing equipment

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113533939A (en) * 2021-08-09 2021-10-22 苏州联讯仪器有限公司 Probe station for chip test

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113533939A (en) * 2021-08-09 2021-10-22 苏州联讯仪器有限公司 Probe station for chip test
CN113533939B (en) * 2021-08-09 2022-03-15 苏州联讯仪器有限公司 Probe station for chip test

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Address after: 701, 801, building C3, Nanshan wisdom garden, 1001 Xueyuan Avenue, Changyuan community, Taoyuan Street, Nanshan District, Shenzhen, Guangdong 518000

Patentee after: Shenzhen Xunte Communication Technology Co.,Ltd.

Address before: Room 805, East Tower, Nanshan Software Park, 10128 Shennan Avenue, Nantou street, Bao'an District, Shenzhen, Guangdong 518000

Patentee before: SHENZHEN SONT TECHNOLOGY Co.,Ltd.

TR01 Transfer of patent right
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Effective date of registration: 20210624

Address after: 701, 801, building C3, Nanshan wisdom garden, 1001 Xueyuan Avenue, Changyuan community, Taoyuan Street, Nanshan District, Shenzhen, Guangdong 518000

Patentee after: Shenzhen Xunte Communication Technology Co.,Ltd.

Patentee after: JIANGXI SONT COMMUNICATION TECHNOLOGY Co.,Ltd.

Address before: 701, 801, building C3, Nanshan wisdom garden, 1001 Xueyuan Avenue, Changyuan community, Taoyuan Street, Nanshan District, Shenzhen, Guangdong 518000

Patentee before: Shenzhen Xunte Communication Technology Co.,Ltd.