CN209946655U

CN209946655U - DC-18GHz spectrum analyzer and intermediate frequency hardware control system thereof

Info

Publication number: CN209946655U
Application number: CN201920119782.9U
Authority: CN
Inventors: 万耿华; 王慧梅
Original assignee: ANHUI EGRETS ELECTRONIC TECHNOLOGY Co Ltd
Current assignee: ANHUI EGRETS ELECTRONIC TECHNOLOGY Co Ltd
Priority date: 2019-01-24
Filing date: 2019-01-24
Publication date: 2020-01-14
Anticipated expiration: 2029-01-24

Abstract

The utility model discloses a DC-18GHz spectral analyser and intermediate frequency hardware control system thereof belongs to digital circuit design and control application. The system comprises a sampling unit, a processing unit, an execution unit and a system power supply circuit, wherein the sampling unit, the processing unit and the execution unit are sequentially connected, and the system power supply circuit supplies power to the sampling unit, the processing unit and the execution unit. The utility model discloses use high performance FPGA chip and ARM chip to be hardware infrastructure, use the high-speed ADC chip to gather analog signal, be aided with other functional circuit, control realizes the spectrum analysis appearance spectral signal and catches the function.

Description

DC-18GHz spectrum analyzer and intermediate frequency hardware control system thereof

Technical Field

The utility model belongs to digital circuit design and control application, specifically speaking relates to a DC-18GHz spectrum analyzer and intermediate frequency hardware control system thereof.

Background

With the development of the current electronic technology, a spectrum analyzer is developed from a communication receiver originally dedicated for radar testing to the current digital, small and diversified high-performance spectrum analyzer. The intermediate frequency digital signal processing technology is applied to a digital spectrum analyzer, replaces an analog device, eliminates intermediate frequency errors, optimizes performance and reduces cost. The intermediate frequency digital signal processing technology takes FPGA as a carrier, and performs digital signal processing technology analysis such as FFT analysis, digital frequency sweeping, digital filtering and the like on the sampled data of the intermediate frequency signal after frequency conversion by the radio frequency circuit, so as to realize the spectrum analysis function of the measured signal. Meanwhile, the application of an embedded system taking ARM as a main body is the key of instrument miniaturization, and the design requirements of the function, power consumption, volume, cost, reliability and the like of the application system are realized by cutting and optimizing software and hardware on the basis of a computer technology. The embedded micro-processing system has excellent control capability and rich peripheral interfaces, and can realize friendly functions of a human-computer interaction interface program, data transmission, remote network access and the like under the support of resource management provided by an operating system.

The utility model discloses a digital spectrum analysis appearance based on ARM treater, which is CN 206848364U, 2018.01.05 date, and adopts ADC + FPGA + DSP basic hardware structure. The method comprises the steps of performing gain and bandwidth conditioning on an intermediate frequency signal output by a radio frequency front end, and quantizing to obtain a digital intermediate frequency sequence; transmitting the frequency spectrum data output by the intermediate frequency digital processing logic module to a frequency spectrograph display control circuit; and meanwhile, a bottom control link of the frequency spectrograph is established. The design of the display control circuit is realized based on an embedded system, and a frequency spectrum command/data transmission interface and a driving program thereof, a frequency spectrograph display unit, the display of a starting LOGO, a frequency spectrograph standard keyboard, a frequency spectrograph instrument interface and the like are realized. The utility model discloses a feasibility is strong, and the hardware platform performance has reached anticipated design demand, but this digital spectrum analyzer based on ARM treater sampling speed is limited on the high-speed sampling.

In order to realize high performance of the frequency control system of the spectrum analyzer and enable the spectrum analyzer to realize high-speed sampling, the hardware architecture of the frequency control system needs to be optimized, so how to optimize the hardware architecture of the frequency control system of the spectrum analyzer is a technical problem which needs to be solved urgently.

SUMMERY OF THE UTILITY MODEL

1. Problems to be solved

The utility model provides a problem unreasonable to current spectrum analysis appearance intermediate frequency control system's hardware architecture design, the utility model provides a DC-18GHz spectrum analysis appearance and intermediate frequency hardware control system thereof.

2. Technical scheme

In order to solve the above problems, the utility model adopts the following technical proposal.

The utility model provides a DC-18GHz spectrum analyzer intermediate frequency hardware control system, includes sampling unit, processing unit, execution unit and system power supply circuit, sampling unit, processing unit and execution unit connect gradually, by system power supply circuit does sampling unit, processing unit and execution unit power supply.

Preferably, the sampling unit comprises an ADC chip and a reference clock generating circuit connected to each other, wherein the ADC chip in the sampling unit is connected to the processing unit.

Preferably, the signal sampled by the ADC chip is an intermediate frequency signal, and the sampling frequency of the intermediate frequency signal is 75MHz, and the bandwidth is 20 MHz; the sampling frequency of the reference clock generation circuit is 102.4 MHz.

Preferably, the processing unit comprises an FPGA chip and a peripheral circuit of the FPGA chip, the peripheral circuit of the FPGA chip comprises an audio output circuit, a radio frequency control interface circuit and a DDR2 storage unit, the audio output circuit, the radio frequency control interface circuit and the DDR2 storage unit are respectively connected with the FPGA chip, and the FPGA chip is connected with the ADC chip.

Preferably, the audio output circuit comprises a DAC chip.

Preferably, the DAC chip is a DAC chip with a sampling frequency of 192KHz and 24 audio bits.

Preferably, the execution unit comprises an ARM chip, the ARM chip is connected with an LCD display circuit, an external communication interface circuit and a peripheral circuit of the ARM chip, the peripheral circuit of the ARM chip comprises a DDR3 memory unit, a NandFlash file storage unit, a system clock unit, a reset unit and a power supply unit, which are respectively connected with the ARM chip, wherein the ARM chip is connected with an FPGA chip in the processing unit.

Preferably, the ARM chip and the FPGA chip are connected through a general memory control bus GPMC.

Preferably, the data bit width of the bus GPMC is 16 bits, and the highest bus clock is 100 Mbps.

A DC-18GHz spectrum analyzer comprises the intermediate frequency hardware control system.

3. Advantageous effects

Compared with the prior art, the beneficial effects of the utility model are that:

(1) the utility model provides a DC-18GHz spectrum appearance intermediate frequency hardware control system mainly includes sampling unit, processing unit and execution unit, wherein sampling unit, processing unit and execution unit connect gradually to control and realize spectrum appearance spectral signal capture function;

(2) the utility model discloses a sampling unit mainly includes ADC chip and reference clock production circuit, uses high-speed ADC chip to gather analog signal, and the signal that high-speed ADC chip was sampled is intermediate frequency signal, and intermediate frequency signal's sampling frequency is 75MHz, and the bandwidth is 20MHz, is assisted with reference clock production circuit, and reference clock production circuit's sampling frequency is 102.4MHz, has improved spectrum analyzer spectral signal and has caught the performance;

(3) the utility model discloses a processing unit includes audio output circuit, radio frequency control interface circuit, FPGA and peripheral circuit, wherein audio output circuit adopts the sampling rate to be 192KHz, 24 DAC chips of high performance stereo audio, its mainly used broadcast is modulated the baseband audio signal after the intermediate frequency signal demodulation, FPGA chip and peripheral circuit mainly used are at the digital signal of real-time reception DAC, handle digital signal, then with the result through high performance parallel port bus transmission for the ARM chip, temporary variable data among the digital signal processing process can be stored in FPGA chip external capacity be 128 MB's DDR2 memory cell, in order to satisfy the frequency range for DC-18GHz spectrum analyzer hardware control system design demand;

(4) the utility model discloses an execution unit includes the ARM chip is connected with the peripheral circuit of LCD display circuit, external communication interface circuit and ARM chip, the peripheral circuit of ARM chip is including DDR3 memory cell, NandFlash file memory cell, system clock unit, reset unit and power supply unit, handles various operation demands of user high-efficiently, will be presented for the user by the result after the FPGA chip digital signal processing of ADC sampling signal;

(5) the utility model also provides a DC-18GHz spectral analyser utilizes the utility model provides a DC-18GHz spectral analyser intermediate frequency hardware control system uses high performance FPGA chip and ARM chip to be hardware infrastructure, uses high-speed ADC chip to gather analog signal, assists other functional circuit, and control realizes spectral analyser spectral signal and catches the function.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings used in the description of the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention. Other figures may also be derived from these figures to those skilled in the art.

Fig. 1 is a schematic block diagram of an intermediate frequency hardware control system of the DC-18GHz spectrum analyzer of the present invention.

Detailed Description

The embodiment of the utility model provides a DC-18GHz spectral analyser and intermediate frequency hardware control system thereof for optimize spectral analyser intermediate frequency control system's hardware architecture.

In order to make the objects, features and advantages of the present invention more apparent and understandable, the present invention will be described in detail below with reference to the accompanying drawings and specific embodiments. The exemplary embodiments and descriptions of the present invention are provided to explain the present invention, but not to limit the present invention.

The utility model provides a DC-18GHz spectrum analyzer intermediate frequency hardware control system, this spectrum analyzer intermediate frequency hardware control system uses the ARM chip, FPGA chip and ADC chip are the hardware architecture, adopt high-speed AD sampling intermediate frequency signal, the sampled data carries out intermediate frequency digital signal processing through the high performance FPGA chip, data after the processing are through high performance ARM chip of high-speed parallel bus transmission, carry out the peripheral interface function of entire system by the ARM chip at last, show such as man-machine interactive control, support R2232 USB Ethernet communication realization remote control, functions such as system ambient temperature detects. The ARM chip is based on an ARM processor and is called an Advanced RISC Machine. The ARM processor is designed by 32 bits, but is also provided with a 16-bit instruction set, generally saves 35% of equivalent 32-bit codes, can keep all the advantages of a 32-bit system, and has three characteristics of low power consumption, strong function, 16-bit/32-bit double instruction set and numerous partners.

The hardware control system of the spectrum analyzer will be described in detail below.

The utility model discloses DC-18GHz spectrum analyzer intermediate frequency hardware control system passes through system power control, including sampling unit, processing unit and execution unit, above-mentioned sampling unit, processing unit and execution unit connect gradually. Referring to the schematic block diagram shown in fig. 1 for each unit, the if hardware control according to the embodiment of the present invention is mainly used for a spectrum analyzer with a frequency range of DC-18 GHz.

The utility model discloses DC-18GHz spectrum analyzer intermediate frequency hardware control system's sampling unit, the sampling unit is including ADC chip and reference clock production circuit, the ADC chip is connected with reference clock production circuit, connect by ADC chip and the processing unit among the sampling unit, the sampling unit uses high-speed ADC chip as the core, sampling frequency is 75MHz, the bandwidth is 20 MHz's intermediate frequency signal, the sampling frequency of its ADC chip's reference clock production circuit is 102.4MHz, the ADC is Analog-to-Digital Converter's abbreviation, indicate Analog/Digital Converter or ADC. It can convert a continuously varying analog signal into a discrete digital signal. The sampling reference clock of the reference clock generating circuit is output by a frequency synthesis chip of an integrated VCO with the output frequency of 1024MHz signals and then output by a 10-frequency divider, and the phase noise of the clock signals can reach-113 dBc/Hz.

Among them, a Voltage Controlled Oscillator (VCO) is an important component of a radio frequency circuit. Voltage controlled oscillators are commonly referred to as frequency modulators for generating frequency modulated signals. The types of voltage controlled oscillators are LC voltage controlled oscillators, RC voltage controlled oscillators and crystal voltage controlled oscillators.

And the high-speed ADC chip actively sends the data to the FPGA chip in the processing unit through the parallel bus with the single-ended LVCOMS level attribute.

And the utility model discloses the processing unit includes the peripheral circuit of FPGA chip and FPGA chip, and the peripheral circuit of FPGA chip includes audio output circuit, radio frequency control interface circuit, DDR2 memory cell, above audio output circuit, radio frequency control interface circuit, DDR2 memory cell be connected with the FPGA chip respectively, FPGA chip and ADC chip are connected.

The audio output circuit adopts a DAC chip with a sampling rate of 192KHz and 24 bits of high-performance stereo audio, and is mainly used for playing baseband audio signals demodulated by modulated intermediate frequency signals. The digital coding signal of the audio signal is sent to the audio DAC chip by the FFPA chip signal through the serial communication interface.

The DAC is a Digital-to-analog converter (DAC), which is a device for converting a Digital signal into an analog signal (in the form of current, voltage or charge) and is corresponding to the ADC, and can convert a discrete Digital signal into a continuously variable analog signal.

The radio frequency control interface circuit provides IO level control with an isolation driving stage for each functional unit circuit of the radio frequency part of the spectrum analyzer. Such as local oscillator unit signal output control of each stage, pre-filtering channel switch selection control, radio frequency channel amplifier and attenuator working state control of each stage, intermediate frequency signal channel amplifier and attenuator working state control, and the like.

The embodiment of the present invention provides an embodiment of an adopted DDR2 storage unit, DDR2(Double Data Rate 2), which is a new generation of memory technology standard developed by JEDEC (joint committee of electronic device engineering), and the maximum difference between the DDR 89storage unit and the previous generation of memory technology standard is that, although a basic mode of performing Data transmission simultaneously on the rising/falling edge of a clock is adopted, a DDR2 memory has twice the pre-reading capability (i.e., 4-bit Data reading pre-fetching) of the previous generation of DDR memory.

An FPGA (Field-Programmable Gate Array), which is a product of further development based on Programmable devices such as PAL, GAL, CPLD, etc. The circuit is a semi-custom circuit in the field of Application Specific Integrated Circuits (ASIC), not only overcomes the defects of the custom circuit, but also overcomes the defect that the number of gate circuits of the original programmable device is limited. The FPGA chip and the peripheral circuit thereof are mainly used for receiving the digital signals of the DAC chip in real time, performing digital signal processing processes such as digital down conversion, CIC (common information center) extraction filtering, Gaussian FIR (finite impulse response) filtering, modulus calculation, video filtering, detection and the like, and then transmitting the results to the FPGA chip in the execution unit through a high-performance parallel port bus. Temporary variable data in the digital signal processing process can be stored in a DDR2 storage unit with the plug-in capacity of 128MB of an FPGA chip.

The utility model discloses execution unit include the ARM chip is connected with the peripheral circuit of LCD display circuit, external communication interface circuit and ARM chip, the peripheral circuit of ARM chip is including DDR3 memory cell, NandFlash file memory cell, system clock unit, reset unit and power supply unit, wherein, FPGA chip in ARM chip and the processing unit is connected. The ARM chip and the peripheral circuit thereof have the main functions of processing various operation requirements of users and presenting results of signals sampled by the ADC chip and processed by digital signals of the FPGA chip to the users. Specifically, the execution unit mainly comprises an LCD display driving circuit, an RS232 level serial port communication circuit, a USB port communication circuit, a network port communication circuit and a basic peripheral circuit for the ARM chip to work, and has various external communication interfaces for users to select. The peripheral circuit of ARM chip work mainly has DDR3 memory cell, NandFlash file memory cell, system clock unit, reset unit, power supply unit that capacity is 512MB, capacity is 1 GB.

The embodiment of the utility model provides a DDR3 Memory cell (Double-Data-Rate thread Dynamic Random Access Memory) that adopts can provide the operating performance who compares in DDR2 Memory cell higher and lower voltage. The NandFlash file storage unit can realize the storage of a large amount of data and has the advantages of large capacity, high rewriting speed and the like.

The preferred high-performance ARM chip is a Cortex-A8 core chip AM3358BZCZ of TI company, and the main frequency of the ARM chip can reach 1GHz at most. The ARM chip and the FPGA chip are communicated by adopting a general memory control bus GPMC, the data bit of the bus GPMC is 16 bits, and the highest bus clock is 100 Mbps.

The system power supply circuit does the utility model discloses DC-18GHz spectral analyser intermediate frequency hardware control system's sampling unit, processing unit and execution unit power supply. The system supports a wide voltage input of 9-17V and outputs a voltage of 5V in a nominal value through the switching power supply. The 5V voltage is respectively supplied to analog unit circuits such as an ADC device and an audio chip for power supply, and an ARM chip and an FPGA chip unit circuit for power supply through 3-path II-shaped filtering processing. The 5V voltage of the ARM chip and the FPGA chip unit circuit is processed by a multi-path switching power supply circuit respectively to meet various voltage requirements of chip work, the 5V voltage of the analog part is used for avoiding interference of switching frequency introduced by the switching power supply to sampling signals, and the voltage required by each path is processed by a linear voltage reduction circuit.

The utility model discloses the theory of operation as follows: this spectrum analyzer intermediate frequency hardware control system, under the condition that each unit circuit normally worked, the high-speed ADC chip is 75MHz with 102.4Mbps rate sampling frequency, the bandwidth is the intermediate frequency signal of 20MHz, the sampling data carries out intermediate frequency digital signal processing through high performance FPGA chip, the data after carrying out intermediate frequency digital signal processing transmit to high performance ARM chip through high-speed parallel bus GPMC, carry out whole spectrum analyzer intermediate frequency hardware control system peripheral interface function by the ARM chip at last, such as man-machine interactive control shows, support R2232 USB/Ethernet communication realization remote control, functions such as system environment temperature detection.

The utility model discloses simultaneously disclose DC-18GHz spectrum analysis appearance, utilize the utility model discloses DC-18GHz spectrum analysis appearance intermediate frequency hardware control system that above-mentioned embodiment provided uses high performance FPGA chip and ARM chip to be hardware basic framework, uses high-speed ADC chip to gather analog signal, and FPGA chip and ARM chip are assisted some function circuit of other respectively, for example radio frequency control interface circuit, audio output circuit, reference clock production circuit, LCD display circuit, control realization spectrum analysis appearance frequency signal catches the function to external communication interface circuit etc..

The present invention and its embodiments have been described above schematically, without limitation, and what is shown in the drawings is only one of the embodiments of the present invention, and the actual structure is not limited thereto. Therefore, if a person skilled in the art receives the teachings of the present invention, without inventive design, a similar structure and an embodiment to the above technical solution should be covered by the protection scope of the present patent.

Claims

1. An intermediate frequency hardware control system of a DC-18GHz spectrum analyzer is characterized in that: including sampling unit, processing unit, execution unit and system power supply circuit, sampling unit, processing unit and execution unit connect gradually, by system power supply circuit does sampling unit, processing unit and execution unit supply power.

2. The hardware control system for an intermediate frequency of a DC-18GHz spectrum analyzer as set forth in claim 1, wherein: the sampling unit comprises an ADC chip and a reference clock generation circuit which are connected with each other, wherein the ADC chip in the sampling unit is connected with the processing unit.

3. The hardware control system for an intermediate frequency of a DC-18GHz spectrum analyzer as set forth in claim 2, wherein: the signal sampled by the ADC chip is an intermediate frequency signal, the sampling frequency of the intermediate frequency signal is 75MHz, and the bandwidth is 20 MHz; the sampling frequency of the reference clock generation circuit is 102.4 MHz.

4. The hardware control system for an intermediate frequency of a DC-18GHz spectrum analyzer as set forth in claim 2, wherein: the processing unit comprises an FPGA chip and a peripheral circuit of the FPGA chip, the peripheral circuit of the FPGA chip comprises an audio output circuit, a radio frequency control interface circuit and a DDR2 storage unit, the audio output circuit, the radio frequency control interface circuit and the DDR2 storage unit are respectively connected with the FPGA chip, and the FPGA chip is connected with the ADC chip.

5. The hardware control system for an intermediate frequency of a DC-18GHz spectrum analyzer of claim 4, wherein: the audio output circuit includes a DAC chip.

6. The hardware control system for an intermediate frequency of a DC-18GHz spectrum analyzer of claim 5, wherein: the DAC chip is a DAC chip with the sampling frequency of 192KHz and the audio frequency of 24 bits.

7. The hardware control system for an intermediate frequency of a DC-18GHz spectrum analyzer as set forth in claim 1, wherein: the execution unit comprises an ARM chip, the ARM chip is connected with an LCD display circuit, an external communication interface circuit and a peripheral circuit of the ARM chip, the peripheral circuit of the ARM chip comprises a DDR3 memory unit, a NandFlash file storage unit, a system clock unit, a reset unit and a power supply unit, the DDR3 memory unit, the NandFlash file storage unit, the system clock unit, the reset unit and the power supply unit are respectively connected with the ARM chip, and the ARM chip is connected with an FPGA chip in the processing unit.

8. The hardware control system for an intermediate frequency of a DC-18GHz spectrum analyzer of claim 7, wherein: the ARM chip and the FPGA chip are connected through a general memory control bus GPMC.

9. The hardware control system for an intermediate frequency of a DC-18GHz spectrum analyzer of claim 8, wherein: the data bit width of the bus GPMC is 16 bits, and the highest bus clock is 100 Mbps.

10. A DC-18GHz spectrum analyzer, characterized by: comprising an intermediate frequency hardware control system as claimed in claim 1.