CN215818059U - Millimeter wave down conversion device - Google Patents

Millimeter wave down conversion device Download PDF

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CN215818059U
CN215818059U CN202120788991.XU CN202120788991U CN215818059U CN 215818059 U CN215818059 U CN 215818059U CN 202120788991 U CN202120788991 U CN 202120788991U CN 215818059 U CN215818059 U CN 215818059U
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millimeter wave
chip
input end
conversion device
dsp
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李晓龙
昌畅
罗剑
郭智华
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Sichuan Jiuzhou Electric Group Co Ltd
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Sichuan Jiuzhou Electric Group Co Ltd
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Abstract

The utility model relates to a millimeter wave down-conversion device, belongs to the field of millimeter wave communication, and solves the problems that an existing millimeter wave down-conversion device is complex in hardware structure and high in material cost. A millimeter wave down-conversion device comprises a Ka frequency band down-conversion circuit, a radio frequency transceiver chip, an FPGA and a DSP chip; the input end of the Ka frequency band down-conversion circuit is connected with a Ka frequency band millimeter wave signal, and the output end of the Ka frequency band down-conversion circuit is connected with the signal input end of the radio frequency transceiver chip; the output end of the radio frequency transceiver chip is connected with the FPGA data input end through a data bus; the DSP is connected with the FPGA through an EMIF bus; the DSP chip is connected with the radio frequency transceiver chip through an SPI bus.

Description

Millimeter wave down conversion device
Technical Field
The utility model relates to the technical field of millimeter wave communication, in particular to a millimeter wave down-conversion device.
Background
With the development of wireless communication technology and internet of things technology, the demand of small (micro) communication equipment is increased, and a receiving device with a simple hardware structure and small size, weight and power consumption is more and more emphasized.
The existing millimeter wave down-conversion device processes an RF signal by adopting a two-stage down-conversion mode. The RF signal of millimeter wave band firstly down-converts the signal to L wave band through the millimeter wave TR circuit, then adopts super heterodyne structure, down-converts the L wave band signal to analog intermediate frequency signal, then carries out AD sampling to the analog intermediate frequency signal to obtain digital signal, and finally completes the processing of the digital signal by the digital signal processing board to obtain the digital baseband signal. The existing millimeter wave down-conversion device has the disadvantages of complex hardware structure and higher material cost.
SUMMERY OF THE UTILITY MODEL
In view of the foregoing analysis, the present invention aims to provide a millimeter wave down conversion device based on a radio frequency transceiver chip, so as to solve the problem that the existing millimeter wave down conversion device has a complicated hardware structure and high material cost.
The purpose of the utility model is mainly realized by the following technical scheme:
a millimeter wave down-conversion device comprises a Ka frequency band down-conversion circuit, a radio frequency transceiver chip, an FPGA and a DSP chip;
the input end of the Ka frequency band down-conversion circuit is connected with a Ka frequency band millimeter wave signal, and the output end of the Ka frequency band down-conversion circuit is connected with the signal input end of the radio frequency transceiver chip;
the output end of the radio frequency transceiver chip is connected with the FPGA data input end through a data bus;
the DSP is connected with the FPGA through an EMIF bus; the DSP chip is connected with the radio frequency transceiver chip through an SPI bus.
Based on the further improvement of the scheme, the model of the radio frequency transceiver chip is CX9261 or CX 9261S.
Further, the Ka frequency band down-conversion circuit comprises an amplitude limiter, a low-noise amplifier component, a millimeter wave local oscillator unit, a frequency mixer and a low-pass filter; the input end of the amplitude limiter is connected with the Ka frequency band millimeter wave signal, and the output end of the amplitude limiter is connected with the input end of the low-noise amplifier component; the output end of the low-noise amplifier component is connected with the input end of the frequency mixer; the output end of the millimeter wave local oscillation unit is connected with the input end of the frequency mixer; the output end of the frequency mixer is connected with the input end of the low-pass filter, and the output end of the low-pass filter is connected with the signal input end of the radio frequency transceiving chip.
Further, the Ka frequency band down conversion device further comprises a band-pass filter, wherein the input end of the band-pass filter is connected with the output end of the amplitude limiter, and the output end of the band-pass filter is connected with the input end of the low-noise amplifier component.
Further, the Ka band down-conversion circuit further includes an isolator; the input end of the isolator is connected with the output end of the low-noise amplifier assembly, and the output end of the isolator is connected with the input end of the frequency mixer.
The DSP chip is connected with the time service component through a serial port.
Further, the system also comprises an Ethernet module; the Ethernet module is a W5100 Ethernet chip; and the address bus of the Ethernet module is connected with the address bus of the DSP chip, and the data bus of the Ethernet module is connected with the data bus of the DSP chip.
Furthermore, the millimeter wave down conversion device further comprises a power supply component, and the power supply component adopts an ADP2323 chip.
Further, the model of the DSP chip is TMS320F 28335.
Further, the model of the FPGA is XC7a 100T.
Compared with the prior art, the utility model can realize at least one of the following beneficial effects:
1. the radio frequency transceiver chip directly down-converts the radio frequency signal of the L frequency band to a baseband to generate digital I/Q two-path baseband signals, a zero intermediate frequency architecture is adopted, the circuit structure is simple, the number of devices can be greatly reduced, the integration level is higher, and the size and the volume of the device are smaller;
2. because the radio frequency transceiver chip can flexibly configure the frequency, when the first-level millimeter wave is mixed, the frequency hopping can be finished in the L frequency band by using a fixed-frequency local oscillator, so that the frequency hopping receiving in the millimeter wave frequency band is realized, and the material cost is saved;
3. because the radio frequency transceiver chip directly down-converts the signal to the baseband and then processes the signal, the processing clock of the device can be very low, and the dynamic power consumption of the whole device is reduced;
4. the radio frequency transceiver chip directly outputs baseband I/Q signals, digital down-conversion processing such as DDC (direct digital control) and the like is not needed in back-end processing, and the complexity and the clock frequency of the back-end processing are reduced.
In the utility model, the technical schemes can be combined with each other to realize more preferable combination schemes. Additional features and advantages of the utility model will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the utility model. The objectives and other advantages of the utility model may be realized and attained by the structure particularly pointed out in the written description and drawings.
Drawings
The drawings are only for purposes of illustrating particular embodiments and are not to be construed as limiting the utility model, wherein like reference numerals are used to designate like parts throughout.
Fig. 1 is a schematic view of a superheterodyne structure of a conventional millimeter wave down-conversion apparatus;
FIG. 2 is a schematic diagram of an internal circuit structure of an RF transceiver chip according to an embodiment of the present invention;
fig. 3 is a schematic circuit diagram of a millimeter wave down converter according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of the circuit connections of the DSP and the FPGA and the DSP and the Ethernet module according to the embodiment of the present invention;
FIG. 5 is a schematic diagram of the RF transceiver chip and the DSP and the circuit connection between the RF transceiver chip and the FPGA according to the embodiment of the present invention;
reference numerals:
1-a mixer; 2-FPGA; 3-a mixer; a 4-mixer; 5-radio frequency transceiver chip; 6-a mixer; 7-a mixer; an 8-Ka frequency band down-conversion circuit; 9-a mixer.
Detailed Description
The accompanying drawings, which are incorporated in and constitute a part of this application, illustrate preferred embodiments of the utility model and together with the description, serve to explain the principles of the utility model and not to limit the scope of the utility model.
The existing millimeter wave down-conversion device processes an RF signal by adopting a two-stage down-conversion mode. The millimeter-wave-band RF signal is firstly down-converted to the L-band by the millimeter-wave TR circuit, then the L-band signal is down-converted to the analog intermediate-frequency signal by adopting a superheterodyne structure, then the analog intermediate-frequency signal is AD-sampled to obtain a digital signal, and finally the digital signal is processed by the digital signal processing board to obtain a digital baseband signal, wherein the superheterodyne structure is shown in figure 1. The existing millimeter wave down-conversion device has the disadvantages of complex hardware structure and higher material cost.
Based on this, a specific embodiment of the present invention discloses a millimeter wave down conversion apparatus, as shown in fig. 3, including a Ka band down conversion circuit, a radio frequency transceiver chip, an FPGA, and a DSP chip; the input end of the Ka frequency band down-conversion circuit is connected with a Ka frequency band millimeter wave signal, and the output end of the Ka frequency band down-conversion circuit is connected with the signal input end of the radio frequency transceiver chip and is used for down-converting the Ka frequency band millimeter wave signal into an L frequency band signal; the output end of the radio frequency transceiver chip is connected with the FPGA data input end through a data bus and is used for converting the L-band signal into a digital baseband signal in a down-conversion mode; the DSP is connected with the FPGA through an EMIF bus; the DSP chip is connected to the rf transceiver chip through an SPI bus, as shown in fig. 4 and 5.
When the chip is implemented, the radio frequency transceiver chip selects CX9261 or CX9261S chips of China city chip science and technology limited, and the chip can realize multichannel, broadband and multi-mode RF signal transceiving. The chip adopts a zero intermediate frequency architecture, supports a frequency band of 70Mhz-2700Mhz, has a tunable channel bandwidth of 20kHz-60MHz, and integrates IQ correction and direct current offset correction circuits. The internal circuit structure of the chip is shown in fig. 2.
In implementation, the DSP chip may employ TMS320F 28335.
In implementation, XC7A100T is used for FPGA.
In implementation, as shown in FIG. 4, the DSP is connected to the FPGA via 20-bit address bus (i.e., DSP _ xa 0-DSP _ xa19) and 16-bit data bus (i.e., DSP _ xd 0-DSP _ xd15), and the DSP is connected to the FPGA via the 20-bit address bus
Figure BDA0003016383730000051
The pin is connected with a J14 pin of the FPGA and used for transmitting chip selection signals. And an XREADY pin of the DSP is connected with a K16 pin of the FPGA and used for transmitting a preparation signal. The XRNW pin of the DSP is connected with the K13 pin of the FPGA and is used for transmitting read-write selection signals. Of a DSP
Figure BDA0003016383730000052
The pin is connected with an M15 pin of the FPGA and used for transmitting a write enable signal. Of a DSP
Figure BDA0003016383730000053
The pin is connected with an M13 pin of the FPGA and used for transmitting a read enabling signal.
The DSP is also connected with the radio frequency transceiver chip through the SPI bus and is used for configuring parameters such as local vibration source and receiving gain which are arranged in the radio frequency transceiver chip. As shown in fig. 5, SPICLKA pin of DSP is connected with TRX1_ SCLK pin of rf transceiver chip CX9261, spisimia pin of DSP is connected with TRX1_ SDO pin of CX9261, SPISIMOA pin of DSP is connected with TRX1_ SDIO pin of CX9261, and SPISIMOA pin of DSP is connected with TRX1_ SDIO pin of CX9261
Figure BDA0003016383730000054
The pin is connected to the TRX1_ CSB pin of CX 9261. The program related to the configuration of the radio frequency transceiver chip by the DSP is a common method in the prior art, for example, the method for configuring the radio frequency transceiver chip CX9261 by the existing DSP is operated in the DSP, and the utility model does not relate to any improvement in software.
As shown in fig. 5, the rf transceiver chip CX9261 is connected to the FPGA through a 16-bit data bus, i.e., rx _ data 0-rx _ data15, and sends I, Q two paths of digital baseband signals to the FPGA through the data bus, so that the FPGA synchronizes the two paths of digital baseband signals. The program related to the FPGA for completing the synchronization of the two paths of digital baseband signals is a common method in the prior art, for example, the method for completing the synchronization of the two paths of baseband signals by the FPGA is operated in the FPGA, and the utility model does not relate to any improvement in the aspect of software. The TRX1_ MCLK pin of CX9261 is connected with the Y1 pin of the FPGA and used for transmitting clock signals. The TRX1_ RX _ FRAME pin of CX9261 is connected to the AA3 pin of the FPGA for transmitting and receiving data FRAME signals.
Specifically, the Ka frequency band down-conversion circuit comprises an amplitude limiter, a low-noise amplifier component, a millimeter wave local oscillation unit, a frequency mixer and a low-pass filter.
And the amplitude limiter is used for limiting the amplitude of an input signal, the input end of the amplitude limiter is the input end of the Ka frequency band down-conversion circuit and used for receiving the Ka frequency band millimeter wave signal, and the output end of the amplitude limiter is connected with the input end of the low-noise amplifier component.
The low-noise amplifier component is used for amplifying the radio-frequency signal of the Ka frequency band, and the output end of the low-noise amplifier component is connected with the input end of the frequency mixer.
The millimeter wave local oscillation unit comprises a local oscillation and a frequency multiplier, wherein the local oscillation is used for providing local oscillation signals, and the frequency multiplier is used for carrying out frequency multiplication on the local oscillation signals, such as 4-frequency-multiplication local oscillation signals. The output end of the frequency multiplier is connected with the input end of the mixer.
The mixer is used for mixing the input Ka frequency band signal with the frequency multiplication local oscillation signal. The output end of the mixer is connected with the input end of the low-pass filter.
The low-pass filter is used for completing the filtering function of the L frequency band. The signal output end of the low-pass filter is connected with the signal input end of the radio frequency transceiving signal.
The output end of the millimeter wave local oscillation unit is connected with the input end of the frequency mixer; the output end of the frequency mixer is connected with the input end of the low-pass filter, and the output end of the low-pass filter is connected with the signal input end of the radio frequency transceiving chip.
Specifically, in order to filter out unnecessary interference signals, a band-pass filter is further arranged between the amplitude limiter and the low-noise amplifier component of the Ka frequency band down-conversion circuit, the input end of the band-pass filter is connected with the output end of the amplitude limiter, and the output end of the band-pass filter is connected with the input end of the low-noise amplifier component.
Specifically, in order to effectively guarantee the standing wave requirement of the product and the requirement of the flatness index in the band, an isolator is arranged between the low-noise amplifier component and the mixer of the Ka frequency band down-conversion circuit; the input end of the isolator is connected with the output end of the low-noise amplifier assembly, and the output end of the isolator is connected with the input end of the mixer.
Specifically, the millimeter wave down conversion device provided by a specific embodiment of the present invention further includes a time service component, which is used to provide time for the whole device, and when implemented, the time service component can obtain the time through the built-in beidou module. The DSP chip is connected with the time service component through a serial port.
In particular, one embodiment of the present invention provides a millimeter wave down conversion device further comprising a power supply component for supplying a desired voltage and current to the device to ensure power supply. In practice, the power supply component may be an ADP2323 chip.
Specifically, a millimeter wave down conversion device provided in a specific embodiment of the present invention further includes an ethernet module, and the down conversion device in the embodiment of the present invention performs ethernet communication through the ethernet module. In implementation, the ethernet module may adopt a W5100 ethernet chip; and the address bus of the Ethernet module is connected with the address bus of the DSP chip, and the data bus of the Ethernet module is connected with the data bus of the DSP chip. The connection of the DSP to the W5100 is shown in FIG. 4. In practice, the ADDR 0-ADDR 14 pins of W5100 are respectively connected with XA 0-XA 14 pins of DSP, and the W5100 pin
Figure BDA0003016383730000071
Of pins and DSP
Figure BDA0003016383730000072
The pin connection is used for transmitting chip selection signals. W5100 of
Figure BDA0003016383730000073
Of pins and DSP
Figure BDA0003016383730000074
The pin connection is used for transmitting a read enable signal. W5100 of
Figure BDA0003016383730000075
Of pins and DSP
Figure BDA0003016383730000076
The pin connection is used for transmitting a write enable signal. W5100 of
Figure BDA0003016383730000077
The pin is connected to the EPWM6A pin of the DSP for transmitting interrupt signals. W5100 of
Figure BDA0003016383730000081
The pin is connected with the EPWM5B pin of the DSP for transmitting a reset signal. In implementation, the DSP communicates with the FPGA or the W5100 through chip selection signal selection.
Compared with the prior art, the millimeter wave down-conversion device provided by the embodiment has the following beneficial effects:
1. the radio frequency transceiver chip directly down-converts the radio frequency signals of the L frequency band to the baseband to generate digital I/Q two-path baseband signals, a zero intermediate frequency architecture is adopted, the circuit structure is simple, the number of devices can be greatly reduced, the integration level is higher, and the size and the volume of the device are smaller.
2. Because the radio frequency transceiver chip can be nimble configuration frequency, consequently, when first order millimeter wave mixing, can use the fixed frequency local oscillator, accomplish the frequency hopping at the L frequency channel, and then realize the frequency hopping receipt at the millimeter wave frequency channel, practiced thrift material cost.
3. Because the radio frequency transceiver chip directly down-converts the signal to the baseband and then processes the signal, the processing clock of the device can be very low, and the dynamic power consumption of the whole device is reduced.
4. The radio frequency transceiver chip directly outputs baseband I/Q signals, digital down-conversion processing such as DDC (direct digital control) and the like is not needed in back-end processing, and the complexity and the clock frequency of the back-end processing are reduced.
Those skilled in the art can understand that the program involved in configuring the rf transceiver chip by the DSP in the above embodiments is a common method in the prior art, for example, a method of configuring the rf transceiver chip CX9261 by the existing DSP is executed in the DSP. The program related to the FPGA for completing the synchronization of the two paths of digital baseband signals is a common method in the prior art, for example, the method for completing the synchronization of the two paths of baseband signals by the FPGA is operated in the FPGA, and the utility model does not relate to any improvement in the aspect of software. The utility model only needs to connect the devices with corresponding functions through the connection relation given by the embodiment of the utility model, and does not relate to any improvement in program software. The connection mode between the hardware devices with the corresponding functions is realized by the prior art by those skilled in the art, and is not described in detail herein.
The above description is only for the preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present invention are included in the scope of the present invention.

Claims (10)

1. A millimeter wave down-conversion device is characterized by comprising a Ka frequency band down-conversion circuit, a radio frequency transceiver chip, an FPGA and a DSP chip;
the input end of the Ka frequency band down-conversion circuit is connected with a Ka frequency band millimeter wave signal, and the output end of the Ka frequency band down-conversion circuit is connected with the signal input end of the radio frequency transceiver chip;
the output end of the radio frequency transceiver chip is connected with the FPGA data input end through a data bus;
the DSP is connected with the FPGA through an EMIF bus; the DSP chip is connected with the radio frequency transceiver chip through an SPI bus.
2. The millimeter wave down conversion device according to claim 1, wherein the type of the radio frequency transceiver chip is CX9261 or CX 9261S.
3. The millimeter wave down conversion device according to claim 1, wherein the Ka band down conversion circuit comprises a limiter, a low noise amplifier component, a millimeter wave local oscillation unit, a mixer and a low pass filter; the input end of the amplitude limiter is connected with the Ka frequency band millimeter wave signal, and the output end of the amplitude limiter is connected with the input end of the low-noise amplifier component; the output end of the low-noise amplifier component is connected with the input end of the frequency mixer; the output end of the millimeter wave local oscillation unit is connected with the input end of the frequency mixer; the output end of the frequency mixer is connected with the input end of the low-pass filter, and the output end of the low-pass filter is connected with the signal input end of the radio frequency transceiving chip.
4. The millimeter wave down conversion device according to claim 3, wherein the Ka band down conversion further comprises a band pass filter, an input of the band pass filter is connected to the output of the limiter, and an output of the band pass filter is connected to the input of the low noise amplifier component.
5. The millimeter wave down conversion device according to claim 3, wherein the Ka band down conversion circuit further comprises an isolator; the input end of the isolator is connected with the output end of the low-noise amplifier assembly, and the output end of the isolator is connected with the input end of the frequency mixer.
6. The millimeter wave down conversion device according to claim 1, further comprising a time service component, wherein the DSP chip is connected to the time service component via a serial port.
7. The millimeter wave down conversion device according to claim 1, further comprising an ethernet module; the Ethernet module is a W5100 Ethernet chip; and the address bus of the Ethernet module is connected with the address bus of the DSP chip, and the data bus of the Ethernet module is connected with the data bus of the DSP chip.
8. The millimeter wave down conversion device according to claim 1, further comprising a power supply component, wherein the power supply component employs an ADP2323 chip.
9. The millimeter wave down conversion device according to claim 1, wherein the model of the DSP chip is TMS320F 28335.
10. The millimeter wave down conversion device according to claim 1, wherein the FPGA is model XC7a 100T.
CN202120788991.XU 2021-04-12 2021-04-12 Millimeter wave down conversion device Active CN215818059U (en)

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