CN209859951U - Photoelectric integrated sensor for intelligent instrument - Google Patents

Photoelectric integrated sensor for intelligent instrument Download PDF

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CN209859951U
CN209859951U CN201920746808.2U CN201920746808U CN209859951U CN 209859951 U CN209859951 U CN 209859951U CN 201920746808 U CN201920746808 U CN 201920746808U CN 209859951 U CN209859951 U CN 209859951U
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楼卓格
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Zhejiang Institute of Mechanical and Electrical Engineering Co Ltd
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Zhejiang Institute of Mechanical and Electrical Engineering Co Ltd
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Abstract

The utility model belongs to the technical field of the photoelectric sensor technique and specifically relates to a photoelectric integrated sensor for intelligent instrument and meter, including silica-based photoelectric detector and transimpedance amplifier, silica-based photoelectric detector is connected to transimpedance amplifier, silica-based photoelectric detector realize photoelectric conversion and realize signal amplification by transimpedance amplifier, the utility model discloses can realize the monolithic photoelectricity integration of optical element and amplifier circuit module, not only effectual reduction chip's production and encapsulation cost can reduce the parasitic effect that causes owing to the interconnect line between the device simultaneously, improve the stability and the reliability of device.

Description

Photoelectric integrated sensor for intelligent instrument
Technical Field
The utility model relates to a photoelectric sensor technical field, specific field is a photoelectric integrated sensor for intelligent instrument.
Background
With the transformation and upgrading of the industrial industry, the market demands for the intellectualization of the industrial industry are more and more remarkable. Under the era background that the traditional industry faces transformation and upgrading, high efficiency and intellectualization will be the inevitable trend of industrial production. The intelligent capacity of industrial production depends on the integration level and the intelligent level of the intelligent instrument. The development of the current industrial industry needs to improve the industrial production technology continuously to meet the development demand of the market. The complicated and lengthy industrial production line can not meet the requirement of more efficient and intelligent transformation and upgrading of industrial production only by monitoring and detecting the traditional instrument.
To improve the level of intelligence, reduce cost and improve integration, the sensor integration and the level of intelligence of the smart meter are first improved. The photoelectric sensor is an important intelligent instrument sensor and can be used for optical signal detection and identification in industrial fields. At present, most of photoelectric sensors in the market have a discrete design of optical elements and electrical elements, and firstly, a photoelectric detector is used for photoelectric conversion, and then the photoelectric detector is connected to an amplifying circuit module to amplify the converted electric signals.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to provide a photoelectric integrated sensor for intelligent instrument to solve the problem that photoelectric sensor integrated level is low among the prior art, the intelligent level of instrument is low.
In order to achieve the above object, the utility model provides a following technical scheme: a photoelectric integrated sensor for an intelligent instrument comprises a silicon-based photoelectric detector and a transimpedance amplifier, wherein the silicon-based photoelectric detector is connected to the transimpedance amplifier, photoelectric conversion is achieved by the silicon-based photoelectric detector, and signal amplification is achieved by the transimpedance amplifier.
Preferably, the silicon-based photodetector adopts an interdigitated double-well pbase structure, and sequentially comprises, from bottom to top: the first layer is a P-type silicon substrate, the second layer is an N well and a P well, the third layer is P-type heavily doped silicon and N-type heavily doped silicon, the fourth layer is a metal aluminum and field oxide region, and the fifth layer to the seventh layer are all SiO2An insulating dielectric layer of Si as the eighth layer3N4And a surface passivation layer.
Preferably, 17N well regions are formed on the P-type silicon substrate at equal intervals, and N-type heavily doped silicon is formed on the upper surface of each N well region and is axially symmetrically distributed by taking the 9 th N well region as the center.
Preferably, 18P well regions are formed between every two adjacent N well regions at equal intervals, and P-type heavily doped silicon is formed on the upper surface of each P well region.
Preferably, 17N well regions are connected to form an interdigital structure, and N-type heavily doped silicon deposited metal aluminum on the upper surface of the N well region forms ohmic contact and is led out as the anode of the photoelectric detector.
Preferably, 18P well regions are connected to form an interdigital structure, and P-type heavily doped silicon deposited metal aluminum on the upper surface of the P well regions forms ohmic contact and is led out as the cathode of the photoelectric detector.
Preferably, the surface size of the silicon-based photodetector is 300 μm × 300 μm.
Preferably, the distance between the heavily-doped N-type silicon on the upper surface of the N well and the edge of the N well is not less than 0.4 μm, and the width of the heavily-doped N-type silicon is 2.5 μm.
Preferably, the distance between the P-type heavily doped silicon on the upper surface of the P well and the edge of the P well is not less than 0.4 μm, and the width is 2.3 μm.
Preferably, the heavily doped N-type silicon layer on the upper surface of the N well and the heavily doped P-type silicon layer on the upper surface of the P well are isolated by a field oxide region, and the width of the heavily doped N-type silicon layer is not less than 1 μm.
Compared with the prior art, the beneficial effects of the utility model are that: 1. the photoelectric detector adopts a standard 0.18 mu m CMOS process, and can realize monolithic photoelectric integration of the optical element and the amplifying circuit module. The production and packaging cost of the chip is effectively reduced, the parasitic effect caused by the interconnection line between the devices can be reduced, and the stability and reliability of the devices are improved;
2. the photoelectric detector in the utility model adopts the structure of 'inserted finger-shaped double-well P substrate', which can effectively reduce the junction capacitance of the device and overcome the defect of larger junction capacitance of the common silicon-based photoelectric detector, thereby leading the trans-impedance amplifying circuit to improve the bandwidth due to the reduction of the input junction capacitance;
3. the photoelectric detector and the single-chip photoelectric integration of the amplifying circuit module greatly improve the light receiving sensitivity;
4. the photoelectric detector 'inserted finger type double-well P substrate' structure of the utility model is more beneficial to the generation of photo-generated current and the collection of photo-generated current;
5. the utility model discloses a silicon-based monolithic optoelectronic integration is realized to the optoelectronic integration sensor, has reached higher integrated level and miniaturized requirement.
Drawings
FIG. 1 is a cross-sectional view of a silicon-based photodetector according to the present invention;
fig. 2 is a top view of the silicon-based photodetector structure of the present invention;
fig. 3 is a schematic diagram of the transimpedance amplifier circuit according to the present invention.
In the figure: 1. a P-type silicon substrate; 2. an N well region; 3. a P well region; 4. a field oxygen region; 5. an N-type heavily doped region; 6. a P-type heavily doped region; 7. first layer of SiO2An insulating dielectric layer; 8. metallic aluminum; 9. second layer of SiO2An insulating dielectric layer; 10. third layer of SiO2An insulating dielectric layer; 11. si3N4A surface passivation layer; 12. the anode of the silicon-based photoelectric detector; 13. a negative electrode of the silicon-based photodetector; 14. an input end of the transimpedance amplifier; 15. and a low potential end of the trans-impedance amplifier.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.
The utility model provides a technical scheme: a photoelectric integrated sensor for intelligent instruments is a silicon-based monolithic photoelectric integrated sensor prepared by adopting a standard 0.18 mu m CMOS process. Comprises a Photo-Detector (PD) and a transimpedance Amplifier (TIA). The silicon-based photoelectric detector is connected to the transimpedance amplifier, photoelectric conversion is achieved by the photoelectric detector, and signal amplification is achieved by the transimpedance amplifier.
The structure of the silicon-based photoelectric detector is an inserted finger-shaped double-well P substrate structure, and the structure comprises the following components in sequence from bottom to top: the first layer is P-type siliconA Substrate (P-Substrate); the second layer is an N Well (N-Well) and a P Well (P-Well); the third layer is P-type heavily doped silicon (P +) and N-type heavily doped silicon (N +); the fourth layer is a metallic aluminum (Al) and field oxide region; the fifth to seventh layers are SiO2An insulating dielectric layer; the eighth layer is Si3N4And a surface passivation layer. The metal aluminum is deposited on the surface of the silicon wafer through a sputtering process, and SiO2An insulating medium layer is attached to the silicon substrate by a deposition process, and Si3N4The surface passivation layer is attached to the SiO by a deposition process2And an insulating dielectric layer.
17N well regions are formed on the P-type silicon substrate at equal intervals, and N-type heavily doped silicon is formed on the upper surface of each N well region and is distributed axially symmetrically by taking the 9 th N well region as the center. 18P well regions are formed between every two adjacent N well regions at equal intervals, and P-type heavily doped silicon is formed on the upper surface of each P well region. And the 17N well regions are connected to form an interdigital structure, and the N-type heavily-doped silicon deposited metal aluminum on the upper surface of the N well region forms ohmic contact and is led out as the anode of the photoelectric detector. The 18P well regions are connected to form an interdigital structure, and P-type heavily doped silicon deposited metal aluminum on the upper surface of the P well regions forms ohmic contact and is led out as the cathode of the photoelectric detector. The leading-out electrode of the photoelectric detector is connected with the input end of the amplifying circuit.
The surface size of the silicon-based photoelectric detector is 300 mu m multiplied by 300 mu m. The distance between the N-type heavily-doped silicon on the upper surface of the N well and the edge of the N well is not less than 0.4 mu m, and the width of the N-type heavily-doped silicon is 2.5 mu m. The distance between the P-type heavily doped silicon on the upper surface of the P well and the edge of the P well is not less than 0.4 mu m, and the width of the P-type heavily doped silicon is 2.3 mu m. The N-type heavily doped silicon layer on the upper surface of the N well and the P-type heavily doped silicon layer on the upper surface of the P well are isolated by a field oxide region, and the width of the N-type heavily doped silicon layer is not less than 1 mu m. And metal aluminum is deposited on the N-type heavily doped silicon and the P-type heavily doped silicon to form ohmic contact.
The preparation steps of the silicon-based photoelectric detector are as follows:
(1) p-type silicon with the resistivity of 15-25 omega cm is used as a substrate;
(2) 17N well regions with the distance of 12 mu m and the width of 5.5 mu m are photoetched at equal intervals on a P-type silicon substrate, and the ion implantation dosage is 6 multiplied by 1012Forming an N well region;
(3) in the N well region18P well regions with the width of 5 μm are etched at equal intervals, and the ion implantation dosage is 9 multiplied by 1012The boron of (a) forms a P-well region;
(4) photoetching N-type heavily doped region, ion implantation dosage 4X 1015Forming an N-type heavily doped region by the arsenic;
(5) photoetching P-type heavily doped region, ion implantation dosage 2X 1015BF of2Forming a P-type heavily doped region;
(6) isolating field oxide regions between the heavily doped regions by adopting an oxidation process, wherein the thickness of the field oxide regions is 1 mu m;
(7) depositing a first layer of SiO2An insulating medium layer with the thickness of 1.5 mu m;
(8) photoetching a contact hole of 0.5 Mum multiplied by 0.5 Mum;
(9) depositing metal aluminum, photoetching electrodes attached to the upper surfaces of the N-type heavily doped silicon and the P-type heavily doped silicon, wherein the thickness of the electrodes is 0.2 mu m;
(10) depositing a second SiO layer2An insulating medium layer with the thickness of 1.2 mu m;
(11) depositing a third SiO layer2An insulating medium layer with the thickness of 0.2 mu m;
(12) deposition of Si3N4And a surface passivation layer with the thickness of 0.6 μm, so as to finish the preparation of the photoelectric detector.
Through this technical scheme, see fig. 1, the utility model discloses a silica-based photoelectric detector structural section. Adopting a P-type silicon substrate 1 with the resistivity of 15-25 omega cm, photoetching 17N well regions with the distance of 12 mu m and the width of 5.5 mu m on the silicon substrate 1 at equal intervals, and then implanting ions with the dosage of 6 multiplied by 1012The 17N well regions 2 are formed by phosphorus. 18P well regions of 5 μm width were lithographically equally spaced between the N well regions 2, followed by an ion implant dose of 9X 1012The boron of (a) forms the P-well region 3. And photoetching the N-type heavily doped active region and the P-type heavily doped active region, and realizing a field oxide region 4 by adopting an oxidation process, wherein the thickness of the field oxide region is 1 mu m. Photoetching N-type heavily doped regions on the upper surfaces of the 17N well regions, and then performing ion implantation with the dosage of 4 multiplied by 1015The arsenic forms a heavily N-doped region 5. Photoetching P-type heavily doped region on the upper surface of 18P-well regions, and then performing ion implantation with dosage of 2 × 1015BF of2Forming a heavily P-doped region 6. Depositing a first layer of SiO2Insulating medium layer7, thickness 1.5 μm. A0.5 μm by 0.5 μm contact hole is etched, and metallic aluminum 8 is deposited to a thickness of 0.2 μm. And photoetching required electrodes and connecting wires, and attaching metal aluminum to the upper surfaces of the N-type heavily doped silicon and the P-type heavily doped silicon. Depositing a second SiO layer2And the insulating medium layer 9 is 1.2 mu m thick. Depositing a third SiO layer2And the insulating medium layer 10 is 0.2 mu m thick. Deposition of Si3N4And the surface passivation layer 11 is 0.6 μm thick.
Referring to fig. 2, the present invention discloses a top view of a silicon-based photodetector structure. The N-type heavily doped region 5 on the upper surface of the N well 2 forms ohmic contact with the metal aluminum 8, is led out to serve as an anode 12 of the photoelectric detector and is connected to the input end of the transimpedance amplifier circuit. The P-type heavily doped region 6 on the upper surface of the P-well 3 forms ohmic contact with the metal aluminum 8, is led out to serve as a cathode 13 of the photoelectric detector, and is connected to a low potential of the transimpedance amplifier circuit. The surface size of the silicon-based photodetector is 300 μm × 300 μm. The distance between the N-type heavily-doped silicon on the upper surface of the N well and the edge of the N well is not less than 0.4 mu m, and the width of the N-type heavily-doped silicon is 2.5 mu m. The distance between the P-type heavily doped silicon on the upper surface of the P well and the edge of the P well is not less than 0.4 mu m, and the width of the P-type heavily doped silicon is 2.3 mu m.
Referring to fig. 3, the present invention discloses a schematic diagram of a mid-transimpedance amplifier circuit. A trans-impedance amplifier structure formed by cascading a common source amplifier and a source follower is selected. The input end 14 of the transimpedance amplifier is connected with the anode 12 of the photoelectric detector. The low potential end 15 of the transimpedance amplifier is connected with the cathode 13 of the photoelectric detector. Constant current source IrefProviding a reference current source, M, for the overall circuit4And M5And M4And M7Scaled replica of a constituent current mirror IrefThe current is applied. M1And M2Constituent equal-proportion current mirror replicated M again5The current of (2). M2And M7Is the current source load of the transimpedance amplifier. M6Tube and current source load M2The tube forms a common source amplifier and mainly plays a role in providing gain for the circuit. M3Tube and current source load M7The tube constitutes a source follower providing impedance matching and level shifting for the circuit. Introducing a feedback resistor RfAnd voltage parallel negative feedback is formed, so that the stability of the circuit is improved, and larger gain and smaller input current noise are provided.
Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.

Claims (10)

1. The utility model provides a photoelectricity integrated sensor for smart meter which characterized in that: the photoelectric conversion device comprises a silicon-based photoelectric detector and a transimpedance amplifier, wherein the silicon-based photoelectric detector is connected to the transimpedance amplifier, photoelectric conversion is realized by the silicon-based photoelectric detector, and signal amplification is realized by the transimpedance amplifier.
2. The optoelectronic integrated sensor for smart meter according to claim 1, characterized in that: the silicon-based photoelectric detector adopts an inserted finger-shaped double-trap P-substrate structure and sequentially comprises the following components from bottom to top: the first layer is a P-type silicon substrate, the second layer is an N well and a P well, the third layer is P-type heavily doped silicon and N-type heavily doped silicon, the fourth layer is a metal aluminum and field oxide region, and the fifth layer to the seventh layer are all SiO2An insulating dielectric layer of Si as the eighth layer3N4And a surface passivation layer.
3. The optoelectronic integrated sensor for smart meter according to claim 2, characterized in that: 17N well regions are formed on the P-type silicon substrate at equal intervals, and N-type heavily doped silicon is formed on the upper surface of each N well region and is distributed in axial symmetry by taking the 9 th N well region as the center.
4. The optoelectronic integrated sensor for smart meter according to claim 3, characterized in that: 18P well regions are formed between every two adjacent N well regions at equal intervals, and P-type heavily doped silicon is formed on the upper surface of each P well region.
5. The optoelectronic integrated sensor for smart meter according to claim 3, characterized in that: and the 17N well regions are connected to form an interdigital structure, and the N-type heavily-doped silicon deposited metal aluminum on the upper surface of the N well region forms ohmic contact and is led out as the anode of the photoelectric detector.
6. The optoelectronic integrated sensor for smart meter according to claim 4, characterized in that: the 18P well regions are connected to form an interdigital structure, and P-type heavily doped silicon deposited metal aluminum on the upper surface of the P well regions forms ohmic contact and is led out as the cathode of the photoelectric detector.
7. The optoelectronic integrated sensor for smart meter according to claim 1, characterized in that: the surface size of the silicon-based photoelectric detector is 300 mu m multiplied by 300 mu m.
8. The optoelectronic integrated sensor for smart meter according to claim 5, characterized in that: the distance between the N-type heavily-doped silicon on the upper surface of the N well and the edge of the N well is not less than 0.4 mu m, and the width of the N-type heavily-doped silicon is 2.5 mu m.
9. The optoelectronic integrated sensor for smart meter according to claim 6, characterized in that: the distance between the P-type heavily doped silicon on the upper surface of the P well and the edge of the P well is not less than 0.4 mu m, and the width of the P-type heavily doped silicon is 2.3 mu m.
10. The optoelectronic integrated sensor for smart meter according to claim 4, characterized in that: the N-type heavily doped silicon layer on the upper surface of the N well and the P-type heavily doped silicon layer on the upper surface of the P well are isolated by a field oxide region, and the width of the N-type heavily doped silicon layer is not less than 1 mu m.
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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110098202A (en) * 2019-05-23 2019-08-06 浙江机电职业技术学院 A kind of photoelectric integrated sensor and preparation method for intelligence instrument
CN113054912A (en) * 2021-03-09 2021-06-29 中国科学院半导体研究所 Photoelectric monolithic integrated chip of PIN detector and trans-impedance amplifier and preparation method
CN113114196A (en) * 2021-04-29 2021-07-13 全球能源互联网研究院有限公司 Photoelectric amplification integrated triode chip
CN113054912B (en) * 2021-03-09 2024-07-12 中国科学院半导体研究所 Photoelectric monolithic integrated chip of PIN detector and transimpedance amplifier and preparation method thereof

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110098202A (en) * 2019-05-23 2019-08-06 浙江机电职业技术学院 A kind of photoelectric integrated sensor and preparation method for intelligence instrument
CN113054912A (en) * 2021-03-09 2021-06-29 中国科学院半导体研究所 Photoelectric monolithic integrated chip of PIN detector and trans-impedance amplifier and preparation method
CN113054912B (en) * 2021-03-09 2024-07-12 中国科学院半导体研究所 Photoelectric monolithic integrated chip of PIN detector and transimpedance amplifier and preparation method thereof
CN113114196A (en) * 2021-04-29 2021-07-13 全球能源互联网研究院有限公司 Photoelectric amplification integrated triode chip
CN113114196B (en) * 2021-04-29 2023-10-13 全球能源互联网研究院有限公司 Photoelectric amplification integrated triode chip

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