CN209264906U - CVC-200T hardware intelligent test system - Google Patents
CVC-200T hardware intelligent test system Download PDFInfo
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- CN209264906U CN209264906U CN201821857646.1U CN201821857646U CN209264906U CN 209264906 U CN209264906 U CN 209264906U CN 201821857646 U CN201821857646 U CN 201821857646U CN 209264906 U CN209264906 U CN 209264906U
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Abstract
The utility model relates to a kind of CVC-200T hardware intelligent test systems, the test macro includes tested board, NI PXI cabinet and mating board, network load plate, industrial personal computer, gigabit switch, display, keyboard and mouse and scanner, and wherein tested board includes primary logical unit MLU plate and communications management unit CMU plate；The industrial personal computer connects tested board by NI PXI cabinet and mating board, and the industrial personal computer passes sequentially through gigabit switch, network load plate and tested board and carries out network communication, and the display, keyboard and mouse, scanner are separately connected industrial personal computer.Compared with prior art, the utility model has the advantage that man-machine interface is more friendly, facilitates operation, reduces development cost, and secondary development period is shorter etc..
Description
Technical field
The utility model relates to kind of a railway signals equipment system regions, more particularly, to a kind of CVC-200T hardware intelligent testing
Test system.
Background technique
CVC-200T board numerous types, design is also extremely complex, is made of many submodules, manual testing can not
Meets the needs of extensive board commercialization test.This complexity makes engineer reduce verifying and testing cost, more smart
The challenge that arduousness is faced on time to market (TTM) is shortened in quasi- reliable measurement.
Utility model content
The purpose of this utility model is exactly to provide a kind of CVC-200T to overcome the problems of the above-mentioned prior art
Hardware intelligent test system.
The purpose of this utility model can be achieved through the following technical solutions:
A kind of CVC-200T hardware intelligent test system, the test macro include tested board, NI PXI cabinet and mating
Board, network load plate, industrial personal computer, gigabit switch, display, keyboard and mouse and scanner, wherein tested board includes master
Logic unit MLU plate and communications management unit CMU plate；
The industrial personal computer connects tested board by NI PXI cabinet and mating board, and the industrial personal computer passes sequentially through
Gigabit switch, network load plate and tested board carry out network communication, the display, keyboard and mouse, scanner difference
Connect industrial personal computer.
Preferably, the industrial personal computer is the host computer for running the visual programming software LabVIEW based on NI.
Preferably, the tested board is slave computer.
Preferably, the NI PXI cabinet and mating board include 8360 plate of NI PXI-PCI, two pieces of PXI 8512
Plate, 8431 plate of PXI, 6509 digital I/O board of PXI and memory DATAPLUG.
Preferably, the industrial personal computer is separately connected two pieces of 8512 plates of PXI, PXI by 8360 plate of NI PXI-PCI
8431 plates, 6509 digital I/O board of PXI.
Preferably, two blocks of 8512 plates of PXI connect CMU plate by CAN transmission line, and 8431 plate of PXI connects
CMU plate is connect, 6509 digital I/O board of PXI connects MLU plate, and 6509 digital I/O board of PXI connects CMU plate, described
Memory DATAPLUG be separately connected MLU plate and CMU plate.
Preferably, the network load plate is connect by fixed plate with tested board.
Preferably, the NI PXI cabinet and mating plane card are connect by fixed plate with tested board.
Preferably, the fixed plate is connect by the pluggable terminal of VPC with tested board.
Compared with prior art, the utility model has the advantage that
1, using modularized design, system maintainability is strong；
2, using high-performance equipment, system reliability is improved；
3, test result automatically saves, and test dot coverage is higher, substantially increases testing efficiency and measuring accuracy, shortens
Commercialization process and time to market (TTM)；
4, visual programming software LabVIEW (existing software) of the system host computer test program based on NI, man-machine boundary
Face is more friendly, facilitates operation.
Detailed description of the invention
Fig. 1 is the test system structure schematic diagram of the utility model；
Fig. 2 is the MLU plate test report schematic diagram of the utility model.
Specific embodiment
The technical scheme in the embodiment of the utility model will be carried out clear, be fully described by, it is clear that described below
Embodiment is a part of the embodiment of the utility model, rather than whole embodiments.Based on the embodiments of the present invention, originally
Field those of ordinary skill every other embodiment obtained without making creative work all should belong to this
The range of utility model protection.
A kind of CVC-200T hardware intelligent test system of the utility model, including CVC-200T board slave computer test journey
Sequence, the host computer test program of visual programming software LabVIEW based on NI, tested board (including primary logical unit MLU
Plate, communications management unit CMU plate), auxiliary boards (220VAC power supply dispensing unit EDU-220 plate), NI PXI cabinet and mating
Board, network load plate, industrial personal computer, gigabit switch, display/keyboard mouse/scanner etc..Industrial personal computer by with NI
8360 board communications of PXI-PCI control other boards in NI cabinet, two blocks of 8512 plates of PXI by 100 meters of CAN transmission lines with
The connection of CMU plate, 8431 plate of PXI is connect with CMU plate carries out RS422 serial communication, and 6509 digital I/O board of PXI is connect with MLU plate
Fan signal is simulated, simulation train is connect with CMU plate and manipulates ATO signal, DATAPLUG (EEPROM) and MLU and CMU plate automatically
Connection.Industrial personal computer, gigabit switch, network load plate, tested board MLU and CMU plate are sequentially connected, and are run on industrial personal computer upper
Machine software runs slave computer software in tested board.Tested board is communicated by debugging serial interface with upper computer software, industry control
By interchanger, the progress network communication of network load plate, host computer sends control command simultaneously for machine and tested board MLU and CMU plate
The test data for receiving tested board MLU and CMU plate feedback, judges test result.Display, keyboard and mouse, scanner and work
The connection of control machine, display and keyboard and mouse can carry out human-computer interaction, and scanner can with typing tested board two dimensional code and MAC
Location information.
Slave computer, which has, uploads all tested board inside/outsides portion precision of timer, FLASH file system TFFS0/TFFS1/
TFFS2 read-write, the read-write of EEPROM (on small buckle FLASH) interface, reads slot position address, M-LVDS at the read-write of DATAPLUG interface
The function of high-speed serial bus test result can judge automatically test result, and be sent by debugging serial interface to host computer and be shown.
Slave computer has all 100,000,000/gigabits of tested board work network interface packet sending and receiving test function, can will test number
Send according to by gigabit switch, network load plate to host computer, host computer relays to slave computer after receiving, by slave computer into
Row judge automatically whether packet loss, error code, finally test result is sent by debugging serial interface to host computer and is shown.
Slave computer has tested board CMU plate RS422 serial ports packet sending and receiving test function, test data can be passed through NI
Whether 8431 plate of PXI is sent to host computer, and host computer relays to slave computer after receiving, judged automatically and lost by slave computer
Packet, error code, test result is finally sent by debugging serial interface to host computer show.
Slave computer has CAN mouthfuls of packet sending and receiving test functions of tested board CMU plate, test data can be passed through 100 meters
CAN transmission line connection 8512 plate of NI PXI send to host computer, host computer relays to slave computer after receiving, by slave computer into
Row judge automatically whether packet loss, error code, finally test result is sent by debugging serial interface to host computer and is shown.
Host computer has the function of that tested board CMU panel vehicle manipulates ATO interface testing, MLU plate fan interface test automatically
Pulse test signal can be sent by 6509 digital I/O board of NI PXI to slave computer, be judged automatically by slave computer by function
Whether frequency meets the requirements, and finally send to host computer test result by debugging serial interface and shows.
Slave computer has all tested board FPGA/ hardware/driving/BSP version number readback test functions, by test data
It is sent by debugging serial interface to host computer, is carried out judging automatically test result according to configuration file by host computer.
Slave computer has the function of all tested board sequence number programmings and readback contrastive test, by sequence number programming to plate
On, then by readback to test data sent by debugging serial interface to host computer, carried out judging automatically test result by host computer.
Slave computer has tested board MLU plate ECC status monitoring, USB interface read-write, board 5V/3.3V/1.8V/1.0V/
1.1V/0.9V supply voltage supervision, RTC clock, temperature sensor, hardware clock synchronization, NVRAM readwrite tests function, can
Test result is judged automatically, and is sent by debugging serial interface to host computer and is shown.
Host computer has login interface, and by inputting effective user name, this test macro just can be used in password.It logs in
While success, TFTP software is called directly, and minimize, loads board slave computer test program for network.
Host computer has board selection function, can be selected and multinomial selection with individual event.Selected board is surveyed parallel
Examination, board all of the above test item are also tested parallel.It at most can once test six blocks of MLU plates, two blocks of CMU plates.
Host computer has board configuration feature, is divided into plant produced mode and receiving inspection mode.Plant produced mode tool
Standby following function: it is scanned with scanner and inputs and configure the sequence number in board panel two dimensional code, scanning inputs and configures board
MAC Address, configuration RTC clock time, configuration debugging serial interface IP address；Receiving inspection mode has following function: reading board
Sequence number reads board MAC Address, configuration RTC clock time, configuration debugging serial interface IP address.The sequence number being configured on plate
Readback is wanted, carries out automatic comparison with the sequence number of scanning input.
Host computer has setting factory mode capabilities, and according to configuration file, the IP address of board and starting row information are set
It is set to factory state, and writes one 32 check words inside NVRAM.
Host computer, which has, starts test function, sends test initiation command, and receive the test data of slave computer upload, directly
It is finished to cycle tests, test can just terminate.It supports input test personnel name or work number, supports setting length of testing speech.
In test process, interface real-time display timing and remaining time information.
Host computer has the function of each test item test details of all tested boards of real time inspection, including test item
Current testing time, errors number, packet loss number, software/hardware error code and test result, test result are that red represent is surveyed
Examination failure (the case where test crash: generates error code in 1. test process；2. the testing time of any one test item be 0),
Green represents test and passes through.It can also look at the various version/part number/sequence number/titles of board, testing setup duration, test
Execute the information such as time, tester.
Host computer has the function of that test report automatically saves, and test report content is consistent with real-time query interface, test report
Announcement format is webpage version, the naming rule of test report: board title+sequence number+testing time+PASS/FAIL.
Host computer have board panel leds observing interface, can recorde each LED light position and charactron flashing or
Whether the state being always on is correct, is finally integrated into state in one test report with other test items.
Host computer first has to shake hands, after shaking hands successfully, can be tested, be held before starting to test or configure
Hand time-out then exits epicycle operation.Also, to avoid board from crashing, test still through the case where occur, system every five seconds week
Phase property checks the data that board reports.
Test macro can be safe and stable operation for a long time 48 hours or more.Test macro is if there is short circuit or exception
When situation, protection can be automatically cut off the power.
Specific embodiment is as follows
As shown in Figure 1, industrial personal computer is by controlling other boards in NI cabinet with 8360 board communications of NI PXI-PCI,
Two blocks of 8512 plates of PXI are connect by 100 meters of CAN transmission lines with CMU plate, and 8431 plate of PXI is connect with CMU plate carries out RS422 string
Port communications, 6509 digital I/O board of PXI are connect for simulating fan signal with MLU plate, are connect with CMU plate for simulating train certainly
Dynamic manipulation ATO signal, DATAPLUG (EEPROM) are connect with MLU and CMU plate.Industrial personal computer, gigabit switch, 100 rice noodles of simulation
Long 100,000,000/gigabit networking load board, tested board MLU/CMU plate are sequentially connected, and upper computer software is run on industrial personal computer, are tested
Slave computer software is run on board.Tested board is communicated by debugging serial interface with upper computer software, industrial personal computer and Board Under Test
Block MLU/CMU plate and network communication is carried out by interchanger, network load plate, host computer sends control command and receives tested board
The test data of MLU/CMU plate feedback, judges automatically test result.Display, keyboard and mouse, scanner and industrial personal computer connect,
Display and keyboard and mouse can carry out human-computer interaction, and scanner can be with typing tested board two dimensional code and mac address information.
Start and log in host computer, according to board type and quantity, selects tested board, option and installment tested board, such as
Fruit is plant produced mode, need to scan and configure board sequence number, scanning and configure MAC Address, configuration the RTC clock time,
Configure debugging serial interface IP address；If it is receiving inspection mode, needs to read board sequence number, reads board MAC Address, configuration
RTC clock time, configuration debugging serial interface IP address.After board is loaded into test program, the numeral method of board panel
" MLU " or " CMU ", host computer can then start to test, then input test personal information, and length of testing speech is arranged.It is testing
1 minute after beginning, the working condition of board all LED and charactron can be observed, and observation result is recorded in report；?
In test process, each test item can be judged automatically with each test item state of all tested boards of real time inspection, host computer
State, and with clear eye-catching red or Green Marker test result.No matter normally stop test or forces to stop surveying
Examination, test result will be all automatically saved in the report of webpage version.Finally factory mode can be set to board, so as to board application
On site.
As shown in Fig. 2, concurrent testing, test item include all test items of MLU plate simultaneously
1.EEPROM；2.DATAPLUG；3.NVRAM；4.TFFS0；5.TFFS1；6.TFFS2；7.USB0；8.USB1；
9.TIMER0；10.TIMER1；11.TIMER2；12.TIMER3；13.SYNC TIMER；14.RTC；15. voltage sensor；16.
Temperature sensor；17.NET1；18.NET2；19.NET3；20.M-LVDS0；21.M-LVDS1；22. fan 0；23. fan 1；
24.ACT/LINK LED；25. charactron.
If the corresponding board title of the panel numeral method of MLU and CMU, indicate board program of lower computer load at
Function, when the LINK LED on panel is always on, ACT LED often dodges, and indicates that board network communication is normal.Pass through the indicator light of host computer
LED and digital tubular state can be recorded in test report automatically for observing interface.
EEPROM, DATAPLUG, NVRAM are tested, slave computer every five seconds wipes the data of all sevtor address, then
Test data is written, and read data check whether it is consistent with the data of write-in, read and write it is consistent indicate to test passes through, otherwise test
Do not pass through, slave computer judges automatically test result and result is then transmitted to host computer record.
TFFS0/TFFS1/TFFS2/USB0/USB1 is tested, slave computer is to file system TFFS0/TFFS1/
File is written in TFFS2/USB0/USB1, and reads file and carry out BCC verification (exclusive or check), and verification is passed through by expression test,
Otherwise it tests and does not pass through, slave computer judges automatically test result and result is then transmitted to host computer record.
Precision of timer is tested, it is periodically accurate that timer internal and external timer verifys mutually by Interruption
Property, 1/50th expression that relative error is less than or equal to timed interval, which is tested, to be passed through, and it otherwise tests and does not pass through, slave computer
It judges automatically test result and result is then transmitted to host computer record.
Synchronised clock is tested, clock synchronism detection is done in the two boards card interconnection of adjacent conduit, and synchronised clock is in 2ms
The Counter Value in disconnected period, the counter difference values between interruption should be 1000 twice in succession, and error range is [- 5 ,+5], in model
It encloses interior expression test to pass through, otherwise tests and do not pass through, slave computer judges automatically test result and result is then transmitted to host computer note
Record.
Supply voltage supervision to be tested, slave computer monitors supply voltage 5V/3.3V/1.8V/1.0V/1.1V/0.9V, when
When voltage is over-voltage or under-voltage (deviation range for exceeding voltage ± 5%), slave computer can be notified in a manner of logical break
Host computer.
Temperature sensor is tested, the board temperature read is transmitted to host computer by slave computer, and host computer is to temperature value
It is judged automatically, threshold value upper and lower limits are that foundation is defined, and is recorded in configuration file with empirical value.
Gigabit networking is tested, it is desirable that 512 byte of data packet length, in the case of transmission 20KB per second, not packet loss, do not miss
Code, expression test pass through, otherwise test and do not pass through, and slave computer judges automatically test result and result is then transmitted to host computer note
Record.
For M-LVDS0/M-LVDS1 bus test, the two boards card of adjacent conduit mutually sends out bus data and control signal,
When there is packet loss/error code, indicate that test does not pass through, otherwise test passes through, and slave computer judges automatically test result and then passes result
It is recorded to host computer.
For FPGA/BSP/ driving/hardware version numbers test, slave computer is read in version number information, with configuration file
Anticipated release is consistent, indicates that test passes through, otherwise tests and do not pass through, host computer judges automatically test result and then is transmitted to result
Host computer record.
Above description is only a specific implementation of the present invention, but the protection scope of the utility model is not limited to
In this, anyone skilled in the art within the technical scope disclosed by the utility model, can be readily occurred in various
Equivalent modifications or substitutions, these modifications or substitutions should be covered within the scope of the utility model.Therefore, this is practical
Novel protection scope should be subject to the protection scope in claims.
Claims (9)
1. a kind of CVC-200T hardware intelligent test system, which is characterized in that the test macro includes tested board, NI PXI machine
Case and mating board, network load plate, industrial personal computer, gigabit switch, display, keyboard and mouse and scanner, wherein Board Under Test
Card includes primary logical unit MLU plate and communications management unit CMU plate；
The industrial personal computer connects tested board by NI PXI cabinet and mating board, and the industrial personal computer passes sequentially through gigabit
Interchanger, network load plate and tested board carry out network communication, and the display, keyboard and mouse, scanner are separately connected
Industrial personal computer.
2. a kind of CVC-200T hardware intelligent test system according to claim 1, which is characterized in that the industrial personal computer
For the host computer for running the visual programming software LabVIEW based on NI.
3. a kind of CVC-200T hardware intelligent test system according to claim 1, which is characterized in that the Board Under Test
Card is slave computer.
4. a kind of CVC-200T hardware intelligent test system according to claim 1, which is characterized in that the NI PXI
Cabinet and mating board include 8360 plate of NI PXI-PCI, two blocks of 8512 plates of PXI, 8431 plate of PXI, 6509 Digital I/O of PXI
Plate and memory DATAPLUG.
5. a kind of CVC-200T hardware intelligent test system according to claim 4, which is characterized in that the industrial personal computer
Two blocks of 8512 plates of PXI, 8431 plate of PXI, 6509 digital I/O board of PXI are separately connected by 8360 plate of NI PXI-PCI.
6. a kind of CVC-200T hardware intelligent test system according to claim 4, which is characterized in that described two pieces
8512 plate of PXI connects CMU plate by CAN transmission line, and 8431 plate of PXI connects CMU plate, 6509 number of PXI
I O board connects MLU plate, and 6509 digital I/O board of PXI connects CMU plate, and the memory DATAPLUG is separately connected MLU
Plate and CMU plate.
7. a kind of CVC-200T hardware intelligent test system according to claim 1, which is characterized in that the network is negative
Support plate is connect by fixed plate with tested board.
8. a kind of CVC-200T hardware intelligent test system according to claim 1, which is characterized in that the NI PXI
Cabinet and mating plane card are connect by fixed plate with tested board.
9. a kind of CVC-200T hardware intelligent test system according to claim 7 or 8, which is characterized in that described consolidates
Fixed board is connect by the pluggable terminal of VPC with tested board.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821857646.1U CN209264906U (en) | 2018-11-12 | 2018-11-12 | CVC-200T hardware intelligent test system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821857646.1U CN209264906U (en) | 2018-11-12 | 2018-11-12 | CVC-200T hardware intelligent test system |
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| Publication Number | Publication Date |
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| CN209264906U true CN209264906U (en) | 2019-08-16 |
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| CN201821857646.1U Active CN209264906U (en) | 2018-11-12 | 2018-11-12 | CVC-200T hardware intelligent test system |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111162974A (en) * | 2020-01-22 | 2020-05-15 | 卡斯柯信号有限公司 | Configurable two-out-of-two hardware platform aging test system and test method |
| CN112636994A (en) * | 2019-10-09 | 2021-04-09 | 中兴通讯股份有限公司 | Device testing method, system, network device and readable storage medium |
-
2018
- 2018-11-12 CN CN201821857646.1U patent/CN209264906U/en active Active
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112636994A (en) * | 2019-10-09 | 2021-04-09 | 中兴通讯股份有限公司 | Device testing method, system, network device and readable storage medium |
| WO2021068686A1 (en) * | 2019-10-09 | 2021-04-15 | 中兴通讯股份有限公司 | Device testing method, system, network device, and readable storage medium |
| CN111162974A (en) * | 2020-01-22 | 2020-05-15 | 卡斯柯信号有限公司 | Configurable two-out-of-two hardware platform aging test system and test method |
| CN111162974B (en) * | 2020-01-22 | 2024-05-03 | 卡斯柯信号有限公司 | Configurable two-out-of-two hardware platform aging test system and test method |
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