CN209119111U - GaN base vertical-type power transistor device - Google Patents

Abstract

Present disclose provides a kind of GaN base vertical-type power transistor devices；Wherein, the GaN base vertical-type power transistor device, comprising: N-type GaN substrate；The N-type GaN epitaxial layer being formed in N-type GaN substrate；Al (In, Ga) the N back barrier layer being formed in N-type GaN epitaxial layer；Thin potential barrier Al (In, Ga) the N/GaN heterojunction structure being formed on Al (In, Ga) N back barrier layer；The passivation layer and grid and source electrode being formed on thin potential barrier Al (In, Ga) the N/GaN heterojunction structure, the drain electrode being formed in N-type GaN substrate.Disclosure GaN base vertical-type power transistor device effectively reduces the technology difficulty of GaN base vertical-type power transistor, to make the technique of its compatible conventional GaN base transversal device, application of the GaN base vertical-type power transistor in more high current and power conversion has been pushed.

Description

GaN base vertical-type power transistor device

Technical field

This disclosure relates to technical field of semiconductor device more particularly to a kind of GaN base vertical-type power transistor device.

Background technique

Although transverse structure GaN base power transistor has large scale, inexpensive and good CMOS technology is compatible, But the more difficult very high output electric current of acquisition, and unavoidably by problems such as the collapsings of the high-tension current as caused by surface state Puzzlement.Therefore, the advantages that enhanced GaN base power transistor of vertical structure exports electric current by big, and low current collapses, in high pressure The application fields such as high-power electric and electronic have very big application potential.

Utility model content

(1) technical problems to be solved

In view of above-mentioned technical problem, present disclose provides a kind of GaN base vertical-type power transistor devices, utilize N-type or P Type Al (In, Ga) N carries on the back potential barrier and replaces p-GaN current barrier layer in conventional vertical structure, improves the breakdown voltage of device, makes device Part has better processing compatibility, has pushed GaN base vertical-type power transistor answering in more high current and power conversion With.

(2) technical solution

According to one aspect of the disclosure, a kind of GaN base vertical-type power transistor device is provided, comprising:

N-type GaN substrate；

The N-type GaN epitaxial layer being formed in the N-type GaN substrate；

Al (In, Ga) the N back barrier layer being formed in the N-type GaN epitaxial layer；

Thin potential barrier Al (In, Ga) the N/GaN heterojunction structure being formed on the Al (In, Ga) N back barrier layer；

The passivation layer and grid and source electrode being formed on thin potential barrier Al (In, Ga) the N/GaN heterojunction structure, are formed in Drain electrode in N-type GaN substrate.

In some embodiments, the N-type GaN epitaxial layer being formed in the N-type GaN substrate is the first N-type GaN epitaxy Layer；

Thin potential barrier Al (In, Ga) the N/GaN heterojunction structure includes: to be formed on the Al (In, Ga) N back barrier layer Second N-type GaN epitaxial layer and the thin barrier layer of Al (In, Ga) N being formed in the second N-type GaN epitaxial layer.

In some embodiments, Al (In, Ga) the N back barrier layer is prepared using MOCVD, MBE or HVPE technique, thickness It is N-type or p-type doping back barrier layer between 1nm~1000nm；

Thin potential barrier Al (In, Ga) the N/GaN heterojunction structure is using MOCVD, MBE or HVPE technique regrowth is formed.

In some embodiments, Al (In, Ga) the N back barrier layer is AlGaN or AlInN ternary alloy layer, either AlInGaN quaternary alloy layer；

The thin barrier layer of Al (In, Ga) N can be AlGaN in thin potential barrier Al (In, Ga) the N/GaN heterojunction structure of regrowth Or AlInN ternary alloy layer or AlInGaN quaternary alloy, thickness is between 0nm to l0nm.

In some embodiments, Al (In, Ga) the N back barrier layer is AlGaN ternary alloy layer, and Al component is between 0 Between~100%；Or Al (In, Ga) the N back barrier layer is AlInN ternary alloy layer, Al component is between 0%~100% Between.

In some embodiments, which is formed through carries on the back in the Al (In, Ga) N Barrier layer carries on the back barrier layer through the Al (In, Ga) N and protrudes into the etched features of the first N-type GaN epitaxial layer；Institute The second N-type GaN epitaxial layer is stated to be formed on (In, the Ga) N of the Al containing etched features back barrier layer；The etched features are logical Cross the groove etched technology of grid (gate recess) formation.

In some embodiments, in thin potential barrier Al (In, Ga) the N/GaN heterojunction structure of the regrowth between grid and source electrode Two-dimensional electron gas (2-D Electron Gas, 2-DEG) pass through SiN, SiO₂Or polar AlN passivation layer restores；

The SiN, SiO₂Or polar AlN passivation layer uses MOCVD, LPCVD, the preparation of PECVD or ALD technique.

(3) beneficial effect

It can be seen from the above technical proposal that disclosure GaN base vertical-type power transistor device at least has and following has One of beneficial effect:

(1) p-GaN current barrier layer in conventional vertical structure is replaced using Al (In, Ga) N back potential barrier, provides a kind of electricity The stronger current barrier layer of blocking capability is flowed, the breakdown voltage of device is further improved.

(2) p-GaN current barrier layer in conventional vertical structure is replaced using Al (In, Ga) N back potential barrier, effectively reduced The technology difficulty of GaN base vertical-type power transistor, to make the technique of its compatible conventional GaN base transversal device.

(3) disclosure is realized using thin potential barrier Al (In, Ga) N/GaN heterojunction structure without etching the thin gesture of Al (In, Ga) N The enhanced grid structure built has pushed application of the GaN base vertical-type power transistor in more high current and power conversion.

Detailed description of the invention

By the way that shown in attached drawing, above and other purpose, the feature and advantage of the disclosure will be more clear.In all the attached drawings Identical appended drawing reference indicates identical part, does not deliberately draw attached drawing by actual size equal proportion scaling, it is preferred that emphasis is show The purport of the disclosure out.

Fig. 1 is the structural schematic diagram according to one GaN base vertical-type power transistor device of the embodiment of the present disclosure.

Fig. 2 is the structural schematic diagram according to two GaN base vertical-type power transistor device of the embodiment of the present disclosure.

Fig. 3 a-3g is the manufacturing process schematic diagram according to three GaN base vertical-type power transistor device of the embodiment of the present disclosure.

Specific embodiment

For the purposes, technical schemes and advantages of the disclosure are more clearly understood, below in conjunction with specific embodiment, and reference The disclosure is further described in attached drawing.

It should be noted that similar or identical part all uses identical figure number in attached drawing or specification description.It is attached The implementation for not being painted or describing in figure is form known to a person of ordinary skill in the art in technical field.In addition, though this Text can provide the demonstration of the parameter comprising particular value, it is to be understood that parameter is equal to corresponding value without definite, but can connect It is similar to be worth accordingly in the error margin or design constraint received.The direction term mentioned in embodiment, for example, "upper", "lower", "front", "rear", "left", "right" etc. are only the directions with reference to attached drawing.Therefore, the direction term used is for illustrating not to use To limit the protection scope of the disclosure.

Present disclose provides a kind of GaN base vertical-type power transistor devices, grow one on thicker n-GaN epitaxial layer Thin layer Al (In, Ga) N Back Barrier (back barrier layer), by the groove etched technology of grid (gate-recess) by area of grid Al (In, Ga) N back barrier layer etch away, utilize MOCVD or MBE technology regrowth thin barrier structure Al (In, Ga) N (potential barrier Layer)/GaN heterojunction structure, later in one layer of passivation layer of heterojunction structure surface deposition, production source electrode, grid and drain electrode form crystal Pipe structure.The disclosure carries on the back potential barrier with Al (In, Ga) N and replaces p-GaN current barrier layer in conventional vertical structure, improves device Breakdown voltage makes device have better processing compatibility, has pushed GaN base vertical-type power transistor in more high current and function Application in rate conversion.

Embodiment one

In the present embodiment, it to form the etched features through the Al (In, Ga) N back barrier layer, and is formed and is passed through It is through at the passivation layer and the thin barrier layer of the Al (In, Ga) N and protrudes into the source in the second lightly doped n type GaN epitaxial layer The GaN base vertical-type power transistor device of the disclosure is illustrated for polar region domain.As shown in Figure 1, the device includes:

The first lightly doped n type grown above heavily doped N-type GaN substrate 101, the heavily doped N-type GaN substrate 101 Grown above GaN epitaxial layer 102, the first lightly doped n type GaN epitaxial layer 102 Al (In, Ga) N back barrier layer 103, The second lightly doped n type GaN epitaxial layer 104 for being grown above Al (In, Ga) N back barrier layer 103, through the Al Grown above (In, Ga) the N back etched features of barrier layer 103, the second lightly doped n type GaN epitaxial layer 104 Al (In, Ga) the thin barrier layer 105 of N, the thin barrier layer 105 of the Al (In, Ga) N are formed with the second lightly doped n type GaN epitaxial layer 104 Thin potential barrier Al (In, Ga) N/GaN heterojunction structure, grow above thin potential barrier Al (In, Ga) the N/GaN heterojunction structure it is blunt Change layer 106 and grid 107 and source electrode 108, and the drain electrode 109 being formed in the N-type GaN substrate.

Optionally, Al (In, Ga) the N back barrier layer 103 is prepared using MOCVD, MBE or HVPE technique, thickness It is N-type or p-type doping back barrier layer between 1nm to 1000nm.

Al (In, Ga) the N back barrier layer can be AlGaN or AlInN ternary alloy layer or AlInGaN quaternary Alloy.Wherein, Al (In, Ga) is if N carries on the back barrier layer AlGaN ternary alloy layer, and Al component is between 0 and 100%；Al (In, Ga) if N carries on the back barrier layer AlInN ternary alloy layer, Al component is between 0% and 100%.

Al (In, Ga) the N back barrier layer of the area of grid be even crossed and carve by complete etching (cross quarter range from Al (In, Ga) N carries on the back potential barrier/interface n--GaN to the interface n--GaN/n+-GaN).

Thin potential barrier Al (In, Ga) N/GaN heterojunction structure is using MOCVD on the etching structure, MBE or HVPE technique is again Growth is formed.

The thin barrier layer 105 of Al (In, Ga) N can be in thin potential barrier Al (In, Ga) the N/GaN heterojunction structure of regrowth AlGaN or AlInN ternary alloy layer or AlInGaN quaternary alloy, thickness is between 0nm to 10nm.

Two-dimensional electron gas (2- in thin potential barrier Al (In, Ga) the N/GaN heterojunction structure of regrowth between grid and source electrode D Electron Gas, 2-DEG) it 111 is by SiN, SiO₂Or polar AlN is passivated to restore.Wherein, the SiN, SiO₂Or polar AlN passivation layer 106 can use MOCVD, LPCVD, the preparation of PECVD or ALD technique.

Optionally, the generation type of the grid 107 are as follows:

The middle position of the passivation layer 106 is performed etching to be formed through 107th area of grid of the passivation layer 106 Domain covers gate insulating layer 110 on the surface in 107 region of grid, and contacts in 110 disposed thereon of gate insulating layer Grid 107 of the metal as the GaN base vertical-type power transistor device.

The generation type of the source electrode 108 are as follows:

To the passivation layer 106, thin potential barrier Al (In, Ga) the N/GaN heterojunction structure and second lightly doped n type The end positions of GaN epitaxial layer 104 are performed etching to be formed through the passivation layer 106 and the thin potential barrier of the Al (In, Ga) N Layer 105 simultaneously protrudes into 108 region of source electrode in the second lightly doped n type GaN epitaxial layer 104, and heavy in 108 region of source electrode Source electrode 108 of the product contact metal as the GaN base vertical-type power transistor device, wherein the source electrode 108 can both lead to It crosses injection silicon, chromium or selenium formation heavily doped layer and the Al (In, Ga) N back barrier layer 103 is connected, institute can also be made by etching It states source electrode 108 and the Al (In, Ga) N back barrier layer is connected directly.

The generation type of the drain electrode 109 are as follows:

Depositing contact metal is as the GaN base vertical-type power crystal below the heavily doped N-type GaN substrate 101 The drain electrode 109 of tube device.

Embodiment two

In the present embodiment, as shown in Fig. 2, unlike previous embodiment, the etched features are through the Al (In, Ga) N back barrier layer simultaneously protrudes into the first lightly doped n type GaN epitaxial layer, other identical as previous embodiment, herein not It repeats again.

Embodiment three

In the present embodiment, to form the etched features through the Al (In, Ga) N back barrier layer, and is formed and run through In the passivation layer and the thin barrier layer of the Al (In, Ga) N and protrude into the source electrode in the second lightly doped n type GaN epitaxial layer The manufacturing process of disclosure GaN base vertical-type power transistor device is illustrated for region.As shown in Figure 3 a-3g, described Process includes:

S11, the one lightly doped n type GaN epitaxial layer 102 of growth regulation above heavily doped N-type GaN substrate 101.

S12, Al (In, Ga) N back barrier layer 103 is grown above the first lightly doped n type GaN epitaxial layer 102.

Optionally, the thickness of Al (In, Ga) the N back barrier layer 103 is less than the first lightly doped n type GaN epitaxial layer Thickness.

Optionally, Al (In, Ga) the N back barrier layer 103 that grows above the first lightly doped n type GaN epitaxial layer 102 wraps It includes:

Using Metal Organic Chemical Vapor Deposition method, molecular beam epitaxy or hydride vapour phase epitaxy method in institute It states and grows the Al (In, Ga) N back barrier layer 103 above the first lightly doped n type GaN epitaxial layer 102.

S13, the Al (In, Ga) N back barrier layer 103 is performed etching, is carried on the back with being formed through the Al (In, Ga) N The etched features of barrier layer 103, or barrier layer 103 and the first lightly doped n type GaN epitaxy are carried on the back to the Al (In, Ga) N Layer 102 performs etching, to be formed through the Al (In, Ga) N back barrier layer 103 and protrude into first lightly doped n type The etched features of GaN epitaxial layer 102.

S14,103 top growth regulation of barrier layer, two lightly doped n type GaN is carried on the back in Al (In, the Ga) N containing the etched features Epitaxial layer 104.

S15, the thin barrier layer 105 of Al (In, Ga) N is grown above the second lightly doped n type GaN epitaxial layer 104, it is described The thin barrier layer 105 of Al (In, Ga) N forms thin potential barrier Al (In, Ga) N/ with the second lightly doped n type GaN epitaxial layer 104 GaN heterojunction structure.

Optionally, the thin barrier layer 105 of Al (In, Ga) N is grown above the second lightly doped n type GaN epitaxial layer 104 to wrap It includes:

Using Metal Organic Chemical Vapor Deposition method, molecular beam epitaxy or hydride vapour phase epitaxy method in institute It states and grows the thin barrier layer 105 of the Al (In, Ga) N above the second lightly doped n type GaN epitaxial layer 104.

Optionally, the thin barrier layer 105 of Al (In, the Ga) N be A1GaN perhaps AlInN ternary alloy layer or AlInGaN quaternary alloy layer, wherein the thin barrier layer 105 with a thickness of 0nm to 10nm.

S16, the growth of passivation layer 106 above thin potential barrier Al (In, Ga) the N/GaN heterojunction structure.

Optionally, the growth of passivation layer 106 above thin potential barrier Al (In, Ga) the N/GaN heterojunction structure includes:

Utilize Metal Organic Chemical Vapor Deposition method, low-pressure chemical vapour deposition technique, plasma enhancing Learn vapour deposition process or atomic layer deposition method the growth of passivation layer above thin potential barrier Al (In, Ga) the N/GaN heterojunction structure 106；

Wherein, the passivation layer 106 is silicon nitride, silica, aluminium nitride or GaN.

S17, production grid 107, source electrode 108 and drain electrode 109, to form the GaN base vertical-type power transistor device.

Optionally, the production grid 107, source electrode 108 and drain electrode 109 include:

The middle position of the passivation layer 106 is performed etching to be formed through 107th area of grid of the passivation layer 106 Domain covers gate insulating layer 110 on the surface in 107 region of grid, and in 107 insulating layer of grid, 110 disposed thereon Contact grid 107 of the metal as the GaN base vertical-type power transistor device；

To the passivation layer 106, thin potential barrier Al (In, Ga) the N/GaN heterojunction structure and second lightly doped n type The end positions of GaN epitaxial layer 104 are performed etching to be formed through the passivation layer 106 and the thin potential barrier of the Al (In, Ga) N Layer simultaneously protrudes into 108 region of source electrode in the second lightly doped n type GaN epitaxial layer 104, and in 108 area deposition of source electrode Contact source electrode 108 of the metal as the GaN base vertical-type power transistor device, wherein the source electrode 108 can both pass through Inject silicon, chromium or selenium form heavily doped layer and the Al (In, Ga) N back barrier layer 103 is connected, can also be made by etching described Source electrode 108 and the Al (In, Ga) N back barrier layer 103 are connected directly；

Depositing contact metal is as the GaN base vertical-type power crystal below the heavily doped N-type GaN substrate 101 The drain electrode 109 of tube device.

So far, attached drawing is had been combined the embodiment of the present disclosure is described in detail.According to above description, art technology Personnel should have clear understanding to the disclosure.

It should be noted that in attached drawing or specification text, the implementation for not being painted or describing is affiliated technology Form known to a person of ordinary skill in the art, is not described in detail in field.In addition, the above-mentioned definition to each element and not only limiting Various specific structures, shape or the mode mentioned in embodiment, those of ordinary skill in the art can carry out simply more it Change or replaces.

Similarly, it should be understood that in order to simplify the disclosure and help to understand one or more of each open aspect, Above in the description of the exemplary embodiment of the disclosure, each feature of the disclosure is grouped together into single implementation sometimes In example, figure or descriptions thereof.However, the disclosed method should not be interpreted as reflecting the following intention: i.e. required to protect The disclosure of shield requires features more more than feature expressly recited in each claim.More precisely, such as right As claim reflects, open aspect is all features less than single embodiment disclosed above.Therefore, it then follows tool Thus claims of body embodiment are expressly incorporated in the specific embodiment, wherein each claim conduct itself The separate embodiments of the disclosure.

Particular embodiments described above has carried out further in detail the purpose of the disclosure, technical scheme and beneficial effects Describe in detail it is bright, it is all it should be understood that be not limited to the disclosure the foregoing is merely the specific embodiment of the disclosure Within the spirit and principle of the disclosure, any modification, equivalent substitution, improvement and etc. done should be included in the guarantor of the disclosure Within the scope of shield.

Claims (7)

1. a kind of GaN base vertical-type power transistor device characterized by comprising

N-type GaN substrate；

The N-type GaN epitaxial layer being formed in the N-type GaN substrate；

Al (In, Ga) the N back barrier layer being formed in the N-type GaN epitaxial layer；

Thin potential barrier Al (In, Ga) the N/GaN heterojunction structure being formed on the Al (In, Ga) N back barrier layer；

The passivation layer and grid and source electrode being formed on thin potential barrier Al (In, Ga) the N/GaN heterojunction structure are formed in described Drain electrode in N-type GaN substrate；Wherein,

Al (In, Ga) the N back barrier layer is AlGaN or AlInN ternary alloy layer or AlInGaN quaternary alloy layer；

The thin barrier layer of Al (In, Ga) N is that AlGaN or AlInN ternary is closed in thin potential barrier Al (In, Ga) the N/GaN heterojunction structure Layer gold or AlInGaN quaternary alloy.

2. GaN base vertical-type power transistor device according to claim 1, which is characterized in that be formed in the N-type N-type GaN epitaxial layer in GaN substrate is the first N-type GaN epitaxial layer；

Thin potential barrier Al (In, Ga) the N/GaN heterojunction structure includes: second be formed on the Al (In, Ga) N back barrier layer N-type GaN epitaxial layer and the thin barrier layer of Al (In, Ga) N being formed in the second N-type GaN epitaxial layer.

3. GaN base vertical-type power transistor device according to claim 1 or 2, which is characterized in that

Al (In, Ga) N back barrier layer using the preparation of MOCVD, MBE or HVPE technique, thickness between 1nm~1000nm it Between, it is N-type or p-type doping back barrier layer；

Thin potential barrier Al (In, Ga) the N/GaN heterojunction structure is using MOCVD, MBE or HVPE technique regrowth is formed.

4. GaN base vertical-type power transistor device according to claim 3, which is characterized in that

In thin potential barrier Al (In, Ga) the N/GaN heterojunction structure of regrowth the thin barrier layer thickness of Al (In, Ga) N between 0nm extremely Between 10nm.

5. GaN base vertical-type power transistor device according to claim 4, which is characterized in that Al (In, the Ga) N Carrying on the back barrier layer is AlGaN ternary alloy layer, and Al component is between 0~100%；Or Al (In, Ga) the N back barrier layer is AlInN ternary alloy layer, Al component is between 0%~100%.

6. GaN base vertical-type power transistor device according to claim 2, which is characterized in that the enhanced GaN power Transistor device, which is formed through, to be carried on the back barrier layer in the Al (In, Ga) N or carries on the back barrier layer simultaneously through the Al (In, Ga) N Protrude into the etched features of the first N-type GaN epitaxial layer；The second N-type GaN epitaxial layer is formed in containing the etched features Al (In, Ga) N back barrier layer on；The etched features are formed by the groove etched technology of grid (gate recess).

7. GaN base vertical-type power transistor device according to claim 1, which is characterized in that

Two-dimensional electron gas (2-D in thin potential barrier Al (In, Ga) the N/GaN heterojunction structure of regrowth between grid and source electrode Electron Gas, 2-DEG) pass through SiN, SiO₂Or polar AlN passivation layer restores；

The SiN, SiO₂Or polar AlN passivation layer uses MOCVD, LPCVD, the preparation of PECVD or ALD technique.