CN209088820U

CN209088820U - A kind of Autocompensation three-phase AC voltage stabilizer

Info

Publication number: CN209088820U
Application number: CN201821877075.8U
Authority: CN
Inventors: 肖会芹; 凌云; 武海华
Original assignee: Hunan University of Technology
Current assignee: Hunan University of Technology
Priority date: 2018-11-15
Filing date: 2018-11-15
Publication date: 2019-07-09
Anticipated expiration: 2028-11-15

Abstract

A kind of Autocompensation three-phase AC voltage stabilizer is made of auto compensating type three-phase main circuit, compensation control unit, trigger unit, error detection control unit.Every phase main circuit includes compensator transformer, auto-transformer, thyristor switch group and relay protection switch, is realized and is compensated using identical compensation way.It compensates control unit and exports three-phase Trig control signal to trigger unit and error detection control unit；Trigger unit issues the on-off of thyristor in thyristor switch group in trigger signal control three-phase main circuit according to the Trig control signal of input；Whether mistake starts/stops the protection to thyristor switch group in three-phase main circuit according to the three-phase Trig control signal of input for error detection control unit.The voltage-stablizer is while realizing mutual lock control; also whether occur logic error to carry out open-circuit-protection to thyristor switch group control circuit; the protection for course of work exception is effectively strengthened, keeps the course of work of AC voltage regulator more stable, reliable.

Description

A kind of Autocompensation three-phase AC voltage stabilizer

Technical field

The utility model relates to power technique fields, especially a kind of Autocompensation three-phase AC voltage stabilizer.

Background technique

Existing compensation single-phase and three-phase AC voltage stabilizer, its advantage is that voltage stabilized range is wide, waveform almost without distortion, Overall efficiency is high, and workload-adaptability is strong.Its principle is the height situation according to input voltage, is automatically controlled on compensator transformer just The switching of the different winding coils of grade winding, using the no-load voltage ratio relationship of primary side Working winding and secondary windings, or passes through tune The alive mode of institute, provides the voltage compensation of two-way multi gear, to realize the purpose of voltage-regulation voltage-stabilization on whole armature winding.

The shortcoming of existing compensation type ac voltage stabilizer is: being changed using the movement of motor control carbon brush to compensation transformation When device magnet exciting coil applies different voltages, carbon brush is prone to wear, and is often broken down.Using electronic switch switching by the way of come into On the switching of the different winding coils of armature winding on row compensator transformer, or adjustment armature winding when institute's making alive, electronics Being delayed to turn off for switch be easy to cause power supply short circuit failure；Using the program mode (PM) control electronic switch switching of single-chip microcontroller, PLC etc. When, the problems such as program runs fast, crashes, will also result in voltage-stablizer failure, or cause power supply short circuit because of control logic mistake therefore Barrier.

Summary of the invention

In order to solve the problems of existing compensation type ac voltage stabilizer, the utility model provides a kind of Autocompensation Three-phase AC voltage stabilizer is made of auto compensating type three-phase main circuit, compensation control unit, trigger unit, error detection control unit； Auto compensating type three-phase main circuit is three-phase four-line system, the AC power source phase voltage of every phase using identical compensation circuit with Compensation way realizes compensation；Every phase main circuit includes that compensator transformer, auto-transformer, thyristor switch group and relay are protected Shield switch.

Control unit is compensated by three benefits including analog-to-digital conversion coding circuit, delay protection circuit, interlocking control circuit Control circuit composition is repaid, the identical compensation control circuit of three structures carries out voltage to three-phase alternating-current supply phase voltage respectively and adopts Sample exports three-phase Trig control signal；It compensates control unit and exports three-phase Trig control signal to trigger unit and error detection control Unit；Trigger unit inputs three-phase Trig control signal, issues three-phase trigger signal to auto compensating type three-phase main circuit, control In three-phase main circuit in thyristor switch group thyristor on-off；Error detection control unit inputs three-phase Trig control signal, output Protection control signal.

In each phase, analog-to-digital conversion coding circuit carries out voltage sample to AC power source phase voltage, and output voltage grade is compiled Code value；Delay protection circuit input voltage grade encoded radio, voltage class encoded radio and not trigger region control after output delay Signal；Voltage class encoded radio after interlocking control circuit input delay and not trigger region control signal, output triggering control letter Number；The voltage class encoded radio is made of 4 bits.

In each phase, analog-to-digital conversion coding circuit includes AC supply voltage detection circuit and analog to digital conversion circuit；Exchange Voltage detection circuit samples the AC power source phase voltage virtual value of input, obtains the sampling of AC power source phase voltage Value；Analog to digital conversion circuit input ac power phase voltage sampled value, output voltage grade encoded radio.

In each phase, analog to digital conversion circuit includes biproduct parting A/D converter ICL7109, reference capacitance C13, automatic tune Zero capacitance C12, integrating capacitor C11, integrating resistor R11, resistance RF1, resistance RF2, crystal oscillator XT1；Operation/holding of ICL7109 End RUN, low byte enable end LBEN, test lead TEST connect high level, and chip select terminal CE/LOAD, mode end MODE, high byte make Energy end HBEN, oscillator selection end OSC SEL connect low level；Crystal oscillator XT1 is connected to the oscillator input OSC IN of ICL7109 With oscillator output end OSC OUT；One end connection composition product of integrating capacitor C11, integrating resistor R11, automatic zero set capacitor C12 Parallel circuit, other end are respectively connected to integrating capacitor end INT, buffer output end BUF, the automatic zero set capacitor of ICL7109 Hold AZ；The high-end IN HOL input ac power voltage sample value of the Differential Input of ICL7109, Differential Input low side IN LO connection To the reference voltage output end REF OUT of ICL7109；Resistance RF1, resistance RF2 divide the reference voltage of ICL7109, La tension de reference Uref est is obtained on resistance RF2, la tension de reference Uref est is input to the reference voltage positive input terminal REF IN of ICL7109 + and reference voltage negative input end REF IN-；Reference capacitance C13 is connected to the reference capacitance positive input terminal REF CAP+ of ICL7109 With reference capacitance negative input end REF CAP-；The V+ of ICL7109 is positive power source terminal, is connected to positive supply；The V- of ICL7109 is negative Power end is connected to negative supply；The digital ground terminal and simulation ground terminal of ICL7109 is connected to publicly；Voltage class encoded radio From 4 output end outputs of highest of ICL7109.

In each phase, by delay detection module and not, trigger region control signal generator module forms delay protection circuit；Prolong When detection module in include 4 identical delay detection circuits, each delay detection circuit postponed to obtain to input signal Output signal after delay, while Edge check is carried out to input signal, export Edge check signal；4 delay detection circuits Signal delay is carried out to 4 voltage class encoded radios respectively, 4 voltage class encoded radios after being postponed, and to 4 electricity It presses grade encoded radio to carry out Edge check, obtains 4 Edge check signals；Trigger region control signal generator module will not input 4 Edge check signals be converted to not trigger region control signal output.

In the delay detection module of each phase, each delay detection circuit includes resistance RY3, capacitor CY3, phase inverter FY5, phase inverter FY6, NAND gate FY7 or door FY8, NAND gate FY9；Phase inverter FY5 input terminal is connected to input signal end；Electricity One end of resistance RY3 is connected to phase inverter FY5 output end, and other end is respectively connected to one end of capacitor CY3, NAND gate FY7 The input terminal of an input terminal of one input terminal or door FY8, phase inverter FY6；The other end of capacitor CY3 is connected to ground terminal, Another input terminal of NAND gate FY7 is connected to input signal end or another input terminal of door FY8 is connected to input Signal end；2 input terminals of NAND gate FY9 are respectively connected to NAND gate FY7 output end or door FY8 output end；Phase inverter FY6 Output end is the output signal end after delay；NAND gate FY9 output end is Edge check signal output end.

In each phase, trigger region control signal generator module is not with 4 input signal ends or door FY10；Or door 4 input signal ends of FY10 are respectively connected to the Edge check signal output end in 4 delay detection circuits；Or door FY10 Trigger region does not control signal for output end output.

In each phase, interlocking control circuit is ROM memory；5 address input ends of ROM memory input respectively not to be touched 4 voltage class encoded radios after sending out area's control signal and delay；8 data output ends output triggering control of ROM memory Signal.

In each phase, error detection control unit with door FK1, protection control circuit and 3 ROM discrimination modules by forming；3 8 address input ends of ROM discrimination module input 8 Trig control signals of three-phase respectively；The data of 3 ROM discrimination modules The triggering control that output end exports three-phase respectively differentiates signal；The triggering control of three-phase differentiates that signal is respectively connected to and door FK1 Input terminal；Triggering control, which is exported, with door FK1 differentiates resultant signal；Triggering control differentiates that the triggering control of resultant signal and three-phase is sentenced The equal high level of level signal is effective.

In each phase, when the Trig control signal mistake of ROM discrimination module judgement input, triggering control is made to differentiate signal In vain, otherwise effectively.

In each phase main circuit, thyristor switch group has 8 bidirectional thyristors；The bucking coil of compensator transformer is connected on In phase line；Auto-transformer has 4 output taps, after first 4 ipsilateral bidirectional thyristor one end are in parallel, are connected to compensation and become One end of the magnet exciting coil of depressor, the other end of first 4 ipsilateral bidirectional thyristors are respectively connected to 4 output taps； After second 4 ipsilateral bidirectional thyristor one end are in parallel, it is connected to the other end of the magnet exciting coil of compensator transformer, second is same The other end of 4 bidirectional thyristors of side is respectively connected to 4 output taps；The input winding and relay of auto-transformer Normal open switch series connection after, be connected in parallel to phase line output terminal and zero line side；The normally closed switch of relay is connected in parallel on compensator transformer and encourages The both ends of magnetic coil.

When the triggering of three-phase control differentiates that signal is all effective, triggering control differentiates that resultant signal is effective, protection control electricity Road controls the normal open switch closure of relay in three-phase main circuit, normally closed switch disconnects；When the triggering control of three-phase differentiates signal When being not all of effective, triggering control differentiates that resultant signal is invalid, and relay is normal in protection control circuit control three-phase main circuit Switch disconnects, normally closed switch is closed.

The beneficial effects of the utility model are: the method be applied to using compensator transformer group and thyristor switch group into The Autocompensation three-phase AC voltage stabilizer of row voltage compensation ensure that each phase thyristor switch group of Autocompensation three-phase main circuit In ipsilateral thyristor do not simultaneously turn on, that is, while realizing thyristor mutual lock control, also to the fault being likely to occur or Person is that logic error judges, controls whether trigger pulse issues according to judging result, simultaneously switches off the one of auto-transformer Secondary side power supply, carries out the protection of three-phase thyristor switching group, effectively strengthens the Autocompensation three-phase AC voltage stabilizer needle To the protection of course of work exception；When thyristor switch group is in guard mode, if fault either logic Normal logic control state is eliminated and reentered to mistake, then can be automatically stopped the guard mode of thyristor switch group and make It is in compensation work state again；Do not switched using the switching of the program mode (PM) control thyristor of single-chip microcontroller, PLC etc., is avoided Voltage-stablizer failure caused by the problems such as program runs fast, crashes.Above-mentioned function makes the course of work of compensation three-phase alternating current pressure stabilizing It is more stable, reliable.

Detailed description of the invention

Fig. 1 is the system composition block diagram of Autocompensation three-phase AC voltage stabilizer；

Fig. 2 is the composition block diagram of A phase compensation control circuit；

Fig. 3 is the A phase main circuit in Autocompensation three-phase main circuit embodiment 1；

Fig. 4 is the A phase main circuit in Autocompensation three-phase main circuit embodiment 2；

Fig. 5 is A phase analog-to-digital conversion coding circuit embodiment 1；

Fig. 6 is A phase analog-to-digital conversion coding circuit embodiment 2；

Fig. 7 is that A phase delay protects circuit embodiments block diagram；

Fig. 8 is the delay detection circuit embodiment 1 for encoding value signal Y11 in delay detection module needle to voltage class；

Fig. 9 is the delay detection circuit embodiment 2 for encoding value signal Y11 in delay detection module needle to voltage class；

Figure 10 is the delay detection circuit embodiment 3 for encoding value signal Y11 in delay detection module needle to voltage class；

Figure 11 is that trigger region does not control signal generator module embodiment to A phase；

Figure 12 is that A phase delay protects split-phase in the middle part of circuit to close waveform diagram；

Figure 13 is the embodiment of interlocking control circuit, wherein Figure 13 (a) is A phase interlocking control circuit embodiment 1, Figure 13 It (b) is A phase interlocking control circuit embodiment 2；

Figure 14 is the trigger circuit embodiment that bidirectional thyristor SR1 is triggered in trigger unit；

Figure 15 is error detection control unit embodiment.

Specific embodiment

Below in conjunction with attached drawing, the utility model is described in further detail.

Fig. 1 is the system composition block diagram of Autocompensation three-phase AC voltage stabilizer, the output of compensation control unit and A, B, C three-phase Corresponding Trig control signal P5A, P5B, P5C are to trigger unit and error detection control unit；Trigger unit is according to the three-phase of input Trig control signal P5A, P5B, P5C issue three-phase trigger signal P6 to Autocompensation three-phase main circuit, control A, B, C three-phase The on-off of thyristor in main circuit thyristor switch group；The three-phase Trig control signal P5A of error detection control unit judgement input, Whether P5B, P5C are effective Trig control signal, and the working power according to judging result control trigger unit, issue protection Signal is controlled to Autocompensation three-phase main circuit, the thyristor switch group in three-phase main circuit is protected.

Compensation control unit is made of the compensation control circuit of A, B, C three-phase, and Fig. 2 is the composition of A phase compensation control circuit Block diagram, analog-to-digital conversion coding circuit carry out voltage sample to A phase AC power source phase voltage, and the electricity of A phase is exported after analog-to-digital conversion Press grade encoded radio P2A；Delay protection circuit input voltage grade encoded radio P2A, the voltage class encoded radio after output delay P3A and not trigger region control signal P4A；Voltage class encoded radio P3A and A phase after interlocking control circuit input delay does not trigger Area controls signal P4A, exports the Trig control signal P5A of A phase.B phase, the structure of the compensation control circuit of C phase, function, control Logical AND A phase is identical, carries out voltage sample and control to B phase, C phase AC power source phase voltage respectively, and output B phase, C phase trigger Control signal P5B, P5C.

Fig. 3 is the A phase main circuit in Autocompensation three-phase main circuit embodiment 1, including compensator transformer TB1 and self coupling become Depressor TB2,6 bidirectional thyristor SR1-SR6 collectively constitute A phase thyristor switch group, fuse FU1 and relay normally open switch KA- 1, relay normally closed switch KA-2 form A phase relay and protect circuit.

The bucking coil of compensator transformer TB1 is connected in A phase phase line, and phase line input terminal is LA1, output end LA2. Voltage on TB1 magnet exciting coil is controlled by A phase thyristor switch group.Auto-transformer TB2 has 3 outputs tap C1, C2, C3, It is connected to one end of TB1 magnet exciting coil after one end of bidirectional thyristor SR1, SR3, SR5 is in parallel, other the one of SR1, SR3, SR5 End is respectively connected to tap C1, C2, C3；TB1 magnet exciting coil is connected to after one end of bidirectional thyristor SR2, SR4, SR6 are in parallel Other end, the other end of SR2, SR4, SR6 are then respectively connected to tap C1, C2, C3.If auto-transformer TB2 tap C1, Output voltage U12 between C2 is different from the output voltage U23 between C2, C3, then thyristor switch group is up to forward direction U12, forward direction U23, forward direction U12+U23, reversed U12, reversed U23, reversed U12+U23 totally 6 kinds of magnet exciting coil voltage compensation states, additional one kind 0 voltage compensation state when input voltage is within normal range (NR), the AC power source phase voltage of A phase phase line input terminal LA1 input 7 voltage ranges can be at most divided into and compensate control.In Fig. 3, N is zero curve, and G11, G12 to G61, G62 are respectively double Trigger signal input terminal to thyristor SR1 to SR6.In Fig. 3, bidirectional thyristor SR1, SR3, SR5 form ipsilateral thyristor, double Another ipsilateral thyristor is formed to thyristor SR2, SR4, SR6；To avoid short circuit, cannot there are 2 and 2 simultaneously in ipsilateral thyristor A above thyristor simultaneously turns on；For example, SR1, SR3 cannot be simultaneously turned on, and SR4, SR6 cannot be simultaneously turned on, etc..

Fig. 4 is the A phase main circuit in Autocompensation three-phase main circuit embodiment 2, including compensator transformer TB1 and self coupling become Depressor TB2,8 bidirectional thyristor SR1-SR8 collectively constitute A phase thyristor switch group, and fuse FU1 and relay normally open are opened It closes KA- 1, relay normally closed switch KA-2 composition A phase relay and protects circuit.

In Fig. 4, the bucking coil of compensator transformer TB1 is connected in A phase phase line, and phase line input terminal is LA1, and output end is LA2.Voltage on TB1 magnet exciting coil is controlled by thyristor switch group.Auto-transformer TB2 have 4 output tap C1, C2, C3, C4, are connected to one end of TB1 magnet exciting coil after one end of bidirectional thyristor SR1, SR3, SR5, SR7 is in parallel, SR1, SR3, The other end of SR5, SR7 are respectively connected to tap C1, C2, C3, C4；One end of bidirectional thyristor SR2, SR4, SR6, SR8 are simultaneously Be connected to the other end of TB1 magnet exciting coil after connection, the other end of SR2, SR4, SR6, SR8 be then respectively connected to tap C1, C2,C3,C4.Output voltage U23, C3, C4 if the output voltage U12 between auto-transformer TB2 tap C1, C2, between C2, C3 Between output voltage U34 it is respectively different, then thyristor switch group include forward direction U12, forward direction U23, forward direction U34, forward direction U12+ U23, forward direction U23+U34, forward direction U12+U23+U34, reversed U12, reversed U23, reversed U34, reversed U12+ U23, reversed U23+ U34, reversed U12+U23+U34 totally 12 kinds of magnet exciting coil voltage compensation states, a kind of additional input voltage is within normal range (NR) When 0 voltage compensation state, phase line input terminal LA1 input A phase AC power source phase voltage can be divided into most 13 voltages Section compensates control.In Fig. 4, N is zero curve, and G11, G12 to G81, G82 are respectively the touching of bidirectional thyristor SR1 to SR8 Signalling input terminal.In Fig. 4, the ipsilateral thyristor of bidirectional thyristor SR1, SR3, SR5, SR7 composition, bidirectional thyristor SR2, SR4, SR6, SR8 form another ipsilateral thyristor；To avoid short circuit, there cannot be 2 and 2 or more brilliant locks in ipsilateral thyristor simultaneously Pipe simultaneously turns on；For example, SR1, SR7 cannot be simultaneously turned on, and SR4, SR8 cannot be simultaneously turned on, etc..

Each bidirectional thyristor in Fig. 3, Fig. 4 can be substituted with the unidirectional thyristor of 2 reverse parallel connections.Fig. 3, Fig. 4 In, relay normally open switch and relay normally closed switch composition relay protection switch.

Autocompensation three-phase main circuit is three-phase four-line system, and the main circuit of A, B, C three-phase uses identical circuit knot Structure and form respectively compensate the phase voltage of A, B, C phase, i.e., B, C two-phase use with A phase main circuit identical circuit structure With compensation way, the phase voltage of B, C phase is compensated respectively.

Analog-to-digital conversion coding circuit carries out voltage sample to AC power source phase voltage, by AC power source phase voltage waving interval The voltage of range exports the voltage class encoded radio that binary system is constituted after analog-to-digital conversion.It is mutually electric to A, B, C three-phase alternating-current supply Pressure carries out voltage sample and output voltage grade encoded radio is all made of identical circuit.

Fig. 5 is A phase analog-to-digital conversion coding circuit embodiment 1, and FD1 is that real available value detects device LTC1966, LTC1966 AC supply voltage detection circuit is constituted with transformer TV1, capacitor CV1, capacitor CV2, resistance RV1, resistance RV2, for from phase The A phase AC power source phase voltage virtual value of line LA1 and zero curve N input measures, and obtains the sampling of A phase AC power source phase voltage Value U1.When phase line LA1 is changed to connection B phase, the phase line of C phase respectively, B phase, the sampling of the AC power source phase voltage of C phase are respectively obtained Value.UIN1, UIN2 of LTC1966 is alternating voltage difference input terminal, and USS is the negative supply input terminal that can be grounded, and UDD is Positive supply input terminal, GND are ground terminal, and EN is that low level effectively enables control signal, and UOUT is voltage output end, and COM is Output voltage return terminal.

In Fig. 5, FD2 is biproduct parting A/D converter ICL7109, is used for AC power source phase voltage waving interval range Voltage divide into voltage class section and be converted to binary system composition voltage class encoded radio output.In Fig. 5, ICL7109 Operation/holding end RUN, low byte enable end LBEN, test lead TEST meet high level, chip select terminal CE/LOAD, mode end MODE, high byte enable end HBEN, oscillator selection end OSC SEL connect low level, and work is continuing (i.e. automatic to repeat) turn Change mode and the direct output mode of high byte；Crystal oscillator XT1 be connected to ICL7109 oscillator input OSC IN and oscillator it is defeated Outlet OSC OUT；One end connection composition integrating circuit of integrating capacitor C11, integrating resistor R11, automatic zero set capacitor C12, separately Outer one end is respectively connected to the integrating capacitor end INT, buffer output end BUF, automatic zero set capacitance terminal AZ of ICL7109； The Differential Input of ICL7109 high-end IN HOL input ac power phase voltage sampled value U1, Differential Input low side IN LO are connected to Reference voltage output end REF OUT；Resistance RF1, resistance RF2 divide reference voltage, obtain reference voltage on resistance RF2 Uref, Uref are input to reference voltage positive input terminal REF IN+ and reference voltage negative input end REF IN-；Reference capacitance C13 It is connected to reference capacitance positive input terminal REF CAP+ and reference capacitance negative input end REF CAP-；The V+ of ICL7109 is positive supply End, is connected to power supply+VCC；The V- of ICL7109 is negative power end, is connected to power supply-VCC；The GND of ICL7109 is digitally End, COMMON are simulation ground terminal, are connected to publicly GND.

By taking A phase as an example, if the AC power source phase voltage fluctuation range of input is 220V ± 10%, it is desirable that use compensation master Circuit embodiments 1 are stablized to be exported in the range of 220V ± 2%, and AC power source phase voltage waving interval range is 242V To 198V, the analog-to-digital conversion coding circuit embodiment 1 of Fig. 5 is used at this time, can will be inputted in 242V to the A phase phase between 198V Voltage is divided into 7 voltage class sections that section voltage swing is 6.4V, and the voltage in 3 voltage class sections therein, which is higher than, to be wanted The output voltage range asked needs to carry out drop compensation；The voltage in 3 voltage class sections is lower than desired output voltage model It encloses, needs to carry out boosting compensation；1 voltage class section carries out 0 voltage compensation, i.e., within desired output voltage range Uncompensation.The voltage range of 6.4V is not more than 220V ± 1.5%, meets requirement of the output control within 220V ± 2%； The corresponding AC supply voltage waving interval in 7 voltage class sections of 6.4V is 242.4V to 197.6V, covers practical wave Dynamic range.It is compensated using the A phase main circuit in the compensation main circuit embodiment 1 of Fig. 3, and auto-transformer TB2's is defeated Voltage U12 is low out, U23 high；Voltage U23 is 2 times of voltage U12；Then the input voltage of auto-transformer TB2 is alternating current 220V, When only making the magnet exciting coil voltage of TB1 of output voltage U12, TB1 offset voltage is 6.4V；The input electricity of auto-transformer TB2 Pressure is alternating current 220V, and when only making the magnet exciting coil voltage of TB1 of output voltage U23, TB1 offset voltage is 12.8V；Self coupling transformation The input voltage of device TB2 is alternating current 220V, while when doing using output voltage U12, U23 the magnet exciting coil voltage of TB1, TB1 is mended Repaying voltage is 19.2V.In Fig. 5, ICL7109 is to from the difference between Differential Input high-end IN HOL and Differential Input low side IN LO Component voltage carries out A/D conversion；The corresponding practical AC supply voltage waving interval in 7 voltage class sections of 6.4V is 242.4V To 197.6V, the range actually fluctuated is covered；Differential Input low side IN LO input, from reference voltage output end REF OUT The reference voltage Ucp of output should be corresponding with the lower bound theoretical value 197.6V of AC power source phase voltage waving interval range；Therefore, Determine the no-load voltage ratio of transformer TV1 and the intrinsic standoff ratio of resistance RV1, resistance RV2, it should AC power source phase voltage be lower bound theoretical value When 197.6V, AC power source phase voltage sampled value U1 is made to be equal to the reference voltage Ucp of reference voltage output end REF OUT output. Fig. 5 be used for A phase when, analog-to-digital conversion coding circuit output voltage class encoded radio P2A by from 4 B12 of ICL7109 highest, Data Y14, Y13, Y12, Y11 composition of B11, B10, B9 output；Y14, Y13, Y12, Y11 and voltage 7 voltage from low to high The one-to-one 7 voltage class encoded radios of grade interval are 0000,0001,0010,0011,0100,0101,0110 respectively, It is realized by adjusting the size of la tension de reference Uref est.Adjust la tension de reference Uref est size method first is that: AC power source mutually electricity When being pressed at the demarcation voltage 236V in 2 voltage class sections of highest fluctuation up and down, adjusting (adjusts) resistance RF1, resistance RF2 Intrinsic standoff ratio, fluctuate the numerical value of Y14, Y13, Y12, Y11 between 0110 and 0101；Adjust the side of la tension de reference Uref est size Method second is that: set Ux be AC power source phase voltage 197.6V to 242.4V teachings fluctuation when, from the high-end IN of Differential Input The voltage change range of HOL and Differential Input low side IN LO input, has

The variation range of Ux corresponds to 7 minimum code values of B12, B11, B10, B9；If corresponding B12, B11, B10, B9's The input variation full scale input voltage range of 10 BCD encoded radios is Um, is had

The reference voltage of ICL7109 is the 1/2 of full scale input voltage, is had

Therefore it may only be necessary to adjust the intrinsic standoff ratio of resistance RF1, resistance RF2, Uref is made to be equal to the calculated value of formula (1).

Equally by taking A phase as an example, if the AC power source phase voltage fluctuation range of input is 220V+10% to 220V-20%, It asks to be stablized using compensation main circuit embodiment 2 and be exported in the range of 220V ± 2%, AC power source phase voltage wave zone Between range be 242V to 176V, at this time use Fig. 5 analog-to-digital conversion coding circuit embodiment 1, can will input 242V extremely A phase phase voltage between 176V is divided into 10 voltage class sections that section voltage swing is 7V, 3 voltage class areas therein Between voltage be higher than require output voltage range, need to carry out drop compensation；The voltage in 6 voltage class sections is lower than requirement Output voltage range, need to carry out boosting compensation；1 voltage class section carries out 0 within desired output voltage range Voltage compensation, i.e. uncompensation.The voltage range of 7V is 220V ± 1.6%, meets output control and wants within 220V ± 2% It asks；The corresponding AC supply voltage waving interval in 10 voltage class sections of 7V is 244.5V to 174.5V, covers reality The range of fluctuation.It is compensated using the A phase main circuit in the compensation main circuit embodiment 2 of Fig. 4, and auto-transformer TB2 Output voltage U12 is minimum, U23 highest；Voltage U23 is 3 times of voltage U12, and voltage U34 is 2 times of voltage U12；Then self coupling becomes The input voltage of depressor TB2 is alternating current 220V, when only making the magnet exciting coil voltage of TB1 of output voltage U12, TB1 offset voltage For 7V；The input voltage of auto-transformer TB2 is alternating current 220V, when only making the magnet exciting coil voltage of TB1 of output voltage U23, TB1 offset voltage is 21V；The input voltage of auto-transformer TB2 is alternating current 220V, is only encouraged with output voltage U34 TB1 When coil voltage, TB1 offset voltage is 14V；The input voltage of auto-transformer TB2 is alternating current 220V, while using output When voltage U12, U23 do the magnet exciting coil voltage of TB1, TB1 offset voltage is 28V；Etc..At this point, 10 voltage class of 7V The corresponding practical AC supply voltage waving interval in section is 244.5V to 174.5V, covers the range actually fluctuated；Difference Input low side IN LO input, from reference voltage output end REF OUT export reference voltage Ucp should be with AC power source phase The lower bound theoretical value 174.5V of voltage fluctuation interval range is corresponding；Accordingly, it is determined that the no-load voltage ratio and resistance RV1, electricity of transformer TV1 Hinder the intrinsic standoff ratio of RV2, it should when AC power source phase voltage is lower bound theoretical value 174.5V, make AC power source phase voltage sampled value U1 is equal to the reference voltage Ucp of reference voltage output end REF OUT output.Similarly, when Fig. 5 embodiment is used for A phase, modulus turns The voltage class encoded radio P2A of coding circuit output is changed by the data that export from ICL7109 highest 4 B12, B11, B10, B9 Y14, Y13, Y12, Y11 composition, Y14, Y13, Y12, Y11 and voltage 10 voltage class sections one-to-one 10 from low to high A voltage class encoded radio is 0000,0001,0010,0011,0100,0101,0110,0111,1000,1001 respectively, is passed through The size of la tension de reference Uref est is adjusted to realize.Adjust la tension de reference Uref est size method first is that: AC power source phase voltage exists When highest two voltage class sections boundary (i.e. the 235.4V of AC power source phase voltage) are fluctuated up and down, adjusting (is adjusted Section) resistance RF1, resistance RF2 intrinsic standoff ratio, fluctuate the numerical value of Y14, Y13, Y12, Y11 between 1000 and 1001；Adjust ginseng Examine the method for voltage Uref size second is that: set Uy as AC power source phase voltage 174.5V to 244.5V teachings fluctuate When, the voltage change range inputted from Differential Input high-end IN HOL and Differential Input low side IN LO has

The variation range of Uy corresponds to 10 encoded radios of B12, B11, B10, B9 output binary-coded decimal, inputs, has for full scale

Therefore, the intrinsic standoff ratio for only needing to adjust resistance RF1, resistance RF2 at this time makes Uref be equal to the calculated value of formula (2) i.e. It can.

In Fig. 5, other peripheral cell parameters of LTC1966, ICL7109 can be by reading corresponding device data handbook It is determined.AC power source phase voltage sampled value U1 can also realize that ICL7109 can also be used using other detection circuits Other devices, for example, using double integration A/D converter MAX139, MAX140, ICL7107 etc. replace ICL7109, MAX139, The binary coding of the outputs such as MAX140, ICL7107 is 7 sections of codes, is acted on identical as the binary-coded decimal that ICL7109 is exported.

Fig. 6 is A phase analog-to-digital conversion coding circuit embodiment 2, in AC supply voltage detection circuit, from phase line LA1 and The AC power source phase voltage of zero curve N input is rectified after transformer TV2 decompression by the rectifier bridge that diode DV1-DV4 is formed, then Through capacitor CV3 filtering and resistance RV3, resistance RV4 partial pressure, obtain in direct ratio with the AC power source phase voltage virtual value of input The A phase AC power source phase voltage sampled value U2 of relationship.When phase line LA1 is changed to connection B phase, the phase line of C phase respectively, B is respectively obtained Phase, the AC power source phase voltage sampled value of C phase.Resistance RV5 and voltage-stabiliser tube WV1 forms lower threshold potential circuit, voltage-stabiliser tube WV1 Upper voltage is lower threshold voltage U2cp corresponding with the lower limit value of AC power source phase voltage waving interval range.Friendship in Fig. 6 Galvanic electricity source phase voltage sampled value U2 can also send into Fig. 5 the Differential Input of ICL7109 high-end IN HOL, be converted by ICL7109 The voltage class encoded radio output constituted for binary system.

In Fig. 6, FD3 is biproduct parting A/D converter MC14433, is used for AC power source phase voltage waving interval range Voltage divide into voltage class section and be converted to binary system composition voltage class encoded radio output.In Fig. 6, MC14433 Conversion end output end EOC be connected to transformation result output control terminal DU, make its work automatically repeat transition status；Integral Resistance R14 and integrating capacitor C14 is connected to external integral element end R1, R1/C1, C1 of MC14433；Oscillation resistance R15 connection To clock outward element end CP0, CP1 of MC14433；Compensating electric capacity C15 be connected to MC14433 external compensating electric capacity end C01, C02；Resistance RF3, resistance RF4 divide power supply+VCC, and la tension de reference Uref est 1, Uref1 input are obtained on resistance RF4 To reference voltage input terminal VREF；VDD is the positive power source terminal of MC14433, is connected to power supply+VCC；VSS is digital ground terminal, VAG To simulate ground terminal, it is connected to publicly.

In Fig. 6, FD4 is 4 road D-latch CD4042, and 4 data input pin D0-D3 of CD4042 are connected to MC14433's 4 data output end Q0-Q3；The triggering input end of clock CP of CD4042 is connected to hundred gating signal output ends of MC14433 DS2；The clock polarity control terminal POL of CD4042 connects high level, and positive power source terminal VDD is connected to power supply+VCC, digital ground terminal VSS It is connected to publicly.CD4042 latches hundred BCD data that timesharing after each conversion end of MC14433 exports.Fig. 6 is real When applying example for A phase, the voltage class encoded radio P2A of analog-to-digital conversion coding circuit output by from CD4042 output end Q3, Q2, Data Y14, Y13, Y12, Y11 composition of Q1, Q0 output.CD4042 can be replaced with other latch.

By taking A phase as an example, if the AC power source phase voltage fluctuation range of input is 220V ± 10%, it is desirable that use compensation master Circuit embodiments 1 are stablized to be exported in the range of 220V ± 2%, and AC power source phase voltage waving interval range is 242V To 198V, the analog-to-digital conversion coding circuit embodiment 2 of Fig. 6 is used at this time, can will be inputted in 242V to the A phase phase between 198V Voltage is divided into 7 voltage class sections that section voltage swing is 6.4V, and the voltage in 3 voltage class sections therein, which is higher than, to be wanted The output voltage range asked needs to carry out drop compensation；The voltage in 3 voltage class sections is lower than desired output voltage model It encloses, needs to carry out boosting compensation；1 voltage class section carries out 0 voltage compensation, i.e., within desired output voltage range Uncompensation.It is compensated using the A phase main circuit in the compensation main circuit embodiment 1 of Fig. 3, and the output of auto-transformer TB2 Voltage U12 is low, U23 high；Voltage U23 is 2 times of voltage U12；Then the input voltage of auto-transformer TB2 is alternating current 220V, only When making the magnet exciting coil voltage of TB1 of output voltage U12, TB1 offset voltage is 6.4V；The input voltage of auto-transformer TB2 For alternating current 220V, when only making the magnet exciting coil voltage of TB1 of output voltage U23, TB1 offset voltage is 12.8V；Auto-transformer The input voltage of TB2 is alternating current 220V, while when doing using output voltage U12, U23 the magnet exciting coil voltage of TB1, TB1 compensation Voltage is 19.2V.

In Fig. 6, the measured voltage input terminal VX of MC14433 is connected to the output end of AC power source phase voltage sampled value U2, And lower threshold voltage U2cp is connected to publicly GND, therefore, MC14433 be to AC power source phase voltage sampled value U2 with Voltage difference between lower threshold voltage U2cp is converted；The corresponding practical alternating current in 7 voltage class sections of 6.4V Source voltage fluctuation section is 242.4V to 197.6V, lower threshold voltage U2cp and AC power source phase voltage waving interval range Lower bound theoretical value 197.6V is corresponding；Therefore, the intrinsic standoff ratio of the no-load voltage ratio of transformer TV2 and resistance RV3, resistance RV4, it should exchange When power supply phase voltage is lower bound theoretical value 197.6V, AC power source phase voltage sampled value U2 is made to be equal to lower threshold voltage U2cp. When Fig. 6 embodiment is used for A phase, the voltage class encoded radio P2A of analog-to-digital conversion coding circuit output from MC14433 hundred by exporting Data Y14, Y13, Y12, Y11 composition；Due to requiring input being divided into section electricity in 242.4V to the voltage between 197.6V Pressing size is 7 voltage class sections of 6.4V, Y14, Y13, Y12, Y11 and voltage 7 voltage class sections one from low to high One corresponding 7 voltage class encoded radios are 0000,0001,0010,0011,0100,0101,0110 respectively, defeated by adjusting Enter the reference voltage U2ref size to MC14433 to realize.Adjust reference voltage U2ref size method first is that: alternating current When source phase voltage fluctuates up and down at the demarcation voltage 236V in 2 voltage class sections of highest, reference voltage is enabled to open from maximum value Begin to reduce, adjusts the intrinsic standoff ratio of resistance RF3, resistance RF4, make the numerical value of Y14, Y13, Y12, Y11 wave between 0110 and 0101 It is dynamic；Adjust reference voltage U2ref size method second is that: set at this time Ux as AC power source phase voltage in 197.6V to 242.4V's Voltage change range when teachings fluctuate, has

Since the measurement output of MC14433 is 3 half BCD data, corresponding full scale input, kilobit shares 20 plus hundred A BCD encoded radio, the variation range of Ux correspond to 7 minimum code values therein；If corresponding to the defeated of 20 BCD encoded radios at this time Entering to change full scale input voltage range is Uz, is had

The reference voltage of MC14433 is equal to full scale input voltage, has

Therefore, the intrinsic standoff ratio for only needing to adjust resistance RF3, resistance RF4 at this time makes U2ref be equal to the calculated value of formula (3) i.e. It can.

Equally by taking A phase as an example, if the AC power source phase voltage fluctuation range of input is 220V+10% to 220V-20%, It asks to be stablized using compensation main circuit embodiment 2 and be exported in the range of 220V ± 2%, AC power source phase voltage wave zone Between range be 242V to 176V, at this time use Fig. 6 analog-to-digital conversion coding circuit embodiment 2, can will input 242V extremely A phase phase voltage between 176V is divided into 10 voltage class sections that section voltage swing is 7V, 3 voltage class areas therein Between voltage be higher than require output voltage range, need to carry out drop compensation；The voltage in 6 voltage class sections is lower than requirement Output voltage range, need to carry out boosting compensation；1 voltage class section carries out 0 within desired output voltage range Voltage compensation, i.e. uncompensation.It is compensated using the A phase main circuit in the compensation main circuit embodiment 2 of Fig. 4, and self coupling transformation The output voltage U12 of device TB2 is minimum, U23 highest；Voltage U23 is 3 times of voltage U12, and voltage U34 is 2 times of voltage U12； Then the input voltage of auto-transformer TB2 is alternating current 220V, when only making the magnet exciting coil voltage of TB1 of output voltage U12, TB1 Offset voltage is 7V；The input voltage of auto-transformer TB2 is alternating current 220V, and the magnet exciting coil of TB1 is only made of output voltage U23 When voltage, TB1 offset voltage is 21V；The input voltage of auto-transformer TB2 is alternating current 220V, is only made of output voltage U34 When the magnet exciting coil voltage of TB1, TB1 offset voltage is 14V；The input voltage of auto-transformer TB2 is alternating current 220V, simultaneously When doing the magnet exciting coil voltage of TB1 using output voltage U12, U23, TB1 offset voltage is 28V；Etc..10 voltage of 7V etc. The corresponding practical AC supply voltage waving interval in grade section is 244.5V to 174.5V, lower threshold voltage U2cp with exchange The lower limit value theoretical value 174.5V of power supply phase voltage waving interval range is corresponding；Therefore, the no-load voltage ratio of transformer TV2 and resistance RV3, The intrinsic standoff ratio of resistance RV4, it should when AC power source phase voltage is lower bound theoretical value 174.5V, sample AC power source phase voltage Value U2 is equal to lower threshold voltage U2cp.When Fig. 6 embodiment is used for A phase, the voltage class of analog-to-digital conversion coding circuit output is compiled Code value P2A is made of data Y14, Y13, Y12, the Y11 exported from MC14433 hundred, Y14, Y13, Y12, Y11 and power supply electricity Pressure from low to high the one-to-one 10 voltage class encoded radios in 10 voltage class sections be 0000 respectively, 0001,0010, 0011,0100,0101,0110,0111,1000,1001, it is realized by adjusting the size of reference voltage U2ref.Adjust reference The method of voltage U2ref size first is that: AC power source phase voltage is in highest two voltage class sections boundary (i.e. alternating current The 235.4V of source phase voltage) when fluctuating up and down, reference voltage is enabled to reduce since maximum value, adjust resistance RF3, resistance RF4 Intrinsic standoff ratio fluctuates the numerical value of Y14, Y13, Y12, Y11 between 1000 and 1001；Adjust the side of reference voltage U2ref size Method second is that: set Uy at this time as AC power source phase voltage in 176V to the voltage change range when fluctuation of 242V range, have

The variation range of Uy corresponds to MC14433 kilobit plus hundred 10 minimum codes shared in 20 BCD encoded radios Value；If the input variation full scale input voltage range for corresponding to 20 BCD encoded radios at this time is Uz, have

The reference voltage of MC14433 is equal to full scale input voltage, has

Therefore, the intrinsic standoff ratio for only needing to adjust resistance RF3, resistance RF4 at this time makes U2ref be equal to the calculated value of formula (4) i.e. It can.

In Fig. 6, other peripheral cell parameters of MC14433 can be carried out really by reading corresponding device data handbook It is fixed.AC power source phase voltage sampled value U2 can also be realized using other detection circuits, for example, being examined using various real available values Chip is surveyed to realize.Difference between AC power source phase voltage sampled value U2 and corresponding lower threshold voltage can also use it He obtains method, for example, AC power source phase voltage sampled value U2 is subtracted corresponding lower bound threshold with analog voltage subtraction circuit Threshold voltage value.

In the various embodiments described above, when carrying out voltage compensation using the Autocompensation three-phase main circuit embodiment 1 of Fig. 3, utilize The analog-to-digital conversion coding circuit embodiment 1 of Fig. 5 either analog-to-digital conversion coding circuit embodiment 2 of Fig. 6, will input 242V extremely Voltage between 198V is divided into the 7 voltage class sections or 7 voltage class below that section voltage swing is 6.4V When section, the highest order of voltage class encoded radio is constantly equal to 0.By taking P2A as an example, the A phase voltage that is made of Y14, Y13, Y12, Y11 In grade encoded radio P2A, Y14 is constantly equal to 0, and therefore, actual voltage class encoded radio is it is also assumed that be by 3 hytes at this time At that is, P2A is made of Y13, Y12, Y11, A phase voltage grade encoded radio P2A and voltage 7 voltage class sections from low to high One-to-one 7 voltage class encoded radios are 000,001,010,011,100,101,110 respectively.

A, B, C three-phase use identical delay protection circuit.Fig. 7 is that A phase delay protects circuit embodiments block diagram, delay inspection Survey the electricity after module YC1 respectively postpones voltage class coding value signal Y14, Y13, Y12, Y11 of input Grade is pressed to encode value signal Y24, Y23, Y22, Y21, Y24, Y23, Y22, Y21 form P3A；YC1 module simultaneously respectively to Y14, Y13, Y12, Y11 carry out Edge check and obtain Edge check signal Y34, Y33, Y32, Y31；Trigger region control signal does not generate mould Edge check signal Y34, Y33, Y32, Y31 of input are converted to the not trigger region control signal P4A output of A phase by block YC2.Fig. 7 Embodiment block diagram in, delay detection module YC1 input voltage class coding value signal have Y14, Y13, Y12, Y11 etc. 4 Position, K are equal to 4；If K is equal to 3, the voltage class encoded radio of delay detection module YC1 input is made of 3 binary values, example When such as, by Y13, Y12, Y11, carry out signal delay postpone after voltage class encoded radio accordingly also only Y23, Y22, Y21 etc. 3, Edge check is carried out to Y13, Y12, Y11 and obtains Edge check signal also Y33, Y32, Y31 etc. 3, is not touched The Edge check signal for sending out area's control signal generator module YC2 input also only has Y33, Y32, Y31 etc. 3.

Fig. 8 is the delay detection circuit embodiment 1 for encoding value signal Y11 in delay detection module needle to voltage class.Electricity Hinder RY0, capacitor CY0, driving gate FY0 realize the signal delay of Y11 is obtained Y11 it is delayed after signal Y21.Resistance RY1, Capacitor CY1, diode DY1, phase inverter FY1 composition are directed to the rising edge detection circuit of input signal Y 11, and phase inverter FY1's is defeated Out in signal YP1, the pulse of corresponding negative pulse form is exported after Y11 rising edge.Resistance RY2, capacitor CY2, Diode DY2, phase inverter FY2, FY3 composition are directed to the failing edge detection circuit of input signal Y 11, the output letter of phase inverter FY3 In number YP2, the pulse of corresponding negative pulse form is exported after Y11 failing edge.NAND gate FY4 be accomplished that or Logic (under negative logic) function, when there is negative pulse generation in input signal Y P1, YP2, the Edge check of NAND gate FY4 output Positive pulse is generated in signal Y31, i.e., when input signal Y 11 changes, NAND gate FY4 exports the simple venation of a positive pulse form Punching.In Fig. 8, the device of driving gate FY0, phase inverter FY1, phase inverter FY3 preferably with Schmidt's input, for example, phase inverter selects 74HC14, CD40106 etc.；Driving gate FY0 can be made of 2 phase inverters with Schmidt's input.

Fig. 9 is the delay detection circuit embodiment 2 for encoding value signal Y11 in delay detection module needle to voltage class.Instead Phase device FY5, resistance RY3, capacitor CY3 carry out reverse phase and delay to input signal Y 11, obtain the delayed inversion signal of Y11 YP0；Phase inverter FY6 again by YP0 reverse phase, obtain Y11 it is delayed after signal Y21.NAND gate FY7 input signal be Y11 and The pulse of negative pulse form corresponding with Y11 rising edge is generated in Y11 delayed inversion signal YP0, output signal YP1； Or the signal of door FY8 input is the delayed inversion signal YP0 of Y11 and Y11, is generated and Y11 failing edge phase in output signal YP2 The pulse for the negative pulse form answered.NAND gate FY9 is accomplished that or logic (under negative logic) function, when input signal Y P1, When having negative pulse generation in YP2, positive pulse is generated in the Edge check signal Y31 of NAND gate FY9 output, that is, works as input signal When Y11 is changed, NAND gate FY9 exports the pulse of a positive pulse form.In Fig. 9, phase inverter FY6, NAND gate FY7 or Device of the door FY8 preferably with Schmidt's input, for example, phase inverter selects 74HC14, CD40106 etc.；NAND gate selection 74HC132, CD4093 etc.；Or door select 74HC7032, or selection 2 band Schmidt input phase inverters and 1 and NOT gate is realized or Men Gongneng.

Figure 10 is the delay detection circuit embodiment 3 for encoding value signal Y11 in delay detection module needle to voltage class, In the rising edge detection circuit for input signal Y 11 formed by resistance RY1, capacitor CY1, diode DY1, phase inverter FY1, Electricity is detected with the failing edge for being directed to input signal Y 11 is made of resistance RY2, capacitor CY2, diode DY2, phase inverter FY2, FY3 Road, and it is identical as the embodiment 1 of Fig. 8 using the circuit of NAND gate FY4 output Edge check signal Y31.In Figure 10, by reverse phase Device FY11, FY12, FY13, FY14 realize the signal delay of Y11 is obtained Y11 it is delayed after signal Y21.

It can choose Fig. 8, Fig. 9, Figure 10 embodiment for the delay detection circuit of the signal Y11 in voltage class encoded radio Any one of 1-3；Under normal conditions, it for all signals in A, B, C three-phase voltage grade encoded radio, is all made of same Kind delay detection circuit.For example, the voltage class encoded radio for setting A, B, C three-phase is made of 4 bit binary value, then need altogether 12 delay detection circuits；12 delay detection circuits can be all using the embodiment of Fig. 81, or all using Fig. 9's Embodiment 2, or all using the embodiment of Figure 10 3.Delay detection circuit can also be using other circuits met the requirements To realize its function.

The not trigger region control signal generator module function of each phase is, when input is directed to the side of this phase voltage grade encoded radio Along detection any one of signal or it is multiple have pulse relevant to edge when, the not trigger region control of the phase is believed A pulse is exported in number, the spaced time of pulse is chosen in 10ms between 30ms.

Figure 11 is that trigger region does not control signal generator module embodiment to A phase, by or the door FY10 corresponding function of realization or door The input signal of FY10 be A phase Edge check signal Y34, Y33, Y32, Y31, export for A phase not trigger region control signal P4A.In Figure 11 embodiment, the pulse of trigger region control signal output is not positive pulse, i.e., trigger region does not control the high electricity of signal It is flat effective；When or door FY10 change nor gate into when, the pulse of trigger region control signal output is negative pulse, not trigger region It is effective to control signal low level.If having for generating in Edge check signal Y34, Y33, Y32, Y31 of input is related to edge Pulse be negative pulse, then in Figure 11 or door should be changed to NAND gate either with door, realize negative logic or logic Function.If the Edge check signal of input only has 3, for example, when only Edge check signal Y33, Y32, Y31, Figure 11 In or door, it is and non-for example, nor gate or for realizing other doors of not trigger region control signal generator module function Door is also 3 in-gate circuits with door etc. accordingly.B, C two-phase uses the identical not trigger region control signal with A phase to generate mould Block.

Figure 12 is that A phase delay protects split-phase in the middle part of circuit to close waveform diagram.In Figure 12, in A phase voltage grade encoded radio Y11 occur that rising edge changes and failing edge changes respectively, Y21 is the A phase voltage grade coding after the Y11 delay T1 time Value signal；In the delay detection circuit embodiment 1 of Fig. 8, T1 by resistance RY0 and capacitor CY0 product size (i.e. time constant Size) it determines；In the delay detection circuit embodiment 2 of Fig. 9, T1 is determined by the product size of resistance RY3 and capacitor CY3；? In the delay detection circuit embodiment 3 of Figure 10, T1 by phase inverter FY11, FY12, FY13, FY14 itself gate delay time size It determines.In Figure 12, because the negative pulse width that Y11 rising edge generates is T2 in signal YP1；Implement in the delay detection circuit of Fig. 8 In example 1 and the delay detection circuit embodiment 3 of Figure 10, T2 is determined by the product size of resistance RY1 and capacitor CY1；Fig. 9's In the detection circuit embodiment 2 that is delayed, T2 is determined by the product size of resistance RY3 and capacitor CY3.In Figure 12, in signal YP2 because The negative pulse width that Y11 failing edge generates is T3；In the delay detection circuit embodiment 1 of Fig. 8 and the delay detection circuit of Figure 10 In embodiment 3, T3 is determined by the product size of resistance RY2 and capacitor CY2；In the delay detection circuit embodiment 2 of Fig. 9, T3 It is determined by the product size of resistance RY3 and capacitor CY3.In Figure 12,2 positive pulses in Edge check signal Y31 respectively with letter The negative pulse generated in the negative pulse and signal YP2 generated in number YP1 by Y11 rising edge by Y11 failing edge is corresponding.It is located at Figure 12 When Y11 in voltage class encoded radio occurs rising edge and changes, Y12, Y13, Y14 in voltage class encoded radio there is no Change, its corresponding Edge check signal Y32, Y33, Y34 do not generate positive pulse at this time；If changing when failing edge occurs for Y11 When, the Y12 in voltage class encoded radio changes simultaneously, and no change has taken place by Y13, Y14, at this time its corresponding edge inspection It surveys and generates positive pulse relevant to Y12 variation in signal Y32；Because Y33, Y34 maintain low level not change at this time, in Figure 12 not It draws.According to the logic function of not trigger region above-mentioned control signal generator module, trigger region control signal generator module is not defeated It is wide that widest pulse in the input pulse of the pulse is generated in the Edge check signal of single pulse width and input out jointly It spends identical.In Figure 12, trigger region does not control the 1st positive pulse in signal P4A by the 1st in Edge check signal Y31 to A phase Negative pulse generates, then the two equivalent width；A phase the 2nd positive pulse that trigger region does not control in signal P4A is believed by Edge check The negative pulse joint effect in the 2nd negative pulse and Edge check signal Y32 in number Y31 generates, and width and generates this just The widest negative pulse width of width is identical in 2 negative pulses of pulse；As can be seen from Figure 12, the negative pulse width in Y32 is wider, The 2nd positive pulse width in P4A is identical as the negative pulse width in Y23.This width difference is because different delayed time detects electricity It is determined in road caused by the resistance of T2, T3, the difference of capacitance.

In the delay detection circuit embodiment 1 in Fig. 8 delay protection circuit, voltage class encoded radio changes to right When the delay time in the not trigger region control signal pulse forward position answered is the delay of FY10 in gate circuit FY1, FY4 and Figure 11 Between the sum of or gate circuit FY3, FY4 and Figure 11 in FY10 the sum of delay time；By multiplying for resistance RY0 and capacitor CY0 The range of choice of the signal delay time T1 for the voltage class encoded radio that product size determines is the ms order of magnitude, it is clear that is greater than voltage Grade encoded radio changed to the delay time in corresponding not trigger region control signal pulse forward position, i.e. grade encoded radio is believed Number delay is later than forward position moment of the pulse exported after voltage class encoded radio changes at the time of change.Strictly speaking, T1 actually includes the sum of lag time and the delay time of gate circuit FY0 caused by resistance RY0 and capacitor CY0.Fig. 8 In embodiment 1, in selection parameter, the value of the value and T3 that make T2 is all larger than the value of T1, changes grade encoded radio signal delay Meet the rear requirement along the moment of the pulse exported after need to changing earlier than voltage class encoded radio at the time of change.

It is delayed in detection circuit embodiment 2 in the delay protection circuit of Fig. 9, voltage class encoded radio changes to right When the delay time in the not trigger region control signal pulse forward position answered is the delay of FY10 in gate circuit FY7, FY9 and Figure 11 Between the sum of or gate circuit FY8, FY9 and Figure 11 in FY10 the sum of delay time；T1 is the numerical value of the ms order of magnitude, is shown So, the signal delay time T1 of the voltage class encoded radio determined at this time by the product size of resistance RY3 and capacitor CY3 is greater than Voltage class encoded radio changed to the delay time in corresponding not trigger region control signal pulse forward position, i.e. voltage class Encoded radio signal delay is later than the forward position moment of the pulse exported after voltage class encoded radio changes at the time of change.Figure In 9 delay detection circuit embodiment 2, occur at the time of voltage class encoded radio signal delay changes with voltage class encoded radio The rear of the pulse exported after change is influenced by signal YP0 change along the moment；Voltage class encoded radio signal delay changes At the time of change for signal YP0 after delay again through gate circuit FY6；The pulse that voltage class encoded radio exports after changing It is rear along the moment be the sum of delay time again through FY10 in gate circuit FY7, FY9 and Figure 11 after signal YP0 changes, either The sum of delay time after signal YP0 change again through FY10 in gate circuit FY8, FY9 and Figure 11；Obviously, voltage class is compiled at this time The rear of the pulse that code value signal delay exports after changing at the time of change than voltage class encoded radio few passes through 2 along the moment The delay time of a gate circuit, meeting at the time of voltage class encoded radio signal delay changes need to send out earlier than voltage class encoded radio The rear requirement along the moment of the pulse exported after raw change.

Figure 13 is the embodiment of interlocking control circuit, and Figure 13 (a) is A phase interlocking control circuit embodiment 1, YR1 therein For ROM memory.If in the A phase main circuit of Fig. 3 Autocompensation three-phase main circuit embodiment 1, the output of auto-transformer TB2 Voltage U12 is low, U23 high；Voltage U23 is 2 times of voltage U12.Table 1 is using Fig. 3 Autocompensation three-phase main circuit embodiment 1 A phase main circuit compensate control, utilize Fig. 5 analog-to-digital conversion coding circuit embodiment 1 either Fig. 6 analog-to-digital conversion Supply voltage is divided into 7 voltage class sections by coding circuit embodiment 2, after Y13, Y12, Y11, or delay Y23, Y22, Y21 carry out the logic true value table of logic control when forming 7 voltage class encoded radios；AC power source phase voltage wave Dynamic range is 220V ± 10%, it is desirable that is stablized and is exported in the range of 220V ± 2%.It is realized and is interlocked using ROM memory When the logic function of control circuit, P4A, Y23-Y21 are sequentially connected to the address input end A3-A0, ROM of ROM memory respectively The data output D0-D5 of memory is that the logic of interlocking control circuit exports, 6 output signal P51-P56 composition triggering controls Signal P5A.

In table 1, trigger region does not control invalidating signal to A phase, and P4A is equal to 0, and voltage class encoded radio P3A is and voltage class When the corresponding value of 1-7, the A phase main circuit that interlocking control circuit controls three-phase main circuit unit embodiment 1 carries out corresponding voltage Compensation；For example, when input voltage is minimum voltage class 1, control P51, P56 output for 0 go to open bidirectional thyristor SR1, Other outputs of SR6, control P52 etc. go to turn off other bidirectional thyristors for 1, and the excitation of TB1 is done using output voltage U12+U23 Coil voltage carries out positive compensation；When input voltage is voltage class 2, control P53, P56 output goes to open bidirectional thyristor for 0 SR3, SR6, other outputs such as control P51 go to turn off other bidirectional thyristors for 1, and the excitation of TB1 is done only with output voltage U23 Coil voltage carries out positive compensation；When input voltage is voltage class 4, control P55, P56 output goes to open bidirectional thyristor for 0 SR5, SR6, other outputs such as control P51 go to turn off other bidirectional thyristors for 1, realize 0 voltage compensation；Input voltage is voltage When class 5, control P52, P53 output go to open bidirectional thyristor SR2, SR3 for 0, other outputs such as control P51 go to turn off for 1 Other bidirectional thyristors carry out Contrary compensation only with the magnet exciting coil voltage that reversed output voltage U12 is TB1；Etc..Work as A Mutually trigger region control signal is not effective, i.e. when embodiment P4A is equal to 1, shows that AC power source phase voltage has fluctuation, make voltage Grade encoded radio produces variation, needs to carry out the switching of thyristor switch group on-off assembled state, changes compensation way.In crystalline substance In the handoff procedure of brake tube electronic switch, when to avoid thyristor switching in thyristor switch group, because electronic switch delay is closed Disconnected factor causes power supply short circuit, when not trigger region controls the signal valid period, i.e. the P4A of embodiment is equal to 1, turns off A phase All bidirectional thyristors in thyristor switch group, interlocking control circuit control P51-P56 all output 1.

Table 1

In table 1, M is equal to 7.A phase not trigger region control invalidating signal (P4A be equal to 0) when, 7 voltage class encoded radio P3A Efficient coding value be corresponding with 7 groups of effective Trig control signals, accordingly realize 7 kinds of voltage compensation states control；When P2A changes Make to be corresponding with 1 group of effective Trig control signal when P4A effective (P4A is equal to 1), the interlocking control circuit of A phase exports altogether there are 8 groups Effective Trig control signal.When P4A invalid (P4A is equal to 0), and the voltage class encoded radio P3A of interlocking control circuit input is When invalid code value, A phase interlocking control circuit is corresponding with 1 group of specifically invalid Trig control signal.Utilize the analog-to-digital conversion of Fig. 5 The either analog-to-digital conversion coding circuit embodiment 2 of Fig. 6 of coding circuit embodiment 1, is divided into 7 voltage class for supply voltage Section, by Y13, Y12, Y11 export 7 voltage class encoded radios efficient coding value, Y13, Y12, Y11 either Y23, Y22, Y21 are only possible to there are the output of 1 invalid code value, are 111.In table 1, which keeps P56 defeated Be out 0, P51-P55 output be 1；The specific invalid practical control of the Trig control signal without thyristor, even if playing The triggering control action of thyristor, also only makes the TB1 magnet exciting coil be connected to a tap and excitation voltage of auto-transformer TB2 It is 0, without voltage compensation；This 1 group specifically invalid Trig control signal be also an option that other not can be carried out voltage compensation Triggering combination, for example, making P55 output for 0, others output is 1.

In table 1, low level is effective when the Trig control signal triggering bidirectional thyristor of interlocking control circuit output is connected.Such as High level is effective when the Trig control signal of fruit interlocking control circuit output requires to be connected for triggering bidirectional thyristor, then table 1 is patrolled 1 in the output signal of volume truth table, which needs to change into 0,0, needs to change into 1；When realizing its function with ROM memory, storage The content of unit is according to 1 reverse phase of table.

Figure 13 (b) is interlocking control circuit embodiment 2, and YR2 therein is ROM memory.If Fig. 4 Autocompensation three-phase master In the A phase main circuit of circuit embodiments 2, the output voltage U12 of auto-transformer TB2 is minimum, U23 highest；Voltage U23 is voltage 3 times of U12, voltage U34 are 2 times of voltage U12.Table 2 is the main electricity of A phase using Fig. 4 Autocompensation three-phase main circuit embodiment 2 Road compensates control, real using the either analog-to-digital conversion coding circuit of Fig. 6 of analog-to-digital conversion coding circuit embodiment 1 of Fig. 5 Example 2 is applied, supply voltage is divided into 10 voltage class sections, Y24 by Y14, Y13, Y12, Y11, or after delay, Y23, Y22, Y21 carry out the logic true value table of logic control when forming 10 voltage class encoded radios；AC power source phase voltage wave Dynamic range is 220V+10% to 220V-20%, it is desirable that is stablized and is exported in the range of 220V ± 2%.It is stored using ROM When device YR2 realizes its logic function, input P4A, Y24-Y21 are sequentially connected to address the end A4-A0, ROM of ROM memory respectively The data output D0-D7 of memory is that the logic of interlocking control circuit exports, 8 output signal P51-P58 composition triggering controls Signal P5.In table 2, trigger region does not control invalidating signal to A phase, and P4A is equal to 0, and voltage class encoded radio P3A is and voltage class When the corresponding value of 1-10, the A phase main circuit that A phase interlocking control circuit controls Autocompensation three-phase main circuit embodiment 2 carries out phase The voltage compensation answered；For example, control P57, P58 output goes to open bidirectional thyristor when input voltage is voltage class 7 for 0 SR7, SR8, other outputs such as control P51 go to turn off other bidirectional thyristors for 1, realize 0 voltage compensation；Input voltage is voltage When grade 8, control P52, P53 output go to open bidirectional thyristor SR2, SR3 for 0, other outputs such as control P51 go to turn off for 1 Other bidirectional thyristors carry out Contrary compensation only with the magnet exciting coil voltage that reversed output voltage U12 is TB1；Input voltage When for voltage class 9, control P56, P57 output go to open bidirectional thyristor SR6, SR7 for 0, other outputs such as control P51 are 1 It goes to turn off other bidirectional thyristors, carries out Contrary compensation only with the magnet exciting coil voltage that reversed output voltage U34 is TB1；It is defeated When to enter voltage be voltage class 10, control P54, P55 output remove to open bidirectional thyristor SR4, SR5 for 0, control P51 etc. other Output goes to turn off other bidirectional thyristors for 1, carries out only with the magnet exciting coil voltage that reversed output voltage U23 is TB1 reversed Compensation；When input voltage is voltage class 6, control P51, P54 output goes to open bidirectional thyristor SR1, SR4 for 0, controls P52 It is exported Deng other and goes to turn off other bidirectional thyristors for 1, carried out just only with the magnet exciting coil voltage that output voltage U12 is being TB1 To compensation；When input voltage is voltage class 4, control P53, P56 output goes to open bidirectional thyristor SR3, SR6 for 0, controls Other outputs such as P51 go to turn off other bidirectional thyristors for 1, carry out only with the magnet exciting coil voltage that output voltage U23 is TB1 Forward direction compensation；When input voltage is voltage class 3, control P51, P56 output goes to open bidirectional thyristor SR1, SR6 for 0, controls Other outputs such as P52 processed go to turn off other bidirectional thyristors for 1, and the magnet exciting coil electricity of TB1 is done using output voltage U12+U23 Pressure carries out positive compensation；When input voltage is voltage class 1, control P51, P58 output for 0 go to open bidirectional thyristor SR1, Other outputs of SR8, control P52 etc. go to turn off other bidirectional thyristors for 1, are TB1's using output voltage U12+U23+U34 Magnet exciting coil voltage carries out positive compensation；Etc..Trigger region control signal is not effective, i.e. when the P4A of embodiment is equal to 1, shows A There is fluctuation in phase AC power source phase voltage, A phase voltage grade encoded radio is made to produce variation, and it is logical to need to carry out thyristor switch group The switching of disconnected assembled state, changes compensation way, turns off all bidirectional thyristors in A phase thyristor switch group at this time, and A phase interlocks Control circuit controls P51-P58 all output 1.

Table 2

In table 2, M is equal to 10.A phase not trigger region control invalidating signal (embodiment P4A be equal to 0) when, 10 voltage class The efficient coding value of encoded radio P3A is corresponding with 10 groups of effective Trig control signals, accordingly realizes the control of 10 kinds of voltage compensation states System；When P2A change makes A phase not trigger region control signal effectively (embodiment P4A is equal to 1), it is corresponding with 1 group and effectively triggers control Signal processed, A phase interlocking control circuit share 11 groups of effective Trig control signals.When trigger region does not control invalidating signal (P4A to A phase Equal to 0), and when the voltage class encoded radio P3A of A phase interlocking control circuit input is invalid code value, A phase interlocking control circuit It is corresponding with 1 group of specifically invalid Trig control signal；Utilize the either mould of Fig. 6 of analog-to-digital conversion coding circuit embodiment 1 of Fig. 5 Number transition coding circuit embodiment 2, is divided into 10 voltage class sections for supply voltage, is made of Y14, Y13, Y12, Y11 Voltage class encoded radio P2A exports the efficient coding value of 10 voltage class encoded radios altogether, 4 voltage class encoded radio Y14, There is likely to be the outputs of 6 invalid code values by Y13, Y12, Y11 or Y24, Y23, Y22, Y21, make the mutual lock control of A The same 1 group of invalid Trig control signal of circuit output processed；In table 2, which makes P58 output be 0, P51-P57 output is 1；The specific invalid practical control of the Trig control signal without thyristor, even if playing brilliant lock The triggering control action of pipe also only makes TB1 magnet exciting coil be connected to a tap and excitation voltage 0 of auto-transformer TB2, no Carry out voltage compensation；This 1 group specifically invalid Trig control signal be also an option that other not and can be carried out the triggering of voltage compensation Combination, for example, P57 output is made to be 0, others output is 1.

In table 2, low level is effective when the Trig control signal triggering bidirectional thyristor of interlocking control circuit output is connected.Such as High level is effective when the Trig control signal of fruit interlocking control circuit output requires triggering bidirectional thyristor to be connected, then 2 logic of table 1 in the output signal of truth table, which needs to change into 0,0, needs to change into 1；When realizing its function with ROM memory, storage is single The content of member is according to 2 reverse phase of table.

Combination logic function in either 2 truth table of table of table 1, can also be using the other modes except ROM memory It goes to realize.The interlocking control circuit of B phase and C phase uses with A phase interlocking control circuit identical circuit and control logic.

Figure 14 is the trigger circuit embodiment that bidirectional thyristor SR1 in A phase main circuit is triggered in trigger unit, is touched by exchange Shine coupling UG1, resistance RG1, resistance RG2 composition, and Trig control signal P51 low level is effective.Altemating trigger optocoupler UG1 can be with Select the phase shifts type bidirectional thyristor output lights such as MOC3021, MOC3022, MOC3023, MOC3051, MOC3052, MOC3053 Electric coupler.Power supply+VCCK is the controlled source controlled by error detection control unit.It is real to trigger Fig. 3 Autocompensation three-phase main circuit Bidirectional thyristor SR2-SR6 in the A phase main circuit of example 1 is applied, or triggers Fig. 4 Autocompensation three-phase main circuit embodiment 2 The touching of bidirectional thyristor in the trigger circuit of bidirectional thyristor SR2-SR8 in A phase main circuit, and triggering B phase and C phase main circuit Power Generation Road, as the circuit structure of triggering bidirectional thyristor SR1.What the altemating trigger optocoupler UG1 of Figure 14 was exported from G11, G12 The trigger pulse that other altemating trigger optocouplers export in trigger pulse and trigger unit collectively constitutes trigger signal P6.

Figure 15 is error detection control unit embodiment, wherein YR3, YR4, YR5 are ROM memory, YR3, YR4, YR5 group At discrimination module, for judging whether Trig control signal P5A, P5B, P5C of A, B, C phase of input are effective triggering control respectively Signal processed；With door FK1, triode VT, triode VK1, triode VK2, relay coil KA, stream diode VD, resistance RK1, Resistance RK2, resistance RK3 composition protection control circuit.+ VCC2 is controlled electricity in the power supply and trigger unit of relay coil The source current in source.The error detection control unit embodiment of Figure 15 is used to form thyristor switch by 8 bidirectional thyristors for every phase The Trig control signal issued when group is judged and is protected.When the Trig control signal of input is 6, it is only necessary to The address input of ROM memory in Figure 15 is changed to 6 a0-a5, is correspondingly connected with input signal P51-P56, its in Figure 15 The working principle and process of his circuit are controlling 8 Trig control signals, or control the same when 6 Trig control signals.

Table 3 is to judge whether the Trig control signal that A phase interlocking control circuit embodiment 1 issues is effective triggering control letter Number logic true value table, auto-transformer forms thyristor switch group by 3 taps, by 6 bidirectional thyristors at this time；When A phase The Trig control signal that interlocking control circuit embodiment 1 issues is 8 groups of effective Trig control signals listed by 8 rows of front in table 3 In 1 group when, ROM memory YR3 output A phase trigger control differentiate signal it is effective, i.e. P7A be 1, indicate A phase trigger control Signal is effective Trig control signal；When A phase interlocking control circuit embodiment 1 issue Trig control signal be other signals, When not being any 1 group in 8 groups of effective Trig control signals listed by 8 rows of front in table 3, the A phase of YR3 output triggers control and sentences Level signal is invalid, i.e. P7A is 0, indicates that A phase Trig control signal is not effective Trig control signal；When A phase interlocking control circuit The input of embodiment 1 is invalid code value, and when exporting invalid Trig control signal, from table 3 it can be seen that the P7A of YR3 output It is similarly 0.6 Trig control signals that ROM memory YR4 is used to export B phase interlocking control circuit judge that ROM is deposited 6 Trig control signals that reservoir YR5 is used to export C phase interlocking control circuit judge that decision logic and ROM are stored The principle that device YR3 is used to judge 6 Trig control signals that A phase interlocking control circuit exports is identical.When the mutual lock control of B When 6 Trig control signal P5B of circuit output processed are 1 group in 8 groups of effective Trig control signals, the P7B of YR4 output is 1, it is otherwise 0；When 6 Trig control signal P5C of C phase interlocking control circuit output are in 8 groups of effective Trig control signals At 1 group, otherwise it is 0 that the P7C of YR5 output, which is 1,.

Table 3

In Figure 15, when the Trig control signal that P7A, P7B, P7C all 1, A phase, B phase, C phase interlocking control circuit are issued When all effective Trig control signals, the triggering control with door FK1 output differentiates that resultant signal P7 is effective, i.e. P7 is 1, triode VK1, VK2 conducting, controlled source+VCCK obtain electric, trigger unit normal work, issue corresponding triggering according to Trig control signal Pulse.P7 be 1 simultaneously control triode VT conducting, relay coil KA obtain it is electric, make Fig. 3 auto compensating type three-phase main circuit implement Relay normal open switch KA-1 is closed in the A phase main circuit of example 1, and relay normally closed switch KA-2 is disconnected；Relay coil KA is obtained It is disconnected that electricity controls corresponding relay normally open switch in the B phase and C phase main circuit of auto compensating type three-phase main circuit embodiment 1 simultaneously It closes, relay normally closed switch disconnects, and circuit is in compensation work state.When P7A, P7B, P7C are not all of as 1, A phase, B phase, C Phase interlocking control circuit issue Trig control signal not all effective Trig control signals when, the output signal with door FK1 In vain, 0 P7, triode VK1, VK2 cut-off, controlled source+VCCK power loss, trigger unit do not work, i.e., it is brilliant not issue triggering The trigger pulse of brake tube.P7 is 0 while controlling triode VT cut-off, and relay coil KA power loss makes Fig. 3 auto compensating type three-phase Relay normal open switch KA-1 is disconnected in the A phase main circuit of main circuit embodiment 1, and relay normally closed switch KA-2 closure makes to apply The voltage being added on magnet exciting coil is 0；Relay coil KA power loss controls auto compensating type three-phase main circuit embodiment 1 simultaneously Corresponding relay normally open switch disconnects in B phase and C phase main circuit, and relay normally closed switch is disconnected to be closed, and circuit is in protection work State realizes the protection to three-phase thyristor switching group.Triggering control with door FK1 output differentiates resultant signal and inputs three-phase Triggering control differentiates that the equal high level of signal is effective.

From table 3 it can be seen that when the input of A phase interlocking control circuit embodiment 1 is invalid code value, and export invalid touching It is 0 that YR3, which is equally exported, when hair control signal, in discrimination module, and the protection control signal that interlocking control circuit issues is effective, is realized Protection to thyristor switch group；Therefore, either because the failure that code error occurs in each phase analog-to-digital conversion coding circuit is led Cause outputs invalid code value or each phase interlocking control circuit control mistake occurs and causes to output invalid triggering control letter Number, error detection control unit, which starts, protects thyristor switch group.When the logic true value that A phase differentiates in 3 discrimination module of table When table is realized using ROM memory, the address input of ROM memory needs 6, i.e. a0-a5 in table 3 is correspondingly connected with input Signal P51-P56；The data output of ROM memory needs 1, i.e. d0 in table 3 is correspondingly connected with the control signal P7A of output； At this point, carrying out B phase differentiates that the input of 6 bit address, the ROM memory of 1 data output is also respectively adopted is corresponding to realize with C phase Function.

Table 4 is the Trig control signal that error detection control unit is directed to that Figure 13 (b) A phase interlocking control circuit embodiment 2 issues Whether be effective Trig control signal logic true value table, the Trig control signal of input is 8, and auto-transformer has 4 at this time A tap, every phase form thyristor switch group by 8 bidirectional thyristors.In Figure 15,4 truth table of table is real using ROM memory Existing, the address input a0-a7 of ROM memory is correspondingly connected with input signal P51-P58；The data output d0 of ROM memory is defeated Control signal P7A out.

Table 4

When the Trig control signal that A phase interlocking control circuit embodiment 2 issues has for 11 groups listed by 11 rows of front in table 4 When imitating 1 group in Trig control signal, the A phase of ROM memory YR3 output triggers control and differentiates that signal is effective, i.e. P7A is 1, table Show that A phase Trig control signal is effective Trig control signal；When the triggering that A phase interlocking control circuit embodiment 2 issues controls letter It number is other signals, when not being any 1 group in 11 groups of effective Trig control signals listed by 11 rows of front in table 4, YR3 output A phase trigger control differentiate invalidating signal, i.e. P7A be 0, indicate A phase Trig control signal be not effective Trig control signal；When The input of A phase interlocking control circuit embodiment 2 is invalid code value, and when exporting invalid Trig control signal, can from table 4 Out, the P7A of YR3 output is similarly 0.8 triggerings control letter that ROM memory YR4 is used to export B phase interlocking control circuit Number being judged, 8 Trig control signals that ROM memory YR5 is used to export C phase interlocking control circuit judge, The principle phase that principle is used to judge 8 Trig control signals that A phase interlocking control circuit exports with ROM memory YR3 Together.When 8 Trig control signal P5B of B phase interlocking control circuit output are 1 group in 11 groups of effective Trig control signals, The P7B of YR4 output is 1, is otherwise 0；It is effectively touched when 8 Trig control signal P5C of C phase interlocking control circuit output are 11 groups When hair controls 1 group in signal, otherwise it is 0 that the P7C of YR5 output, which is 1,.When P7A, P7B, P7C all 1, A phase, B phase, C phase When all effective Trig control signal of Trig control signal that interlocking control circuit issues, the triggering with door FK1 output is controlled Differentiate that resultant signal P7 is effective, i.e. P7 is 1, and triode VK1, VK2 conducting, controlled source+VCCK obtain electric, the normal work of trigger unit Make, issues corresponding trigger pulse according to Trig control signal.P7 is 1 while controlling triode VT conducting, relay coil KA Must be electric, it is closed relay normal open switch KA-1 in the A phase main circuit of Fig. 3 auto compensating type three-phase main circuit embodiment 1, relay Device normally closed switch KA-2 is disconnected；Relay coil KA obtains B phase that is electric while controlling auto compensating type three-phase main circuit embodiment 1 Disconnected conjunction is switched with relay normally open corresponding in C phase main circuit, relay normally closed switch disconnects, and circuit is in compensation work shape State.When P7A, P7B, P7C be not all of for 1, A phase, B phase, C phase interlocking control circuit issue Trig control signal not all When for effective Trig control signal, the output P7 signal with door FK1 is 0, and triode VK1, VK2 cut-off, controlled source+VCCK lose Electricity, trigger unit do not work, i.e., do not issue the trigger pulse of triggering thyristor.P7 is 0 while controlling triode VT cut-off, relay Device coil KA power loss makes relay normal open switch KA-1 in the A phase main circuit of Fig. 3 auto compensating type three-phase main circuit embodiment 1 It disconnects, relay normally closed switch KA-2 closure makes the voltage being applied on magnet exciting coil 0；Relay coil KA power loss is simultaneously Corresponding relay normally open switch in the B phase and C phase main circuit of auto compensating type three-phase main circuit embodiment 1 is controlled to disconnect, after Electric appliance normally closed switch is disconnected to be closed, and circuit is in protection working condition, realizes the protection to three-phase thyristor switching group.

Combination logic function in either 4 truth table of table of table 3, can also be using the other modes except ROM memory It goes to realize.

In the A phase, B phase, C phase that the judgement of error detection control unit inputs totally three groups of Trig control signals, there is one group and one group When not being effective Trig control signal above, issues and protect control signal effective, keep the thyristor switch group of A phase, B phase, C phase same When be in guard mode；At this point, Autocompensation three-phase AC voltage stabilizer does not compensate input voltage, the electricity of voltage-stablizer output Pressure is the AC power source phase voltage of input.When the thyristor switch group of A phase, B phase, C phase is in guard mode simultaneously, if Error detection control unit judges that believe for effectively triggering control by totally three groups of Trig control signal full recoveries for the A phase, B phase, C phase inputted Number, then error detection control unit terminates the guard mode of thyristor switch group automatically, and the thyristor switch group of A phase, B phase, C phase is whole Again it is in compensation work state.

From above embodiment and its course of work it is found that as long as error detection control unit judges three groups of triggering controls of input Signal processed is not all effective Trig control signal, then while not issuing the trigger pulse of triggering thyristor, starts and make three The thyristor switch group of phase is in guard mode；A phase, B phase, C phase interlocking control circuit transports to error detection control unit respectively Effective Trig control signal ipsilateral thyristor in it ensure that each phase thyristor switch group of auto compensating type three-phase main circuit is different When be connected, that is, while realizing thyristor mutual lock control, voltage-stablizer also to other improper control logic mistakes of appearance, There is code error including each phase analog-to-digital conversion coding circuit, outputs invalid code value and interlocking control circuit is patrolled Mistake is collected, when outputing invalid Trig control signal, also while not issuing the trigger pulse of triggering thyristor, by error detection control Unit starting processed simultaneously makes thyristor switch group be in guard mode；When thyristor switch group is in guard mode, if error detection Control unit judges that Autocompensation three-phase AC voltage stabilizer reenters normal logic control state, i.e. error detection control unit is sentenced When three groups of Trig control signal full recoveries of disconnected input are effective Trig control signal, then thyristor switch can be automatically stopped The guard mode of group simultaneously makes it be in compensation work state again.It is steady that above-mentioned function effectively strengthens Autocompensation three-phase alternating current Depressor is directed to the protection of course of work exception, keeps the work of the Autocompensation three-phase AC voltage stabilizer relatively reliable.

In above each embodiment attached drawing, all ROM memories, logic gates and logic function integrated circuit are adopted It is powered with positive single supply+VCC.Except for the technical features described in the specification, the other technologies of Autocompensation three-phase AC voltage stabilizer It is the routine techniques that those skilled in the art are grasped.

Claims

1. a kind of Autocompensation three-phase AC voltage stabilizer, it is characterised in that: single by auto compensating type three-phase main circuit, compensation control Member, trigger unit, error detection control unit composition；Auto compensating type three-phase main circuit is three-phase four-line system, the exchange of every phase Power supply phase voltage is realized using identical compensation circuit and compensation way and is compensated；Every phase main circuit include compensator transformer, from Coupling transformer, thyristor switch group and relay protection switch；

Control unit is compensated by three compensation controls including analog-to-digital conversion coding circuit, delay protection circuit, interlocking control circuit Circuit composition processed, the identical compensation control circuit of three structures carries out voltage sample to three-phase alternating-current supply phase voltage respectively, defeated Three-phase Trig control signal out；

It compensates control unit and exports three-phase Trig control signal to trigger unit and error detection control unit；Trigger unit inputs three-phase Trig control signal issues three-phase trigger signal to auto compensating type three-phase main circuit, controls thyristor in three-phase main circuit and open The on-off of Guan Zuzhong bidirectional thyristor；Error detection control unit inputs three-phase Trig control signal, and output protection controls signal；

In each phase, analog-to-digital conversion coding circuit carries out voltage sample, output voltage grade encoded radio to AC power source phase voltage； Delay protection circuit input voltage grade encoded radio, exports the voltage class encoded radio after postponing and trigger region does not control signal； Voltage class encoded radio after interlocking control circuit input delay and not trigger region control signal, export Trig control signal；Institute Voltage class encoded radio is stated to be made of 4 bits.

2. Autocompensation three-phase AC voltage stabilizer according to claim 1, it is characterised in that: analog-to-digital conversion is compiled in each phase Code circuit includes AC supply voltage detection circuit and analog to digital conversion circuit；Exchange of the AC supply voltage detection circuit to input Power supply phase voltage virtual value is sampled, and AC power source phase voltage sampled value is obtained；Analog to digital conversion circuit input ac power phase Voltage sample value, output voltage grade encoded radio.

3. Autocompensation three-phase AC voltage stabilizer according to claim 2, it is characterised in that: analog-to-digital conversion electricity in each phase Road includes biproduct parting A/D converter ICL7109, reference capacitance C13, automatic zero set capacitor C12, integrating capacitor C11, integral electricity Hinder R11, resistance RF1, resistance RF2, crystal oscillator XT1；The operation of ICL7109/holding end RUN, low byte enable end LBEN, test lead TEST connects high level, and chip select terminal CE/LOAD, mode end MODE, high byte enable end HBEN, oscillator selection end OSC SEL connect Low level；Crystal oscillator XT1 is connected to oscillator input OSC IN and oscillator output end the OSC OUT of ICL7109；Integrating capacitor One end connection composition integrating circuit of C11, integrating resistor R11, automatic zero set capacitor C12, other end are respectively connected to Integrating capacitor end INT, buffer output end BUF, the automatic zero set capacitance terminal AZ of ICL7109；The Differential Input of ICL7109 is high-end IN HOL input ac power voltage sample value, Differential Input low side IN LO are connected to the reference voltage output end of ICL7109 REF OUT；Resistance RF1, resistance RF2 divide the reference voltage of ICL7109, and reference voltage is obtained on resistance RF2, ginseng Examine reference voltage positive input terminal REF IN+ and reference voltage negative input end the REF IN- of voltage input to ICL7109；With reference to electricity Hold reference capacitance positive input terminal REF CAP+ and reference capacitance negative input end the REF CAP- that C13 is connected to ICL7109； The positive power source terminal V+ of ICL7109 is connected to positive supply；The negative power end V- of ICL7109 is connected to negative supply；The number of ICL7109 Ground terminal and simulation ground terminal are connected to publicly；The 4 output end outputs of highest of voltage class encoded radio from ICL7109.

4. Autocompensation three-phase AC voltage stabilizer according to claim 3, it is characterised in that: delay protection electricity in each phase Routing delay detection module and not trigger region control signal generator module composition；Include 4 in delay detection module identical to prolong When detection circuit, each delay detection circuit input signal is postponed after output signal, while to input Signal carries out Edge check, exports Edge check signal；4 delay detection circuits respectively carry out 4 voltage class encoded radios Signal delay, 4 voltage class encoded radios after being postponed, and Edge check is carried out to 4 voltage class encoded radios, it obtains To 4 Edge check signals；Trigger region control signal generator module, which is not converted to 4 Edge check signals of input, does not trigger Area controls signal output.

5. Autocompensation three-phase AC voltage stabilizer according to claim 4, it is characterised in that: each delay inspection in each phase Slowdown monitoring circuit includes resistance RY3, capacitor CY3, phase inverter FY5, phase inverter FY6, NAND gate FY7 or door FY8, NAND gate FY9； Phase inverter FY5 input terminal is connected to input signal end；One end of resistance RY3 is connected to phase inverter FY5 output end, other end point Be not connected to one end of capacitor CY3, an input terminal of an input terminal of NAND gate FY7 or door FY8, phase inverter FY6 it is defeated Enter end；The other end of capacitor CY3 is connected to ground terminal, and another input terminal of NAND gate FY7 is connected to input signal end, or Another input terminal of door FY8 is connected to input signal end；2 input terminals of NAND gate FY9 are respectively connected to NAND gate FY7 Output end or door FY8 output end；Phase inverter FY6 output end is the output signal end after delay；NAND gate FY9 output end is side Along detection signal output end.

6. Autocompensation three-phase AC voltage stabilizer according to claim 5, it is characterised in that: not trigger region control in each phase Signal generator module processed is with 4 input signal ends or door FY10；Or 4 input signal ends of door FY10 are respectively connected to Edge check signal output end in 4 delay detection circuits；Or trigger region does not control signal for the output end output of door FY10.

7. Autocompensation three-phase AC voltage stabilizer according to claim 6, it is characterised in that: mutual lock control electricity in each phase Road is ROM memory；5 address input ends of ROM memory input 4 electricity after not trigger region control signal and delay respectively Press grade encoded radio；8 data output ends of ROM memory export Trig control signal.

8. Autocompensation three-phase AC voltage stabilizer according to claim 7, it is characterised in that: error detection control is single in each phase Member with door FK1, protection control circuit and 3 ROM discrimination modules by forming；8 address input ends of 3 ROM discrimination modules point Not Shu Ru three-phase 8 Trig control signals；The data output end of 3 ROM discrimination modules exports the triggering control of three-phase respectively Differentiate signal；The triggering control of three-phase differentiates that signal is respectively connected to the input terminal with door FK1；Triggering control is exported with door FK1 Differentiate resultant signal；

In each phase when the Trig control signal mistake of ROM discrimination module judgement input, triggering control is made to differentiate invalidating signal, Otherwise effectively.

9. Autocompensation three-phase AC voltage stabilizer according to claim 8, it is characterised in that: brilliant lock in each phase main circuit Pipe switching group has 8 bidirectional thyristors；The bucking coil of compensator transformer is connected in phase line；Auto-transformer has 4 outputs Tap after first ipsilateral 4 bidirectional thyristor one end are in parallel, is connected to one end of the magnet exciting coil of compensator transformer, and first The other end of 4 ipsilateral bidirectional thyristors is respectively connected to 4 output taps；Second 4 ipsilateral bidirectional thyristors one After end is in parallel, it is connected to the other end of the magnet exciting coil of compensator transformer, other the one of second 4 ipsilateral bidirectional thyristors End is respectively connected to 4 output taps；After the input winding of auto-transformer is connected with the normal open switch of relay, it is connected in parallel to phase Line output terminal and zero line side；The normally closed switch of relay is connected in parallel on the both ends of compensator transformer magnet exciting coil.

10. Autocompensation three-phase AC voltage stabilizer according to claim 9, which is characterized in that protect the function of control circuit It can be: when the triggering control of three-phase differentiates that signal is all effective, and triggering control differentiates that resultant signal is effective, control three-phase main circuit Normal open switch closure in relay protection switch, normally closed switch disconnect；When the triggering control of three-phase differentiates that signal is not all of Effectively, when triggering control differentiates that resultant signal is invalid, the normal open switch in control three-phase main circuit relay protection switch is disconnected, often It closes and closes the switch.