CN109445504A - Rail traffic three-phase ac voltage stabilizer - Google Patents

Rail traffic three-phase ac voltage stabilizer Download PDF

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Publication number
CN109445504A
CN109445504A CN201811355980.1A CN201811355980A CN109445504A CN 109445504 A CN109445504 A CN 109445504A CN 201811355980 A CN201811355980 A CN 201811355980A CN 109445504 A CN109445504 A CN 109445504A
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China
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phase
voltage
triggering
signal
circuit
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CN201811355980.1A
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CN109445504B (en
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刘建华
凌云
文定都
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湖南工业大学
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    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10Regulating voltage or current
    • G05F1/46Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices

Abstract

A kind of rail traffic three-phase ac voltage stabilizer, including auto compensating type three-phase main circuit unit, compensation control unit, trigger unit, protection driving unit;Compensation control unit differentiates that the compensation control circuit of circuit forms including analog-to-digital conversion coding circuit, decoding gating circuit, delay protection circuit, triggering gate control circuit, error detection by three; voltage sample is carried out to the AC power source phase voltage of three-phase respectively, exporting corresponding three-phase Trig control signal, three-phase, trigger region control signal, three-phase triggering gating controlling value do not differentiate signal;Protection driving unit differentiates whether signal is effectively protected the three-phase thyristor switching group in main circuit according to the three-phase triggering gating controlling value of input.The stable-pressure device also protects thyristor switch group to whether control circuit logic error occurs, effectively strengthens the protection for stable-pressure device course of work exception, keep work more stable, reliable while realizing mutual lock control.

Description

Rail traffic three-phase ac voltage stabilizer
Technical field
The present invention relates to power technique fields, especially a kind of rail traffic three-phase ac voltage stabilizer.
Background technique
Existing compensation single-phase and three-phase AC voltage stabilizer, its advantage is that voltage stabilized range is wide, waveform almost without distortion, Overall efficiency is high, and workload-adaptability is strong.Its principle is the height situation according to input voltage, is automatically controlled on compensator transformer just The switching of the different winding coils of grade winding, using the no-load voltage ratio relationship of primary side Working winding and secondary windings, or passes through tune The alive mode of institute, provides the voltage compensation of two-way multi gear, to realize the purpose of voltage-regulation voltage-stabilization on whole armature winding.
The AC power source requirement powered to rail traffics occasion or equipment such as Subway Control Center, railway signal instructions can Lean on, stablize and safety.Existing compensation type ac voltage stabilizer is changed using the movement of motor control carbon brush to compensator transformer excitation When coil applies different voltages, carbon brush is prone to wear, and is often broken down;It is compensated by the way of electronic switch switching On the switching of the different winding coils of armature winding on transformer, or adjustment armature winding when institute's making alive, electronic switch It is delayed to turn off and be easy to cause power supply short circuit failure;When being switched using the program mode (PM) control electronic switch of single-chip microcontroller, PLC etc., journey The problems such as sequence runs fast, crashes will also result in voltage-stablizer failure, or because of power supply short circuit failure caused by control logic mistake.
Summary of the invention
In order to solve the problems of existing rail traffic AC stabilizer, the present invention provides a kind of friendships of track Logical three-phase ac voltage stabilizer, including auto compensating type three-phase main circuit unit, compensation control unit, trigger unit, protection drive Moving cell.
Every phase main circuit of auto compensating type three-phase main circuit unit includes compensator transformer, auto-transformer, brilliant lock Pipe switching group and relay protection circuit;Compensation control unit is made of the identical compensation control circuit of three structures, output three Phase Trig control signal is to trigger unit;Trigger unit issues three-phase trigger signal according to the three-phase Trig control signal of input To auto compensating type three-phase main circuit unit, the on-off of thyristor in three-phase thyristor switching group is controlled;It is same to compensate control unit When output three-phase trigger region control signal and three-phase triggering gating controlling value do not differentiate signal to protecting driving unit;Protection driving Unit controls the protection of three-phase thyristor switching group and the power supply of trigger unit.
Three compensation control circuits carry out voltage sample, output three-phase triggering to three-phase alternating-current supply phase voltage respectively Controlling signal, three-phase, trigger region control signal, three-phase triggering gating controlling value do not differentiate signal.
The compensation control circuit of each phase includes analog-to-digital conversion coding circuit, decoding gating circuit, delay protection circuit, touching Send out gate control circuit, error detection differentiates circuit.In each phase, analog-to-digital conversion coding circuit carries out voltage to AC power source phase voltage Sampling, output voltage grade encoded radio;Decode gating circuit input voltage grade encoded radio, output triggering gating controlling value;Prolong When protection circuit input triggering gating controlling value, output delay after triggering gating controlling value and not trigger region control signal;Touching Triggering after sending out gate control circuit input delay gates controlling value, exports Trig control signal;Error detection differentiates that circuit input is prolonged The triggering to lag gates controlling value and differentiates whether it is effective, and output triggering gating controlling value differentiates signal.
In each phase, triggering gating controlling value is M binary values;Error detection differentiates that circuit differentiates that the triggering of input gates control Whether value processed is effective, according to being, in the position the M binary value of triggering gating controlling value, has and when only one effective, triggering gates Controlling value is effective;Otherwise, triggering gating controlling value is invalid;Position in triggering gating controlling value is 1 effective, is 0 invalid, that is, triggers High level in gating control value signal is effective, and low level is invalid;Either, the position in triggering gating controlling value is 0 effective, is 1 is invalid, i.e., the low level in triggering gating control value signal is effective, and high level is invalid;Shared M triggering gating controlling value has Effect.The M is the integer more than or equal to 2.
In each phase, the voltage of AC supply voltage waving interval range is divided into M voltage by analog-to-digital conversion coding circuit Grade interval, output include M effective voltage class encoded radios;Gating circuit is decoded to compile according to M effective voltage class Code value, the effective triggering gating controlling value of M of output are corresponded with M voltage class section;Decode the function of gating circuit It can be realized using ROM memory.
In each phase, the voltage class section of AC power source phase voltage and voltage compensation state are corresponded;Triggering gating Controlling value controls the on-off assembled state of thyristor in thyristor switch group;The on-off of thyristor combines shape in thyristor switch group 01 or multiple voltage superpositions in the multiple output voltages of state control selections this phase auto-transformer, as The magnet exciting coil voltage of this phase compensator transformer realizes voltage compensation state corresponding with voltage class section.In each phase, touching Hair gate control circuit includes diode triggered gating matrix;Gate control circuit is triggered according to effective triggering gating control Value is selected by diode triggered gating matrix and keeps corresponding Trig control signal effective, controlled in this phase thyristor switch group The on-off assembled state of thyristor.
In each phase, N number of thyristor is shared in thyristor switch group;Diode triggered gating matrix includes the triggering choosing of M root Logical control alignment, N root triggering driving line and multiple diodes;M root triggering gating control alignment gates controlling value with M triggerings It corresponds, an effective triggering gating controlling value is corresponding to keep a triggering gating control alignment signal effective;The triggering of N root is driven Dynamic line and N number of thyristor correspond, and a triggering driving line signal effectively correspondence controls the triggering an of thyristor Signal is effective;When every triggering gating control alignment is effective, a corresponding auto compensating type three-phase main circuit unit thyristor is opened The on-off assembled state of Guan Zuzhong thyristor;When every triggering gating control alignment signal is effective, a corresponding thyristor switch The on-off assembled state of thyristor in group;In every triggering gating control alignment and effective alignment signal, corresponding on-off is combined State needs to control to be respectively provided with diode and is attached between the triggering driving line of turn on thyristors, when certain root triggers gating control When alignment processed is effective, keep the triggering driving line signal for needing to control turn on thyristors effective by diode;The N be greater than etc. In 4 integer.
In each phase, a triggering driving line signal effectively correspondence keeps the Trig control signal of a thyristor effective Method is that N root triggering driving line signal corresponds the Trig control signal directly as N number of thyristor;A piece triggering is driven Dynamic line signal effectively correspondence makes the effective method of the Trig control signal of a thyristor either, the triggering gating control Circuit further includes Trig control signal driving circuit;The input of Trig control signal driving circuit is N root triggering driving line Signal exports as the Trig control signal of one-to-one N number of thyristor.
In each phase, the fluctuation of AC power source phase voltage makes triggering gating controlling value change, and leads to thyristor switch group When middle thyristor needs to change on-off assembled state, successive 2 kinds of thyristor different on-off combine shape in thyristor switch group Between state, not trigger region time, all thyristors in cutoff thyristor switching group are maintained;Maintain one not trigger region when Between by not trigger region control signal realize.In each phase, trigger region control signal does not change in triggering gating controlling value for control A pulse is exported after change;Trigger region control signal is not effective during exporting pulse, the nothing during non-output pulse Effect;Further, after the triggering gating controlling value changes, the spaced time of pulse does not exist in trigger region control signal 10ms chooses between 30ms.
In each phase, the triggering gating control value signal change moment of delay protection circuit delay is later than triggering gating control Value change after not trigger region control signal in pulse the forward position moment, and earlier than triggering gating controlling value change after Not trigger region control signal in pulse it is rear along the moment.
Protection driving unit differentiates whether signal effectively starts/stop pair according to the three-phase triggering gating controlling value of input The protection of three-phase thyristor switching group, specific method are to differentiate in signal there is one and one when three-phase triggers gating controlling value When above invalid, control disconnects the input side supply voltage of all auto-transformers in three-phase to make at three-phase thyristor switching group Under guard mode.
Protect driving unit according to three-phase triggering gating controlling value differentiate signal whether effectively and three-phase not trigger region control Whether effectively come the power supply for controlling trigger unit, specific method is to differentiate signal when three-phase triggers gating controlling value to signal In have one and more than one it is invalid when, control break trigger unit in three-phase trigger circuit power supply;It is gated when three-phase triggers When controlling value differentiates that signal is all effective, in each phase, not trigger region control signal effectively then same phase in break trigger unit The power supply of trigger circuit stops the trigger pulse for issuing the phase, otherwise, connects the electricity of same phase trigger circuit in trigger unit Source, same phase trigger circuit work normally, and the Trig control signal according to input issues trigger pulse.
Thyristor in thyristor switch group is bidirectional thyristor, or is 2 unidirectional thyristor reverse parallel connections The thyristor alternating-current of formation switchs.
The beneficial effects of the present invention are: the rail for carrying out voltage compensation using compensator transformer group and thyristor switch group Traffic three-phase ac voltage stabilizer in road gates controlling value using an only effective, different triggering, is selected by diode triggered Logical matrix realizes the gating control to thyristor difference on-off assembled state in every phase thyristor switch group, and ensure that brilliant lock Ipsilateral thyristor does not simultaneously turn in pipe switching group, that is, realizes the mutual lock control of thyristor.At the same time, also to because of modulus Transition coding circuit breaks down, or logic error occurs in decoding gating circuit, when causing triggering gating controlling value invalid, Stop issuing the guarantor of the input side supply voltage progress three-phase thyristor switching group of trigger pulse and disconnection 3-phase autotransformer Shield effectively strengthens the protection that the rail traffic three-phase ac voltage stabilizer is directed to course of work exception;In three-phase When thyristor switch group is in guard mode, if three-phase triggering gating controlling value full recovery be it is effective, can stop automatically Only the guard mode of three-phase thyristor switching group and it is made to be in compensation work state again.The AC stabilizer does not use The switching switching of the program mode (PM) control thyristor of single-chip microcontroller, PLC etc., avoids steady caused by the problems such as program runs fast, crashes Pressure device failure.Above-mentioned function keeps the work of the rail traffic three-phase ac voltage stabilizer more stable, reliable.
Detailed description of the invention
Fig. 1 is the system composition block diagram of rail traffic three-phase ac voltage stabilizer;
Fig. 2 is the composition block diagram of A phase compensation control circuit;
Fig. 3 is the A phase main circuit in auto compensating type three-phase main circuit unit embodiment 1;
Fig. 4 is the A phase main circuit in auto compensating type three-phase main circuit unit embodiment 2;
Fig. 5 is analog-to-digital conversion coding circuit embodiment 1 in A phase compensation control circuit;
Fig. 6 is analog-to-digital conversion coding circuit embodiment 2 in A phase compensation control circuit;
Fig. 7 is that A phase decodes gating circuit embodiment;
Fig. 8 is that A phase delay protects circuit embodiments block diagram;
Fig. 9 is the delay detection circuit embodiment 1 for triggering gating control value signal Y11 in delay detection module needle to A phase;
Figure 10 is the delay detection circuit embodiment for triggering gating control value signal Y11 in delay detection module needle to A phase 2;
Figure 11 is the delay detection circuit embodiment for triggering gating control value signal Y11 in delay detection module needle to A phase 3;
Figure 12 is that trigger region does not control signal generator module embodiment to A phase;
Figure 13 is that A phase delay protects split-phase in the middle part of circuit to close waveform diagram;
Figure 14 is the trigger circuit embodiment that bidirectional thyristor SR1 in A phase main circuit is triggered in trigger unit;
Figure 15 is that A phase triggers gating control cells embodiment 1;
Figure 16 is that A phase triggers gating control cells embodiment 2;
Figure 17 is that A phase triggers gating control cells embodiment 3;
Figure 18 is A phase error detection judgement unit embodiment;
Figure 19 is protection drive unit embodiment.
Specific embodiment
Below in conjunction with attached drawing, the invention will be further described.
Fig. 1 is the system composition block diagram of rail traffic three-phase ac voltage stabilizer, compensation control unit output three-phase triggering Signal P5 is controlled to trigger unit, three-phase Trig control signal P5 is by A phase, B phase, C phase Trig control signal P5A, P5B, P5C group At;Trigger unit issues three-phase trigger signal P6 to the main electricity of auto compensating type three-phase according to the three-phase Trig control signal of input Road unit controls the on-off of bidirectional thyristor in three-phase thyristor switching group.Compensation control unit exports three-phase simultaneously and does not trigger Area control signal P4 and three-phase triggering gating controlling value differentiate signal P7 to driving unit is protected, and trigger region does not control signal to three-phase P4 includes not trigger region control signal P4A, P4B, P4C of A phase, B phase, C phase, and three-phase triggering gating controlling value differentiates signal P7 packet The triggering gating controlling value for including A phase, B phase, C phase differentiates signal P7A, P7B, P7C;Protection driving unit is touched according to the three of input Hair gating controlling value differentiates whether signal P7 effectively starts/stop the protection to three-phase thyristor switching group, while according to three Mutually triggering gating controlling value differentiate signal P7 whether effectively and three-phase not trigger region control signal P4 whether effectively come control trigger The power supply of unit.
Compensation control unit is made of the compensation control circuit of A, B, C three-phase, and Fig. 2 is the composition of A phase compensation control circuit Block diagram, analog-to-digital conversion coding circuit carry out voltage sample to A phase AC power source phase voltage, and A phase voltage is exported after analog-to-digital conversion Grade encoded radio P1A;Decoding gating circuit decodes voltage class encoded radio P1A, and output A phase triggers gating controlling value P2A;Delay protection circuit input A phase triggers gating controlling value P2A, and the A phase after output delay triggers gating controlling value P3A and A Mutually trigger region does not control signal P4A;A phase after triggering gate control circuit input delay triggers gating controlling value P3A, exports A Phase Trig control signal P5A;Error detection differentiate circuit differentiate input A phase trigger gating controlling value P3A it is whether effective, export A phase Triggering gating controlling value differentiates signal P7A.B phase, the structure of C phase compensation control circuit, function, control logic are identical as A phase, point Other to carry out voltage sample and control to B phase AC power source phase voltage, C phase AC power source phase voltage, output B phase, C phase trigger control Signal P5B, P5C, trigger region control signal P4B, P4C and B phase, C phase A phase do not trigger gating controlling value differentiation signal for B phase, C phase P7B、P7C。
Fig. 3 be auto compensating type three-phase main circuit unit embodiment 1 in A phase main circuit, including compensator transformer TB1 and Auto-transformer TB2,6 bidirectional thyristor SR1-SR6 collectively constitute A phase thyristor switch group, and fuse FU1 and relay are normal Switch KA-1, relay normally closed switch KA-2 form A phase relay and protect circuit.
In Fig. 3, the bucking coil of compensator transformer TB1 is connected in A phase phase line, and phase line input terminal is L1A, and output end is L2A.Voltage on TB1 magnet exciting coil is controlled by A phase thyristor switch group.Auto-transformer TB2 have 3 output tap C1, C2, One end of TB1 magnet exciting coil is connected to after one end of C3, bidirectional thyristor SR1, SR3, SR5 are in parallel, SR1, SR3, SR5 are in addition One end is respectively connected to tap C1, C2, C3;TB1 magnet exciting coil is connected to after one end of bidirectional thyristor SR2, SR4, SR6 are in parallel Other end, the other end of SR2, SR4, SR6 is then respectively connected to tap C1, C2, C3.If auto-transformer TB2 tap Output voltage U12 between C1, C2 is different from the output voltage U23 between C2, C3, and voltage U23 is 2 times of voltage U12;Then thyristor Switching group is up to forward direction U12, forward direction U23, forward direction U12+U23, reversed U12, reversed U23, reversed U12+U23 totally 6 kinds of excitations Coil voltage compensating coefficient, 0 voltage compensation state when a kind of additional input voltage is within normal range (NR), the input of A phase phase line The AC power source phase voltage of end L1A input can at most be divided into 7 voltage ranges and compensate control.In Fig. 3, N is zero curve, G11, G12 are respectively the trigger signal input terminal of bidirectional thyristor SR1 to SR6 to G61, G62.In Fig. 3, bidirectional thyristor SR1, SR3, SR5 form ipsilateral thyristor, and bidirectional thyristor SR2, SR4, SR6 form another ipsilateral thyristor;It is ipsilateral to avoid short circuit There cannot be 2 and 2 or more thyristors to simultaneously turn on simultaneously in thyristor;For example, SR1, SR3 cannot be simultaneously turned on, SR4, SR6 cannot be simultaneously turned on, etc..
Fig. 4 be auto compensating type three-phase main circuit unit embodiment 2 in A phase main circuit, including compensator transformer TB1 and Auto-transformer TB2,8 bidirectional thyristor SR1-SR8 collectively constitute A phase thyristor switch group, and fuse FU1 and relay are normal Switch KA-1, relay normally closed switch KA-2 form A phase relay and protect circuit.
In Fig. 4, the bucking coil of compensator transformer TB1 is connected in A phase phase line, and phase line input terminal is L1A, and output end is L2A.Voltage on TB1 magnet exciting coil is controlled by thyristor switch group.Auto-transformer TB2 have 4 output tap C1, C2, C3, Be connected to one end of TB1 magnet exciting coil after one end of C4, bidirectional thyristor SR1, SR3, SR5, SR7 is in parallel, SR1, SR3, SR5, The other end of SR7 is respectively connected to tap C1, C2, C3, C4;After one end of bidirectional thyristor SR2, SR4, SR6, SR8 are in parallel Be connected to the other end of TB1 magnet exciting coil, the other end of SR2, SR4, SR6, SR8 be then respectively connected to tap C1, C2, C3,C4.If the output voltage U12 between auto-transformer TB2 tap C1, C2, the output voltage U23 between C2, C3, between C3, C4 Output voltage U34 is respectively different, and voltage U23 is 3 times of voltage U12, and voltage U34 is 2 times of voltage U12;Then thyristor switch Group include forward direction U12, forward direction U23, forward direction U34, forward direction U12+U23, forward direction U23+U34, forward direction U12+U23+U34, reversely U12, reversed U23, reversed U34, reversed U12+U23, reversed U23+U34, reversed U12+U23+U34 totally 12 kinds of magnet exciting coil voltage Compensating coefficient, 0 voltage compensation state when a kind of additional input voltage is within normal range (NR), the A of phase line input terminal L1A input Phase AC power source phase voltage can be divided into most 13 voltage ranges and compensate control.In Fig. 4, N is zero curve, G11, G12 It is respectively the trigger signal input terminal of bidirectional thyristor SR1 to SR8 to G81, G82.In Fig. 4, bidirectional thyristor SR1, SR3, SR5, SR7 form ipsilateral thyristor, and bidirectional thyristor SR2, SR4, SR6, SR8 form another ipsilateral thyristor;To avoid short circuit, There cannot be 2 and 2 or more thyristors to simultaneously turn on simultaneously in ipsilateral thyristor;For example, SR1, SR7 cannot be simultaneously turned on, SR4, SR8 cannot be simultaneously turned on, etc..
Each bidirectional thyristor in Fig. 3, Fig. 4 can be substituted with the unidirectional thyristor of 2 reverse parallel connections.Fig. 3, Fig. 4 In, relay normally open switch and relay normally closed switch composition relay protection switch.
Auto compensating type three-phase main circuit unit is three-phase four-line system, and the main circuit of A, B, C three-phase is using identical Circuit structure and form respectively compensate the phase voltage of A, B, C phase, i.e., B, C two-phase use with A phase main circuit identical electricity Line structure and compensation way respectively compensate the phase voltage of B, C phase.
Analog-to-digital conversion coding circuit carries out voltage sample to AC power source phase voltage, by AC power source phase voltage waving interval The voltage of range exports the voltage class encoded radio that binary system is constituted after analog-to-digital conversion.It is mutually electric to A, B, C three-phase alternating-current supply Pressure carries out voltage sample and output voltage grade encoded radio is all made of identical circuit.
Fig. 5 is A phase analog-to-digital conversion coding circuit embodiment 1, and FD1 is that real available value detects device LTC1966, LTC1966 Constitute RMS to DC circuit with transformer TV1, capacitor CV1, capacitor CV2, resistance RV1, resistance RV2, for from phase line L1A and The A phase AC power source phase voltage virtual value of zero curve N input measures, and obtains A phase AC power source phase voltage sampled value U1.Work as figure When 5 phase line L1A is changed to connection B phase, the phase line of C phase respectively, B phase, the AC power source phase voltage sampled value of C phase are respectively obtained. UIN1, UIN2 of LTC1966 is alternating voltage difference input terminal, and USS is the negative supply input terminal that can be grounded, and UDD is positive electricity Source input terminal, GND are ground terminal, and EN is that low level effectively enables control signal, and UOUT is voltage output end, and COM is output Voltage return.
In Fig. 5, FD2 is biproduct parting A/D converter ICL7109, is used for AC power source phase voltage waving interval range Voltage divide into voltage class section and be converted to binary system composition voltage class encoded radio output.In Fig. 5, ICL7109 Operation/holding end RUN, low byte enable end LBEN, test lead TEST meet high level, chip select terminal CE/LOAD, mode end MODE, high byte enable end HBEN, oscillator selection end OSC SEL connect low level, and work is continuing (i.e. automatic to repeat) turn Change mode and the direct output mode of high byte;Crystal oscillator XT1 be connected to ICL7109 oscillator input OSC IN and oscillator it is defeated Outlet OSC OUT;One end connection composition integrating circuit of integrating capacitor C11, integrating resistor R11, automatic zero set capacitor C12, separately Outer one end is respectively connected to the integrating capacitor end INT, buffer output end BUF, automatic zero set capacitance terminal AZ of ICL7109; The Differential Input of ICL7109 high-end IN HOL input ac power phase voltage sampled value U1, Differential Input low side IN LO are connected to Reference voltage output end REF OUT;Resistance RF1, resistance RF2 divide reference voltage, obtain reference voltage on resistance RF2 Uref, Uref are input to reference voltage positive input terminal REF IN+ and reference voltage negative input end REF IN-;Reference capacitance C13 connects It is connected to reference capacitance positive input terminal REF CAP+ and reference capacitance negative input end REF CAP-;The V+ of ICL7109 is positive power source terminal, It is connected to power supply+VCC;The V- of ICL7109 is negative power end, is connected to power supply-VCC;The GND of ICL7109 is digital ground terminal, COMMON is simulation ground terminal, is connected to publicly GND.
By taking A phase as an example, if the AC power source phase voltage fluctuation range of input is 220V ± 10%, it is desirable that use compensation master Circuit embodiments 1 are stablized to be exported in the range of 220V ± 2%, AC power source phase voltage waving interval range be 242V extremely 198V uses the A phase analog-to-digital conversion coding circuit embodiment 1 of Fig. 5 at this time, can will input in 242V to the A phase between 198V Phase voltage is divided into 7 voltage class sections that section voltage swing is 6.4V, and the voltage in 3 voltage class sections therein is higher than It is required that output voltage range, need to carry out drop compensation;The voltage in 3 voltage class sections is lower than desired output voltage model It encloses, needs to carry out boosting compensation;1 voltage class section carries out 0 voltage compensation, i.e., within desired output voltage range Uncompensation.The voltage range of 6.4V is not more than 220V ± 1.5%, meets requirement of the output control within 220V ± 2%.Using A phase main circuit in Fig. 3 auto compensating type three-phase main circuit unit embodiment 1 compensates, the input electricity of auto-transformer TB2 Pressure is alternating current 220V, and when only making the magnet exciting coil voltage of TB1 of output voltage U12, TB1 offset voltage is 6.4V, only with output When voltage U23 does the magnet exciting coil voltage of TB1, TB1 offset voltage is 12.8V;TB1 is using output voltage U12, U23 simultaneously Magnet exciting coil voltage when, TB1 offset voltage be 19.2V.In Fig. 5, ICL7109 is to from the high-end IN HOL of Differential Input and difference The differential voltage inputted between low side IN LO carries out A/D conversion;The corresponding AC power source electricity in 7 voltage class sections of 6.4V Pressure waving interval is 242.4V to 197.6V, covers the range actually fluctuated;Differential Input low side IN LO input, from base The reference voltage Ucp of quasi- voltage output end REF OUT output should be managed with the lower bound of AC power source phase voltage waving interval range It is corresponding by value 197.6V;Accordingly, it is determined that the no-load voltage ratio of transformer TV1 and the intrinsic standoff ratio of resistance RV1, resistance RV2, it should in alternating current When source phase voltage is lower bound theoretical value 197.6V, AC power source phase voltage sampled value U1 is made to be equal to reference voltage output end REF The reference voltage Ucp of OUT output.Fig. 5 be used for A phase when, analog-to-digital conversion coding circuit output voltage class encoded radio P1A by from Data L4, L3, L2, L1 composition of 4 B12, B11, B10, B9 outputs of ICL7109 highest;L4, L3, L2, L1 and voltage from as low as The high one-to-one 7 voltage class encoded radios in 7 voltage class sections are 0000 respectively, 0001,0010,0011,0100, 0101,0110, it is realized by adjusting the size of la tension de reference Uref est.Adjust la tension de reference Uref est size method first is that: hand over When galvanic electricity source phase voltage fluctuates up and down at the demarcation voltage 236V in 2 voltage class sections of highest, adjusting (adjusts) resistance The intrinsic standoff ratio of RF1, resistance RF2 fluctuate the numerical value of L4, L3, L2, L1 between 0110 and 0101;Adjust la tension de reference Uref est The method of size second is that: setting Ux is AC power source phase voltage in 198V to when the fluctuation of 242V range, from the high-end IN of Differential Input The voltage change range of HOL and Differential Input low side IN LO input, has
The variation range of Ux corresponds to 7 minimum code values of B12, B11, B10, B9;If corresponding B12, B11, B10, B9's The input variation full scale input voltage range of 10 BCD encoded radios is Um, is had
The reference voltage of ICL7109 is the 1/2 of full scale input voltage, is had
Therefore it may only be necessary to adjust the intrinsic standoff ratio of resistance RF1, resistance RF2, Uref is made to be equal to the calculated value of formula (1).
Equally by taking A phase as an example, if the AC power source phase voltage fluctuation range of input is 220V+10% to 220V-20%, It asks to be stablized using compensation main circuit embodiment 2 and be exported in the range of 220V ± 2%, AC power source phase voltage wave zone Between range be 242V to 176V, at this time use Fig. 5 analog-to-digital conversion coding circuit embodiment 1, can will input 242V extremely A phase phase voltage between 176V is divided into 10 voltage class sections that section voltage swing is 7V, 3 voltage class areas therein Between voltage be higher than require output voltage range, need to carry out drop compensation;The voltage in 6 voltage class sections is lower than requirement Output voltage range, need to carry out boosting compensation;1 voltage class section carries out 0 within desired output voltage range Voltage compensation, i.e. uncompensation.The voltage range of 7V is 220V ± 1.6%, meets output control and wants within 220V ± 2% It asks.It is compensated using the A phase main circuit in Fig. 4 auto compensating type three-phase main circuit unit embodiment 2, auto-transformer TB2 Input voltage be alternating current 220V, when only making the magnet exciting coil voltage of TB1 of output voltage U12, TB1 offset voltage be 7V;Only When making the magnet exciting coil voltage of TB1 of output voltage U23, TB1 offset voltage is 21V;Only encouraged with output voltage U34 TB1 When coil voltage, TB1 offset voltage is 14V;When doing the magnet exciting coil voltage of TB1 using output voltage U12, U23 simultaneously, TB1 offset voltage is 28V;Etc..At this point, the corresponding AC supply voltage waving interval in 10 voltage class sections of 7V is 244.5V to 174.5V covers the range actually fluctuated;Differential Input low side IN LO input, from reference voltage output end The reference voltage Ucp of REF OUT output should be with 174.5V pairs of the lower bound theoretical value of AC power source phase voltage waving interval range It answers;Accordingly, it is determined that the no-load voltage ratio of transformer TV1 and the intrinsic standoff ratio of resistance RV1, resistance RV2, it should AC power source phase voltage be it is low When limiting theoretical value 174.5V, AC power source phase voltage sampled value U1 is made to be equal to the benchmark of reference voltage output end REF OUT output Voltage Ucp.Similarly, Fig. 5 embodiment be used for A phase when, analog-to-digital conversion coding circuit output voltage class encoded radio P1A by from Data L4, L3, L2, L1 composition of ICL7109 highest 4 B12, B11, B10, B9 output, L4, L3, L2, L1 and voltage from as low as The high one-to-one 10 voltage class encoded radios in 10 voltage class sections are 0000 respectively, 0001,0010,0011,0100, 0101,0110,0111,1000,1001, it is realized by adjusting the size of la tension de reference Uref est.It is big to adjust la tension de reference Uref est Small method first is that: AC power source phase voltage is in highest two voltage class sections boundary (i.e. AC power source phase voltage When 235.4V) fluctuating up and down, adjusting (adjusts) intrinsic standoff ratio of resistance RF1, resistance RF2, and the numerical value of L4, L3, L2, L1 is made to exist It is fluctuated between 1000 and 1001;Adjust la tension de reference Uref est size method second is that: set Uy and exist as AC power source phase voltage When the teachings fluctuation of 174.5V to 244.5V, inputted from Differential Input high-end IN HOL and Differential Input low side IN LO Voltage change range has
The variation range of Uy corresponds to 10 encoded radios of B12, B11, B10, B9 output binary-coded decimal, inputs, has for full scale
Therefore, the intrinsic standoff ratio for only needing to adjust resistance RF1, resistance RF2 at this time makes Uref be equal to the calculated value of formula (2) i.e. It can.
In Fig. 5, other peripheral cell parameters of LTC1966, ICL7109 can be by reading corresponding device data handbook It is determined.AC power source phase voltage sampled value U1 can also realize that ICL7109 can also be used using other detection circuits Other devices, for example, using double integration A/D converter MAX139, MAX140, ICL7107 etc. replace ICL7109, MAX139, The binary coding of the outputs such as MAX140, ICL7107 is 7 sections of codes, is acted on identical as the binary-coded decimal that ICL7109 is exported.
Fig. 6 is A phase analog-to-digital conversion coding circuit embodiment 2, and the A phase AC power source inputted from phase line L1A and zero curve N is mutually electric After transformer TV2 decompression, the rectifier bridge being made of diode DV1-DV4 rectifies pressure, then through capacitor CV3 filtering and resistance RV3, Resistance RV4 partial pressure obtains adopting with the A phase AC power source phase voltage of the AC power source phase voltage virtual value direct proportionality of input Sample value U2;When L1A is changed to the phase line of connection B, C respectively, the AC power source phase voltage sampled value of B, C phase is respectively obtained.Resistance RV5 Lower threshold potential circuit is formed with voltage-stabiliser tube WV1, voltage is and AC power source phase voltage waving interval range on voltage-stabiliser tube WV1 The corresponding lower threshold voltage U2cp of lower limit value.AC power source phase voltage sampled value U2 can also send the ICL7109 into Fig. 5 The high-end IN HOL of Differential Input is converted to the voltage class encoded radio that binary system is constituted by ICL7109 and exports.
In Fig. 6, FD3 is biproduct parting A/D converter MC14433, is used for AC power source phase voltage waving interval range Voltage divide into voltage class section and be converted to binary system composition voltage class encoded radio output.In Fig. 6, MC14433 Conversion end output end EOC be connected to transformation result output control terminal DU, make its work automatically repeat transition status;Integral Resistance R14 and integrating capacitor C14 is connected to external integral element end R1, R1/C1, C1 of MC14433;Oscillation resistance R15 connection To clock outward element end CP0, CP1 of MC14433;Compensating electric capacity C15 be connected to MC14433 external compensating electric capacity end C01, C02;Resistance RF3, resistance RF4 divide power supply+VCC, and la tension de reference Uref est 1, Uref1 input are obtained on resistance RF4 To reference voltage input terminal VREF;VDD is the positive power source terminal of MC14433, is connected to power supply+VCC;VSS is digital ground terminal, VAG To simulate ground terminal, it is connected to publicly.
In Fig. 6, FD4 is 4 road D-latch CD4042, and 4 data input pin D0-D3 of CD4042 are connected to MC14433's 4 data output end Q0-Q3;The triggering input end of clock CP of CD4042 is connected to hundred gating signal output ends of MC14433 DS2;The clock polarity control terminal POL of CD4042 connects high level, and positive power source terminal VDD is connected to power supply+VCC, and digital ground terminal VSS connects It is connected to publicly.CD4042 latches hundred BCD data that timesharing after each conversion end of MC14433 exports.Fig. 6 is implemented Example be used for A phase when, analog-to-digital conversion coding circuit output voltage class encoded radio P1A by from CD4042 output end Q3, Q2, Q1, Data L4, L3, L2, L1 composition of Q0 output.CD4042 can be replaced with other latch.
By taking A phase as an example, if the AC power source phase voltage fluctuation range of input is 220V ± 10%, it is desirable that use compensation master Circuit embodiments 1 are stablized to be exported in the range of 220V ± 2%, AC power source phase voltage waving interval range be 242V extremely 198V uses the analog-to-digital conversion coding circuit embodiment 2 of Fig. 6 at this time, can will input in 242V to the A Xiang Xiang electricity between 198V Pressure is divided into 7 voltage class sections that section voltage swing is 6.4V, is implemented using Fig. 3 auto compensating type three-phase main circuit unit A phase main circuit in example 1 compensates.
In Fig. 6, the measured voltage input terminal VX of MC14433 is connected to the output end of AC power source phase voltage sampled value U2, And lower threshold voltage U2cp is connected to publicly GND, therefore, MC14433 be to AC power source phase voltage sampled value U2 with Voltage difference between lower threshold voltage U2cp is converted;The corresponding AC power source electricity in 7 voltage class sections of 6.4V Pressure waving interval is 242.4V to 197.6V, the lower bound of lower threshold voltage U2cp and AC power source phase voltage waving interval range Theoretical value 197.6V is corresponding;Therefore, the intrinsic standoff ratio of the no-load voltage ratio of transformer TV2 and resistance RV3, resistance RV4, it should in AC power source When phase voltage is lower bound theoretical value 197.6V, AC power source phase voltage sampled value U2 is made to be equal to lower threshold voltage U2cp.Fig. 6 is real When applying example for A phase, the voltage class encoded radio P1A of analog-to-digital conversion coding circuit output is by the number from MC14433 hundred output It is formed according to L4, L3, L2, L1;It is due to requiring input being divided into section voltage swing in 242.4V to the voltage between 197.6V 7 voltage class sections of 6.4V, L4, L3, L2, L1 and voltage one-to-one 7 electricity in 7 voltage class sections from low to high Pressing grade encoded radio is 0000,0001,0010,0011,0100,0101,0110 respectively, is input to MC14433's by adjusting Reference voltage U2ref size is realized.Adjust reference voltage U2ref size method first is that: AC power source phase voltage is in highest 2 When fluctuating up and down at the demarcation voltage 236V in a voltage class section, reference voltage is enabled to reduce since maximum value, adjusts resistance The intrinsic standoff ratio of RF3, resistance RF4 fluctuate the numerical value of L4, L3, L2, L1 between 0110 and 0101;Adjust reference voltage U2ref The method of size second is that: set voltage of the Ux as AC power source phase voltage in the teachings fluctuation of 197.6V to 242.4V at this time Variation range has
Since the measurement output of MC14433 is 3 half BCD data, corresponding full scale input, kilobit shares 20 plus hundred A BCD encoded radio, the variation range of Ux correspond to 7 minimum code values therein;If corresponding to the input of 20 BCD encoded radios at this time Changing full scale input voltage range is Uz, is had
The reference voltage of MC14433 is equal to full scale input voltage, has
Therefore, the intrinsic standoff ratio for only needing to adjust resistance RF3, resistance RF4 at this time makes U2ref be equal to the calculated value of formula (3) i.e. It can.
Equally by taking A phase as an example, if the AC power source phase voltage fluctuation range of input is 220V+10% to 220V-20%, It asks to be stablized using compensation main circuit embodiment 2 and be exported in the range of 220V ± 2%, AC power source phase voltage wave zone Between range be 242V to 176V, at this time use Fig. 6 analog-to-digital conversion coding circuit embodiment 2, can will input 242V extremely A phase phase voltage between 176V is divided into 10 voltage class sections that section voltage swing is 7V, using Fig. 4 auto compensating type three A phase main circuit in phase main circuit unit embodiment 2 compensates.The corresponding AC power source electricity in 10 voltage class sections of 7V Pressure waving interval is 244.5V to 174.5V, the lower bound of lower threshold voltage U2cp and AC power source phase voltage waving interval range It is corresponding to be worth theoretical value 174.5V;Therefore, the intrinsic standoff ratio of the no-load voltage ratio of transformer TV2 and resistance RV3, resistance RV4, it should in alternating current When source phase voltage is lower bound theoretical value 174.5V, AC power source phase voltage sampled value U2 is made to be equal to lower threshold voltage U2cp.Fig. 6 Embodiment be used for A phase when, analog-to-digital conversion coding circuit output voltage class encoded radio P1A by from MC14433 hundred export Data L4, L3, L2, L1 composition, L4, L3, L2, L1 and supply voltage 10 voltage class sections one-to-one 10 from low to high A voltage class encoded radio is 0000,0001,0010,0011,0100,0101,0110,0111,1000,1001 respectively, is passed through The size of reference voltage U2ref is adjusted to realize.Adjust reference voltage U2ref size method first is that: AC power source phase voltage When highest two voltage class sections boundary (i.e. the 235.4V of AC power source phase voltage) are fluctuated up and down, reference voltage is enabled Reduce since maximum value, adjusts the intrinsic standoff ratio of resistance RF3, resistance RF4, make the numerical value of L4, L3, L2, L1 in 1000 and 1001 Between fluctuate;Adjust reference voltage U2ref size method second is that: set at this time Uy as AC power source phase voltage 174.5V to Voltage change range when the teachings fluctuation of 244.5V, has
The variation range of Uy corresponds to MC14433 kilobit plus hundred 10 minimum codes shared in 20 BCD encoded radios Value;If the input variation full scale input voltage range for corresponding to 20 BCD encoded radios at this time is Uz, have
The reference voltage of MC14433 is equal to full scale input voltage, has
Therefore, the intrinsic standoff ratio for only needing to adjust resistance RF3, resistance RF4 at this time makes U2ref be equal to the calculated value of formula (4) i.e. It can.
In Fig. 6, other peripheral cell parameters of MC14433 can be carried out really by reading corresponding device data handbook It is fixed.AC power source phase voltage sampled value U2 can also be realized using other detection circuits, for example, being examined using various real available values Chip is surveyed to realize.Difference between AC power source phase voltage sampled value U2 and corresponding lower threshold voltage can also use it He obtains method, for example, AC power source phase voltage sampled value U2 is subtracted corresponding lower bound threshold with analog voltage subtraction circuit Threshold voltage value.
In the various embodiments described above, when the progress voltage benefit of auto compensating type three-phase main circuit unit embodiment 1 using Fig. 3 It repays, using the either analog-to-digital conversion coding circuit embodiment 2 of Fig. 6 of analog-to-digital conversion coding circuit embodiment 1 of Fig. 5, will input It is divided into 7 voltage class sections that section voltage swing is 6.4V in 242V to the voltage between 198V or 7 below When voltage class section, the highest order of voltage class encoded radio is constantly equal to 0.By taking P1A as an example, the A phase that is made of L4, L3, L2, L1 In voltage class encoded radio P1A, L4 is constantly equal to 0, and therefore, actual voltage class encoded radio is it is also assumed that be by 3 at this time Composition, i.e., P1A is made of L3, L2, L1, A phase voltage grade encoded radio P1A and voltage 7 voltage class sections one from low to high One corresponding 7 voltage class encoded radios are 000,001,010,011,100,101,110 respectively.
The decoding gating circuit of each phase to input, with the one-to-one voltage class in M voltage class section of this phase volume Code value is decoded, and the triggering that output M-bit binary number is constituted gates controlling value;When this phase AC power source phase voltage is in M When one in voltage class section, in M triggerings gating controlling values corresponding one effectively, other positions are invalid.M triggering choosings The significance bit of logical controlling value is high level, i.e. binary one;Invalid bit is low level, i.e. Binary Zero;Either, M triggering choosings The significance bit of logical controlling value is low level, i.e. Binary Zero;Invalid bit is high level, i.e. binary one.
Fig. 7 is that A phase decodes gating circuit embodiment, wherein it is 3 that Fig. 7 (a), which is for voltage class encoded radio, corresponding Have a decoding gating circuit embodiment 1 of 7 voltage class encoded radios, Fig. 7 (b) be 4 for voltage class encoded radio, it is corresponding There is the decoding gating circuit embodiment 2 of 10 voltage class encoded radios.Table 1 is logic true value table corresponding with Fig. 7 (a);Fig. 7 (a) in, FD5 is ROM memory, and the address input end of ROM memory is the signal input part for decoding gating circuit, the electricity of A phase Pressure grade encoded radio P1A is made of 3 L1-L3, is sequentially connected to 3 bit address input terminal A0-A2 of ROM memory;ROM storage The data output end of device is the signal output end for decoding gating circuit, and 7 data output D0-D6 are respectively 7 triggering gatings Controlling value Y11-Y17, the triggering that Y11-Y17 forms A phase gate controlling value P2A.
In table 1,7 triggerings gating controlling value of output is that high level is effective, the memory cell content of ROM memory FD5 It is written according to table 1.In Fig. 7 (a), the signal L3-L1 of input be respectively with 7 voltage class sections it is one-to-one 000,001, 010, when 011,100,101,110 voltage class encoded radio, in 7 triggerings gating controlling value of output, only make respectively therein Y11, Y12, Y13, Y14, Y15, Y16, Y17 are high level;When the signal L3-L1 of input is not 000,001,010,011,100, 101, when one in 110, in other words, when the voltage class encoded radio of input is invalid, make Y11, Y12 of output, Y13, Y14, Y15, Y16, Y17 are low level, that is, the triggering gating controlling value exported is invalid.
If it is required that output 7 triggerings gating controlling value for low level it is effective, the output signal of 1 logic true value table of table In 1 need to change into 0,0 and need to change into 1;When realizing its function with ROM memory, the content of storage unit is anti-according to table 1 Phase.
Table 1
The ROM memory of Fig. 7 (a) can be equally used for being directed to and the one-to-one voltage in other quantity voltage class section Grade encoded radio is decoded.For example, the A phase voltage grade encoded radio P1A for input is 4, the A phase of output triggers gating When controlling value P2A is that 10 examples are decoded, ROM memory needs 4 bit address input terminals and 10 data output ends;4 Voltage class encoded radio L1-L4 is sequentially connected to 4 bit address input terminal A0-A3 of ROM memory;The data of ROM memory are defeated Outlet is the signal output end for decoding gating circuit, and 10 data output D0-D9 are respectively that 10 triggerings gate controlling values, 10 A output signal Y11-Y110 composition triggering gating controlling value P2A.The content of expansion tables 1, make the storage unit of ROM memory according to It is secondary when being 0000,0001,0010,0011,0100,0101,0110,0111,1000,1001, make respectively D0 in storage unit, D1, D2, D3, D4, D5, D6, D7, D8, D9 are 1, other positions are 0;Address be non-zero 000,0001,0010,0011,0100, 0101, all positions are 0 in 0110,0111,1000,1001 storage unit;The signal L4-L1 then inputted be respectively and 10 electricity Press one-to-one 0000,0001,0010,0011,0100,0101,0110,0111,1000,1001 voltage class of grade interval When encoded radio, in 10 triggerings of output gating controlling value, only make respectively Y11, Y12 therein, Y13, Y14, Y15, Y16, Y17, Y18, Y19, Y110 are high level;When the signal L4-L1 of input is not 0000,0001,0010,0011,0100,0101, 0110, when one in 0111,1000,1001, in other words, when the voltage class encoded radio of input is invalid, make output Y11, Y12, Y13, Y14, Y15, Y16, Y17, Y18, Y19, Y110 are low level, that is, the triggering gating controlling value exported is invalid.
In Fig. 7 (b), FD6 is that the encoded radio input terminal of the line decoder of four lines -16 CD4514, CD4514 are decoding gating The signal input part of circuit, A, B, C, D are sequentially connected to 4 voltage class encoded radio L1-L4, the electricity of 4 L1-L4 composition A phases Press grade encoded radio P1A;The decoding output end of CD4514 is the signal output end for decoding gating circuit, minimum 10 decoding S0-S9 is respectively Y11-Y110, Y11-Y110 composition triggering gating controlling value P2A.Table 2 is logic true value corresponding with Fig. 7 (b) Table, wherein the chip select terminal INH input of CD4514 is logical zero (low level), and latch control terminal ST input is logic 1 (high level), CD4514 is set normally to execute coding tasks, it is unlisted in table 2;The S10-S15 of CD4514 is not used in this embodiment, in table 2 It is unlisted.
In table 2,10 triggerings gating controlling value of output is that high level is effective.In Fig. 7 (b), signal L4-L1 points of input Not Wei it is one-to-one 0000 with 10 voltage class sections, 0001,0010,0011,0100,0101,0110,0111,1000, When 1001 voltage class encoded radio, in 10 triggerings of output gating controlling value, only make respectively Y11, Y12 therein, Y13, Y14, Y15, Y16, Y17, Y18, Y19, Y110 are high level;When the signal L4-L1 of input is not 0000,0001,0010, 0011, when one in 0100,0101,0110,0111,1000,1001, in other words, the voltage class encoded radio of input is invalid When, making Y11, Y12, Y13, Y14, Y15, Y16, Y17, Y18, Y19, Y110 of output is low level, that is, the triggering choosing exported Logical controlling value is invalid.
Table 2
If it is required that output 10 triggerings gating controlling value for low level it is effective, can in Fig. 7 (b) CD4514 it is defeated Increase level-one phase inverter behind S0-S9 out to realize.
The circuit of Fig. 7 (b) can be equally used for being directed to and the one-to-one voltage class in other quantity voltage class section Encoded radio is decoded.For example, being 3 A phase voltage grade encoded radios for input, output is that 7 triggerings gate controlling value example When son is decoded, A, B, C of CD4514 is sequentially connected to 3 voltage class encoded radios L1-L3, D and connects logical zero;CD4514's Decoding output end is the signal output end for decoding gating circuit, and minimum 7 decoding S0-S6 is respectively Y11-Y17, Y11-Y17 Composition triggering gating controlling value P2A.
B phase, C phase use the identical decoding gating circuit with A phase.Decoding gating circuit can also be can be realized using other The circuit of correlation function, for example, realizing decoding function by the combination of logic gates.It decodes gating circuit and uses positive single supply + VCC power supply.
Fig. 8 is that A phase delay protects circuit embodiments block diagram, wherein delay detection module YC1 is respectively to the position the M A phase of input Triggering gating controlling value Y11-Y1M carries out the A phase after signal delay is postponed and triggers gating controlling value Y21-Y2M, Y21-Y2M Form P3A;YC1 module carries out Edge check to M Y11-Y1M signals respectively simultaneously and obtains M Edge check signal Y31- Y3M;Trigger region does not control signal generator module YC2 and the Edge check signal Y31-Y3M of input is converted to the not trigger region control of A phase Signal P4A output processed.In the embodiment block diagram of Fig. 8, the A phase that the input of delay detection module YC1 is Fig. 7 (a) decodes gating electricity When the A phase that road embodiment 1 exports triggers gating controlling value, M is equal to 7.In the embodiment block diagram of Fig. 8, delay detection module YC1's When the A phase that the A phase that input is Fig. 7 (b) decodes the output of gating circuit embodiment 2 triggers gating controlling value, M is equal to 10.B phase, C phase Using delay protection circuit identical with A phase.
Fig. 9 is the delay detection circuit embodiment 1 for triggering gating control value signal Y11 in delay detection module needle to A phase. Resistance RY0, capacitor CY0, driving gate FY0 realize the signal delay of Y11 is obtained Y11 it is delayed after signal Y21.Resistance RY1, capacitor CY1, diode DY1, phase inverter FY1 composition are directed to the rising edge detection circuit of input signal Y 11, phase inverter FY1 Output signal YP1 in, the pulse of corresponding negative pulse form is exported after Y11 rising edge.Resistance RY2, capacitor CY2, diode DY2, phase inverter FY2, FY3 composition are directed to the failing edge detection circuit of input signal Y 11, and phase inverter FY3's is defeated Out in signal YP2, the pulse of corresponding negative pulse form is exported after Y11 failing edge.NAND gate FY4 is accomplished that Or logic (under negative logic) function, when there is negative pulse generation in input signal Y P1, YP2, the edge inspection of NAND gate FY4 output It surveys in signal Y31 and generates positive pulse, i.e., when input signal Y 11 changes, NAND gate FY4 exports the list of a positive pulse form Pulse.In Fig. 9, the device of driving gate FY0, phase inverter FY1, phase inverter FY3 preferably with Schmidt's input, for example, phase inverter selects Select 74HC14, CD40106 etc.;Driving gate FY0 can be made of 2 phase inverters with Schmidt's input.
Figure 10 is the delay detection circuit embodiment for triggering gating control value signal Y11 in delay detection module needle to A phase 2.Phase inverter FY5, resistance RY3, capacitor CY3 carry out reverse phase and delay to input signal Y 11, obtain the delayed reverse phase letter of Y11 Number YP0;Phase inverter FY6 again by YP0 reverse phase, obtain Y11 it is delayed after signal Y21.The signal of NAND gate FY7 input is Y11 The simple venation of negative pulse form corresponding with Y11 rising edge is generated in the inversion signal YP0 delayed with Y11, output signal YP1 Punching;Or the signal of door FY8 input is the delayed inversion signal YP0 of Y11 and Y11, generates in output signal YP2 and declines with Y11 Along the pulse of corresponding negative pulse form.NAND gate FY9 is accomplished that or logic (under negative logic) function, works as input signal When having negative pulse generation in YP1, YP2, positive pulse is generated in the Edge check signal Y31 of NAND gate FY9 output, i.e., when input is believed When number Y11 is changed, NAND gate FY9 exports the pulse of a positive pulse form.In Figure 10, phase inverter FY6, NAND gate FY7, Or device of the door FY8 preferably with Schmidt's input, for example, phase inverter selects 74HC14, CD40106 etc.;NAND gate selection 74HC132, CD4093 etc.;Or door select 74HC7032, or selection 2 band Schmidt input phase inverters and 1 and NOT gate is realized or Men Gongneng.
Figure 11 is the delay detection circuit embodiment for triggering gating control value signal Y11 in delay detection module needle to A phase 3, wherein forming the rising edge detection electricity for input signal Y 11 by resistance RY1, capacitor CY1, diode DY1, phase inverter FY1 Road, and the failing edge detection for input signal Y 11 is formed by resistance RY2, capacitor CY2, diode DY2, phase inverter FY2, FY3 Circuit, and it is identical as the embodiment 1 of Fig. 9 using the circuit of NAND gate FY4 output Edge check signal Y31.In Figure 11, by anti- Phase device FY11, FY12, FY13, FY14 realize the signal delay of Y11 is obtained Y11 it is delayed after signal Y21.
The delay detection circuit for triggering the signal Y11 in gating controlling value for A phase can choose Fig. 9, Figure 10, Tu11Shi Apply any one of 1-3;Under normal conditions, all signals in gating controlling value are triggered for A, B, C three-phase, be all made of Same delay detection circuit.For example, setting M equal to 7, the A phase of A, B, C three-phase triggers gating controlling value by 7 bits Value composition, then need 21 delay detection circuits altogether;21 delay detection circuits can all using the embodiment of Fig. 91, or It is all using the embodiment of Figure 10 2, or all using the embodiment of Figure 11 3.The detection circuit that is delayed can also be using full Other circuits for requiring enough realize its function.
The not trigger region control signal generator module function of each phase is, when input triggers gating controlling value for this phase A phase Any one of Edge check signal or multiple when having pulse relevant to edge, the not trigger region control of the phase A pulse is exported in signal processed.Figure 12 is that trigger region does not control signal generator module embodiment to A phase, by including M defeated The nor gate FY10 entered realizes that corresponding function, the input signal of nor gate FY10 are the Edge check signal Y31-Y3M of A phase, Output is that trigger region does not control signal P4A to A phase.In Figure 12 embodiment, the A phase pulse that trigger region control signal does not export is negative Pulse, i.e., trigger region control signal low level is not effective;When nor gate FY10 is changed into or when door, not trigger region control signal output Pulse be positive pulse.If the pulse relevant to edge that has generated in the Edge check signal Y31-Y3M of input is Negative pulse, then the nor gate in Figure 12 should be changed to NAND gate either with door, realize under negative logic or logic function.
All gate circuits in delay protection circuit are all made of positive single supply+VCC power supply.Figure 13 is in delay protection circuit Part waveform correlation schematic diagram.From principle and the requirement of sampling comparison circuit it is found that its A phase exported triggers gating controlling value When normal change occurs, change each time with 2.In Figure 13, the Y11 that A phase triggers in gating controlling value occurs one respectively Secondary rising edge changes and failing edge changes, and Y21 is that the A phase after the Y11 delay T1 time triggers gating controlling value;In the delay of Fig. 9 In detection circuit embodiment 1, T1 is determined by the product size (i.e. time constant size) of resistance RY0 and capacitor CY0;Figure 10's In the detection circuit embodiment 2 that is delayed, T1 is determined by the product size of resistance RY3 and capacitor CY3;In the delay detection circuit of Figure 11 In embodiment 3, T1 is determined by the gate delay time size of phase inverter FY11, FY12, FY13, FY14 itself.In Figure 13, signal Because the negative pulse width that Y11 rising edge generates is T2 in YP1;In the delay detection circuit embodiment 1 of Fig. 9 and the delay inspection of Figure 11 In slowdown monitoring circuit embodiment 3, T2 is determined by the product size of resistance RY1 and capacitor CY1;In the delay detection circuit embodiment of Figure 10 In 2, T2 is determined by the product size of resistance RY3 and capacitor CY3.In Figure 13, because of the negative arteries and veins of Y11 failing edge generation in signal YP2 Rushing width is T3;In the delay detection circuit embodiment 1 of Fig. 9 and the delay detection circuit embodiment 3 of Figure 11, T3 is by resistance The product size of RY2 and capacitor CY2 determines;In the delay detection circuit embodiment 2 of Figure 10, T3 is by resistance RY3 and capacitor CY3 Product size determine.In Figure 13,2 positive pulses in Edge check signal Y31 respectively in signal YP1 because of Y11 rising edge Because the negative pulse that Y11 failing edge generates corresponds in the negative pulse and signal YP2 of generation.It is located at Figure 13 A phase and triggers gating controlling value In Y11 when rising edge occurs changing, the Y12 that A phase triggers in gating controlling value occurs failing edge and changes, its corresponding side at this time A positive pulse is accordingly generated along detection signal Y32;If A phase triggers in gating controlling value when failing edge, which occurs, for Y11 changes A rising edge occurs simultaneously and changes by Y12, accordingly generates a positive pulse in its corresponding Edge check signal Y32 at this time;? During this, there is no variations for other triggering gating control value signals except Y11, Y12, with other triggerings except Y11, Y12 The gating control corresponding Edge check signal of value signal is low level, is not drawn into Figure 13.According to not trigger region control above-mentioned Signal generator module processed or logic function, trigger region control signal generator module output single pulse width and input side Generate in the input pulse of the pulse that widest pulse width is identical jointly along detection signal, this width difference is because not With caused by the resistance of decision T2, T3, the difference of capacitance in delay detection circuit.The 1st positive pulse in Figure 13, in Y31 Wider than the 1st positive pulse in Y32, the 2nd positive pulse in the 2nd positive pulse ratio Y32 in Y31 is narrow, and trigger region does not control The 1st negative pulse width in signal P4A is consistent with the 1st positive pulse width in Edge check signal Y31, not trigger region control The 2nd negative pulse width in signal P4A processed is consistent with the 2nd positive pulse width in Edge check signal Y32.
It is delayed in detection circuit embodiment 1 in the delay protection circuit of Fig. 9, A phase triggers gating controlling value and changes Delay time to corresponding not trigger region control signal pulse forward position is that FY10 prolongs in gate circuit FY1, FY4 and Figure 12 The sum of the delay time of FY10 in the sum of slow time or gate circuit FY3, FY4 and Figure 12;By resistance RY0 and capacitor CY0 The A phase that determines of product size to trigger the range of choice of signal delay time T1 of gating controlling value be the ms order of magnitude, it is clear that it is big Etc. it triggers gating controlling value in A phase to change to the delay time in corresponding not trigger region control signal pulse forward position, i.e., Grade encoded radio signal delay change at the time of be later than A phase trigger gating controlling value change after export pulse forward position when It carves.Strictly speaking, T1 actually includes the delay of lag time and gate circuit FY0 caused by resistance RY0 and capacitor CY0 The sum of time.In Fig. 9 embodiment 1, in selection parameter, the value of the value and T3 that make T2 is all larger than the value of T1, encodes grade Value signal delay change at the time of meet need to be triggered earlier than A phase gating controlling value change after export pulse it is rear along when The requirement at quarter.
In the delay detection circuit embodiment 2 in Figure 10 delay protection circuit, A phase triggers gating controlling value and changes Delay time to corresponding not trigger region control signal pulse forward position is that FY10 prolongs in gate circuit FY7, FY9 and Figure 12 The sum of the delay time of FY10 in the sum of slow time or gate circuit FY8, FY9 and Figure 12;T1 is the number of the ms order of magnitude Value, it is clear that trigger the signal delay time of gating controlling value by the A phase that the product size of resistance RY3 and capacitor CY3 determines at this time The A phase that T1 is greater than triggers gating controlling value and changes to the delay time in corresponding not trigger region control signal pulse forward position, It is later than A phase at the time of i.e. A phase triggers gating controlling value signal delay change and triggers the list for gating and exporting after controlling value changes The forward position moment of pulse.In the delay detection circuit embodiment 2 of Figure 10, A phase trigger gating controlling value signal delay change when Carving rear changed by signal YP0 along the moment for triggering the pulse exported after gating controlling value changes with A phase is influenced;A Delay after changing at the time of mutually triggering gating controlling value signal delay changes for signal YP0 again through gate circuit FY6;A phase triggers The pulse that gating controlling value exports after changing it is rear along the moment be after signal YP0 changes again through gate circuit FY7, FY9 and Prolong again through FY10 in gate circuit FY8, FY9 and Figure 12 after the sum of delay time of FY10 or signal YP0 change in Figure 12 The sum of slow time;Obviously, A phase triggers gating controlling value signal delay change at the time of ratio A phase and triggers gating controlling value hair at this time The rear delay time for passing through 2 gate circuits less along the moment of the pulse exported after raw change, meets A phase and trigger gating controlling value Signal delay need to trigger the rear of pulse exported after gating controlling value changes earlier than A phase and want along the moment at the time of change It asks.
Figure 14 is Fig. 3 auto compensating type three-phase main circuit unit embodiment 1 to be triggered in trigger unit, or trigger Fig. 4 The trigger circuit embodiment of bidirectional thyristor SR1 in the A phase main circuit of middle auto compensating type three-phase main circuit unit is touched by exchange Shine coupling UG1, resistance RG1, resistance RG2 composition, and Trig control signal P51 low level is effective.Altemating trigger optocoupler UG1 can be selected Select the phase shifts type bidirectional thyristor output photoelectric coupler such as MOC3022, MOC3023, MOC3052, MOC3053.Power supply+VCCA is The A phase trigger circuit controlled source of protected driving unit control.Trigger Fig. 3 auto compensating type three-phase main circuit unit embodiment Bidirectional thyristor SR2-SR6 in 1 A phase main circuit, or triggering Fig. 4 auto compensating type three-phase main circuit unit embodiment 2 A phase main circuit in bidirectional thyristor SR2-SR8 trigger circuit, with triggering A phase main circuit in bidirectional thyristor SR1 circuit Structure is the same, is controlled by A phase Trig control signal P5A.Trigger the trigger circuit structure of all bidirectional thyristors in B phase main circuit As the circuit structure of bidirectional thyristor SR1 in triggering A phase main circuit, controlled by B phase Trig control signal P5B, power supply is equal For+VCCB, the B phase trigger circuit controlled source controlled for protected driving unit.Trigger all two-way brilliant locks in C phase main circuit The trigger circuit structure of pipe triggers control letter as the circuit structure of bidirectional thyristor SR1 in triggering A phase main circuit, by C phase Number P5C control, power supply is+VCCC, for the C phase trigger circuit controlled source of protected driving unit control.The exchange of Figure 15 Trigger the optocoupler UG1 trigger pulse that other altemating trigger optocouplers export from G11, G12 trigger pulse exported and trigger unit Collectively constitute trigger signal P6.
Figure 15 is the embodiment 1 that A phase triggers gate control circuit, real for Fig. 3 auto compensating type three-phase main circuit unit It applies the A phase main circuit in example 1 and compensates control, A phase AC power source phase voltage fluctuation range is 220V ± 10%, it is desirable that by it Stabilization exports in the range of 220V ± 2%.In Figure 15, the A phase that A phase triggers gate control circuit input triggers gating controlling value Y21-Y27 high level is effective, 14 diode D11-D72, triggering gating control alignment Y21-Y27, triggering driving line VK1- VK6 forms diode triggered and gates matrix, and resistance RS1-RS6, triode VS1-VS6 form A phase Trig control signal P51-P56 Driving circuit, A phase Trig control signal P5A is formed by P51-P56 at this time.
Table 3 is the triggering gating control function table that A phase triggers gate control circuit embodiment 1, lists 7 A and touches 7 significance bits in hair gating controlling value, i.e., 7 effective A phases trigger A phase thyristor switch group corresponding to gating controlling value The on-off assembled state of middle bidirectional thyristor.7 effective A phases trigger gating controlling value it is corresponding with voltage class section 1-7, A Mutually triggering gate control circuit triggers the on-off of bidirectional thyristor in gating controlling value control A phase main circuit embodiment 1 according to A phase State carries out corresponding voltage compensation;In table 3,1 represents corresponding bidirectional thyristor need to be in the conductive state, and 0 represents accordingly Bidirectional thyristor is in an off state.
Table 3
The function connects that diode triggered gating matrix in Figure 15 is required according to table 3, are triggered gating controlling value by A phase The control of Y21-Y27;I.e. when every triggering gating control alignment is effective with its corresponding on-off assembled state need to be connected it is two-way Diode is respectively provided between the triggering driving line of thyristor to be attached, when certain root triggering gating control alignment is effective, by Diode keeps the triggering driving line signal for needing to be connected bidirectional thyristor effective.For example, input voltage is minimum voltage etc. When 1, i.e. Y21 of grade is effectively high level, diode D11, D12 in triggering gating matrix are connected, triggering driving line VK1, VK6 Controlling triode VS1, VS6 conducting respectively for high level makes P51, P56 effectively go to open bidirectional thyristor SR1, SR6, triggering choosing Other diodes cut-off in logical matrix, control are turned off other bidirectional thyristors, are encouraged using output voltage U12+U23 TB1 Coil voltage carries out positive compensation;Input voltage is voltage class 2, i.e. Y22 when being effectively high level, in triggering gating matrix Diode D21, D22 conducting, triggering driving line VK3, VK6 be high level control respectively triode VS3, VS6 conducting make P53, P56 effectively go to open bidirectional thyristor SR3, SR6, other diodes cut-off in triggering gating matrix, and control turns off it His bidirectional thyristor carries out positive compensation only with the magnet exciting coil voltage that output voltage U23 is TB1;Input voltage is voltage When class 4, i.e. Y24 are effectively high level, diode D41, D42 in triggering gating matrix are connected, triggering driving line VK5, VK6 controls triode VS5, VS6 conducting for high level respectively makes P55, P56 effectively go to open bidirectional thyristor SR5, SR6, triggers Other diodes cut-off in matrix is gated, control turns off other bidirectional thyristors, realizes 0 voltage compensation, the i.e. excitation wire of TB1 Enclosing voltage is 0;Input voltage is voltage class 5, i.e. Y25 when being effectively high level, diode D51 in triggering gating matrix, D52 conducting, triggering driving line VK2, VK3 controls triode VS2, VS3 conducting for high level respectively goes out P52, P53 effectively Pass two-way thyristor SR2, SR3, triggering gate other diodes cut-off in matrix, and control turns off other bidirectional thyristors, only Contrary compensation is carried out using the magnet exciting coil voltage that reversed output voltage U12 is TB1;Etc..
Figure 16 is the embodiment 2 that A phase triggers gate control circuit, is equally directed to Fig. 3 auto compensating type three-phase main circuit list A phase main circuit in first embodiment 1 compensates control, and AC power source phase voltage fluctuation range is 220V ± 10%, it is desirable that will Its stabilization exports in the range of 220V ± 2%.In Figure 16, the A phase that A phase triggers gate control circuit input triggers gating control Value Y21-Y27 low level is effective, 14 diode D11-D72, triggering gating control alignment Y21-Y27, triggering driving line P51-P56 forms diode triggered and gates matrix, directly exports the effective A phase of low level by triggering gating matrix and triggers control letter Number P51-P56.There is no Trig control signal driving circuit in the present embodiment 2.
The function connects that diode triggered gating matrix in Figure 16 is required according to table 3, are triggered gating controlling value by A phase The control of Y21-Y27;For example, input voltage is minimum voltage class 1, i.e. Y21 when being effectively low level, triggering gating matrix In diode D11, D12 conducting, so that P51, P56 is become effective low level respectively and go to open bidirectional thyristor SR1, SR6, touch Other diodes cut-off in hair gating matrix, control turn off other bidirectional thyristors, are TB1 using output voltage U12+U23 Magnet exciting coil voltage carry out positive compensation;Input voltage is voltage class 2, i.e. Y22 when being effectively low level, triggering gating square Diode D21, D22 conducting in battle array, makes P53, P56 become effective low level respectively and goes to open bidirectional thyristor SR3, SR6, Other diodes cut-off in triggering gating matrix, control turn off other bidirectional thyristors, are TB1 only with output voltage U23 Magnet exciting coil voltage carry out positive compensation;Input voltage is voltage class 4, i.e. Y24 when being effectively low level, triggering gating square Diode D41, D42 conducting in battle array, makes P55, P56 become effective low level respectively and goes to open bidirectional thyristor SR5, SR6, Other diodes cut-off in triggering gating matrix, control turn off other bidirectional thyristors, realize 0 voltage compensation;Input voltage When for voltage class 7, i.e. Y27 being effectively low level, diode D71, D72 conducting in triggering gating matrix, make respectively P52, P55 becomes effective low level and goes to open bidirectional thyristor SR2, SR5, other diodes cut-off in triggering gating matrix, control System turns off other bidirectional thyristors, carries out Contrary compensation using the magnet exciting coil voltage that reversed output voltage U12+U23 is TB1; Etc..
In Figure 16, the low level that A phase triggers in gating controlling value Y21-Y27 needs to directly drive 2 altemating trigger optocouplers Input terminal lumination of light emitting diode;Whens altemating trigger optocoupler selects MOC3022, MOC3052 etc., the driving electricity of 20mA is needed Stream;Whens altemating trigger optocoupler selects MOC3023, MOC3053 etc., the driving current of 10mA is needed.
Figure 17 is the embodiment 3 that A phase triggers gate control circuit, real for Fig. 4 auto compensating type three-phase main circuit unit It applies the A phase main circuit in example 2 and compensates control, A phase AC power source phase voltage fluctuation range is 220V+10% to 220V- 20%, it is desirable that stablized and exported in the range of 220V ± 2%.In Figure 17, A phase triggers the A phase of gate control circuit input Triggering gating controlling value Y21-Y210 high level it is effective, 20 diode D01-D92, triggering gating control alignment Y21-Y210, Triggering driving line VK1-VK8 composition diode triggered gates matrix, and resistance RS1-RS8, triode VS1-VS8 composition A are touched The driving circuit of hair control signal P51-P58, i.e., form A phase Trig control signal P5A by P51-P58 at this time.
Table 4 is the triggering gating control function table that A phase triggers gate control circuit embodiment 3, lists 10 A phases and triggers 10 significance bits in controlling value are gated, i.e., 10 effective A phases trigger A phase thyristor switch group corresponding to gating controlling value The on-off assembled state of middle bidirectional thyristor.10 effective A phases trigger gating controlling value it is corresponding with voltage class 1-10, A phase Triggering gate control circuit triggers the on-off shape of bidirectional thyristor in gating controlling value control A phase main circuit embodiment 2 according to A phase State carries out corresponding voltage compensation;In table 4,1 represents corresponding bidirectional thyristor need to be in the conductive state, and 0 represents corresponding pair It is needed to thyristor in an off state.
Table 4
The function connects that diode triggered gating matrix in Figure 17 is required according to table 4, are triggered gating controlling value by A phase The control of Y21-Y210;For example, input voltage is voltage class 7, i.e. Y27 when being effectively high level, in triggering gating matrix Diode D71, D72 conducting, triggering driving line VK7, VK8 be high level control respectively triode VS7, VS8 conducting make P57, P58 effectively goes to open bidirectional thyristor SR7, SR8, other diodes cut-off in triggering gating matrix turns off other two-way crystalline substances Brake tube realizes that 0 voltage compensation, i.e. the magnet exciting coil voltage of TB1 are 0;Input voltage is that voltage class 8, i.e. Y28 is effectively high electricity Usually, diode D81, D82 in triggering gating matrix are logical, and triggering driving line VK2, VK3 are that high level controls three poles respectively Pipe VS2, VS3 conducting make P52, P53 effectively go to open bidirectional thyristor SR2, SR3, other diodes in triggering gating matrix Cut-off, turns off other bidirectional thyristors, carries out Contrary compensation only with the magnet exciting coil voltage that reversed output voltage U12 is TB1; Input voltage is voltage class 9, i.e. Y29 when being effectively high level, diode D91, D92 conducting in triggering gating matrix, touching Hair driving line VK6, VK7 controls triode VS6, VS7 conducting for high level respectively makes P56, P57 effectively go to open two-way brilliant lock Pipe SR6, SR7, triggering gate other diodes cut-off in matrix, turn off other bidirectional thyristors, only with reversed output electricity The magnet exciting coil voltage that pressure U34 is TB1 carries out Contrary compensation;Input voltage is that voltage class 10, i.e. Y210 is effectively high level When, triggering gates diode D01, D02 conducting in matrix, and triggering driving line VK4, VK5 are that high level controls three poles respectively Pipe VS4, VS5 conducting make P54, P55 effectively go to open bidirectional thyristor SR4, SR5, other diodes in triggering gating matrix Cut-off, turns off other bidirectional thyristors, carries out Contrary compensation only with the magnet exciting coil voltage that reversed output voltage U23 is TB1; Input voltage is voltage class 6, i.e. Y26 when being effectively high level, diode D61, D62 conducting in triggering gating matrix, touching Hair driving line VK1, VK4 controls triode VS1, VS4 conducting for high level respectively makes P51, P54 effectively go to open two-way brilliant lock Pipe SR1, SR4, triggering gate other diodes cut-off in matrix, other bidirectional thyristors are turned off, only with output voltage U12 The magnet exciting coil voltage for being TB1 carries out positive compensation;Input voltage is voltage class 4, i.e. Y24 when being effectively high level, triggering Gate matrix in diode D41, D42 conducting, triggering driving line VK3, VK6 be high level control respectively triode VS3, VS6 conducting makes P53, P56 effectively go to open bidirectional thyristor SR3, SR6, other diodes cut-off in triggering gating matrix is closed Break other bidirectional thyristors, carries out positive compensation only with the magnet exciting coil voltage that output voltage U23 is TB1;Input voltage is When voltage class 3, i.e. Y23 are effectively high level, diode D31, D32 in triggering gating matrix are connected, triggering driving line VK1, VK6 control triode VS1, VS6 conducting for high level respectively makes P51, P56 effectively go to open bidirectional thyristor SR1, SR6, Other diodes cut-off in triggering gating matrix, turns off other bidirectional thyristors, is TB1's using output voltage U12+U23 Magnet exciting coil voltage carries out positive compensation;Input voltage is voltage class 1, i.e. Y21 when being effectively high level, triggering gating matrix In diode D11, D12 conducting, triggering driving line VK1, VK8 be high level control respectively triode VS1, VS8 conducting make P51, P58 effectively go to open bidirectional thyristor SR1, R8, and it is two-way to turn off other for other diodes cut-off in triggering gating matrix Thyristor carries out positive compensation using the magnet exciting coil voltage that output voltage U12+U23+U34 is TB1;Etc..
When the A phase in table 4 trigger gating controlling value Y21-Y210 low level it is effective when, equally can be according to A phase in Figure 16 The method for triggering gate control circuit embodiment 2, by 20 diode D01-D92, triggering gating control alignment Y21-Y210, touching Hair control line P51-P58 composition triggering gating matrix, directly exports the effective A phase of low level by triggering gating matrix and triggers control Signal P51-P58 processed.At this point, the low level that A phase triggers in gating controlling value Y21-Y210 needs to directly drive four exchange touchings The input terminal lumination of light emitting diode of luminous coupling;Whens altemating trigger optocoupler selects MOC3022, MOC3052 etc., the drive of 20mA is needed Streaming current;Whens altemating trigger optocoupler selects MOC3023, MOC3053 etc., the driving current of 10mA is needed.
Figure 18 is that the error detection of A phase differentiates circuit embodiments, triggers gating controlling value P3A, i.e. high level effective 10 for A phase Position Y21-Y210 is differentiated that the A phase of output triggers gating controlling value and differentiates that signal P7A high level is effective, and low level is invalid;I.e. Exporting P7A is 1, and it is effective to indicate that A phase triggers gating controlling value P3A;Export P7A be 0, indicate A phase trigger gating controlling value P3A without Effect.In Figure 18, the 10 A phases that full adder FJ1-FJ8 form trigger the number statistical value electricity of " 1 " in gating controlling value Y21-Y210 Road;Wherein, n2, n1 be Y21-Y23 in " 1 " number statistical value, m2, m1 be Y24-Y26 in " 1 " number statistical value, j3, J2, j1 are the number statistical value of " 1 " in Y21-Y27, and q4, q3, q2, q1 are the number statistical value of " 1 " in Y21-Y210.With door FY20 differentiates number statistical value q4, q3, q2, the q1 of " 1 " in Y21-Y210, only when q4, q3, q2, q1 be respectively 0, 0,0,1 when, the A phase of output trigger gating controlling value differentiate signal P7A it is effective, i.e. P7A be 1, indicate 10 A phases trigger gating control There was only 1 " 1 " in value Y21-Y210 processed, i.e., an output only therein is high level, and it is effective that A phase triggers gating controlling value; Differentiate that signal P7A is invalid when the A phase of output triggers gating controlling value, i.e. when P7A is 0, then it represents that 10 A phases trigger gating control It is not to have 1 " 1 " in value Y21-Y210, it is invalid shows that A phase triggers gating controlling value.If necessary to be directed to low level effective 10 Position A phase triggers gating controlling value Y21-Y210 and is differentiated, it is only necessary to trigger gating controlling value Y21- in 10 A phases of input Increase level-one phase inverter behind Y210, q4, q3, q2, the q1 exported at this time is that 10 A phases trigger in gating controlling value Y21-Y210 The number statistical value of " 0 ";Similarly, it only when q4, q3, q2, q1 are respectively 0,0,0,1, enables A phase trigger gating controlling value and sentences Level signal P7A is effective, i.e. P7A is 1, indicates that 10 A phases trigger in gating controlling value Y21-Y210 only 1 " 0 ", that is, there was only it In one output be low level, A phase trigger gating controlling value it is effective;When exporting P7A is 0 invalid, then it represents that 10 A are touched It is not to have 1 " 0 " in hair gating controlling value Y21-Y210, it is invalid shows that A phase triggers gating controlling value.
If A phase triggers gating controlling value and differentiates that signal low level has by NAND gate is changed to door FY20 in Figure 18 Effect, high level are invalid;I.e. output P7A is 1, and it is invalid to indicate that A phase triggers gating controlling value P3A;Exporting P7A is 0, indicates that A is touched Hair gating controlling value P3A is effective.
It is 7 when A phase triggers gating controlling value P3A, needs to trigger gating controlling value for the effective 7 A phases of high level When Y21-Y27 is differentiated, whether method judges q4, q3, q2, q1 with above-mentioned first is that the Y28-Y210 in Figure 18 is all connect 0 Trigger whether gating controlling value effectively differentiates for 0,0,0,1 pair of A phase.Method second is that remove full adder FJ5-FJ8 in Figure 18, It whether is that 0,0,1 pair of A phase triggers whether gating controlling value effectively carries out with number statistical value j3, j2, the j1 of " 1 " in Y21-Y27 Differentiate;Only when j3, j2, j1 are respectively 0,0,1, indicate that 7 A phases trigger in gating controlling value Y21-Y27 only 1 " 1 ", I.e. only have it is therein one output be high level, A phase trigger gating controlling value it is effective, enable output P7A be 1, otherwise, indicate 7 A Mutually triggering gating controlling value Y21-Y27 in be not to have 1 " 1 ", show A phase trigger gating controlling value it is invalid, enable output P7A be 0. The logical devices such as full adder, NAND gate in Figure 18 are all made of single supply+VCC power supply.
A phase error detection differentiates that the function of circuit is when judging have and only one in the position M that A phase triggers gating controlling value P3A When position is effective, enables the A phase of output trigger gating controlling value and differentiate that signal P7A is effective, the A phase of output is otherwise enabled to trigger gating control Value differentiates that signal P7A is invalid;I.e. A phase trigger gating controlling value P3A the position M in only have one it is effective when, or do not have one When position is effective, enables the A phase of output trigger gating controlling value and differentiate that signal P7A is invalid.The logic function can also be in other ways Realize, for example, realized with ROM memory, or with or NOT logic door realize to combine.
B phase, C phase error detection differentiate that circuit differentiates circuit using the identical error detection of A phase.B phase error detection differentiates that the function of circuit is When judging to have in the position M that B phase triggers gating controlling value P3B and when only one effective, the B phase of output is enabled to trigger gating control Value differentiates that signal P7B is effective, otherwise enables the B phase of output trigger gating controlling value and differentiates that signal P7B is invalid;C phase error detection differentiates electricity The function on road is to enable the C of output touch when judging to have in the position M that C phase triggers gating controlling value P3C and when only one effective Hair gating controlling value differentiates that signal P7C is effective, otherwise enables the C phase of output trigger gating controlling value and differentiates that signal P7C is invalid.
Figure 19 is protection drive unit embodiment, if the A phase of input, B phase, B phase trigger gating, controlling value differentiates signal The equal high level of P7A, P7B, P7C is effective, and low level is invalid;For example, P7A, which triggers gating controlling value for 1 expression A phase, differentiates that signal has Effect, P7A are that 0 expression A phase triggers gating controlling value differentiation invalidating signal.If trigger region control is not believed for the A phase of input, B phase, B phase Number equal low level of P4A, P4B, P4C is effective, and high level is invalid;For example, when P4A is 0 showing that A phase galvanic electricity source phase voltage is handed over to exist Fluctuation makes A phase trigger gating controlling value and produces variation, needs to carry out bidirectional thyristor on-off shape in A phase thyristor switch group The switching of state changes compensation way;In handoff procedure, to avoid because the factor that bidirectional thyristor is delayed to turn off makes ipsilateral crystalline substance There are 2 or 2 or more thyristors to simultaneously turn on simultaneously in brake tube, causes power supply short circuit, it is effective in not trigger region control signal When period, the i.e. P4A of embodiment are equal to 0, all bidirectional thyristors in A phase thyristor switch group are turned off.
In Figure 19, with door FY21, triode VT, freewheeling diode VD, resistance RK1, relay coil KA, relay coil KB, relay coil KC composition protection control circuit;With door FY22, triode VK1, triode VK2, resistance RK2, resistance RK3 Form A phase trigger circuit controlled source+VCCA control circuit;With door FY23, triode VK3, triode VK4, resistance RK4, electricity It hinders RK5 and forms B phase trigger circuit controlled source+VCCB control circuit;With door FY24, triode VK5, triode VK6, resistance RK6, resistance RK7 form C phase trigger circuit controlled source+VCCC control circuit.It is all made of with door FY21, FY22, FY23, FY24 Positive single supply+VCC power supply;+ VCC2 is the power supply of relay coil and the source current of trigger circuit controlled source.
In Figure 19, differentiate that signal P7A, B phase trigger gating controlling value and differentiates signal when the A phase of input triggers gating controlling value P7B, C phase trigger gating controlling value and differentiate there is one in signal P7C for low level, i.e., A phase triggers gating controlling value, B phase triggers Gating controlling value, C phase trigger have in gating controlling value one it is invalid when, the output P7K with door FY21 is low level, controls three poles Pipe VT cut-off, relay coil KA power loss make Fig. 3 auto compensating type three-phase main circuit unit embodiment 1, or make Fig. 4 certainly Relay normally open switch KA-1 in the compensation three-phase main circuit unit embodiment 2 of coupling is disconnected, i.e. control disconnects auto-transformer Input side supply voltage, make the voltage 0 between all taps of auto-transformer, realize the protection to thyristor switch group; Relay normally closed switch KA-2 closure, makes the voltage 0 being applied on TB1 magnet exciting coil.Triode VT cut-off, while control after Electric apparatus coil KB, relay coil KC power loss, make that B phase main circuit, corresponding relay switch executes and A phase in C phase main circuit The protection to B phase, C phase thyristor switch group is realized in the identical movement of relay switch in main circuit.With the output of door FY21 P7K is low level, while making to export low level, triode VK1, VK2, VK3, VK4, VK5, VK6 with door FY22, FY23, FY24 It is turned off, the equal power loss of controlled source+VCCA ,+VCCB ,+VCCC, A phase trigger circuit, B phase trigger circuit, C in trigger unit Phase trigger circuit is not because having power supply without working, i.e., the uneven trigger pulse for issuing triggering bidirectional thyristor.Therefore, only Want have the triggering gating controlling value of a phase invalid in three-phase triggering gating controlling value, the three-phase no matter inputted not believe by trigger region control Effectively whether number, protection driving unit all cut off the power supply of trigger unit, stops the triggering of all bidirectional thyristors of sending Pulse, while the input side supply voltage for disconnecting all auto-transformers in three-phase is controlled, it realizes to three-phase thyristor switching group Protection.
In Figure 19, differentiate that signal P7A, B phase trigger gating controlling value and differentiates signal when the A phase of input triggers gating controlling value P7B, C phase trigger gating controlling value and differentiate all high level of signal P7C, i.e., A phase triggers gating controlling value, B phase triggers gating Controlling value, C phase trigger gating controlling value it is all effective when, be high level, triode VT conducting, control with the output P7K of door FY21 Relay coil KA processed obtains electric, makes Fig. 3 auto compensating type three-phase main circuit unit embodiment 1, or make Fig. 4 auto compensating type 2 relay normally open switch KA-1 of three-phase main circuit unit embodiment closure, relay normally closed switch KA-2 are disconnected, and circuit, which is in, to be mended Repay working condition.Triode VT conducting, at the same control relay coil KB, relay coil KC obtains electric, make B phase main circuit, C phase Corresponding relay switch execution and the identical movement of relay switch in A phase main circuit in main circuit, B phase, C phase thyristor are opened Pass group is in compensation work state.
In Figure 19, when three-phase triggering gating controlling value is all effective, P7K are high level, when trigger region does not control letter to A phase Number effectively, i.e. P4A be equal to 0 when, with door FY22 export low level, triode VK1, VK2 cut-off, controlled source+VCCA power loss, A Phase trigger circuit does not work, i.e., does not issue the trigger pulse that bidirectional thyristor is triggered in A phase thyristor switch group, and shutdown A phase is brilliant All bidirectional thyristors in thyristor switch group show that A phase AC power source phase voltage has fluctuation at this time, A phase are made to trigger gating control Value processed produces variation, needs to carry out the switching of bidirectional thyristor on off operating mode in A phase thyristor switch group, changes compensation side Formula.When it is high level that three-phase, which triggers the whole effective, P7K of gating controlling value, when trigger region does not control invalidating signal, i.e. P4A to A phase When equal to 1, high level is exported with door FY22, triode VK1, VK2 are both turned on, and controlled source+VCCA obtains electric, A phase trigger circuit It works normally, gate control circuit is triggered by A phase and triggers gating according to effective, corresponding with some voltage class section A phase Controlling value selects corresponding A phase Trig control signal effective, and A phase trigger circuit is made to issue trigger pulse, and control A phase thyristor is opened The on off operating mode of Guan Zuzhong bidirectional thyristor, A phase main circuit are in compensation work state corresponding with the voltage class section.
In Figure 19, when three-phase triggering gating controlling value is all effective, P7K are high level, when trigger region does not control letter to B phase Number effectively, i.e. P4B be equal to 0 when, with door FY23 export low level, triode VK3, VK4 cut-off, controlled source+VCCB power loss, B Phase trigger circuit does not work, i.e., does not issue the trigger pulse that bidirectional thyristor is triggered in B phase thyristor switch group, and shutdown B phase is brilliant All bidirectional thyristors in thyristor switch group show that B phase AC power source phase voltage has fluctuation at this time, B phase are made to trigger gating control Value processed produces variation, needs to carry out the switching of bidirectional thyristor on off operating mode in B phase thyristor switch group, changes compensation side Formula.When it is high level that three-phase, which triggers the whole effective, P7K of gating controlling value, when trigger region does not control invalidating signal, i.e. P4B to B phase When equal to 1, high level is exported with door FY23, triode VK3, VK4 are both turned on, and controlled source+VCCB obtains electric, B phase trigger circuit It works normally, gate control circuit is triggered by B phase and triggers gating according to effective, corresponding with some voltage class section B phase Controlling value selects corresponding B phase Trig control signal effective, and B phase trigger circuit is made to issue trigger pulse, and control B phase thyristor is opened The on off operating mode of Guan Zuzhong bidirectional thyristor, B phase main circuit are in compensation work state corresponding with the voltage class section.
In Figure 19, when three-phase triggering gating controlling value is all effective, P7K are high level, when trigger region does not control letter to C phase Number effectively, i.e. P4C be equal to 0 when, with door FY24 export low level, triode VK5, VK6 cut-off, controlled source+VCCC power loss, C Phase trigger circuit does not work, i.e., does not issue the trigger pulse that bidirectional thyristor is triggered in C phase thyristor switch group, and shutdown C phase is brilliant All bidirectional thyristors in thyristor switch group show that C phase AC power source phase voltage has fluctuation at this time, C phase are made to trigger gating control Value processed produces variation, needs to carry out the switching of bidirectional thyristor on off operating mode in C phase thyristor switch group, changes compensation side Formula.When it is high level that three-phase, which triggers the whole effective, P7K of gating controlling value, when trigger region does not control invalidating signal, i.e. P4C to C phase When equal to 1, high level is exported with door FY24, triode VK5, VK6 are both turned on, and controlled source+VCCC obtains electric, C phase trigger circuit It works normally, gate control circuit is triggered by C phase and triggers gating according to effective, corresponding with some voltage class section C phase Controlling value selects corresponding C phase Trig control signal effective, and C phase trigger circuit is made to issue trigger pulse, and control C phase thyristor is opened The on off operating mode of Guan Zuzhong bidirectional thyristor, C phase main circuit are in compensation work state corresponding with the voltage class section.
There is the triggering gating controlling value of a phase invalid in gating controlling value when three-phase triggers, protection driving unit issues protection Signal is controlled to three-phase main circuit, when three-phase thyristor switching group being made to be in guard mode, rail traffic three-phase alternating current pressure stabilizing Device does not compensate input voltage, and the voltage of stable-pressure device output is the three-phase alternating-current supply phase voltage inputted.In crystalline substance When thyristor switch group is in guard mode, if three-phase triggering gating controlling value full recovery is useful signal, driving is protected Unit is automatically stopped the guard mode of three-phase thyristor switching group, and three-phase thyristor switching group is in compensation work state again.
It is each mutually to trigger from above embodiment and its course of work it is found that when input gates controlling value for effective triggering Gate control circuit ensure that ipsilateral thyristor does not simultaneously turn in this phase thyristor switch group, realizes the mutual lock control of thyristor System;;And when triggering gating controlling value is invalid, protection driving unit avoids double in the power supply of cutting trigger unit rapidly On the basis of causing short circuit to the conducting of thyristor mistake, the input side power supply electricity of all auto-transformers in three-phase is simultaneously switched off Pressure, makes three-phase thyristor switching group be in guard mode.When three-phase thyristor switching group is in guard mode, if three-phase Error detection differentiates that circuit judges rail traffic three-phase ac voltage stabilizer reenters normal logic control state, i.e. three-phase error detection When differentiating that the triggering gating controlling value full recovery of circuit judges three-phase is useful signal, then it can be automatically stopped three-phase thyristor and open The guard mode of pass group simultaneously makes it be in compensation work state again.Above-mentioned function effectively strengthens rail traffic three-phase alternating current Stable-pressure device is directed to the protection of course of work exception, and the work of the rail traffic three-phase ac voltage stabilizer is made more may be used It leans on.
Except for the technical features described in the specification, the other technologies of rail traffic three-phase ac voltage stabilizer are this field The routine techniques that technical staff is grasped.

Claims (10)

1. a kind of rail traffic three-phase ac voltage stabilizer, it is characterised in that: including auto compensating type three-phase main circuit unit, mend Repay control unit, trigger unit, protection driving unit;
It include compensator transformer, auto-transformer, thyristor in every phase main circuit of auto compensating type three-phase main circuit unit Switching group and relay protection circuit;
Compensation control unit is made of the identical compensation control circuit of three structures, and output three-phase Trig control signal is to triggering list Member;Trigger unit issues three-phase trigger signal to auto compensating type three-phase main circuit according to the three-phase Trig control signal of input Unit controls the on-off of thyristor in three-phase thyristor switching group;Compensation control unit exports three-phase simultaneously, and trigger region does not control Signal and three-phase triggering gating controlling value differentiate signal to protecting driving unit;Protect driving unit to three-phase thyristor switching group Protection and the power supply of trigger unit controlled.
2. rail traffic three-phase ac voltage stabilizer according to claim 1, it is characterised in that: three compensation control Circuit carries out voltage sample to three-phase alternating-current supply phase voltage respectively, exports three-phase Trig control signal, three-phase not trigger region control Signal processed, three-phase triggering gating controlling value differentiate signal.
3. rail traffic three-phase ac voltage stabilizer according to claim 2, it is characterised in that: in each phase, compensation control Circuit processed includes that analog-to-digital conversion coding circuit, decoding gating circuit, delay protection circuit, triggering gate control circuit, error detection are sentenced Other circuit;Analog-to-digital conversion coding circuit carries out voltage sample, output voltage grade encoded radio to AC power source phase voltage;Decoding choosing Circuit passband input voltage grade encoded radio, output triggering gating controlling value;Delay protection circuit input triggering gating controlling value, it is defeated Triggering after postponing out gates controlling value and trigger region does not control signal;Triggering choosing after triggering gate control circuit input delay Logical controlling value, exports Trig control signal;Error detection differentiates that circuit differentiates whether the triggering gating controlling value of input is effective, output touching Hair gating controlling value differentiates signal.
4. rail traffic three-phase ac voltage stabilizer according to claim 3, it is characterised in that: in each phase, triggering choosing Logical controlling value is M binary values;Error detection differentiates that circuit differentiates whether the triggering gating controlling value of input is effective, and foundation is to touch In the position the M binary value of hair gating controlling value, have and when only one effective, it is effective that triggering gates controlling value;Otherwise, triggering choosing Logical controlling value is invalid;The M is the integer more than or equal to 2.
5. rail traffic three-phase ac voltage stabilizer according to claim 4, it is characterised in that: in each phase, alternating current The voltage of source phase voltage waving interval range is divided into M voltage class section, and M voltage class section is controlled with M triggering gating Value processed corresponds.
6. rail traffic three-phase ac voltage stabilizer according to claim 5, it is characterised in that: in each phase, voltage etc. Grade section and voltage compensation state correspond, and different voltage compensation states is led to by thyristor in thyristor switch group is different Disconnected assembled state control;Trigger gating control cells according to triggering gating controlling value, simultaneously by the selection of diode triggered gating matrix Keep corresponding Trig control signal effective, controls the on-off assembled state of thyristor in thyristor switch group.
7. rail traffic three-phase ac voltage stabilizer according to claim 6, it is characterised in that: in each phase, thyristor N number of thyristor is shared in switching group;Diode triggered gating matrix includes M root triggering gating control alignment, N root triggering driving row Line and multiple diodes;M root triggering gating control alignment is corresponded with M triggering gating controlling values, a triggering gating control Value processed is corresponding to keep a triggering gating control alignment signal effective;N root triggering driving line and N number of thyristor correspond, and one Root triggering driving line signal effectively correspondence keeps the Trig control signal of a thyristor effective;Every triggering gating control alignment When signal is effective, the on-off assembled state of thyristor in a corresponding thyristor switch group;In every triggering gating control alignment It drives with the alignment signal triggering that corresponding on-off assembled state needs to control turn on thyristors when effective and is respectively provided between line Diode is attached, and when certain root triggering gating control alignment is effective, the touching for needing to control turn on thyristors is made by diode Hair driving line signal is effective;The N is the integer more than or equal to 4.
8. rail traffic three-phase ac voltage stabilizer described in any one of -7 according to claim 1, it is characterised in that: Mei Yixiang In, trigger region control signal does not export a pulse after triggering gating controlling value changes for control;Trigger region does not control Signal is effective during exporting pulse, invalid during non-output pulse.
9. rail traffic three-phase ac voltage stabilizer according to claim 8, it is characterised in that: in each phase, delay is protected In protection circuit, the triggering gating control value signal change moment of delay is later than after triggering gating controlling value changes not trigger region The forward position moment of pulse in signal is controlled, and trigger region controls list in signal earlier than triggering after gating controlling value changes Pulse it is rear along the moment.
10. the rail traffic three-phase ac voltage stabilizer according to any one of claim 4-9, it is characterised in that: protection Driving unit differentiates whether signal effectively stops/starting opening three-phase thyristor according to the three-phase triggering gating controlling value of input The protection of pass group, specific method are, when having one in three-phase triggering gating controlling value differentiation signal and more than one is invalid, control System disconnects the input side supply voltage of 3-phase autotransformer be in three-phase thyristor switching group under guard mode;
Protect driving unit according to three-phase triggering gating controlling value differentiate signal whether effectively and three-phase not trigger region control signal Whether effectively come the power supply for controlling trigger unit, specific method is to differentiate in signal have when three-phase triggers gating controlling value One and more than one it is invalid when, control break trigger unit in all three-phase trigger circuits power supply;It is gated when three-phase triggers When controlling value differentiates that signal is all effective, in each phase, trigger region control signal is not touched accordingly in break trigger unit then effectively Otherwise the power supply of Power Generation Road connects the power supply of corresponding trigger circuit in trigger unit.
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