CN208908418U - A kind of railway signal AC power source stable-pressure device - Google Patents

Abstract

A kind of railway signal AC power source stable-pressure device; it is made of auto compensating type main circuit, analog-to-digital conversion coding unit, decoding gating unit, delay protection unit, triggering gating control cells, trigger unit, error detection judgement unit, protection driving unit, auto compensating type main circuit includes compensator transformer, auto-transformer, thyristor switch group and relay protection switch.Analog-to-digital conversion coding unit carries out voltage sample, and output obtains triggering gating controlling value through decoding, and triggering gating control cells are according to the triggering gating controlling value output Trig control signal after delay and by the on-off of thyristor in trigger unit control thyristor switch group.The voltage-stablizer is while realizing mutual lock control; also whether effectively start/stop the protection to thyristor switch group according to triggering gating controlling value by error detection judgement unit and protection driving unit; the power supply for controlling trigger unit, effectively strengthens the protection for railway signal AC power source pressure stabilizing course of work exception.

Description

A kind of railway signal AC power source stable-pressure device

Technical field

The utility model relates to power technique fields, especially a kind of railway signal AC power source stable-pressure device.

Background technique

Existing compensating-type AC voltage stabilization device, its advantage is that voltage stabilized range is wide, waveform is almost without distortion, overall efficiency Height, workload-adaptability are strong.Its principle is the height situation according to input voltage, automatically controls armature winding on compensator transformer The switching of different winding coils, using the no-load voltage ratio relationship of primary side Working winding and secondary windings, or by adjusting primary around The alive mode of institute, provides the voltage compensation of two-way multi gear, to realize the purpose of voltage-regulation voltage-stabilization in group.

Railway signal AC power source for signal lighting, switch indication, CTC equipment etc. requires reliable, stable and safety. Existing compensating-type AC voltage stabilization device applies difference using motor control carbon brush is mobile to change to compensator transformer magnet exciting coil When voltage, carbon brush is prone to wear, and is often broken down；It is compensated by the way of electronic switch switching primary on transformer On the switching of the different winding coils of winding, or adjustment armature winding when institute's making alive, being delayed to turn off for electronic switch is easy Cause power supply short circuit failure；When being switched using the program mode (PM) control electronic switch of single-chip microcontroller, PLC etc., program runs fast, crashes Problem will also result in stable-pressure device failure, or because of power supply short circuit failure caused by control logic mistake.

Summary of the invention

In order to solve the problems of AC stabilizer used in existing railway signal power supply, the utility model is provided A kind of railway signal AC power source stable-pressure device, it is single by auto compensating type main circuit, analog-to-digital conversion coding unit, decoding gating Member, delay protection unit, triggering gating control cells, trigger unit, error detection judgement unit, protection driving unit composition；Self coupling Compensation main circuit includes compensator transformer, auto-transformer, thyristor switch group.

Analog-to-digital conversion coding unit carries out voltage sample, output voltage grade encoded radio to AC supply voltage；Decoding choosing Logical unit input voltage grade encoded radio, output triggering gating controlling value；Delay protection unit input triggering gating controlling value, it is defeated Triggering after postponing out gates controlling value and trigger region does not control signal；Triggering choosing after triggering gating control cells input delay Logical controlling value, exports Trig control signal；Trigger unit inputs Trig control signal, and output trigger pulse controls thyristor switch The on-off of thyristor in group；Triggering after error detection judgement unit input delay gates controlling value, and output triggering gating controlling value is sentenced Level signal；It protects driving unit input to trigger gating controlling value and differentiates signal and not trigger region control signal, export as triggering list The controllable power supply of member.The voltage class encoded radio is 4 binary values, and triggering gating controlling value is 10 binary systems Value.

The bucking coil of compensator transformer is connected in phase line；Auto-transformer has 4 output taps, and first ipsilateral 4 After a bidirectional thyristor one end is in parallel, it is connected to one end of the magnet exciting coil of compensator transformer, first 4 ipsilateral two-way brilliant locks The other end of pipe is respectively connected to 4 output taps；After second 4 ipsilateral bidirectional thyristor one end are in parallel, it is connected to benefit Repay the other end of the magnet exciting coil of transformer, the other end of second 4 ipsilateral bidirectional thyristors be respectively connected to 4 it is defeated Tap out；The input winding parallel of auto-transformer is to phase line output terminal and zero line side.

Analog-to-digital conversion coding unit includes AC supply voltage detection circuit and analog to digital conversion circuit；AC supply voltage inspection Slowdown monitoring circuit samples the AC supply voltage virtual value of input, obtains AC supply voltage sampled value；Analog to digital conversion circuit Input ac power voltage sample value, output voltage grade encoded radio.

Analog to digital conversion circuit include biproduct parting A/D converter ICL7109, reference capacitance C13, automatic zero set capacitor C12, Integrating capacitor C11, integrating resistor R11, resistance RF1, resistance RF2, crystal oscillator XT1；The operation of ICL7109/holding end RUN, low word Section enable end LBEN, test lead TEST connect high level, chip select terminal CE/LOAD, mode end MODE, high byte enable end HBEN, vibration It swings device selection end OSC SEL and connects low level；Crystal oscillator XT1 be connected to ICL7109 oscillator input OSC IN and oscillator it is defeated Outlet OSC OUT；One end connection composition integrating circuit of integrating capacitor C11, integrating resistor R11, automatic zero set capacitor C12, separately Outer one end is respectively connected to the integrating capacitor end INT, buffer output end BUF, automatic zero set capacitance terminal AZ of ICL7109； The high-end IN HOL input ac power voltage sample value of the Differential Input of ICL7109, Differential Input low side IN LO are connected to The reference voltage output end REF OUT of ICL7109；Resistance RF1, resistance RF2 divide the reference voltage of ICL7109, Reference voltage is obtained on resistance RF2, reference voltage is input to the reference voltage positive input terminal REF IN+ of ICL7109 and with reference to electricity Press negative input end REF IN-；Reference capacitance C13 is connected to the reference capacitance positive input terminal REF CAP+ of ICL7109 and with reference to electricity Hold negative input end REF CAP-；The positive power source terminal V+ of ICL7109 is connected to positive supply；The negative power end V- of ICL7109 is connected to Negative supply；The digital ground terminal and simulation ground terminal of ICL7109 is connected to publicly；Voltage class encoded radio from ICL7109 most High 4 output ends output.

Decoding gating unit is the line decoder of four lines -16 CD4514；4 encoded radio input terminals of CD4514 input 4 Voltage class encoded radio, chip select terminal input low level, latch control terminal input high level；Minimum 10 decoding of CD4514 exports End output triggering gating controlling value.

By delay detection module and not, trigger region control signal generator module forms delay protection unit；Delay detection module In include 10 identical delay detection circuits, it is each delay detection circuit input signal is postponed after it is defeated Signal out, while Edge check is carried out to input signal, export Edge check signal；10 delay detection circuits are respectively to 10 Triggering gating controlling value carries out signal delay, and 10 triggerings after being postponed gate controlling value, and gate to 10 triggerings Controlling value carries out Edge check, obtains 10 Edge check signals；Trigger region does not control signal generator module for 10 of input Edge check signal is converted to not trigger region control signal output；Trigger region control signal generator module is not to input with 10 The nor gate FY10 of signal end；10 input signal ends of nor gate FY10 are respectively connected to the side in 10 delay detection circuits Along detection signal output end；Trigger region does not control signal for the output end output of nor gate FY10.

8 thyristors are shared in thyristor switch group；Trigger gate control circuit include 10 triggerings gating control alignments, 8 triggering driving lines and 20 diodes；10 triggering gating control alignments and 10 triggering gating controlling values correspond, One triggering gating controlling value is corresponding to keep a triggering gating control alignment signal effective；8 triggering driving lines and 8 brilliant locks Pipe corresponds, and a triggering driving line signal effectively correspondence keeps the Trig control signal of a thyristor effective；Every touching When hair gating control alignment signal is effective, the on-off assembled state of thyristor in a corresponding thyristor switch group；It is touched at every The triggering that corresponding on-off assembled state needs to control turn on thyristors when hair gating control alignment and effective alignment signal drives It is respectively provided with diode between line to be attached, when certain root triggering gating control alignment signal is effective, makes to need by diode The triggering driving line signal for controlling turn on thyristors is effective.

20 diodes in gating control cells are triggered using anode connection triggering gating control alignment, cathode connection touching The mode of hair driving line, is connected to the first triggering gating control alignment and the first triggering driving line, the 8th triggering are driven Dynamic line, the second triggering gating control alignment and third triggering driving line, the 8th triggering driving line, third triggering gating control Alignment processed and the first triggering driving line, the 6th triggering driving line, the 4th triggering gating control alignment and third triggering drive Line, the 6th triggering driving line, the 5th triggering gating control alignment and the 5th triggering driving line, the 8th triggering driving row Line, the 6th triggering gating control alignment and the first triggering driving line, the 4th triggering driving line, the 7th triggering gating control column Between line and the 7th triggering driving line, the 8th triggering driving line, the 8th triggering gating control alignment and the second triggering are driven Line, third triggering driving line, the 9th triggering gating control alignment and the 6th triggering driving line, the 7th triggering driving row Line, between the tenth triggering gating control alignment and the 4th triggering driving line, the 5th triggering driving line；Every triggering driving row Line is connected to the base stage of its NPN driving triode by resistance, and NPN driving triode exports triggering using open collector mode Control signal.

Error detection judgement unit is that ROM differentiates memory；ROM differentiates that 10 bit address input terminals of memory input 10 respectively Triggering after delay gates controlling value, and data output end output triggering gating controlling value differentiates signal.

Protecting the function of driving unit is: when triggering gating controlling value differentiates that either trigger region does not control letter to invalidating signal When number effective, controllable power supply stops powering to trigger unit；When triggering gating controlling value differentiates signal effectively and does not trigger When area controls invalidating signal, controllable power supply is powered to trigger unit.

The beneficial effects of the utility model are: described carry out voltage compensation using compensator transformer group and thyristor switch group Railway signal AC power source stable-pressure device controlling value is gated using an only effective, different triggering, touched by diode Hair gating matrix realizes the gating control to thyristor difference on-off assembled state in thyristor switch group, and ensure that brilliant lock Ipsilateral thyristor does not simultaneously turn in pipe switching group, that is, realizes the mutual lock control of thyristor.At the same time, also to because of modulus Transform coding unit breaks down, or logic error occurs in decoding gating unit, when causing triggering gating controlling value invalid, Stop issuing the protection of the input side supply voltage progress thyristor switch group of trigger pulse and disconnection auto-transformer, effectively Strengthen the protection that the railway signal AC power source stable-pressure device is directed to course of work exception；At thyristor switch group When guard mode, if triggering gating controlling value restores that effectively, the guard mode of thyristor switch group can be automatically stopped And it is made to be in compensation work state again；Do not switched using the switching of the program mode (PM) control thyristor of single-chip microcontroller, PLC etc., Avoid stable-pressure device failure caused by the problems such as program runs fast, crashes.Above-mentioned function keeps the railway signal AC power source steady The work of pressure device is more stable, reliable.

Detailed description of the invention

Fig. 1 is the system composition block diagram of railway signal AC power source stable-pressure device；

Fig. 2 is auto compensating type main circuit embodiment 1；

Fig. 3 is auto compensating type main circuit embodiment 2；

Fig. 4 is analog-to-digital conversion coding unit embodiment 1；

Fig. 5 is analog-to-digital conversion coding unit embodiment 2；

Fig. 6 is decoding gating unit embodiment；

Fig. 7 is delay protection unit embodiment block diagram；

Fig. 8 is in delay detection module for the delay detection circuit embodiment 1 of triggering gating control value signal Y10；

Fig. 9 is in delay detection module for the delay detection circuit embodiment 2 of triggering gating control value signal Y10；

Figure 10 is in delay detection module for the delay detection circuit embodiment 3 of triggering gating control value signal Y10；

Figure 11 is that trigger region does not control signal generator module embodiment；

Figure 12 is that split-phase closes waveform diagram in the middle part of delay protection unit；

Figure 13 is the trigger circuit embodiment that bidirectional thyristor SR1 is triggered in trigger unit；

Figure 14 is triggering gating control cells embodiment 1；

Figure 15 is triggering gating control cells embodiment 2；

Figure 16 is triggering gating control cells embodiment 3；

Figure 17 is error detection judgement unit embodiment；

Figure 18 is protection drive unit embodiment.

Specific embodiment

Below in conjunction with attached drawing, the utility model is described in further detail.

Fig. 1 is the system composition block diagram of railway signal AC power source stable-pressure device, and analog-to-digital conversion coding unit is to alternating current Source voltage carries out voltage sample, the output voltage grade encoded radio P1 after analog-to-digital conversion；Gating unit is decoded to compile voltage class Code value P1 is decoded, output triggering gating controlling value P2；Delay protection unit input triggering gating controlling value P2, output delay Triggering afterwards gates controlling value P3 and trigger region does not control signal P4；Triggering gating after triggering gating control cells input delay Controlling value P3 exports Trig control signal P5；Trigger unit issues trigger signal P6 extremely according to the Trig control signal P5 of input Auto compensating type main circuit controls the on-off of bidirectional thyristor in thyristor switch group；After error detection judgement unit input delay Triggering gating controlling value P3, output triggering gating controlling value differentiate signal P7；Protect driving unit input not trigger region control letter Number P4 and triggering gating controlling value differentiate signal P7, differentiates whether signal P7 effectively starts/stop according to triggering gating controlling value Only to the protection of thyristor switch group, while differentiating whether effectively and not trigger region controls signal P7 according to triggering gating controlling value Signal P4 whether the power supply effectively to control trigger unit.

Fig. 2 is auto compensating type main circuit embodiment 1, including compensator transformer TB1 and auto-transformer TB2, and 6 two-way Thyristor SR1-SR6 collectively constitutes thyristor switch group, and fuse FU1 and relay normally open switch KA-1, relay is normally closed opens It closes KA-2 and forms relay protection circuit.

In Fig. 2, the bucking coil of compensator transformer TB1 is connected in phase line, and phase line input terminal is LA1, and output end is LA2.Voltage on TB1 magnet exciting coil is controlled by thyristor switch group.Auto-transformer TB2 has 3 outputs tap C1, C2, C3, It is connected to one end of TB1 magnet exciting coil after one end of bidirectional thyristor SR1, SR3, SR5 is in parallel, other the one of SR1, SR3, SR5 End is respectively connected to tap C1, C2, C3；TB1 magnet exciting coil is connected to after one end of bidirectional thyristor SR2, SR4, SR6 are in parallel Other end, the other end of SR2, SR4, SR6 are then respectively connected to tap C1, C2, C3.If auto-transformer TB2 tap C1, Output voltage U12 between C2 is different from the output voltage U23 between C2, C3, and voltage U23 is 2 times of voltage U12；Then thyristor Switching group is up to forward direction U12, forward direction U23, forward direction U12+U23, reversed U12, reversed U23, reversed U12+U23 totally 6 kinds of excitations Coil voltage compensating coefficient, 0 voltage compensation state when a kind of additional input voltage is within normal range (NR), phase line input terminal The AC supply voltage of LA1 input can at most be divided into 7 voltage ranges and compensate control.In Fig. 2, N is zero curve, G11, G12 is respectively the trigger signal input terminal of bidirectional thyristor SR1 to SR6 to G61, G62.In Fig. 2, bidirectional thyristor SR1, SR3, SR5 forms ipsilateral thyristor, and bidirectional thyristor SR2, SR4, SR6 form another ipsilateral thyristor；To avoid short circuit, ipsilateral crystalline substance lock There cannot be 2 and 2 or more thyristors to simultaneously turn on simultaneously in pipe；For example, SR1, SR3 cannot be simultaneously turned on, SR4, SR6 are not Can simultaneously turn on, etc..

Fig. 3 is auto compensating type main circuit embodiment 2, including compensator transformer TB1 and auto-transformer TB2, and 8 two-way Thyristor SR1-SR8 collectively constitutes thyristor switch group, and fuse FU1 and relay normally open switch KA-1, relay is normally closed opens It closes KA-2 and forms relay protection circuit.

In Fig. 3, the bucking coil of compensator transformer TB1 is connected in phase line, and phase line input terminal is LA1, and output end is LA2.Voltage on TB1 magnet exciting coil is controlled by thyristor switch group.Auto-transformer TB2 have 4 output tap C1, C2, C3, Be connected to one end of TB1 magnet exciting coil after one end of C4, bidirectional thyristor SR1, SR3, SR5, SR7 is in parallel, SR1, SR3, SR5, The other end of SR7 is respectively connected to tap C1, C2, C3, C4；After one end of bidirectional thyristor SR2, SR4, SR6, SR8 are in parallel Be connected to the other end of TB1 magnet exciting coil, the other end of SR2, SR4, SR6, SR8 be then respectively connected to tap C1, C2, C3,C4.If the output voltage U12 between auto-transformer TB2 tap C1, C2, the output voltage U23 between C2, C3, between C3, C4 Output voltage U34 is respectively different, and voltage U23 is 3 times of voltage U12, and voltage U34 is 2 times of voltage U12；Then thyristor is opened Pass group include forward direction U12, forward direction U23, forward direction U34, forward direction U12+U23, forward direction U23+U34, forward direction U12+U23+U34, reversely U12, reversed U23, reversed U34, reversed U12+U23, reversed U23+U34, reversed U12+U23+U34 totally 12 kinds of magnet exciting coil voltage Compensating coefficient, 0 voltage compensation state when a kind of additional input voltage is within normal range (NR), phase line input terminal LA1 input AC supply voltage can be divided into most 13 voltage ranges and compensate control.In Fig. 3, N is zero curve, and G11, G12 are extremely G81, G82 are respectively the trigger signal input terminal of bidirectional thyristor SR1 to SR8.In Fig. 3, bidirectional thyristor SR1, SR3, SR5, SR7 forms ipsilateral thyristor, and bidirectional thyristor SR2, SR4, SR6, SR8 form another ipsilateral thyristor；It is ipsilateral to avoid short circuit There cannot be 2 and 2 or more thyristors to simultaneously turn on simultaneously in thyristor；For example, SR1, SR7 cannot be simultaneously turned on, SR4, SR8 cannot be simultaneously turned on, etc..

Each bidirectional thyristor in Fig. 2, Fig. 3 can be substituted with the unidirectional thyristor of 2 reverse parallel connections.Fig. 2, Fig. 3 In, relay normally open switch and relay normally closed switch composition relay protection switch.

The voltage of AC supply voltage waving interval range is divided into M voltage class section, analog-to-digital conversion coding unit Voltage sample is carried out to AC supply voltage to export the voltage of AC supply voltage waving interval range after analog-to-digital conversion The voltage class encoded radio that binary system is constituted.

Fig. 4 is analog-to-digital conversion coding unit embodiment 1.In Fig. 4, FD1 is that real available value detects device LTC1966, LTC1966 and transformer TV1, capacitor CV1, capacitor CV2, resistance RV1, resistance RV2 constitute AC supply voltage detection circuit, right The AC supply voltage virtual value inputted from phase line LA1 and zero curve N measures, and obtains AC supply voltage sampled value U1. UIN1, UIN2 of LTC1966 is alternating voltage difference input terminal, and USS is the negative supply input terminal that can be grounded, and UDD is positive electricity Source input terminal, GND are ground terminal, and EN is that low level effectively enables control signal, and UOUT is voltage output end, and COM is output Voltage return.

In Fig. 4, FD2 is biproduct parting A/D converter ICL7109, for by AC supply voltage waving interval range Voltage divides into voltage class section and is converted to the voltage class encoded radio output of binary system composition.In Fig. 4, ICL7109's Operation/holding end RUN, low byte enable end LBEN, test lead TEST connect high level, chip select terminal CE/LOAD, mode end MODE, High byte enable end HBEN, oscillator selection end OSC SEL connect low level, and work is continuing (i.e. automatic to repeat) conversion regime And the direct output mode of high byte；Crystal oscillator XT1 is connected to the oscillator input OSC IN and oscillator output end of ICL7109 OSC OUT；One end connection composition integrating circuit of integrating capacitor C11, integrating resistor R11, automatic zero set capacitor C12, in addition one End is respectively connected to the integrating capacitor end INT, buffer output end BUF, automatic zero set capacitance terminal AZ of ICL7109；ICL7109's The high-end IN HOL input ac power voltage sample value U1 of Differential Input, it is defeated that Differential Input low side IN LO is connected to reference voltage Outlet REF OUT；Resistance RF1, resistance RF2 divide reference voltage, la tension de reference Uref est are obtained on resistance RF2, Uref is defeated Enter to reference voltage positive input terminal REF IN+ and reference voltage negative input end REF IN-；Reference capacitance C13 is connected to reference to electricity Hold positive input terminal REF CAP+ and reference capacitance negative input end REF CAP-；The V+ of ICL7109 is positive power source terminal, is connected to power supply +VCC；The V- of ICL7109 is negative power end, is connected to power supply-VCC；The GND of ICL7109 is digital ground terminal, and COMMON is simulation Ground terminal is connected to publicly GND.

If the AC supply voltage fluctuation range of input is 220V ± 10%, it is desirable that implemented using auto compensating type main circuit Example 1 is stablized to be exported in the range of 220V ± 2%, and AC supply voltage waving interval range is 242V to 198V, at this time Using the analog-to-digital conversion coding unit embodiment 1 of Fig. 4, input can be divided into section voltage in 242V to the voltage between 198V Size is 7 voltage class sections of 6.4V, and the voltage in 3 voltage class sections therein is higher than desired output voltage model It encloses, needs to carry out drop compensation；The voltage in 3 voltage class sections boosts lower than desired output voltage range Compensation；1 voltage class section carries out 0 voltage compensation, i.e. uncompensation within desired output voltage range.The electricity of 6.4V It is not more than 220V ± 1.5% between pressure area, meets requirement of the output control within 220V ± 2%.Using Fig. 2 auto compensating type master Circuit embodiments 1 compensate, then the input voltage of auto-transformer TB2 is alternating current 220V, are only TB1 with output voltage U12 Magnet exciting coil voltage when, TB1 offset voltage be 6.4V；When only making the magnet exciting coil voltage of TB1 of output voltage U23, TB1 is mended Repaying voltage is 12.8V；When doing the magnet exciting coil voltage of TB1 using output voltage U12, U23 simultaneously, TB1 offset voltage is 19.2V.In Fig. 4, ICL7109 to from the differential voltage between Differential Input high-end IN HOL and Differential Input low side IN LO into Row A/D conversion；The corresponding AC supply voltage waving interval in 7 voltage class sections of 6.4V is 242.4V to 197.6V, is covered The range of practical fluctuation is covered；Benchmark that Differential Input low side IN LO is inputted, being exported from reference voltage output end REF OUT Voltage Ucp should be corresponding with the lower bound theoretical value 197.6V of AC supply voltage waving interval range；Accordingly, it is determined that transformer The no-load voltage ratio of TV1 and the intrinsic standoff ratio of resistance RV1, resistance RV2, it should when AC supply voltage is lower bound theoretical value 197.6V, make AC supply voltage sampled value U1 is equal to the reference voltage Ucp of reference voltage output end REF OUT output.In Fig. 4, analog-to-digital conversion Coding unit output voltage class encoded radio P1 by exported from ICL7109 highest 4 B12, B11, B10, B9 data L4, L3, L2, L1 composition；One-to-one 7 voltage class in 7 voltage class sections are compiled from low to high for L4, L3, L2, L1 and voltage Code value is 0000,0001,0010,0011,0100,0101,0110 respectively, by adjusting the size of la tension de reference Uref est come real It is existing.Adjust la tension de reference Uref est size method first is that: demarcation voltage of the AC supply voltage in 2 voltage class sections of highest When fluctuating up and down at 236V, adjusting (adjusts) intrinsic standoff ratio of resistance RF1, resistance RF2, and the numerical value of L4, L3, L2, L1 is made to exist It is fluctuated between 0110 and 0101；Adjust la tension de reference Uref est size method second is that: setting Ux is AC supply voltage in 197.6V To 242.4V teachings fluctuation when, from Differential Input high-end IN HOL and Differential Input low side IN LO input voltage become Change range, has

The variation range of Ux corresponds to 7 minimum code values of B12, B11, B10, B9；If corresponding B12, B11, B10, B9's The input variation full scale input voltage range of 10 BCD encoded radios is Um, is had

The reference voltage of ICL7109 is the 1/2 of full scale input voltage, is had

Therefore, the intrinsic standoff ratio for only needing to adjust resistance RF1, resistance RF2 at this time makes Uref be equal to the calculated value of formula (1) i.e. It can.

If the AC supply voltage fluctuation range of input is 220V+10% to 220V-20%, it is desirable that use auto compensating type Main circuit embodiment 2 is stablized to be exported in the range of 220V ± 2%, AC supply voltage waving interval range be 242V extremely 176V uses the analog-to-digital conversion coding unit embodiment 1 of Fig. 4 at this time, can be by input at 242V to the voltage between 176V points Voltage for 10 voltage class sections that section voltage swing is 7V, 3 voltage class sections therein is higher than the defeated of requirement Voltage range out needs to carry out drop compensation；The voltage in 6 voltage class sections is needed lower than desired output voltage range Carry out boosting compensation；1 voltage class section carries out 0 voltage compensation, i.e. uncompensation within desired output voltage range. The voltage range of 7V is 220V ± 1.6%, meets requirement of the output control within 220V ± 2%.Using Fig. 3 auto compensating type Main circuit embodiment 2 compensates, then the input voltage of auto-transformer TB2 is alternating current 220V, only makes of output voltage U12 When the magnet exciting coil voltage of TB1, TB1 offset voltage is 7V；When only making the magnet exciting coil voltage of TB1 of output voltage U23, TB1 Offset voltage is 21V；When only making the magnet exciting coil voltage of TB1 of output voltage U34, TB1 offset voltage is 14V；It uses simultaneously When output voltage U12, U23 do the magnet exciting coil voltage of TB1, TB1 offset voltage is 28V；Etc..At this point, 10 voltages of 7V The corresponding AC supply voltage waving interval of grade interval is 244.5V to 174.5V, covers the range actually fluctuated；Difference Reference voltage Ucp inputting low side IN LO input, exporting from reference voltage output end REF OUT should be with AC power source electricity Press the lower bound theoretical value 174.5V of waving interval range corresponding；Accordingly, it is determined that the no-load voltage ratio and resistance RV1, resistance of transformer TV1 The intrinsic standoff ratio of RV2, it should when AC supply voltage is lower bound theoretical value 174.5V, be equal to AC supply voltage sampled value U1 The reference voltage Ucp of reference voltage output end REF OUT output.In Fig. 4, the voltage class of analog-to-digital conversion coding unit output is compiled Code value P1 is made of data L4, L3, L2, the L1 exported from ICL7109 highest 4 B12, B11, B10, B9, L4, L3, L2, L1 with Voltage from low to high the one-to-one 10 voltage class encoded radios in 10 voltage class sections be 0000 respectively, 0001,0010, 0011,0100,0101,0110,0111,1000,1001, it is realized by adjusting the size of la tension de reference Uref est.Adjust reference The method of voltage Uref size first is that: AC supply voltage is in highest two voltage class sections boundary (i.e. AC power source The 235.4V of voltage) when fluctuating up and down, adjusting (adjusts) intrinsic standoff ratio of resistance RF1, resistance RF2, makes the number of L4, L3, L2, L1 Value fluctuates between 1000 and 1001；Adjust la tension de reference Uref est size method second is that: set Uy and exist as AC supply voltage When the teachings fluctuation of 174.5V to 244.5V, inputted from Differential Input high-end IN HOL and Differential Input low side IN LO Voltage change range has at this time

The variation range of Uy corresponds to 10 encoded radios of B12, B11, B10, B9 output binary-coded decimal, inputs, has for full scale

Therefore, the intrinsic standoff ratio for only needing to adjust resistance RF1, resistance RF2 at this time makes Uref be equal to the calculated value of formula (2) i.e. It can.

In Fig. 4, other peripheral cell parameters of LTC1966, ICL7109 can be by reading corresponding device data handbook It is determined.AC supply voltage sampled value U1 can also realize that ICL7109 can also use it using other detection circuits His device, for example, ICL7109 is replaced using double integration A/D converter MAX139, MAX140, ICL7107 etc., MAX139, The binary coding of the outputs such as MAX140, ICL7107 is 7 sections of codes, is acted on identical as the binary-coded decimal that ICL7109 is exported.

Fig. 5 is analog-to-digital conversion coding unit embodiment 2, in AC supply voltage detection circuit, from phase line LA1 and zero curve N The AC supply voltage of input is rectified after transformer TV2 decompression by the rectifier bridge that diode DV1-DV4 is formed, then through capacitor CV3 filtering and resistance RV3, resistance RV4 partial pressure obtain exchanging with the AC supply voltage virtual value direct proportionality inputted Supply voltage sampled value U2；Resistance RV5 and voltage-stabiliser tube WV1 forms lower threshold potential circuit, and voltage is and friendship on voltage-stabiliser tube WV1 Flow the corresponding lower threshold voltage U2cp of lower limit value of mains fluctuations interval range.AC supply voltage sampled value U2 can also To send into Fig. 4 the high-end IN HOL of Differential Input of ICL7109, the voltage class that binary system is constituted is converted to by ICL7109 and is compiled Code value output.

In Fig. 5, FD3 is biproduct parting A/D converter MC14433, for by AC supply voltage waving interval range Voltage divides into voltage class section and is converted to the voltage class encoded radio output of binary system composition.In Fig. 5, MC14433's Conversion end output end EOC is connected to transformation result output control terminal DU, its work is made to repeat transition status automatically；Integral electricity Resistance R14 and integrating capacitor C14 is connected to external integral element end R1, R1/C1, C1 of MC14433；Oscillation resistance R15 is connected to Clock outward element end CP0, CP1 of MC14433；Compensating electric capacity C15 be connected to MC14433 external compensating electric capacity end C01, C02；Resistance RF3, resistance RF4 divide power supply+VCC, and la tension de reference Uref est 1, Uref1 input are obtained on resistance RF4 To reference voltage input terminal VREF；VDD is the positive power source terminal of MC14433, is connected to power supply+VCC；VSS is digital ground terminal, VAG To simulate ground terminal, it is connected to publicly.

In Fig. 5, FD4 is 4 road D-latch CD4042, and 4 data input pin D0-D3 of CD4042 are connected to MC14433's 4 data output end Q0-Q3；The triggering input end of clock CP of CD4042 is connected to hundred gating signal output ends of MC14433 DS2；The clock polarity control terminal POL of CD4042 connects high level, and positive power source terminal VDD is connected to power supply+VCC, and digital ground terminal VSS connects It is connected to publicly.CD4042 latches hundred BCD data that timesharing after each conversion end of MC14433 exports, and modulus turns Change coding unit output voltage class encoded radio P1 by exported from CD4042 output end Q3, Q2, Q1, Q0 data L4, L3, L2, L1 composition.CD4042 can be replaced with other latch.

If the AC supply voltage fluctuation range of input is 220V ± 10%, it is desirable that implemented using auto compensating type main circuit Example 1 is stablized to be exported in the range of 220V ± 2%, and AC supply voltage waving interval range is 242V to 198V, at this time Using the analog-to-digital conversion coding unit embodiment 2 of Fig. 5, input can be divided into section voltage in 242V to the voltage between 198V Size is 7 voltage class sections of 6.4V, and the voltage in 3 voltage class sections therein is higher than desired output voltage model It encloses, needs to carry out drop compensation；The voltage in 3 voltage class sections boosts lower than desired output voltage range Compensation；1 voltage class section carries out 0 voltage compensation, i.e. uncompensation within desired output voltage range.

In Fig. 5, the measured voltage input terminal VX of MC14433 is connected to the output end of AC supply voltage sampled value U2, and Lower threshold voltage U2cp is connected to publicly GND, and therefore, MC14433 is to AC supply voltage sampled value U2 and lower bound Voltage difference between threshold voltage U2cp is converted；The corresponding AC supply voltage wave in 7 voltage class sections of 6.4V Dynamic section is 242.4V to 197.6V, the lower bound theoretical value of lower threshold voltage U2cp and AC supply voltage waving interval range 197.6V corresponding；Therefore, the intrinsic standoff ratio of the no-load voltage ratio of transformer TV2 and resistance RV3, resistance RV4, it should be in AC supply voltage When lower bound theoretical value 197.6V, AC supply voltage sampled value U2 is made to be equal to lower threshold voltage U2cp.In Fig. 5, analog-to-digital conversion The voltage class encoded radio P1 of coding unit output is made of data L4, L3, L2, the L1 exported from MC14433 hundred；Due to wanting Ask will input 242.4V to the voltage between 197.6V be divided into section voltage swing be 6.4V 7 voltage class sections, L4, L3, L2, L1 and voltage from low to high the one-to-one 7 voltage class encoded radios in 7 voltage class sections be 0000 respectively, 0001,0010,0011,0100,0101,0110, the reference voltage U2ref size of MC14433 is input to by adjusting to realize. Adjust reference voltage U2ref size method first is that: demarcation voltage of the AC supply voltage in 2 voltage class sections of highest At 236V up and down fluctuation when, enable reference voltage reduce since maximum value, adjust resistance RF3, resistance RF4 intrinsic standoff ratio, make L4, The numerical value of L3, L2, L1 fluctuate between 0110 and 0101；Adjust reference voltage U2ref size method second is that: set at this time Ux as Voltage change range of the AC supply voltage in the teachings fluctuation of 197.6V to 242.4V, has

Since the measurement output of MC14433 is 3 half BCD data, corresponding full scale input, kilobit shares 20 plus hundred A BCD encoded radio, the variation range of Ux correspond to 7 minimum code values therein；If the input variation of corresponding 20 BCD encoded radios Full scale input voltage range is Uz, is had

The reference voltage of MC14433 is equal to full scale input voltage, has

Therefore, the intrinsic standoff ratio for only needing to adjust resistance RF3, resistance RF4 at this time makes U2ref be equal to the calculated value of formula (3) i.e. It can.

If the AC supply voltage fluctuation range of input is 220V+10% to 220V-20%, it is desirable that use auto compensating type Main circuit embodiment 2 is stablized to be exported in the range of 220V ± 2%, AC supply voltage waving interval range be 242V extremely 176V uses the analog-to-digital conversion coding unit embodiment 2 of Fig. 5 at this time, can be by input at 242V to the voltage between 176V points Voltage for 10 voltage class sections that section voltage swing is 7V, 3 voltage class sections therein is higher than the defeated of requirement Voltage range out needs to carry out drop compensation；The voltage in 6 voltage class sections is needed lower than desired output voltage range Carry out boosting compensation；1 voltage class section carries out 0 voltage compensation, i.e. uncompensation within desired output voltage range. The corresponding AC supply voltage waving interval in 10 voltage class sections of 7V is 244.5V to 174.5V, lower threshold voltage U2cp is corresponding with the lower limit value theoretical value 174.5V of AC supply voltage waving interval range；Therefore, the no-load voltage ratio of transformer TV2 and The intrinsic standoff ratio of resistance RV3, resistance RV4, it should when AC supply voltage is lower bound theoretical value 174.5V, make AC supply voltage Sampled value U2 is equal to lower threshold voltage U2cp.In Fig. 5, analog-to-digital conversion coding unit output voltage class encoded radio P1 by from Data L4, L3, L2, L1 composition of MC14433 hundred output, L4, L3, L2, L1 and supply voltage 10 voltage etc. from low to high Grade section one-to-one 10 voltage class encoded radios are 0000 respectively, 0001,0010,0011,0100,0101,0110, 0111,1000,1001, it is realized by adjusting the size of reference voltage U2ref.The method for adjusting reference voltage U2ref size First is that: AC supply voltage is in highest two voltage class sections boundary (i.e. the 235.4V of AC supply voltage) wave up and down When dynamic, reference voltage is enabled to reduce since maximum value, adjusts the intrinsic standoff ratio of resistance RF3, resistance RF4, make the number of L4, L3, L2, L1 Value fluctuates between 1000 and 1001；Adjust reference voltage U2ref size method second is that: set at this time Uy as AC supply voltage Voltage change range in the teachings fluctuation of 174.5V to 244.5V, has

The variation range of Uy corresponds to MC14433 kilobit plus hundred 10 minimum codes shared in 20 BCD encoded radios Value；If the input variation full scale input voltage range for corresponding to 20 BCD encoded radios at this time is Uz, have

The reference voltage of MC14433 is equal to full scale input voltage, has

Therefore, the intrinsic standoff ratio for only needing to adjust resistance RF3, resistance RF4 at this time makes U2ref be equal to the calculated value of formula (4) i.e. It can.

In Fig. 5, other peripheral cell parameters of MC14433 can be carried out really by reading corresponding device data handbook It is fixed.AC supply voltage sampled value U2 can also be realized using other detection circuits, for example, being detected using various real available values Chip is realized.Difference between AC supply voltage sampled value U2 and corresponding lower threshold voltage can also use its other party Method obtains, for example, AC supply voltage sampled value U2 is subtracted corresponding lower threshold voltage with analog voltage subtraction circuit Value.

In the various embodiments described above, when carrying out voltage compensation using auto compensating type main circuit embodiment 1, the mould of Fig. 4 is utilized The number transform coding unit embodiments 1 either analog-to-digital conversion coding unit embodiment 2 of Fig. 5, will input 242V to 198V it Between voltage when being divided into 7 voltage class sections that section voltage swing is 6.4V, the voltage class that is made of L4, L3, L2, L1 In encoded radio, L4 is constantly equal to 0, and therefore, actual voltage class encoded radio is it is also assumed that be by 3, i.e. L3, L2, L1 at this time Composition, the one-to-one 7 voltage class encoded radios in 7 voltage class sections are respectively from low to high for L3, L2, L1 and voltage 000、001、010、011、100、101、110。

Decoding gating unit to input, translate with the one-to-one voltage class encoded radio in M voltage class section Code, the triggering that output M-bit binary number is constituted gate controlling value；When AC supply voltage is in M voltage class section At one, in M triggerings gating controlling values corresponding one effectively, other positions are invalid.The significance bit of M triggering gating controlling values For high level, i.e. binary one；Invalid bit is low level, i.e. Binary Zero；Either, the significance bit of M triggering gating controlling values For low level, i.e. Binary Zero；Invalid bit is high level, i.e. binary one.

Fig. 6 is decoding gating unit embodiment, wherein it is 3 that Fig. 6 (a), which is for voltage class encoded radio, is corresponding with 7 The decoding gating unit embodiment 1 of a voltage class encoded radio, it is 4 that Fig. 6 (b), which is for voltage class encoded radio, is corresponding with The decoding gating unit embodiment 2 of 10 voltage class encoded radios.Table 1 is logic true value table corresponding with Fig. 6 (a)；Fig. 6 (a) In, FD5 is ROM memory, and the address input end of ROM memory is the signal input part for decoding gating unit, 3 voltage class Encoded radio L1-L3 is sequentially connected to the address input end A0-A2 of ROM memory；The data output end of ROM memory is decoding choosing The signal output end of logical unit, 7 data output D0-D6 are respectively 7 triggering gating controlling values, 7 output signal Y11- Y17 composition triggering gating controlling value P2.

In table 1,7 triggerings gating controlling value of output is that high level is effective, the memory cell content of ROM memory FD5 It is written according to table 1.In Fig. 6 (a), the signal L3-L1 of input be respectively with 7 voltage class sections it is one-to-one 000,001, 010, when 011,100,101,110 voltage class encoded radio, in 7 triggerings gating controlling value of output, make respectively therein Y11, Y12, Y13, Y14, Y15, Y16, Y17 are high level；When the signal L3-L1 of input is not 000,001,010,011,100, 101, when one in 110, in other words, when the voltage class encoded radio of input is invalid, make Y11, Y12 of output, Y13, Y14, Y15, Y16, Y17 are low level, that is, the triggering gating controlling value exported is invalid.

If it is required that output 7 triggerings gating controlling value for low level it is effective, the output signal of 1 logic true value table of table In 1 need to change into 0,0 and need to change into 1；When realizing its function with ROM memory, the content of storage unit is anti-according to table 1 Phase.

The ROM memory of Fig. 6 (a) can be equally used for being directed to and the one-to-one voltage in other quantity voltage class section Grade encoded radio is decoded.For example, being 4 voltage class encoded radios for input, output is that 10 triggerings gate controlling value When example is decoded, 4 voltage class encoded radio L1-L4 are sequentially connected to the address input end A0-A3 of ROM memory；ROM The data output end of memory is the signal output end for decoding gating unit, and 10 data output D0-D9 are respectively 10 touchings Hair gating controlling value, 10 output signal Y11-Y110 composition triggering gating controlling value P2.The content of expansion tables 1, stores ROM When the storage unit of device is followed successively by 0000,0001,0010,0011,0100,0101,0110,0111,1000,1001, make respectively The position D0, D1, D2, D3, D4, D5, D6, D7, D8, D9 in storage unit is 1, other positions are 0；Address be non-zero 000,0001, 0010, all positions are 0 in 0011,0100,0101,0110,0111,1000,1001 storage unit；The signal L4- then inputted L1 be respectively with 10 voltage class sections it is one-to-one 0000,0001,0010,0011,0100,0101,0110,0111, 1000, when 1001 voltage class encoded radio, in 10 triggerings of output gating controlling value, make respectively Y11, Y12 therein, Y13, Y14, Y15, Y16, Y17, Y18, Y19, Y110 are high level；When the signal L4-L1 of input is not 0000,0001,0010, 0011, when one in 0100,0101,0110,0111,1000,1001, in other words, the voltage class encoded radio of input is invalid When, making Y11, Y12, Y13, Y14, Y15, Y16, Y17, Y18, Y19, Y110 of output is low level, that is, the triggering choosing exported Logical controlling value is invalid.

Table 1

In Fig. 6 (b), FD6 is that the encoded radio input terminal of the line decoder of four lines -16 CD4514, CD4514 are decoding gating The signal input part of unit, A, B, C, D are sequentially connected to 4 voltage class encoded radio L1-L4；The decoding output end of CD4514 is The signal output end of gating unit is decoded, minimum 10 decoding S0-S9 is respectively Y11-Y110, Y11-Y110 composition triggering choosing Logical controlling value P2.Table 2 is logic true value table corresponding with Fig. 6 (b), wherein the chip select terminal INH input of CD4514 is that logical zero is (low Level), latch control terminal ST input is logic 1 (high level), and CD4514 is made normally to execute coding tasks, unlisted in table 2； The S10-S15 of CD4514 is not used in this embodiment, unlisted in table 2.

In table 2,10 triggerings gating controlling value of output is that high level is effective.In Fig. 6 (b), signal L4-L1 points of input Not Wei it is one-to-one 0000 with 10 voltage class sections, 0001,0010,0011,0100,0101,0110,0111,1000, When 1001 voltage class encoded radio, in 10 triggerings of output gating controlling value, make respectively Y11, Y12 therein, Y13, Y14, Y15, Y16, Y17, Y18, Y19, Y110 are high level；When the signal L4-L1 of input is not 0000,0001,0010,0011, 0100, when one in 0101,0110,0111,1000,1001, in other words, when the voltage class encoded radio of input is invalid, make Y11, Y12, Y13, Y14, Y15, Y16, Y17, Y18, Y19, Y110 of output are low level, that is, the triggering gating control exported Value is invalid.

Table 2

If it is required that output 10 triggerings gating controlling value for low level it is effective, can in Fig. 6 (b) CD4514 it is defeated Increase level-one phase inverter behind S0-S9 out to realize.

The circuit of Fig. 6 (b) can be equally used for being directed to and the one-to-one voltage class in other quantity voltage class section Encoded radio is decoded.For example, be 3 voltage class encoded radios for input, output be 7 triggerings gating controlling value examples into When row decoding, A, B, C of CD4514 is sequentially connected to 3 voltage class encoded radios L1-L3, D and connects logical zero；The decoding of CD4514 Output end is the signal output end for decoding gating unit, and minimum 7 decoding S0-S6 is respectively Y11-Y17, Y11-Y17 composition Triggering gating controlling value P2.

Decode the ROM memory or decoder in gating unit, or the electricity formed with other logical devices Road is all made of positive single supply+VCC power supply.

Fig. 7 is delay protection unit embodiment block diagram, wherein delay detection module YC1 respectively gates the triggering of input Controlling value Y11-Y1M carries out triggering gating controlling value Y21-Y2M, Y21-Y2M after signal delay is postponed and forms P3；YC1 Module carries out Edge check to the signal Y11-Y1M of triggering gating controlling value respectively simultaneously and obtains Edge check signal Y31-Y3M； The Edge check signal Y31-Y3M of input is not converted to not trigger region and controls signal by trigger region control signal generator module YC2 P4 output.In the embodiment block diagram of Fig. 7, the input of delay detection module YC1 is that Fig. 6 (a) decodes the output of gating unit embodiment 1 Triggering gate controlling value when, M be equal to 7；In the embodiment block diagram of Fig. 7, the input of delay detection module YC1 is Fig. 6 (b) decoding When the triggering that gating unit embodiment 2 exports gates controlling value, M is equal to 10.

Fig. 8 is the delay detection circuit embodiment 1 for gating control value signal Y11 in delay detection module needle to triggering.Electricity Hinder RY0, capacitor CY0, driving gate FY0 realize the signal delay of Y11 is obtained Y11 it is delayed after signal Y21.Resistance RY1, Capacitor CY1, diode DY1, phase inverter FY1 composition are directed to the rising edge detection circuit of input signal Y 11, and phase inverter FY1's is defeated Out in signal YP1, the pulse of corresponding negative pulse form is exported after Y11 rising edge.Resistance RY2, capacitor CY2, Diode DY2, phase inverter FY2, FY3 composition are directed to the failing edge detection circuit of input signal Y 11, the output letter of phase inverter FY3 In number YP2, the pulse of corresponding negative pulse form is exported after Y11 failing edge.NAND gate FY4 is accomplished that negative patrol Collect or logic function, when there is negative pulse generation in input signal Y P1, YP2, the Edge check signal of NAND gate FY4 output Positive pulse is generated in Y31, i.e., when input signal Y 11 changes, NAND gate FY4 exports the pulse of a positive pulse form. In Fig. 8, the device of driving gate FY0, phase inverter FY1, phase inverter FY3 preferably with Schmidt's input, for example, phase inverter selects 74HC14, CD40106 etc.；Driving gate FY0 can be made of 2 phase inverters with Schmidt's input.

Fig. 9 is the delay detection circuit embodiment 2 for gating control value signal Y11 in delay detection module needle to triggering.Instead Phase device FY5, resistance RY3, capacitor CY3 carry out reverse phase and delay to input signal Y 11, obtain the delayed inversion signal of Y11 YP0；Phase inverter FY6 again by YP0 reverse phase, obtain Y11 it is delayed after signal Y21.NAND gate FY7 input signal be Y11 and The pulse of negative pulse form corresponding with Y11 rising edge is generated in Y11 delayed inversion signal YP0, output signal YP1； Or the signal of door FY8 input is the delayed inversion signal YP0 of Y11 and Y11, is generated and Y11 failing edge phase in output signal YP2 The pulse for the negative pulse form answered.NAND gate FY9 is accomplished that negative logic or logic function, when input signal Y P1, YP2 In when having negative pulse generation, generate positive pulse in the Edge check signal Y31 of NAND gate FY9 output, i.e., when input signal Y 11 has When variation, NAND gate FY9 exports the pulse of a positive pulse form.In Fig. 9, phase inverter FY6, NAND gate FY7 or door FY8 It is preferred that the device with Schmidt's input, for example, phase inverter selects 74HC14, CD40106 etc.；NAND gate selection 74HC132, CD4093 etc.；Or door selects 74HC7032, or 2 phase inverters with Schmidt's input of selection and 1 NAND gate to come in fact Existing or Men Gongneng.

Figure 10 is the delay detection circuit embodiment 3 for gating control value signal Y11 in delay detection module needle to triggering, In the rising edge detection circuit for input signal Y 11 formed by resistance RY1, capacitor CY1, diode DY1, phase inverter FY1, and Failing edge detection circuit for input signal Y 11 is formed by resistance RY2, capacitor CY2, diode DY2, phase inverter FY2, FY3, And it is identical as the embodiment 1 of Fig. 8 using the circuit of NAND gate FY4 output Edge check signal Y31.In Figure 10, by phase inverter FY11, FY12, FY13, FY14 realize the signal delay of Y11 is obtained Y11 it is delayed after signal Y21.

The embodiment 1-3 of Fig. 8, Fig. 9, Figure 10 are the delay detection electricity for the signal Y11 in triggering gating controlling value Road is inputted for the delay detection circuit of other signals Y12-Y1M in triggering gating controlling value with being directed in corresponding embodiment Signal Y11 carries out the circuit structure of delay detection as function.Delay detection circuit can also use other met the requirements Circuit realizes its function.

Trigger region, which does not control the function of signal generator module, is, when the Edge check for triggering gating controlling value of input Any one of signal is multiple when having pulse relevant to edge, does not export one in trigger region control signal Pulse.Figure 11 is that trigger region does not control signal generator module embodiment, realizes phase by the nor gate FY10 for including M input The function of answering, the input signal of nor gate FY10 are Edge check signal Y31-Y3M, export and control signal P4 for not trigger region. In Figure 11 embodiment, the pulse of trigger region control signal output is not negative pulse, i.e., trigger region control signal low level does not have Effect；Nor gate FY10 is changed into or when door, the pulse of trigger region control signal output is positive pulse.If the edge of input The pulse relevant to edge that has generated in detection signal Y31-Y3M is negative pulse, then the nor gate FY10 in Figure 11 should NAND gate is changed to either with door, realizes under negative logic or logic function.

All gate circuits in delay protection unit are all made of single supply+VCC power supply.Figure 12 is in the middle part of delay protection unit Split-phase closes waveform diagram.From principle and the requirement of decoding gating unit it is found that its triggering gating controlling value exported occurs just When often changing, change each time with 2.In Figure 12, a rising edge occurs respectively and changes by the Y11 in triggering gating controlling value Become and failing edge changes, Y21 is the triggering gating controlling value after the Y11 delay T1 time；In the delay detection circuit embodiment of Fig. 8 In 1, T1 is determined by the product size (i.e. time constant size) of resistance RY0 and capacitor CY0；It is real in the delay detection circuit of Fig. 9 It applies in example 2, T1 is determined by the product size of resistance RY3 and capacitor CY3；In the delay detection circuit embodiment 3 of Figure 10, T1 by The gate delay time size of phase inverter FY11, FY12, FY13, FY14 itself determine.In Figure 12, because of Y11 rising edge in signal YP1 The negative pulse width of generation is T2；In the delay detection circuit embodiment 1 of Fig. 8 and the delay detection circuit embodiment 3 of Figure 10, T2 is determined by the product size of resistance RY1 and capacitor CY1；In the delay detection circuit embodiment 2 of Fig. 9, T2 by resistance RY3 with The product size of capacitor CY3 determines.In Figure 12, because the negative pulse width that Y11 failing edge generates is T3 in signal YP2；Fig. 8's In the detection circuit embodiment 1 that is delayed and the delay detection circuit embodiment 3 of Figure 10, T3 is big by resistance RY2 and the product of capacitor CY2 Small decision；In the delay detection circuit embodiment 2 of Fig. 9, T3 is determined by the product size of resistance RY3 and capacitor CY3.Figure 12 In, 2 positive pulses in Edge check signal Y31 respectively with the negative pulse and signal that generate in signal YP1 by Y11 rising edge Because the negative pulse that Y11 failing edge generates corresponds in YP2.The Y11 being located in Figure 12 triggering gating controlling value occurs rising edge and changes When, triggering gates the Y12 in controlling value and failing edge change occurs, its corresponding Edge check signal Y32 accordingly generates one at this time A positive pulse；If a rising edge occurs simultaneously and changes by the Y12 in triggering gating controlling value when failing edge, which occurs, for Y11 changes, A positive pulse is accordingly generated in its corresponding Edge check signal Y32 at this time；During this period, other touchings except Y11, Y12 There is no variation, edges corresponding with other triggering gating control value signals except Y11, Y12 to examine for hair gating control value signal Surveying signal is low level, is not drawn into Figure 12.According to not trigger region above-mentioned control signal generator module or logic function, The simple venation is not generated jointly in the single pulse width of trigger region control signal generator module output and the Edge check signal of input Widest pulse width is identical in the input pulse of punching, and this width difference is because determining T2, T3 in different delayed time detection circuit Resistance, capacitance difference caused by.In Figure 12, the 1st positive pulse in the 1st positive pulse ratio Y32 in Y31 is wide, Y31 In the 2nd positive pulse ratio Y32 in the 2nd positive pulse it is narrow, not trigger region control signal P4 in the 1st negative pulse width with The 1st positive pulse width in Edge check signal Y31 is consistent, not the 2nd negative pulse width in trigger region control signal P4 It is consistent with the 2nd positive pulse width in Edge check signal Y32.

In the delay detection circuit embodiment 1 of Fig. 8 delay protection unit, triggering gating controlling value changes to correspondence Not trigger region control signal pulse forward position delay time be gate circuit FY1, FY4 and Figure 11 in FY10 delay time The sum of or gate circuit FY3, FY4 and Figure 11 in FY10 the sum of delay time；By the product of resistance RY0 and capacitor CY0 The range of choice of the signal delay time T1 for the triggering gating controlling value that size determines is the ms order of magnitude, it is clear that is greater than triggering choosing Logical controlling value changed to the delay time in corresponding not trigger region control signal pulse forward position, i.e. triggering gating controlling value Signal delay is later than the forward position moment of the pulse exported after triggering gating controlling value changes at the time of change.It is stringent next It says, T1 actually includes the sum of lag time and the delay time of gate circuit FY0 caused by resistance RY0 and capacitor CY0. In Fig. 8 embodiment 1, in selection parameter, the value of the value and T3 that make T2 is all larger than the value of T1, makes triggering gating control value signal After meeting the not trigger region control signal pulse exported after changing earlier than triggering gating controlling value at the time of delay changes Along the requirement at moment.

It is delayed in detection circuit embodiment 2 in the delay protection unit of Fig. 9, triggering gating controlling value changes to right When the delay time in the not trigger region control signal pulse forward position answered is the delay of FY10 in gate circuit FY7, FY9 and Figure 11 Between the sum of or gate circuit FY8, FY9 and Figure 11 in FY10 the sum of delay time；T1 is the numerical value of the ms order of magnitude, is shown So, the signal delay time T1 of the triggering gating controlling value determined at this time by the product size of resistance RY3 and capacitor CY3 is greater than touching Hair gating controlling value changed to the delay time in corresponding not trigger region control signal pulse forward position, the i.e. control of triggering gating Value signal delay processed is later than the forward position moment of the pulse exported after triggering gating controlling value changes at the time of change.Fig. 9 Delay detection circuit embodiment 2 in, triggering gating controlling value signal delay change at the time of with triggering gating controlling value The rear of the pulse exported after change is influenced by signal YP0 change along the moment；Triggering gating controlling value signal delay changes At the time of change for signal YP0 after delay again through gate circuit FY6；The pulse that triggering gating controlling value exports after changing It is rear along the moment be the sum of delay time again through FY10 in gate circuit FY7, FY9 and Figure 11, or letter after signal YP0 changes The sum of delay time again through FY10 in gate circuit FY8, FY9 and Figure 11 after number YP0 changes；Obviously, triggering gating control at this time The rear of pulse exported after changing at the time of value signal delay changes than triggering gating controlling value few passes through 2 along the moment The delay time of gate circuit, controlling value need to be gated earlier than triggering by meeting at the time of triggering gating controlling value signal delay changes The rear requirement along the moment of the pulse exported after change.

Figure 13 is Fig. 2 auto compensating type main circuit embodiment 1 to be triggered in trigger unit, or trigger Fig. 3 Autocompensation The trigger circuit embodiment of bidirectional thyristor SR1 in formula main circuit embodiment 2, by altemating trigger optocoupler UG1, resistance RG1, resistance RG2 composition, Trig control signal P51 low level are effective.Altemating trigger optocoupler UG1 can choose MOC3022, MOC3023, The phase shifts type bidirectional thyristor output photoelectric coupler such as MOC3052, MOC3053.Power supply+VCCK is the control of protected driving unit Controllable power supply.Trigger bidirectional thyristor SR2-SR6 in Fig. 2 auto compensating type main circuit embodiment 1, or triggering figure The electricity of the trigger circuit of bidirectional thyristor SR2-SR8 and triggering bidirectional thyristor SR1 in 3 auto compensating type main circuit embodiments 2 Line structure is the same.The altemating trigger optocoupler UG1 of Figure 13 is exchanged from the trigger pulse that G11, G12 are exported with other in trigger unit The trigger pulse of triggering optocoupler output collectively constitutes trigger signal P6.

Figure 14 is the embodiment 1 for triggering gating control cells, is mended for Fig. 2 auto compensating type main circuit embodiment 1 Control is repaid, AC supply voltage fluctuation range is 220V ± 10%, it is desirable that is stablized and is exported in the range of 220V ± 2%. In Figure 14, the triggering gating controlling value Y21-Y27 high level of triggering gating control cells input is effective, 14 diode D11- D72, triggering gating control alignment Y21-Y27, triggering driving line VK1-VK6 composition diode triggered gate matrix, resistance RS1-RS6, triode VS1-VS6 form the driving circuit of Trig control signal P51-P56, form triggering by P51-P56 at this time Control signal P5.

Table 3 is the triggering gating control function table for triggering gating control cells embodiment 1, lists 7 triggering gatings 7 significance bits in controlling value, i.e., 7 effective triggerings gate bidirectional thyristor in thyristor switch group corresponding to controlling values On-off assembled state.7 effective triggering gating controlling values are corresponding with voltage class section 1-7, trigger gating control cells On off operating mode according to bidirectional thyristor in triggering gating controlling value control auto compensating type main circuit embodiment 1 carries out corresponding Voltage compensation；In table 3,1 represents corresponding bidirectional thyristor need to be in the conductive state, and 0, which represents corresponding bidirectional thyristor, is in Off state.

The function connects that diode triggered gating matrix in Figure 14 is required according to table 3, are gated controlling value Y21- by triggering The control of Y27；I.e. when every triggering gating control alignment is effective with its, corresponding on-off assembled state needs to be connected two-way brilliant lock It is respectively provided with diode between the triggering driving line of pipe to be attached, when certain root triggering gating control alignment is effective, by two poles Pipe keeps the triggering driving line signal for needing to be connected bidirectional thyristor effective.For example, input voltage be minimum voltage class 1, That is when Y21 is effectively high level, diode D11, D12 in triggering gating matrix are connected, and triggering driving line VK1, VK6 are height Level controls triode VS1, VS6 conducting respectively makes P51, P56 effectively go to open bidirectional thyristor SR1, SR6, triggering gating square Other diodes cut-off in battle array, control are turned off other bidirectional thyristors, the excitation wire of TB1 are done using output voltage U12+U23 It encloses voltage and carries out positive compensation；Input voltage is voltage class 2, i.e. Y22 when being effectively high level, two in triggering gating matrix The conducting of pole pipe D21, D22, triggering driving line VK3, VK6 controls triode VS3, VS6 conducting for high level respectively makes P53, P56 It effectively goes to open bidirectional thyristor SR3, SR6, other diodes cut-off in triggering gating matrix, control turns off other two-way crystalline substances Brake tube carries out positive compensation only with the magnet exciting coil voltage that output voltage U23 is TB1；Input voltage is voltage class 4, i.e. When Y24 is effectively high level, diode D41, D42 in triggering gating matrix are connected, and triggering driving line VK5, VK6 are high electric Divide equally not Kong Zhi triode VS5, VS6 conducting so that P55, P56 is effectively removed to open bidirectional thyristor SR5, SR6, triggering gating matrix In the cut-off of other diodes, control turns off other bidirectional thyristors, realizes 0 voltage compensation, i.e. the magnet exciting coil voltage of TB1 is 0；Input voltage is voltage class 5, i.e. Y25 when being effectively high level, diode D51, D52 conducting in triggering gating matrix, Triggering driving line VK2, VK3 controls triode VS2, VS3 conducting for high level respectively makes P52, P53 effectively go to open two-way crystalline substance Brake tube SR2, SR3, triggering gate other diodes cut-off in matrix, and control turns off other bidirectional thyristors, only with reversed The magnet exciting coil voltage that output voltage U12 is TB1 carries out Contrary compensation；Etc..

Table 3

Figure 15 be trigger gating control cells embodiment 2, equally for Fig. 2 auto compensating type main circuit embodiment 1 into Row compensation control, AC supply voltage fluctuation range are 220V ± 10%, it is desirable that are stablized defeated in the range of 220V ± 2% Out.In Figure 15, the triggering gating controlling value Y21-Y27 low level of triggering gating control cells input is effective, 14 diodes D11-D72, triggering gating control alignment Y21-Y27, triggering driving line P51-P56 composition diode triggered gate matrix, by Triggering gating matrix directly exports the effective Trig control signal P51-P56 of low level.Without triggering control letter in the present embodiment 2 The driving circuit of number P51-P56.

The function connects that diode triggered gating matrix in Figure 15 is required according to table 3, are gated controlling value Y21- by triggering The control of Y27；For example, input voltage is minimum voltage class 1, i.e. Y21 when being effectively low level, in triggering gating matrix Diode D11, D12 conducting make P51, P56 become effective low level respectively and go to open bidirectional thyristor SR1, SR6, triggering choosing Other diodes cut-off in logical matrix, control are turned off other bidirectional thyristors, are encouraged using output voltage U12+U23 TB1 Coil voltage carries out positive compensation；Input voltage is voltage class 2, i.e. Y22 when being effectively low level, in triggering gating matrix Diode D21, D22 conducting, so that P53, P56 is become effective low level respectively and go to open bidirectional thyristor SR3, SR6, trigger Other diodes cut-off in matrix is gated, control turns off other bidirectional thyristors, encourages only with output voltage U23 TB1 Coil voltage carries out positive compensation；Input voltage is voltage class 4, i.e. Y24 when being effectively low level, in triggering gating matrix Diode D41, D42 conducting, so that P55, P56 is become effective low level respectively and go to open bidirectional thyristor SR5, SR6, trigger Other diodes cut-off in matrix is gated, control turns off other bidirectional thyristors, realizes 0 voltage compensation；Input voltage is electricity When pressure grade 7, i.e. Y27 is effectively low level, diode D71, D72 in triggering gating matrix are connected, and respectively become P52, P55 It goes to open bidirectional thyristor SR2, SR5 at effective low level, other diodes cut-off in triggering gating matrix, control shutdown Other bidirectional thyristors carry out Contrary compensation using the magnet exciting coil voltage that reversed output voltage U12+U23 is TB1；Etc..

In Figure 15, the low level in triggering gating controlling value Y21-Y27 needs to directly drive the defeated of 2 altemating trigger optocouplers Enter to hold lumination of light emitting diode；Whens altemating trigger optocoupler selects MOC3022, MOC3052 etc., the driving current of 20mA is needed；It hands over Whens stream triggering optocoupler selection MOC3023, MOC3053 etc., the driving current of 10mA is needed.

Figure 16 is the embodiment 3 for triggering gating control cells, is mended for Fig. 3 auto compensating type main circuit embodiment 2 Control is repaid, AC supply voltage fluctuation range is 220V+10% to 220V-20%, it is desirable that is stablized the model in 220V ± 2% Enclose interior output.In Figure 16, the triggering gating controlling value Y21-Y210 high level of triggering gating control cells input is effective, and 20 two Pole pipe D01-D92, triggering gating control alignment Y21-Y210, triggering driving line VK1-VK8 composition diode triggered gate square Battle array, resistance RS1-RS8, triode VS1-VS8 form the driving circuit of Trig control signal P51-P58, at this time by P51-P58 group At Trig control signal P5.

Table 4 is the triggering gating control function table for triggering gating control cells embodiment 3, lists 10 triggering gatings 10 significance bits in controlling value, i.e., 10 effective triggerings gate two-way brilliant lock in thyristor switch group corresponding to controlling values The on-off assembled state of pipe.10 effective triggering gating controlling values are corresponding with voltage class 1-10, trigger gating control cells On off operating mode according to bidirectional thyristor in triggering gating controlling value control auto compensating type main circuit embodiment 2 carries out corresponding Voltage compensation；In table 4,1 represents corresponding bidirectional thyristor need to be in the conductive state, and 0, which represents corresponding bidirectional thyristor, needs to locate In off state.

Table 4

The function connects that diode triggered gating matrix in Figure 16 is required according to table 4, are gated controlling value Y21- by triggering The control of Y210；For example, input voltage is voltage class 7, i.e. Y27 when being effectively high level, two poles in triggering gating matrix Pipe D71, D72 conducting, triggering driving line VK7, VK8 controls triode VS7, VS8 conducting for high level respectively P57, P58 Effect goes to open bidirectional thyristor SR7, SR8, other diodes cut-off in triggering gating matrix turns off other bidirectional thyristors, Realize that 0 voltage compensation, i.e. the magnet exciting coil voltage of TB1 are 0；Input voltage is voltage class 8, i.e. Y28 when being effectively high level, Diode D81, D82 in triggering gating matrix is logical, triggering driving line VK2, VK3 be high level control respectively triode VS2, VS3 conducting makes P52, P53 effectively go to open bidirectional thyristor SR2, SR3, other diodes cut-off in triggering gating matrix is closed Break other bidirectional thyristors, carries out Contrary compensation only with the magnet exciting coil voltage that reversed output voltage U12 is TB1；Input electricity Pressure is when be voltage class 9, i.e. Y29 be effectively high level, and diode D91, D92 conducting in triggering gating matrix are triggered and driven Line VK6, VK7 be high level control respectively triode VS6, VS7 conducting make P56, P57 effectively go to open bidirectional thyristor SR6, SR7, triggering gate other diodes cut-off in matrix, turn off other bidirectional thyristors, do only with reversed output voltage U34 The magnet exciting coil voltage of TB1 carries out Contrary compensation；Input voltage is voltage class 10, i.e. Y210 when being effectively high level, triggering Gate matrix in diode D01, D02 conducting, triggering driving line VK4, VK5 be high level control respectively triode VS4, VS5 conducting makes P54, P55 effectively go to open bidirectional thyristor SR4, SR5, other diodes cut-off in triggering gating matrix is closed Break other bidirectional thyristors, carries out Contrary compensation only with the magnet exciting coil voltage that reversed output voltage U23 is TB1；Input electricity Pressure is when be voltage class 6, i.e. Y26 be effectively high level, and diode D61, D62 conducting in triggering gating matrix are triggered and driven Line VK1, VK4 be high level control respectively triode VS1, VS4 conducting make P51, P54 effectively go to open bidirectional thyristor SR1, SR4, triggering gate other diodes cut-off in matrix, turn off other bidirectional thyristors, be TB1 only with output voltage U12 Magnet exciting coil voltage carry out positive compensation；Input voltage is voltage class 4, i.e. Y24 when being effectively high level, triggering gating square Diode D41, D42 conducting in battle array, triggering driving line VK3, VK6 are that high level controls triode VS3, VS6 conducting respectively P53, P56 is set effectively to go to open bidirectional thyristor SR3, SR6, other diodes cut-off in triggering gating matrix turns off other Bidirectional thyristor carries out positive compensation only with the magnet exciting coil voltage that output voltage U23 is TB1；Input voltage is voltage etc. When 3, i.e. Y23 of grade is effectively high level, diode D31, D32 in triggering gating matrix are connected, triggering driving line VK1, VK6 Controlling triode VS1, VS6 conducting respectively for high level makes P51, P56 effectively go to open bidirectional thyristor SR1, SR6, triggering choosing Other diodes cut-off in logical matrix, is turned off other bidirectional thyristors, the excitation wire of TB1 is done using output voltage U12+U23 It encloses voltage and carries out positive compensation；Input voltage is voltage class 1, i.e. Y21 when being effectively high level, two in triggering gating matrix The conducting of pole pipe D11, D12, triggering driving line VK1, VK8 controls triode VS1, VS8 conducting for high level respectively makes P51, P58 It effectively goes to open bidirectional thyristor SR1, R8, other diodes cut-off in triggering gating matrix turns off other bidirectional thyristors, Positive compensation is carried out using the magnet exciting coil voltage that output voltage U12+U23+U34 is TB1；Etc..

When the triggering gating controlling value Y21-Y210 low level in table 4 is effective, it can equally trigger and gate according to Figure 15 The method of control unit embodiment 2, by 20 diode D01-D92, triggering gating control alignment Y21-Y210, triggering control row Line P51-P58 composition triggering gating matrix, directly exports the effective Trig control signal P51- of low level by triggering gating matrix P58.At this point, the low level in triggering gating controlling value Y21-Y210 is also required to directly drive the input of 2 altemating trigger optocouplers Hold lumination of light emitting diode；Whens altemating trigger optocoupler selects MOC3022, MOC3052 etc., the driving current of 20mA is needed；Exchange Whens triggering optocoupler selection MOC3023, MOC3053 etc., the driving current of 10mA is needed.

Figure 17 is error detection judgement unit embodiment, gates controlling value P3, i.e. effective 10 triggerings of high level for triggering Gating controlling value Y21-Y210 is differentiated that the triggering of output gating controlling value differentiates that signal P7 high level is effective, low level without Effect；I.e. output P7 is 1, indicates that triggering gating controlling value is effective；Exporting P7 is 0, indicates that triggering gating controlling value is invalid.Figure 17 In, FD7 is that the ROM with the input of 10 bit address and 1 data output differentiates memory, and 10 triggerings gate controlling value Y21- Y210 is respectively connected to its 10 bit address input A0-A9, and triggering gating controlling value differentiates that signal P7 is defeated from its data output end D0 Out.Table 5 is the memory cell content tables of data that ROM differentiates memory in the logic true value table and Figure 17 of error detection judgement unit.

The function of error detection judgement unit be when having in the position M for judging triggering gating controlling value and when only one effective, Enable output triggering gating controlling value differentiate signal P7 it is effective, otherwise enable output triggering gate controlling value differentiate signal P7 without Effect；I.e. triggering gating controlling value the position M in only have one it is effective when, or do not have one it is effective when, enable the triggering of output It gates controlling value and differentiates that signal P7 is invalid.ROM differentiates that the content of Memory Storage Unit is written according to the data of table 5 in Figure 17, In table 5,10 triggering gating equal high level of controlling value Y21-Y210 are effective, and low level is invalid；The triggering of output gates controlling value Differentiate that signal P7 high level is effective, low level is invalid；Have in input signal Y 21-Y210 and when only 1 is 1, output P7 is 1； When Y21-Y210 is other inputs, output P7 is 0.If 10 triggerings gating equal low level of controlling value Y21-Y210 of input has Effect, high level is invalid, then all 0 change 1,1 becomes 0 to 10 row address contents before inputting in table 5.If necessary to the touching of output Hair gating controlling value differentiates that signal P7 low level is effective, and high level is invalid, then by all 0 changes of the content of 1 column data last in table 5 1,1 becomes 0.

Table 5

When error detection judgement unit needs to be differentiated for other digits triggering gating controlling value P3, can equally it use ROM differentiates that memory carries out.The triggering gating controlling value P3 that table 6 inputs has 7, and equal high level is effective, and low level is invalid；Output Triggering gating controlling value differentiate signal P7 high level it is effective, low level is invalid.Using with the input of 7 bit address and 1 data The ROM of output differentiates that memory, 10 triggering gating controlling value Y21-Y27 are respectively connected to its 7 bit address input A0-A6, touching Hair gating controlling value differentiates that signal P7 is exported from its data output end D0；ROM differentiates the content of Memory Storage Unit according to table 6 Content write-in.

The logic function of error detection judgement unit can also be realized in other ways.For example, the essence of table 5, table 6 is combination Logic true value table, can with or NOT logic door to combine realize the function.ROM in error detection judgement unit differentiates storage Device, or logic gate when use logic gate realization function, are all made of single supply+VCC1 power supply.

Table 6

Figure 18 is protection drive unit embodiment, if the triggering gating controlling value of input differentiates that signal P7 high level is effective, That is P7 is that 1 expression triggering gating controlling value is effective；P7 low level is invalid, i.e. P7 is that 0 expression triggering gating controlling value is invalid.If defeated The not trigger region control signal P4 low level entered is effective, i.e., when P4 is equal to 0, shows that AC supply voltage has fluctuation, make electricity Pressure grade encoded radio changes, and then triggering gating controlling value is made to produce variation, needs to carry out double in thyristor switch group Switching to thyristor on off operating mode changes compensation way；In handoff procedure, to avoid because bidirectional thyristor is delayed to turn off Factor make in ipsilateral thyristor while thering are 2 or 2 or more thyristors to simultaneously turn on, cause power supply short circuit, do not triggering Area controls the signal valid period, i.e. when the P4 of embodiment is equal to 0, all bidirectional thyristors in cutoff thyristor switching group.

In Figure 18, triode VT, relay coil KA, freewheeling diode VD, resistance RK1 composition protection control circuit, three Pole pipe VK1, triode VK2, resistance RK2, resistance RK3 and door FY21 form the controllable power supply control circuit of trigger unit, with Door FY21 is powered using single supply+VCC.+ VCC2 be controllable power supply in the power supply and trigger unit of relay coil+ The source current of VCCK.When the triggering gating controlling value of input differentiates that signal P7 is low level, i.e., when triggering gating controlling value is invalid, Low level is exported with door FY21, and triode VK1, VK2 cut-off, controllable power supply+VCCK power loss, trigger unit do not power electricity Source does not work, i.e., does not issue the trigger pulse of triggering bidirectional thyristor；P7 is that low level controls triode VT cut-off simultaneously, after Electric apparatus coil KA power loss makes Fig. 2 auto compensating type main circuit embodiment 1, or makes Fig. 3 auto compensating type main circuit embodiment Relay normally open switch KA-1 in 2 is disconnected, i.e. the input side supply voltage of control disconnection auto-transformer, makes auto-transformer Voltage between all taps is 0, realizes the protection to thyristor switch group；Relay normally closed switch KA-2 closure, makes to apply Voltage on TB1 magnet exciting coil is 0.When the failures such as analog-to-digital conversion coding unit, decoding gating unit cause triggering to be selected When logical controlling value is invalid, whether the not trigger region control signal P4 no matter inputted is effective, and protection driving unit all cut off triggering list The power supply of member stops the trigger pulse for issuing all bidirectional thyristors, while controlling the input side for disconnecting auto-transformer Supply voltage realizes the protection to thyristor switch group.Differentiate that signal P7 is high level when the triggering of input gates controlling value, i.e., When triggering gating controlling value is effective, control triode VT conducting, relay coil KA obtains electric, makes Fig. 2 auto compensating type main circuit Embodiment 1, or it is closed the relay normally open switch KA-1 in Fig. 3 auto compensating type main circuit embodiment 2, relay is normal Make and break is closed KA-2 and is disconnected, and circuit is in compensation work state.When triggering gating controlling value is effective, i.e. P7 is 1, and not trigger region control Signal processed is effective, i.e. when P4 is equal to 0, exports low level, triode VK1, VK2 cut-off, controllable power supply+VCCK with door FY21 Power loss, trigger unit do not work, i.e., do not issue the trigger pulse of triggering bidirectional thyristor, all double in cutoff thyristor switching group To thyristor, show that AC supply voltage has fluctuation at this time, so that triggering gating controlling value is produced variation, need to carry out brilliant lock The switching of pipe electronic switch changes compensation way.When triggering gating controlling value is effective, i.e. P7 is 1, and trigger region does not control signal In vain, i.e. when P4 is equal to 1, high level is exported with door FY21, triode VK1, VK2 are both turned on, and controllable power supply+VCCK is obtained Electricity, trigger unit work normally, by triggering gating control cells according to effective, corresponding with some voltage class section triggering Gating controlling value selects corresponding Trig control signal effective, and trigger unit is made to issue trigger pulse, controls thyristor switch group The on off operating mode of middle bidirectional thyristor, main circuit are in compensation work state corresponding with the voltage class section.

When the triggering gating controlling value of error detection judgement unit judgement input is invalid, protection driving unit issues protection control letter Number to main circuit, when thyristor switch group being made to be in guard mode, railway signal AC power source stable-pressure device is not to input voltage It compensates, the voltage of stable-pressure device output is the AC supply voltage inputted.Guard mode is in thyristor switch group When, if the triggering gating controlling value of error detection judgement unit judgement input reverts to useful signal, protect driving unit automatic Stop the guard mode of thyristor switch group, thyristor switch group is in compensation work state again.

From above embodiment and its course of work it is found that when input gates controlling value for effective triggering, triggering gating Control unit ensure that ipsilateral thyristor does not simultaneously turn in auto compensating type main circuit thyristor switch group, realizes thyristor Mutual lock control；It breaks down when because of analog-to-digital conversion coding unit, or logic error occurs in decoding gating unit, causes to touch When hair gating controlling value is invalid, protection driving unit is cutting off rapidly the power supply of trigger unit, is avoiding bidirectional thyristor wrong It misleads on the basis of causing short circuit, simultaneously switches off the input side supply voltage of auto-transformer, be in thyristor switch group Guard mode.When thyristor switch group is in guard mode, if error detection judgement unit judges that railway signal AC power source is steady Pressure device reenters normal logic control state, i.e. the triggering gating controlling value of error detection judgement unit judgement input reverts to When useful signal, then protects driving unit that can be automatically stopped the guard mode of thyristor switch group and it is made to be in compensation again Working condition.Above-mentioned function effectively strengthens the protection that railway signal AC power source stable-pressure device is directed to course of work exception Degree, keeps the work of the railway signal AC power source stable-pressure device relatively reliable.

Except for the technical features described in the specification, the other technologies of railway signal AC power source stable-pressure device are this field The routine techniques that technical staff is grasped.

Claims (10)

1. a kind of railway signal AC power source stable-pressure device, it is characterised in that:

By auto compensating type main circuit, analog-to-digital conversion coding unit, decoding gating unit, delay protection unit, triggering gating control Unit processed, trigger unit, error detection judgement unit, protection driving unit composition；

Auto compensating type main circuit includes compensator transformer, auto-transformer, thyristor switch group；

Analog-to-digital conversion coding unit carries out voltage sample, output voltage grade encoded radio to AC supply voltage；Decoding gating is single First input voltage grade encoded radio, output triggering gating controlling value；Delay protection unit input triggering gating controlling value, output are prolonged The triggering to lag gates controlling value and not trigger region control signal；Triggering after triggering gating control cells input delay gates control Value processed exports Trig control signal；Trigger unit inputs Trig control signal, and output trigger pulse controls in thyristor switch group The on-off of bidirectional thyristor；Triggering after error detection judgement unit input delay gates controlling value, and output triggering gating controlling value is sentenced Level signal；It protects driving unit input triggering gating controlling value to differentiate signal and not trigger region control signal, exports single to triggering The controllable power supply of member power supply；

The voltage class encoded radio is 4 binary values, and triggering gating controlling value is 10 binary values.

2. railway signal AC power source stable-pressure device according to claim 1, it is characterised in that: the compensation of compensator transformer Coil is connected in phase line；Auto-transformer has 4 output taps, after first 4 ipsilateral bidirectional thyristor one end are in parallel, even It is connected to one end of the magnet exciting coil of compensator transformer, the other end of first 4 ipsilateral bidirectional thyristors is respectively connected to 4 Export tap；After second 4 ipsilateral bidirectional thyristor one end are in parallel, it is connected to other the one of the magnet exciting coil of compensator transformer End, the other end of second 4 ipsilateral bidirectional thyristors are respectively connected to 4 output taps；The input of auto-transformer around Group is connected in parallel to the phase line output terminal and zero line side of stable-pressure device.

3. railway signal AC power source stable-pressure device according to claim 1, it is characterised in that: analog-to-digital conversion coding unit Including AC supply voltage detection circuit and analog to digital conversion circuit；AC power source electricity of the AC supply voltage detection circuit to input It is pressed with valid value to be sampled, obtains AC supply voltage sampled value；Analog to digital conversion circuit input ac power voltage sample value, it is defeated Voltage class encoded radio out.

4. railway signal AC power source stable-pressure device according to claim 3, it is characterised in that: analog to digital conversion circuit includes Biproduct parting A/D converter ICL7109, reference capacitance C13, automatic zero set capacitor C12, integrating capacitor C11, integrating resistor R11, Resistance RF1, resistance RF2, crystal oscillator XT1；The operation of ICL7109/holding end RUN, low byte enable end LBEN, test lead TEST connect High level, chip select terminal CE/LOAD, mode end MODE, high byte enable end HBEN, oscillator selection end OSC SEL connect low level； Crystal oscillator XT1 is connected to oscillator input OSC IN and oscillator output end the OSC OUT of ICL7109；Integrating capacitor C11, product One end connection composition integrating circuit of sub-resistance R11, automatic zero set capacitor C12, other end are respectively connected to the product of ICL7109 Divide capacitance terminal INT, buffer output end BUF, automatic zero set capacitance terminal AZ；The high-end IN HOL input of the Differential Input of ICL7109 AC supply voltage sampled value, Differential Input low side IN LO are connected to the reference voltage output end REF OUT of ICL7109；Resistance RF1, resistance RF2 divide the reference voltage of ICL7109, and reference voltage is obtained on resistance RF2, and reference voltage is input to Reference voltage positive input terminal REF IN+ and reference voltage negative input end the REF IN- of ICL7109；Reference capacitance C13 is connected to Reference capacitance positive input terminal REF CAP+ and reference capacitance negative input end the REF CAP- of ICL7109；The positive power source terminal of ICL7109 V+ is connected to positive supply；The negative power end V- of ICL7109 is connected to negative supply；The digital ground terminal and simulation ground terminal of ICL7109 is equal It is connected to publicly；The 4 output end outputs of highest of voltage class encoded radio from ICL7109.

5. railway signal AC power source stable-pressure device according to claim 4, it is characterised in that: decoding gating unit is four 16 line decoder CD4514 of line-；4 encoded radio input terminals of CD4514 input 4 voltage class encoded radios, and chip select terminal is defeated Enter low level, latch control terminal input high level；Minimum 10 decoding output ends output triggering gating controlling value of CD4514.

6. railway signal AC power source stable-pressure device according to claim 5, it is characterised in that: delay protection unit is by prolonging When detection module and not trigger region control signal generator module composition；It include 10 identical delay detections in delay detection module Circuit, it is each delay detection circuit input signal is postponed after output signal, while to input signal into Row Edge check exports Edge check signal；10 delay detection circuits carry out signal to 10 triggering gating controlling values respectively Delay, 10 triggerings after being postponed gate controlling value, and carry out Edge check to 10 triggering gating controlling values, obtain 10 Edge check signals；Trigger region control signal generator module, which is not converted to 10 Edge check signals of input, does not trigger Area controls signal output；Trigger region control signal generator module is not the nor gate FY10 with 10 input signal ends；Or it is non- 10 input signal ends of door FY10 are respectively connected to the Edge check signal output end in 10 delay detection circuits；Nor gate Trigger region does not control signal for the output end output of FY10.

7. railway signal AC power source stable-pressure device according to claim 6, it is characterised in that: in thyristor switch group altogether There are 8 bidirectional thyristors；Triggering gate control circuit includes that 10 triggering gating control alignments, 8 triggerings drive line and 20 A diode；10 triggering gating control alignments connect one to one with 10 triggering gating controlling values, a triggering gating control Value processed is corresponding to keep a triggering gating control alignment signal effective；8 triggering driving lines and 8 bidirectional thyristors one are a pair of It answers, a triggering driving line signal effectively correspondence keeps the Trig control signal of a bidirectional thyristor effective；Every triggering choosing When logical control alignment signal is effective, the on-off assembled state of bidirectional thyristor in a corresponding thyristor switch group；It is touched at every Corresponding on-off assembled state needs to control the triggering of bidirectional thyristor conducting when hair gating control alignment and effective alignment signal Diode is respectively provided between driving line to be attached, and when certain root triggering gating control alignment signal is effective, is made by diode The triggering driving line signal for needing to control bidirectional thyristor conducting is effective.

8. railway signal AC power source stable-pressure device according to claim 7, it is characterised in that: triggering gating control cells In 20 diodes using anode connect triggering gating control alignment, cathode connection triggering driving line by the way of, connect respectively It connects in the first triggering gating control alignment and the first triggering driving line, the 8th triggering driving line, the second triggering gating control Alignment and third triggering driving line, the 8th triggering driving line, third triggering gating control alignment and the first triggering driving row Line, the 6th triggering driving line, the 4th triggering gating control alignment and third triggering driving line, the 6th triggering driving line, 5th triggering gating control alignment and the 5th triggering driving line, the 8th triggering driving line, the 6th triggering gating control alignment With the first triggering driving line, the 4th triggering driving line, the 7th triggering gating control alignment drives line, the with the 7th triggering Between eight triggering driving lines, the 8th triggering gating control alignment and the second triggering driving line, third triggering driving line, the Nine triggering gating control alignments with the 6th triggering driving line, the 7th triggering driving line, the tenth triggering gating control alignment and Between 4th triggering driving line, the 5th triggering driving line；Every triggering driving line is connected to its NPN driving by resistance The base stage of triode, NPN driving triode export Trig control signal using open collector mode.

9. railway signal AC power source stable-pressure device according to claim 6, it is characterised in that: error detection judgement unit is ROM differentiates memory；10 bit address input terminals of ROM differentiation memory input the triggering gating control after 10 delays respectively Value, data output end output triggering gating controlling value differentiate signal.

10. railway signal AC power source stable-pressure device according to claim 9, which is characterized in that protect driving unit Function is: when triggering gating controlling value differentiates invalidating signal or trigger region control signal is not effective, controllable power supply Stop powering to trigger unit；When triggering gating controlling value differentiates effective signal and not trigger region control invalidating signal, controllably Power supply is powered to trigger unit.