CN209016084U - A kind of LED chip with solder electrode - Google Patents
A kind of LED chip with solder electrode Download PDFInfo
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- CN209016084U CN209016084U CN201821797170.7U CN201821797170U CN209016084U CN 209016084 U CN209016084 U CN 209016084U CN 201821797170 U CN201821797170 U CN 201821797170U CN 209016084 U CN209016084 U CN 209016084U
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Abstract
The utility model discloses a kind of LED chips with solder electrode, including substrate；Light emitting structure on substrate is set, and the light emitting structure includes the first semiconductor layer, active layer, the second semiconductor layer, reflecting layer and the first insulating layer set gradually on substrate；The first metal layer of first surface of insulating layer is set；Be arranged on the first metal layer with the second insulating layer in isolation channel；Second metal layer over the second dielectric is set；Through second metal layer and second insulating layer and the solder metal layer that is connected respectively at first electrode with second electrode；The wetability of the first metal layer is greater than the wetability of second metal layer.The solder metal layer of the utility model is reunited on the first metal layer, carries out secondary production, and then increase the thickness of solder metal layer.
Description
Technical field
The utility model relates to LED technology field more particularly to a kind of LED chips with solder electrode.
Background technique
LED (Light Emitting Diode, light emitting diode) be it is a kind of using Carrier recombination when release energy shape
At luminous semiconductor devices, LED chip is with power consumption is low, coloration is pure, the service life is long, small in size, the response time is fast, energy conservation and environmental protection
Equal many advantages.
Flip LED chips are compared with packed LED chip, and there is homogeneous current distribution, good heat dissipation, voltage to reduce, is high-efficient
Many advantages, such as.Therefore, it after flip LED chips are suggested, is widely paid close attention to rapidly, and achieves a series of progress.But
It is to be compared with packed LED chip, flip LED chips need the position of the welding chip on substrate when carrying out eutectic welding die bond
A little upper tin cream is set, then flip LED chips are placed on tin cream, after reflow soldering, flip LED chips are fixed on substrate
On.
But the mode of this tin cream can not be accurately controlled the dosage of tin cream, tin cream dosage, which has been lacked, is easy to cause weldering
It connects bad and voidage to rise, so as to cause chip VF high and ageing failure；Excessively then chip is in the welding process for tin cream amount
It is easy to happen the drift of position, to influence the yield of welded encapsulation.
Existing flip LED chips can obtain thickness by way of the deposited metal after chip surface photolithography patterning
Uniform solder layer metal, but since existing negative photoresist thickness is often within 5 μm, lead to the thickness of solder layer metal
Also it can only deposit within 5 μm, otherwise will be unable to carry out subsequent patterning process.But the solder layer metal within 5 μm can not expire
The requirement of sufficient eutectic welding, needs further to be promoted the thickness of solder layer on chip, can just guarantee to eliminate welding cavity, guarantee
The yield and stability of encapsulation.
Summary of the invention
Technical problem to be solved by the utility model is to provide a kind of LED chips with solder electrode, increase
The thickness of solder metal layer prevents that welding cavity occurs between electrode and substrate, improves welding yield and stability.
In order to solve the above-mentioned technical problem, the utility model provides a kind of LED chip with solder electrode, comprising:
Substrate；
Light emitting structure on substrate is set, and the light emitting structure includes the first semiconductor set gradually on substrate
Layer, active layer, the second semiconductor layer, reflecting layer and the first insulating layer；
The first metal layer of first surface of insulating layer is set, and the first metal layer one extends to the first semiconductor layer
And connect with the first semiconductor layer, to form first electrode, described the first metal layer a part extend to reflecting layer and with reflection
Layer connection, to form second electrode, wherein at least one isolation channel is equipped between first electrode and second electrode；
Be arranged on the first metal layer with the second insulating layer in isolation channel；
Second metal layer over the second dielectric is set；
Through second metal layer and second insulating layer and the solder metal layer that is connected respectively at first electrode with second electrode；
The wetability of the first metal layer is greater than the wetability of second metal layer.
As an improvement of the above scheme, the first metal layer is made of one of Ni, Au, Ti and In, with a thickness of
0.5-3μm。
As an improvement of the above scheme, the second metal layer is made of one of Cu, CO, Fe and Zn, with a thickness of
0.5-3μm。
As an improvement of the above scheme, the solder metal layer is made of Au or Au alloy, with a thickness of 10-14 μm.
As an improvement of the above scheme, the isolation channel runs through the first metal layer, by first electrode and the second electricity
Pole keeps apart.
As an improvement of the above scheme, first insulating layer extends on the side wall of first electrode.
As an improvement of the above scheme, first insulating layer and second insulating layer are made of insulating material.
Implement the utility model, has the following beneficial effects:
1, a kind of LED chip with solder electrode provided by the utility model, including substrate；Hair on substrate is set
Photo structure, the light emitting structure include setting gradually the first semiconductor layer on substrate, active layer, the second semiconductor layer, anti-
Penetrate layer and the first insulating layer；The first metal layer of first surface of insulating layer is set, and the first metal layer one extends to
Semi-conductor layer is simultaneously connect with the first semiconductor layer, and to form first electrode, described the first metal layer a part extends to reflection
Layer is simultaneously connect with reflecting layer, to form second electrode, wherein at least one isolation is equipped between first electrode and second electrode
Slot；Be arranged on the first metal layer with the second insulating layer in isolation channel；Second metal layer over the second dielectric is set；It passes through
The solder metal layer wearing second metal layer and second insulating layer and being connected respectively at first electrode with second electrode；First gold medal
The wetability for belonging to layer is greater than the wetability of second metal layer.Specifically, the big metal of wettability is in high temperature, ultrasound or vacuum state
Under be less likely to occur to shrink；And the small metal of wettability is easy to happen contraction under high temperature, ultrasound or vacuum state, and generates gold
Belong to migration, wherein the small metal of wettability encounters the metal that the big metal of wettability then can be big in wettability when migration
It is upper to reunite, diauxic growth is carried out, the thickness of its metal layer is increased.Solder metal layer is arranged in wetability the utility model
On big the first metal layer, meanwhile, the side wall of solder metal layer is equipped with the small second metal layer of wetability, so that solder is golden
Belong to layer to reunite on the first metal layer, carries out secondary production, and then increase the thickness of solder metal layer.
Further, the utility model solder metal layer with a thickness of 10-20 μm, chip and substrate can be prevented because of injustice
It is whole and generate welding cavity, improve chip and packaging reliability.
Detailed description of the invention
Fig. 1 is the structural schematic diagram for the LED chip that the utility model has solder electrode；
Fig. 2 is the production flow diagram for the LED chip that the utility model has solder electrode；
Fig. 3 a is the schematic diagram of the utility model light emitting structure；
Fig. 3 b is that the utility model light emitting structure forms the schematic diagram after the first hole and the second hole；
Fig. 3 c is that the utility model light emitting structure forms the schematic diagram after the first metal layer；
Fig. 3 d is that the utility model light emitting structure forms the schematic diagram after second insulating layer；
Fig. 3 e is that the utility model light emitting structure forms the schematic diagram after second metal layer；
Fig. 3 f is that the utility model light emitting structure forms the schematic diagram after the 4th hole and the 5th hole；
Fig. 3 g is that the utility model light emitting structure forms the schematic diagram after metal solder layer.
Specific embodiment
It is practical new to this below in conjunction with attached drawing to keep the purpose of this utility model, technical solution and advantage clearer
Type is described in further detail.
Referring to Fig. 1, a kind of LED chip with solder electrode provided by the utility model, including substrate 10, setting are being served as a contrast
Light emitting structure 20 on bottom 10, the light emitting structure 20 include the first semiconductor layer 21, active being successively set on substrate 10
The 22, second semiconductor layer 23 of layer, reflecting layer 24 and the first insulating layer 25；The first metal layer on 25 surface of the first insulating layer is set
30, the first metal layer 30 1 extends to the first semiconductor layer 21 and connect with the first semiconductor layer 21, to form first
Electrode, described 30 a part of the first metal layer extends to reflecting layer 24 and connect with reflecting layer, to form second electrode, wherein
At least one isolation channel 31 is equipped between first electrode and second electrode；Be arranged on the first metal layer 30 and isolation channel 31 in
Second insulating layer 40；Second metal layer 50 in second insulating layer 40 is set；Through second metal layer 50 and second insulating layer
40 and the solder metal layer 60 that is connected respectively at first electrode with second electrode；The wetability of the first metal layer 30 is greater than the
The wetability of two metal layers 50.
Wetability is one of key property of material surface, is characterized by static contact angle, and the factor of wetability is influenced
The mainly chemical composition and microstructure of material surface, mainly changes material surface by surface modification and surface micro-moulding
Wetability.Specifically, the big metal of the wetability is less likely to occur to shrink under high temperature, ultrasound or vacuum state；And it soaks
Property small metal contraction is easy to happen under high temperature, ultrasound or vacuum state, and generate metal migration, wherein wetability is big
Metal encounters the small metal of wetability when migration, then can reunite on the small metal of wetability, carries out diauxic growth,
Increase the thickness of its metal layer.
Preferably, the first metal layer 30 is made of one or more of Ni, Au, Ti and In, with a thickness of 0.5-3
μm.The above metal is the big metal of wetability, wherein the region of the first metal layer 30 is humidification zones.
The second metal layer 50 is made of one or more of Cu, CO, Fe and Zn, with a thickness of 0.5-3 μm.More than
Metal is not have the metal of wetability or the metal without wetability, wherein the region of second metal layer 50 is not humid region
Domain.
The solder metal layer 60 is made of Au or Au alloy.Since solder metal layer 60 is for chip to be welded on base
On plate, therefore the material of weld metal layers 60 is generally made of Au or Au alloy, and Au or Au alloy belongs to without wetting
Solder metal layer 60 is arranged on the big the first metal layer 30 of wetability for property or the small metal of wetability, the utility model, together
When, the side wall of solder metal layer 60 is equipped with the small second metal layer 50 of wetability, so that solder metal layer 60 can have the
Reunite on one metal layer 30, carries out secondary production, and then increase the thickness of solder metal layer 60.
Preferably, the solder metal layer 60 with a thickness of 10-20 μm.Since there are rugged figures for chip surface
Shape, while substrate surface can also have certain warpage and surface irregularity, when the thickness of solder metal layer is less than 10 μm, chip
Welding cavity is easy to produce because of out-of-flatness with substrate, to influence the reliability of chip and packaging.
The material of substrate 10 can be sapphire, silicon carbide or silicon, or other semiconductor materials, in the present embodiment
Substrate be preferably Sapphire Substrate.
Light emitting structure 20 is set to the surface of substrate 10.Specifically, 21 He of the first semiconductor layer provided by the embodiments of the present application
Second semiconductor layer 23 is gallium nitride-based semiconductor, and active layer 22 is gallium nitride base active layer；In addition, the embodiment of the present application
The material of the first semiconductor layer 21, the second semiconductor layer 23 and the active layer 22 that provide can also be other materials, to this this Shen
It please be not particularly limited.Wherein, the first semiconductor layer 21 can be n type semiconductor layer, then the second semiconductor layer 23 is that p-type is partly led
Body layer.
It should be noted that being set between the substrate 10 and the light emitting structure 20 in the other embodiments of the application
There is caching to rush layer (not shown).
The reflecting layer 24 is metallic reflector, it is preferred that the reflecting layer 24 is Ag/Ni/Ni lamination.
It should be noted that being additionally provided with one layer of ohmic contact layer (figure between second semiconductor layer 23 and reflecting layer 24
In be not shown).
The utility model passes through the mutual cooperation of the first insulating layer 25 and second insulating layer 40, by first electrode and the second electricity
Pole isolation is got up, and avoids chip that short circuit, electric leakage occurs.Preferably, first insulating layer 25 extends to the side wall of first electrode
On.Wherein, first insulating layer 25 and second insulating layer 40 are made of insulating material, it is preferred that first insulating layer
25 and second insulating layer 40 by SiO2And/or SiN is made.
It should be noted that the isolation channel 31 runs through the first metal layer 30, by first electrode and second electrode
Keep apart.
Referring to fig. 2, Fig. 2 is a kind of production flow diagram of the LED chip with solder electrode of the utility model, this is practical new
Type additionally provides a kind of production method of LED chip with solder electrode, comprising the following steps:
S101, it is formed on the substrate light emitting structure, the light emitting structure includes setting gradually the first half leading on substrate
Body layer, active layer, the second semiconductor layer, reflecting layer and the first insulating layer.
Referring to Fig. 3 a, the material of substrate 10 can be sapphire, silicon carbide or silicon, or other semiconductor materials,
Substrate in the present embodiment is preferably Sapphire Substrate.
Specifically, using the method for Metallo-Organic Chemical Vapor deposition (MOCVD), the successively growth regulation half on substrate 10
Conductor layer 21, active layer 22 and the second semiconductor layer 23, to form epitaxial layer.
In order to improve the yield of subsequent etching technics, the epitaxial layer with a thickness of 4-10 μm.When the thickness of epitaxial layer
Lower than 4 μm, the brightness of LED chip can be reduced, in subsequent etching, the case where LED chip is easy to appear sliver.But epitaxial layer
Thickness is greater than 10 μm, and the brightness of LED chip can reduce, and increase difficulty and the time of etching.
First semiconductor layer 21 provided by the embodiments of the present application and the second semiconductor layer 23 are gallium nitride-based semiconductor,
Active layer 22 is gallium nitride base active layer；In addition, the first semiconductor layer 21 provided by the embodiments of the present application, the second semiconductor layer 23
Material with active layer 22 can also be other materials, be not particularly limited to this application.Wherein, the first semiconductor layer 21 can
Think n type semiconductor layer, then the second semiconductor layer 23 is p type semiconductor layer.
It is sunk on the second semiconductor layer 23 using the method for electron beam evaporation (E-beam) or magnetron sputtering (sputter)
Product metal forms reflecting layer 24.The reflecting layer 24 is metallic reflector, it is preferred that the reflecting layer 24 is folded for Ag/Ni/Ni
Layer.
It should be noted that being formed before reflecting layer 24 after forming the second semiconductor layer 23, further including following step
It is rapid:
Ohmic contact layer (not shown) is formed on the second semiconductor layer 23；
High annealing in the environment of nitrogen forms Ohmic contact.
The method of using plasma enhancing chemical vapor deposition (PECVD) deposits the first insulation of formation on reflecting layer
Layer.Wherein, first insulating layer 25 is made of insulating material, it is preferred that first insulating layer 25 is by SiO2And/or SiN
It is made.
S102, the light emitting structure is performed etching, forms the first hole for being etched to the first semiconductor layer, be etched to anti-
Penetrate the second hole of layer surface.
Referring to Fig. 3 b, light emitting structure is carved using inductively coupled plasma (ICP) method or wet etching method
Erosion forms the first hole 26 for being etched to the first semiconductor layer 21, is etched to second hole 27 on 24 surface of reflecting layer.
It should be noted that first insulating layer 25 can also be extended in the other embodiments of the utility model
On the side wall of first hole 26.
S103, on the first insulating layer with form the first metal layer, the first metal layer in the first hole, the second hole
It is connect with the first semiconductor layer, to form first electrode, first metal is connect with reflecting layer, to form second electrode,
In, at least one isolation channel is equipped between first electrode and second electrode, the first metal layer is by the metal with wetability
It is made.
Referring to Fig. 3 c, using the method for electron beam evaporation (E-beam) or magnetron sputtering (sputter) in the first insulation
The first metal layer 30 is formed on layer 25 and in the first hole 26, the second hole 27.Wherein, the first metal layer 30 and the first half
Conductor layer 21 connects, and to form first electrode, first metal 30 is connect with reflecting layer 24, to form second electrode.
Specifically, being equipped at least one isolation channel 31 between first electrode and second electrode, the isolation channel 31 is by first
Metal layer 30 is divided at least two parts, and first electrode and second electrode are isolated slot 31 and keep apart.
Wetability is one of key property of material surface, is characterized by static contact angle, and the factor of wetability is influenced
The mainly chemical composition and microstructure of material surface, mainly changes material surface by surface modification and surface micro-moulding
Wetability.Specifically, the big metal of the wetability is less likely to occur to shrink under high temperature, ultrasound or vacuum state；And it soaks
Property small metal contraction is easy to happen under high temperature, ultrasound or vacuum state, and generate metal migration, wherein wetability is big
Metal encounters the small metal of wetability when migration, then can reunite on the small metal of wetability, carries out diauxic growth,
Increase the thickness of its metal layer.
Preferably, the first metal layer 30 is made of one or more of Ni, Au, Ti and In, with a thickness of 0.5-3
μm.The above metal is the big metal of wetability, wherein the region of the first metal layer 30 is humidification zones.
It should be noted that after forming the first metal layer 30, it is further comprising the steps of:
The first metal layer 30 is performed etching, at least one isolation channel for running through the first metal layer 30 is formed
31, the isolation channel 31 keeps apart first electrode and second electrode.
S104, on the first metal layer with form second insulating layer in isolation channel.
Referring to Fig. 3 d, using plasma enhance the method for chemical vapor deposition (PECVD) on the first metal layer 30 and
Deposition forms second insulating layer 40 in isolation channel 31.Wherein, the second insulating layer 40 is made of insulating material, it is preferred that institute
Second insulating layer 40 is stated by SiO2And/or SiN is made.
The utility model passes through the mutual cooperation of the first insulating layer 25 and second insulating layer 40, by first electrode and the second electricity
Pole isolation is got up, and avoids chip that short circuit, electric leakage occurs.
S105, second metal layer is formed over the second dielectric, the second metal layer is not by having the metal of wetability
It is made.
Referring to Fig. 3 e, using the method for electron beam evaporation (E-beam) or magnetron sputtering (sputter) in the second insulation
Second metal layer 50 is formed on layer 40, the second metal layer 50 is made of the metal for not having wetability.
Specifically, the metal without wetability is easy to happen contraction under high temperature, ultrasound or vacuum state, and produce
Raw metal migration, wherein the metal without wetability encounters the metal with wetability when migration, then can have
Reunite on the metal of wetability, carries out diauxic growth, increase the thickness of its metal layer.
Preferably, the second metal layer 50 is made of one or more of Cu, CO, Fe and Zn, with a thickness of 0.5-3
μm.The above metal is not have the metal of wetability or the metal without wetability, wherein the region of second metal layer 50 is not
Humidification zones.
S106, second metal layer and second insulating layer are performed etching, are etched to first electrode surface and form third hole,
It is etched to second electrode surface and forms the 4th hole.
Referring to Fig. 3 f, using inductively coupled plasma (ICP) method or wet etching method to second metal layer 50
It is performed etching with second insulating layer 40, is etched to first electrode surface and forms third hole 51, be etched to second electrode surface shape
At the 4th hole 52.
S107, metal solder layer is formed in the surface of second metal layer and third hole, the 4th hole.
Referring to Fig. 3 g, using the method for electron beam evaporation (E-beam) or magnetron sputtering (sputter) in the second metal
Metal solder layer 60 is formed in the surface of layer 50 and third hole 51, the 4th hole 52.
The solder metal layer 60 is made of Au or Au alloy.Since solder metal layer 60 is for chip to be welded on base
On plate, therefore the material of weld metal layers 60 is generally made of Au or Au alloy, and Au or Au alloy belongs to without wetting
Solder metal layer 60 is arranged on the big the first metal layer 30 of wetability for property or the small metal of wetability, the utility model, together
When, the side wall of solder metal layer 60 is equipped with the small second metal layer 50 of wetability, so that solder metal layer 60 can have the
Reunite on one metal layer 30, carries out secondary production, and then increase the thickness of solder metal layer 60.
It should be noted that it is limited to the limitation of photoresist, the thickness of the solder metal layer 60 in second metal layer 50
It is 5-7 μm.
S108, by the way of heating, ultrasound or vacuum, make metal solder layer by way of reunion diauxic growth to
On one electrode and second electrode, to increase the thickness of metal solder layer.
Referring to Fig. 1, by the way of heating, ultrasound or vacuum, keep metal solder layer 60 two secondary by way of reunion
It grows in first electrode and second electrode, to increase the thickness of metal solder layer 60.
Specifically, the heating temperature of metal solder layer is 400-700 DEG C, supersonic frequency is more than or equal to 20KHz, vacuum pressure
Less than 10-3Pa。
Solder metal layer of the metal solder layer 60 of the utility model after having reunited, positioned at 50 surface of second metal layer
60 migrate in first electrode and second electrode, thus increase the thickness of metal solder layer 60, the production method of the utility model,
It is cooperated by the first metal layer, second metal layer and solder metal layer, while using the characteristic of each layer metal, breaking through tradition
The limitation of the photoresist thickness of method, enable the thickness of the metal solder layer 60 in second metal layer 50 be up to 10 μm with
On, to solve the problems, such as welding cavity, and then improve the reliability of chip and packaging.
Preferably, the solder metal layer 60 with a thickness of 10-20 μm.Since there are rugged figures for chip surface
Shape, while substrate surface can also have certain warpage and surface irregularity, when the thickness of solder metal layer is less than 10 μm, chip
Welding cavity is easy to produce because of out-of-flatness with substrate, to influence the reliability of chip and packaging.
Above disclosed is only a kind of preferred embodiment of the utility model, certainly cannot be practical to limit with this
Novel interest field, therefore equivalent variations made according to the claim of the utility model still belong to what the utility model was covered
Range.
Claims (7)
1. a kind of LED chip with solder electrode characterized by comprising
Substrate；
Light emitting structure on substrate is set, and the light emitting structure includes setting gradually the first semiconductor layer on substrate, having
Active layer, the second semiconductor layer, reflecting layer and the first insulating layer；
The first metal layer of first surface of insulating layer is set, the first metal layer one extend to the first semiconductor layer and with
The connection of first semiconductor layer, to form first electrode, described the first metal layer a part extends to reflecting layer and connects with reflecting layer
It connects, to form second electrode, wherein at least one isolation channel is equipped between first electrode and second electrode；
Be arranged on the first metal layer with the second insulating layer in isolation channel；
Second metal layer over the second dielectric is set；
Through second metal layer and second insulating layer and the solder metal layer that is connected respectively at first electrode with second electrode；
The wetability of the first metal layer is greater than the wetability of second metal layer.
2. as described in claim 1 with solder electrode LED chip, which is characterized in that the first metal layer by Ni,
One of Au, Ti and In are made, with a thickness of 0.5-3 μm.
3. as claimed in claim 2 with solder electrode LED chip, which is characterized in that the second metal layer by Cu,
One of CO, Fe and Zn are made, with a thickness of 0.5-3 μm.
4. as claimed in claim 3 with the LED chip of solder electrode, which is characterized in that the solder metal layer by Au or
Au alloy is made, with a thickness of 10-14 μm.
5. as described in claim 1 with the LED chip of solder electrode, which is characterized in that the isolation channel is through described the
One metal layer, first electrode and second electrode are kept apart.
6. as described in claim 1 with the LED chip of solder electrode, which is characterized in that first insulating layer extends to
On the side wall of first electrode.
7. as described in claim 1 with the LED chip of solder electrode, which is characterized in that first insulating layer and second
Insulating layer is made of insulating material.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821797170.7U CN209016084U (en) | 2018-11-01 | 2018-11-01 | A kind of LED chip with solder electrode |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821797170.7U CN209016084U (en) | 2018-11-01 | 2018-11-01 | A kind of LED chip with solder electrode |
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| Publication Number | Publication Date |
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| CN209016084U true CN209016084U (en) | 2019-06-21 |
Family
ID=66841111
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109449271A (en) * | 2018-11-01 | 2019-03-08 | 佛山市国星半导体技术有限公司 | A kind of LED chip and preparation method thereof with solder electrode |
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2018
- 2018-11-01 CN CN201821797170.7U patent/CN209016084U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109449271A (en) * | 2018-11-01 | 2019-03-08 | 佛山市国星半导体技术有限公司 | A kind of LED chip and preparation method thereof with solder electrode |
| CN109449271B (en) * | 2018-11-01 | 2024-04-16 | 佛山市国星半导体技术有限公司 | LED chip with solder electrode and manufacturing method thereof |
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