CN209000515U - Top rake circuit and display device - Google Patents
Top rake circuit and display device Download PDFInfo
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- CN209000515U CN209000515U CN201821735153.0U CN201821735153U CN209000515U CN 209000515 U CN209000515 U CN 209000515U CN 201821735153 U CN201821735153 U CN 201821735153U CN 209000515 U CN209000515 U CN 209000515U
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
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- Crystallography & Structural Chemistry (AREA)
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- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
The utility model discloses a kind of top rake circuit and display device, which includes the sequence controller for exporting the first timing control signal and the second timing control signal, which includes: gate switch voltage input end and gate switch voltage output end；First switch circuit, it is set as the conducting when receiving the first timing control signal, it is electrically connected with controlling grid switching voltage input terminal with gate switch voltage output end, and the received gate turn-on voltage of gate switch voltage input end is exported to gate switch voltage output end；Second switch circuit is set as the conducting when receiving the second timing control signal；Discharge circuit is set as discharging the electric energy that gate switch voltage output end accesses when second switch circuit is connected；And current-limiting circuit, it is set as reducing the electric energy rate of release of gate switch voltage output end access.The utility model improves the brightness uniformity of display device.
Description
Technical field
The utility model relates to electronic circuit technology field, in particular to a kind of top rake circuit and display device.
Background technique
Currently, when driving display panel work, setting can be to the grid of output to gate drivers mostly in display device
Pole cut-in voltage carries out top rake processing, gate turn-on voltage and gate off when reducing thin film transistor (TFT) closing in display panel
Voltage difference between voltage reduces the influence to voltage data signal.
However, pixel voltage also will appear when high level gate turn-on voltage is mutated to low level gate off voltage
The phenomenon that being mutated, display panel caused to flash.
Utility model content
The main purpose of the utility model is to propose a kind of top rake circuit and display device, it is intended to improve the bright of display device
Spend consistency.
To achieve the above object, the utility model proposes a kind of top rake circuits, are applied to display device, and display device includes
The sequence controller of output polarity the first opposite each other timing control signal and the second timing control signal, the top rake circuit
Include:
Gate switch voltage input end and gate switch voltage output end；
First switch circuit is set as the conducting when receiving first timing control signal, controls the grid and opens
It closes voltage input end to be electrically connected with the gate switch voltage output end, and by the received grid of gate switch voltage input end
Pole cut-in voltage is exported to the gate switch voltage output end；Second switch circuit, is set as when receiving described second
It is connected when sequence control signal；
Second switch circuit is set as the conducting when receiving second timing control signal；
Discharge circuit is set as accessing the gate switch voltage output end when the second switch circuit is connected
Electric energy discharged；And
Current-limiting circuit is set as reducing the electric energy rate of release of the gate switch voltage output end access.
Optionally, the current-limiting circuit includes the first inductance, and first inductance is arranged in series in the gate switch electricity
It presses between output end and the input terminal of the second switch circuit, first inductance, is set as reducing the gate switch electricity
Press the electric energy rate of release of output end access.
Optionally, the first switch circuit includes first switch tube, second switch, partial pressure unit, and described first opens
The controlled end of pipe is closed for receiving first clock signal, the of the output end of the first switch tube and the partial pressure unit
The connection of one input terminal, the second input terminal of the partial pressure unit and the gate switch voltage input end and the second switch
Input terminal interconnection；The output end of the second switch and the gate switch voltage output end, the second switch
Controlled end is connect with the output end of the partial pressure unit.
Optionally, the partial pressure unit includes first resistor and second resistance, and the first end of the first resistor is described
Second input terminal of partial pressure unit, the second end of the first resistor are connected with the first end of the second resistance, and described first
The common end of resistance and second resistance is the output end of the partial pressure unit；The second end of the second resistance is that the partial pressure is single
The first input end of member.
Optionally, the second switch circuit includes third switching tube, the input terminal of the third switching tube be described
The input terminal of second switch circuit, the output end ground connection of the third switching tube, the controlled end of the third switching tube is for connecing
Receive second clock signal.
Optionally, the third switching tube is N-type field-effect tube or is N-type TFT.
Optionally, the discharge circuit further includes 3rd resistor, the first end of the 3rd resistor and the gate switch
Voltage output end connection, the second end of the 3rd resistor are connect with the input terminal of the second switch circuit.
Optionally, the 3rd resistor is variable resistance.
Optionally, the top rake circuit further includes zener diode, the cathode of the zener diode and first electricity
One end of sense connects, and the anode of the zener diode is connect with the input terminal of the second switch circuit.
The utility model also proposes that a kind of top rake circuit, the top rake circuit include:
Gate switch voltage input end and gate switch voltage output end；
First switch circuit is arranged in series in the gate switch voltage input end and the gate switch voltage output end
Between, the first switch circuit is set as the conducting when receiving the first timing control signal, and the gate switch is electric
The pressure received gate turn-on voltage of input terminal is exported to the gate switch voltage output end；
Second switch circuit is set as the conducting when receiving the second timing control signal, the second timing control letter
Number with first timing control signal opposite polarity pulse voltage signal each other；
The discharge circuit includes:
First inductance, first inductance are arranged in series in the gate switch voltage output end and second switch electricity
Between the input terminal on road, first inductance is set as reducing the electric energy release speed of the gate switch voltage output end access
Degree；
3rd resistor, the first end of the 3rd resistor are connect with the gate switch voltage output end, the third electricity
The second end of resistance is connect with the input terminal of the second switch circuit；
Zener diode, the cathode of the zener diode are connect with one end of first inductance, two pole of pressure stabilizing
The anode of pipe is connect with the input terminal of the second switch circuit.
The utility model also proposes a kind of display device, including top rake circuit as described above；The top rake circuit includes:
Gate switch voltage input end and gate switch voltage output end；First switch circuit is arranged in series in the gate switch electricity
It presses between input terminal and the gate switch voltage output end, the first switch circuit is set as receiving described first
It is connected when timing control signal, and the received gate turn-on voltage of gate switch voltage input end is exported to the grid
Switching voltage output end；Second switch circuit is set as the conducting when receiving second timing control signal；Electric discharge electricity
Road is set as discharging the electric energy that the gate switch voltage output end accesses when the second switch circuit is connected；
And current-limiting circuit, it is set as reducing the electric energy rate of release of the gate switch voltage output end access.
Optionally, the display device further include:
Source electrode driver is set as providing data-signal；
Gate drivers are connect, the gate drivers with the gate switch voltage output end of the top rake circuit, setting
For the gate turn-on voltage exported according to the gate switch voltage output end, grid signal is provided；
Display panel is connect with the data line of the horizontal scanning line of the gate drivers and the source electrode driver respectively,
The display panel is set as showing image according to the data-signal and the grid signal.
First switch circuit is arranged in series in described by the utility model top rake circuit by setting first switch circuit
Between gate switch voltage input end and gate switch voltage output end, with the unlatching when receiving the first timing control signal,
And the received gate turn-on voltage of gate switch voltage input end is exported to gate switch voltage output end；Top rake circuit is also set
It is equipped with second switch circuit and discharge circuit, and the unlatching when receiving the second timing control signal, to make discharge circuit will
The electric energy of gate switch voltage output end access is discharged；Wherein, discharge circuit includes the first inductance, 3rd resistor and pressure stabilizing
Diode, wherein by by the first inductance be arranged in series in the input terminal of gate switch voltage output end and second switch circuit it
Between, to reduce the electric energy rate of release when discharge circuit is discharged the electric energy of access.The utility model solves grid
When electric Vg is mutated by high level gate turn-on voltage to low level gate off voltage, pixel voltage also will appear mutation, make
The voltage obtained on liquid crystal capacitance can also mutate, and the light transmittance of display panel is caused to change, and display panel occur
The problem of flicker (flashing).The utility model improves the brightness uniformity of display device.
Detailed description of the invention
In order to illustrate the embodiment of the utility model or the technical proposal in the existing technology more clearly, below will be to embodiment
Or attached drawing needed to be used in the description of the prior art is briefly described, it should be apparent that, the accompanying drawings in the following description is only
It is some embodiments of the utility model, for those of ordinary skill in the art, in the premise not made the creative labor
Under, the structure that can also be shown according to these attached drawings obtains other attached drawings.
Fig. 1 is the functional block diagram of one embodiment of the utility model top rake circuit；
Fig. 2 is the electrical block diagram of one embodiment of the utility model top rake circuit；
Fig. 3 is the functional block diagram that the utility model top rake circuit applies example applied in display device one.
The embodiments will be further described with reference to the accompanying drawings for the realization, functional characteristics and advantage of the utility model aim.
Specific embodiment
The following will be combined with the drawings in the embodiments of the present invention, carries out the technical scheme in the embodiment of the utility model
Clearly and completely describing, it is clear that described embodiment is only a part of the embodiment of the utility model, rather than all
Embodiment.Based on the embodiments of the present invention, those of ordinary skill in the art are not making creative work premise
Under every other embodiment obtained, fall within the protection scope of the utility model.
It is to be appreciated that if related in the utility model embodiment directionality instruction (such as upper and lower, left and right, it is preceding,
Afterwards ...), then directionality instruction is only used for explaining opposite between each component under a certain particular pose (as shown in the picture)
Positional relationship, motion conditions etc., if the particular pose changes, directionality instruction is also correspondingly changed correspondingly.
In addition, if relating to the description of " first ", " second " etc. in the utility model embodiment, " first ", " the
Two " etc. description is used for description purposes only, and is not understood to indicate or imply its relative importance or is implicitly indicated meaning
The quantity of the technical characteristic shown." first " is defined as a result, the feature of " second " can explicitly or implicitly include at least one
A this feature.It in addition, the technical solution between each embodiment can be combined with each other, but must be with ordinary skill
Based on personnel can be realized, this technical side will be understood that when the combination of technical solution appearance is conflicting or cannot achieve
The combination of case is not present, also not within the protection scope of the requires of the utility model.
The utility model proposes a kind of top rake circuits, have the display of display panel suitable for television set, mobile phone, computer etc.
In device, display device includes the timing of output polarity the first opposite each other timing control signal and the second timing control signal
Controller.
Referring to FIG. 1 and FIG. 2, in an embodiment of the utility model, the top rake circuit, the top rake circuit include:
Gate switch voltage input end Vg-in and gate switch voltage output end Vg-out；
First switch circuit 10, the first switch circuit 10, is set as when receiving the first timing control signal CV1
It opens, is electrically connected with controlling the gate switch voltage input end Vg-in with the gate switch voltage output end Vg-out, and
The received gate turn-on voltage of the gate switch voltage input end Vg-in is exported to the gate switch voltage output end
Vg-out；
Second switch circuit 20 is set as the unlatching when receiving the second timing control signal CV2, the second timing control
Signal CV2 processed and the first timing control signal CV1 opposite polarity pulse voltage signal each other；
Discharge circuit 30 is set as when the second switch circuit 20 is opened, by the gate switch voltage output end
The electric energy of Vg-out access is discharged；And
Current-limiting circuit 40 is set as reducing the electric energy rate of release of the gate switch voltage output end Vg-out access.
When capacitance pole sex reversal in pixel array, in the case where public electrode current potential remains unchanged, liquid crystal is realized
The exchange driving of molecule change low when high when being equivalent to the current potential of another electrode of capacitor relative to public electrode current potential
Change.Namely the data-signal opposing common electrode voltage of source electrode driver output is increased or is reduced.And in voltage data signal
Opposing common electrode voltage increases the voltage that positive polarity is switched to by the voltage of negative polarity, or reduces to realize by positive polarity electricity
During crush-cutting is changed to negative polarity, the cross-pressure of voltage data signal is bigger, and because of the reason of RC is loaded, voltage switching is needed
Climb the time.Therefore in the case where the charging time is certain, need to undergo filling for the i.e. sub-pixel of climbing time of voltage switching
Electric rate will be less than the latter's lower than the charge rate for the sub-pixel that voltage tends to be steady namely the former pixel charging degree of saturation
Degree of saturation, and the brightness of the pixel for the saturation that charges is greater than the pixel that charging is not exclusively saturated, to the phenomenon that flashing occur.
Therefore in the driving circuit of display panel, it can be generally provided with top rake circuit, gate turn-on voltage Vgh is subjected to top rake,
Corresponding gate turn-on voltage Vgh to be depressured, so that the charging voltage of pixel be made to be consistent, and then display surface is avoided
The film flicker of plate is realized and the brightness of display panel each region is kept to be consistent.
Second timing control signal CV2 and the first timing control signal CV1 each other believe by opposite polarity pulse voltage
Number, both signals can be specifically generated by sequence controller and phase inverter.When the first timing control signal CV1 and second
Sequence control signal CV2 includes two level states of high level and low level.The present embodiment first switch circuit 10 can connect
The the first timing control signal CV1 for receiving high level is opened, and is receiving low level first timing control signal CV1 shutdown,
Second switch circuit 20 is then receiving low level second timing control signal CV2 unlatching, is receiving the second of high level
Timing control signal CV2 shutdown.Or low level first timing control signal CV1 is received in first switch circuit 10 and is opened
It opens, in the first timing control signal CV1 shutdown for receiving high level, second switch circuit 20 is receiving the of high level
Two timing control signal CV2 are opened, and are receiving low level second timing control signal CV2 shutdown.That is, first switch is electric
Road 10 and second switch circuit 20 will not be opened simultaneously, and when first switch circuit 10 is opened, second switch circuit 20, which is in, to be closed
Disconnected state, when second switch circuit 20 is opened, first switch circuit 10 is then in an off state.
It is understood that passing through the duty for adjusting the second timing control signal CV2 and the first timing control signal CV1
Than, and then the discharge time of discharge circuit 30 is controlled, the top rake degree of top rake circuit can also be adjusted, guarantees the bright of display panel
Degree is consistent.
Specifically, when first switch circuit 10 is opened, the grid that gate switch voltage input end Vg-in is received is opened
Voltage output when first switch circuit 10 turns off, then stops grid voltage and opens electricity to gate switch voltage output end Vg-out
The output of pressure.
Second switch circuit 20 is discharged or is stopped working by or off control discharge circuit 30, specifically,
When second switch circuit 20 is opened, discharge circuit 30 is transmitted to the gate turn-on voltage of switching voltage output end and is put with preset
Electric slope is depressured, and then forms top rake voltage, and be output to ground through second switch circuit 20；It is closed in second switch circuit 20
When disconnected, discharge circuit 30 stops working.
It should be noted that display panel generally has thin film transistor (TFT) and pixel capacitance, wherein G, D, S are that film is brilliant
Grid, drain electrode, the source electrode of body pipe, Clc are pixel equivalent capacity, and Cst is storage capacitors, the parasitic capacitance between Cgs G, S.
Clc,Cst,Cgs.Three capacitors meet principle of charge conservation, that is, pixel voltage Vs can also change with the mutation of G pole tension
Become.When grid voltage Vg is mutated by high level gate turn-on voltage Vgh to low level gate off voltage Vgl, pixel electricity
Pressure Vs can also be mutated △ V.Voltage so on liquid crystal capacitance can also mutate, to change the light transmittance of display panel, lead
Display panel is caused the phenomenon that flicker (flashing) occur.Wherein,
△ V=Vs-Vs ' specifically may be expressed as: △ V=(Vgh-Vgl) * Cgs/ (Cgs+Cst+Clc).
To solve the above-mentioned problems, in the present embodiment, current-limiting circuit 40 can be realized using inductance, specifically, described
Current-limiting circuit 40 includes the first inductance L1, and the first inductance L1 is arranged in series in the gate switch voltage output end Vg-out
And between the input terminal of the second switch circuit 20, the first inductance L1 is set as reducing the gate switch voltage defeated
The electric energy rate of release of outlet Vg-out access.It is opened according to the principle that the electric current for flowing through inductance both ends cannot be mutated with controlling grid
The velocity of discharge of voltage is opened, to reduce the loss of second switch circuit 20.In addition, when load namely thin film transistor (TFT) carry out
When taking out load, the energy put aside on inductance L can also provide pumping for load and carry electric current.In the present embodiment, top rake circuit also has
One capacitor C1, first capacitor C1 are parasitic capacitance of each scan line in display panel, first capacitor C1 and the first inductance L1 group
At lc circuit both may be implemented to limit by the first inductance L1 when resonance does not occur for the first inductance L1 and first capacitor C1
The effect of 30 electric current of discharge circuit.Namely the present embodiment no setting is required discharge resistance, it can reduce power consumption to reduce temperature rise,
The problem of the utility model can solve the component in top rake circuit, such as resistance heating is serious, bring security risk.
And when resonance occurs for the first inductance L1 and first capacitor C1, at this time the frequency of the second timing control signal CV2 with
First inductance L1 and first capacitor C1 has following relationship: f=1/ (2 π √ LC).At this point, the discharge loop of top rake voltage is suitable
In the circuit of a purely resistive, can both be changed by the way that discharge resistance, and the resistance value by adjusting discharge resistance is arranged at this time
The linear discharge slope for becoming top rake voltage, to control the velocity of discharge.In above-described embodiment, the quantity of the first inductance can be more
A, multiple first inductance can be arranged in series, and can also be arranged in parallel, and can be specifically configured according to resonance frequency, herein
With no restrictions.
The utility model top rake circuit by setting first switch circuit 10, and by first switch circuit 10 be arranged in series in
Between the gate switch voltage input end Vg-in and gate switch voltage output end Vg-out, to receive the first timing
It is opened when controlling signal CV1, and the received gate turn-on voltage of gate switch voltage input end Vg-in is exported to gate switch
Voltage output end Vg-out；Top rake circuit is additionally provided with second switch circuit 20 and discharge circuit 30, and when receiving second
It is opened when sequence control signal CV2, so that the electric energy for accessing discharge circuit 30 by gate switch voltage output end Vg-out carries out
Release；Wherein, discharge circuit 30 includes the first inductance L1, and the first inductance L1 is arranged in series in gate switch voltage output end Vg-
Between the input terminal of out and second switch circuit 20, to reduce the electricity when discharge circuit 30 is discharged the electric energy of access
It can rate of release.The utility model solves grid electricity Vg and is mutated by high level gate turn-on voltage to low level gate turn-off
When voltage, pixel voltage also will appear mutation, so that the voltage on liquid crystal capacitance can also mutate, lead to the saturating of display panel
Light rate changes, and the phenomenon that making display panel flicker (flashing) occur obtains problem.The utility model improves display dress
The brightness uniformity set.
Referring to FIG. 1 and FIG. 2, in an alternative embodiment, the first switch circuit 10 includes first switch tube Q1, second
Switching tube Q2 and partial pressure unit, the controlled end of the first switch tube Q1 is for receiving first clock signal, and described first
The output end of switching tube Q1 is connect with the first input end of the partial pressure unit 11；Second input terminal of the partial pressure unit 11 with
The interconnection of the input terminal of the gate switch voltage input end Vg-in and the second switch Q2；The second switch Q2's
Output end is connect with gate switch voltage output end Vg-out, and the controlled end of the second switch Q2 and grid partial pressure are single
The output end connection of member 11.
In the present embodiment, the first switch tube Q1 is chosen as N-type field-effect tube or N-type TFT, and described
Two switching tube Q2 are chosen as p-type field-effect tube or P-type TFT；The present embodiment is imitated by N-type field of first switch tube Q1
Ying Guan, second switch Q2 be p-type field-effect tube for be illustrated.Wherein, the grid of the N-type field-effect tube is described the
The controlled end of one switching tube Q1, the drain electrode of the N-type field-effect tube are the first switch tube Q1 output end, the N-type field effect
Should pipe source electrode ground connection；The grid of the p-type field-effect tube is the controlled end of the second switch Q2, the p-type field-effect
The drain electrode of pipe is connect with the gate switch voltage input end Vg-in, the source electrode of the p-type field-effect tube and the gate switch
Voltage output end Vg-out connection.
In the present embodiment, control of the first switch tube Q1 based on sequence controller, and receiving sequence controller output
It is connected when the first timing control signal CV1 of high level, exports low level first timing control letter receiving sequence controller
It is connected when number CV1, thus in first switch tube Q1 conducting, so that the series connection partial pressure of partial pressure unit 11, to export trigger signal extremely
Second switch Q2, so that second switch Q2 conducting is triggered, thus by the received grid of gate switch voltage input end Vg-in
Cut-in voltage exports gate switch voltage output end Vg-out.
Further, the partial pressure unit 11 includes the of first resistor R1 and second resistance R2, the first resistor R1
One end is the second input terminal of the partial pressure unit 11, the second end of the first resistor R1 and the first end of the second resistance
The common end of connection, the first resistor R1 and second resistance R2 are the output end of the partial pressure unit 11；The second resistance
The second end of R2 is the first input end of the partial pressure unit 11.
In the present embodiment, first resistor R1 and second resistance R2 composition series connection bleeder circuit, and led in first switch tube Q1
When logical, series connection partial pressure is carried out, to trigger second switch Q2 conducting.In practical applications, the resistance value of first resistor R1 can be set
It is set to the resistance value greater than second resistance R2, to realize in first switch tube Q1 conducting, second switch Q2 is effectively triggered and leads
It is logical.
Referring to FIG. 1 and FIG. 2, in an alternative embodiment, the second switch circuit 20 includes third switching tube Q3, described
The input terminal of third switching tube Q3 and the input terminal for being the second switch circuit 20, the output termination of the third switching tube Q3
Ground, the controlled end of the third switching tube Q3 is for receiving second clock signal.
In the present embodiment, the third switching tube Q3 is N-type field-effect tube or N-type TFT, the N-type field effect
Should pipe grid be the third switching tube Q3 controlled end, the drain electrode of the N-type field-effect tube is the third switching tube Q3
Input terminal, the source electrode ground connection of the N-type field-effect tube.Third closes control of the pipe based on sequence controller, and is receiving timing
Controller is connected when exporting the second timing control signal CV2 of high level, is receiving sequence controller output low level second
Be connected when timing control signal CV2, thus the electric energy for accessing discharge circuit 30 by gate switch voltage output end Vg-out into
Row release, and under limitation of the first inductance L1 to electric current, to control the velocity of discharge of discharge circuit 30, work as grid to reduce
When voltage Vg is mutated by high level gate turn-on voltage Vgh to low level gate off voltage Vgl, pixel voltage Vs can also dash forward
Time variant voltage △ V, after the first inductance L1 current limliting, then high level gate turn-on voltage Vgh and low level gate turn-off electricity
Pressure difference between pressure Vgl is just reduced to Vd-Vgl, to reduce △ V, the flicker that the utility model is conducive to improve picture is existing
As improving picture quality.
Referring to FIG. 1 and FIG. 2, in an alternative embodiment, the discharge circuit 30 further includes 3rd resistor R3, the third
The first end of resistance R3 is connect with the gate switch voltage output end Vg-out, the second end of the 3rd resistor R3 with it is described
The input terminal of second switch circuit 20 connects.
In the present embodiment, 3rd resistor R3 is discharge resistance, it is to be understood that in the first inductance L1 and first capacitor C1
When resonance occurs, the frequency of the second timing control signal CV2 and the first inductance L1 and first capacitor C1 have following relationship at this time:
F=1/ (2 π √ LC).At this point, the discharge loop of top rake voltage is equivalent to the circuit of a purely resistive, setting can be passed through at this time
Discharge resistance namely 3rd resistor R3, the 3rd resistor R3 are chosen as variable resistance to realize, and by adjusting electric discharge electricity
The resistance value of resistance both can change the linear discharge slope of top rake voltage, to control the velocity of discharge.
Referring to FIG. 1 and FIG. 2, in an alternative embodiment, the top rake circuit further includes zener diode ZD1, described steady
The cathode of pressure diode ZD1 is connect with one end of the first inductance L1, the anode of the zener diode ZD1 and described second
The input terminal of switching circuit 20 connects.
In the present embodiment, discharge circuit 30 can also include zener diode ZD1 in discharge circuit 30 by gate switch
When the electric energy of voltage output end Vg-out access is discharged, pressure stabilizing is carried out.
The utility model also proposes a kind of top rake circuit.
Referring to FIG. 1 and FIG. 2, the top rake circuit includes:
Gate switch voltage input end Vg-in and gate switch voltage output end Vg-out；
First switch circuit 10 is arranged in series in the gate switch voltage input end Vg-in and gate switch electricity
It presses between output end Vg-out, the first switch circuit 10 is set as opening when receiving the first timing control signal CV1
It opens, and the received gate turn-on voltage of the gate switch voltage input end Vg-in is exported defeated to the gate switch voltage
Outlet Vg-out；
Second switch circuit 20 is set as the unlatching when receiving the second timing control signal CV2, the second timing control
Signal CV2 processed and the first timing control signal CV1 opposite polarity pulse voltage signal each other；
The discharge circuit 30 includes:
First inductance L1, the first inductance L1 are arranged in series in the gate switch voltage output end Vg-out and described
Between the input terminal of second switch circuit 20, the first inductance L1 is set as reducing the gate switch voltage output end Vg-
The electric energy rate of release of out access.
3rd resistor R3, the first end of the 3rd resistor R3 are connect with the gate switch voltage output end Vg-out,
The second end of the 3rd resistor R3 is connect with the input terminal of the second switch circuit 20.
Zener diode ZD1, the cathode of the zener diode ZD1 is connect with one end of the first inductance L1, described
The anode of zener diode ZD1 is connect with the input terminal of the second switch circuit 20.
The utility model top rake circuit by setting first switch circuit 10, and by first switch circuit 10 be arranged in series in
Between the gate switch voltage input end Vg-in and gate switch voltage output end Vg-out, to receive the first timing
It is opened when controlling signal CV1, and the received gate turn-on voltage of gate switch voltage input end Vg-in is exported to gate switch
Voltage output end Vg-out；Top rake circuit is additionally provided with second switch circuit 20 and discharge circuit 30, and when receiving second
It is opened when sequence control signal CV2, so that the electric energy for accessing discharge circuit 30 by gate switch voltage output end Vg-out carries out
Release；Wherein, discharge circuit 30 includes the first inductance L1,3rd resistor R3 and zener diode ZD1, wherein by electric by first
Sense L1 is arranged in series between the input terminal of gate switch voltage output end Vg-out and second switch circuit 20, in electric discharge electricity
When road 30 is discharged the electric energy of access, the electric energy rate of release is reduced.The utility model solves grid electricity Vg by high electricity
When screen-gri cut-in voltage is mutated to low level gate off voltage, pixel voltage also will appear mutation, so that liquid crystal capacitance
On voltage can also mutate, cause the light transmittance of display panel to change, and make display panel occur flicker (dodge
It is bright) the phenomenon that obtain problem.The utility model improves the brightness uniformity of display device.
The utility model also proposes a kind of display device.
Referring to Fig. 3, which includes top rake circuit 600 as described above.The detailed construction of the top rake circuit 600 can
Referring to above-described embodiment, details are not described herein again；It is understood that above-mentioned due to having been used in the utility model display device
Top rake circuit 600, therefore, the embodiment of the utility model display device include the complete of above-mentioned 600 whole embodiments of top rake circuit
Portion's technical solution, and technical effect achieved is also identical, details are not described herein.
With continued reference to Fig. 3, display device further include:
Source electrode driver 200, setting provide data-signal；
Gate drivers 100 are connect, the gate driving with the gate switch voltage output end of the top rake circuit 600
Device 100 is set as the gate turn-on voltage exported according to the gate switch voltage output end, provides grid signal；
Display panel 200, respectively with the number of the horizontal scanning line of the gate drivers 100 and the source electrode driver 300
It is connected according to line, the display panel 200 is set as showing image according to the data-signal and the grid signal.
Display device further includes that sequence controller 400 and driving power 500 connect, sequence controller 400 respectively with grid
Driver 100, source electrode driver 300 and driving power 500 connect, and sequence controller 400 receives external electrical for being set as
Data-signal, control signal and the clock signal of road module output, and be converted into being suitable for gate drivers 100, source electrode drive
Data-signal, control signal and the clock signal of dynamic device 300, realize that the image of liquid crystal display panel is shown.Sequence controller 400 is defeated
Control signal out includes grid control signal and source control signal.Driving power 500 is integrated with multiple and different circuit functions
DC-DC conversion circuit, each conversion circuit exports different voltage values.The electricity of the input terminal input of driving power 500
Pressure is generally 5V or 12V, and the voltage of output includes the operating voltage DVDD provided to sequence controller 400, and drives to grid
The gate turn-on voltage Vgh and shutdown voltage that dynamic device 100 provides.Display panel 200 is made of multiple pixels, each pixel again by
Three sub-pixel compositions of RGB.Each sub-pixel is made of a thin film transistor (TFT) and pixel capacitance, multiple thin film transistor (TFT)s
Constitute thin film transistor (TFT) array.
In the present embodiment, sequence controller 400 respectively with gate drivers 100, source electrode driver 300, top rake circuit 600
And driving power 500 connects, sequence controller 400 is used to be set as to receive data-signal, the control that external circuit module exports
Signal processed and clock signal, and be converted into being suitable for gate drivers 100, the data-signal of source electrode driver 300, control letter
Number and clock signal, realize that the image of liquid crystal display panel is shown.The control signal that sequence controller 400 exports includes grid control
Signal and source control signal.Driving power 500 is integrated with the DC-DC conversion circuit of multiple and different circuit functions, each
Conversion circuit exports different voltage values.The voltage of the input terminal input of driving power 500 is generally 5V or 12V, the electricity of output
Briquetting includes the operating voltage DVDD provided to sequence controller 400, and to the gate turn-on voltage that gate drivers 100 provide
Vgh and shutdown voltage.In the present embodiment, by the way that top rake circuit 600 is arranged, gate turn-on voltage Vgh is subjected to top rake, it will
Corresponding gate turn-on voltage Vgh is depressured, so that the charging voltage of pixel be made to be consistent, and then avoids display panel
200 film flicker is realized and 200 each region brightness of display panel is kept to be consistent.
The above is only the preferred embodiment of the present invention, and therefore it does not limit the scope of the patent of the utility model,
Under all utility models in the utility model are conceived, equivalent structure made based on the specification and figures of the utility model
Transformation, or directly/be used in other related technical areas indirectly and be included in the scope of patent protection of the utility model.
Claims (10)
1. a kind of top rake circuit, is applied to display device, display device includes the first timing control signal of output and the second timing
Control the sequence controller of signal, which is characterized in that the top rake circuit includes:
Gate switch voltage input end and gate switch voltage output end；
First switch circuit is set as the conducting when receiving first timing control signal, to control the gate switch
Voltage input end is electrically connected with the gate switch voltage output end, and by the received grid of gate switch voltage input end
Cut-in voltage is exported to the gate switch voltage output end；
Second switch circuit is set as the conducting when receiving second timing control signal；
Discharge circuit is set as the electricity for accessing the gate switch voltage output end when the second switch circuit is connected
It can be carried out release；And
Current-limiting circuit is set as reducing the electric energy rate of release of the gate switch voltage output end access.
2. top rake circuit as described in claim 1, which is characterized in that the current-limiting circuit include the first inductance, described first
Inductance is arranged in series between the input terminal of the gate switch voltage output end and the second switch circuit, first electricity
Sense is set as reducing the electric energy rate of release of the gate switch voltage output end access.
3. top rake circuit as described in claim 1, which is characterized in that the first switch circuit includes first switch tube,
Two switching tubes and partial pressure unit, the controlled end of the first switch tube is for receiving first timing control signal, and described the
The output end of one switching tube is connect with the first input end of the partial pressure unit, the second input terminal of the partial pressure unit with it is described
Gate switch voltage input end and the interconnection of the input terminal of the second switch；The output end of the second switch and the grid
Pole switching voltage output end, the controlled end of the second switch are connect with the output end of the partial pressure unit.
4. top rake circuit as claimed in claim 3, which is characterized in that the partial pressure unit includes first resistor and the second electricity
Resistance, the first end of the first resistor are the second input terminal of the partial pressure unit, the second end of the first resistor and described
The first end of second resistance connects, and the common end of the first resistor and second resistance is the output end of the partial pressure unit；Institute
The second end for stating second resistance is the first input end of the partial pressure unit.
5. top rake circuit as described in claim 1, which is characterized in that the second switch circuit includes third switching tube, institute
The input terminal of third switching tube and the input terminal for being the second switch circuit are stated, the output end of the third switching tube is grounded,
The controlled end of the third switching tube is for receiving second timing control signal.
6. top rake circuit as described in claim 1, which is characterized in that the discharge circuit further includes 3rd resistor, and described
The first end of three resistance is connect with the gate switch voltage output end, the second end of the 3rd resistor and the second switch
The input terminal of circuit connects.
7. top rake circuit as claimed in claim 6, which is characterized in that the 3rd resistor is variable resistance.
8. top rake circuit as claimed in claim 2, which is characterized in that the top rake circuit further includes zener diode, described
The cathode of zener diode is connect with one end of first inductance, the anode of the zener diode and second switch electricity
The input terminal on road connects.
9. a kind of top rake circuit, which is characterized in that the top rake circuit includes:
Gate switch voltage input end and gate switch voltage output end；
First switch circuit, be arranged in series in the gate switch voltage input end and the gate switch voltage output end it
Between, the first switch circuit is set as the conducting when receiving the first timing control signal, and by the gate switch voltage
The received gate turn-on voltage of input terminal is exported to the gate switch voltage output end；
Second switch circuit, is set as the conducting when receiving the second timing control signal, second timing control signal with
First timing control signal opposite polarity pulse voltage signal each other；
Discharge circuit, the discharge circuit include: the first inductance, and first inductance is arranged in series in the gate switch voltage
Between the input terminal of output end and the second switch circuit, first inductance is set as reducing the gate switch voltage
The electric energy rate of release of output end access；
3rd resistor, the first end of the 3rd resistor are connect with the gate switch voltage output end, the 3rd resistor
Second end is connect with the input terminal of the second switch circuit；
Zener diode, the cathode of the zener diode are connect with one end of first inductance, the zener diode
Anode is connect with the input terminal of the second switch circuit.
10. a kind of display device, which is characterized in that including the top rake circuit as described in claim 1 to 8 any one, or
Including top rake circuit as claimed in claim 9.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821735153.0U CN209000515U (en) | 2018-10-24 | 2018-10-24 | Top rake circuit and display device |
| PCT/CN2018/121643 WO2020082547A1 (en) | 2018-10-24 | 2018-12-18 | Shaping circuit and display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821735153.0U CN209000515U (en) | 2018-10-24 | 2018-10-24 | Top rake circuit and display device |
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| CN209000515U true CN209000515U (en) | 2019-06-18 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201821735153.0U Active CN209000515U (en) | 2018-10-24 | 2018-10-24 | Top rake circuit and display device |
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| Country | Link |
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| CN (1) | CN209000515U (en) |
| WO (1) | WO2020082547A1 (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111181363A (en) * | 2019-07-01 | 2020-05-19 | 苏州纳芯微电子股份有限公司 | Isolated power supply circuit and control method thereof |
| CN112713880A (en) * | 2020-12-21 | 2021-04-27 | 上海联影医疗科技股份有限公司 | Pulse circuit and electron gun |
| CN113257202A (en) * | 2021-04-30 | 2021-08-13 | 北海惠科光电技术有限公司 | Gate drive circuit and drive method of display panel and display device |
| CN113506546A (en) * | 2021-06-25 | 2021-10-15 | 惠科股份有限公司 | Chamfering circuit, driving device and display device |
| CN114220374A (en) * | 2021-12-23 | 2022-03-22 | 绵阳惠科光电科技有限公司 | Angle cutting circuit of display panel and display panel |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101719346B (en) * | 2009-12-31 | 2012-09-19 | 四川虹欧显示器件有限公司 | X drive circuit of plasma display |
| ITMI20121436A1 (en) * | 2012-08-21 | 2014-02-22 | St Microelectronics Srl | POWER SUPPLY FOR AN ELECTRIC APPLIANCE. |
| CN103247280B (en) * | 2013-05-14 | 2016-02-03 | 深圳市华星光电技术有限公司 | Top rake circuit and control method thereof |
| CN106602853A (en) * | 2015-10-15 | 2017-04-26 | 伊顿公司 | Discharge device and discharge method for DC buses of uninterruptible power supply |
| CN106128398B (en) * | 2016-08-31 | 2019-01-01 | 深圳市华星光电技术有限公司 | Grid voltage driving device, method, driving circuit and liquid crystal display panel |
| CN108615510B (en) * | 2018-06-27 | 2021-05-28 | 惠科股份有限公司 | Chamfering circuit and control method |
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2018
- 2018-10-24 CN CN201821735153.0U patent/CN209000515U/en active Active
- 2018-12-18 WO PCT/CN2018/121643 patent/WO2020082547A1/en active Application Filing
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111181363A (en) * | 2019-07-01 | 2020-05-19 | 苏州纳芯微电子股份有限公司 | Isolated power supply circuit and control method thereof |
| CN111181363B (en) * | 2019-07-01 | 2020-10-16 | 苏州纳芯微电子股份有限公司 | Isolated power supply circuit and control method thereof |
| CN112713880A (en) * | 2020-12-21 | 2021-04-27 | 上海联影医疗科技股份有限公司 | Pulse circuit and electron gun |
| CN113257202A (en) * | 2021-04-30 | 2021-08-13 | 北海惠科光电技术有限公司 | Gate drive circuit and drive method of display panel and display device |
| CN113506546A (en) * | 2021-06-25 | 2021-10-15 | 惠科股份有限公司 | Chamfering circuit, driving device and display device |
| CN113506546B (en) * | 2021-06-25 | 2022-03-22 | 惠科股份有限公司 | Chamfering circuit, driving device and display device |
| CN114220374A (en) * | 2021-12-23 | 2022-03-22 | 绵阳惠科光电科技有限公司 | Angle cutting circuit of display panel and display panel |
| CN114220374B (en) * | 2021-12-23 | 2024-03-26 | 绵阳惠科光电科技有限公司 | Display panel's chamfer circuit and display panel |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2020082547A1 (en) | 2020-04-30 |
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