CN208923104U - Chip-packaging structure based on QFN - Google Patents

Chip-packaging structure based on QFN Download PDF

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Publication number
CN208923104U
CN208923104U CN201821959369.5U CN201821959369U CN208923104U CN 208923104 U CN208923104 U CN 208923104U CN 201821959369 U CN201821959369 U CN 201821959369U CN 208923104 U CN208923104 U CN 208923104U
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China
Prior art keywords
chip
heat dissipation
bonding pad
dissipation bonding
heat
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CN201821959369.5U
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Inventor
马磊
党鹏
杨光
彭小虎
王新刚
庞朋涛
任斌
王妙妙
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Xi'an Hangsi Semiconductor Co Ltd
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Xi'an Hangsi Semiconductor Co Ltd
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Abstract

The utility model discloses a kind of chip-packaging structure based on QFN, including heat dissipation bonding pad, chip and the conductive welding disk being located in epoxy insulator, the conductive welding disk is connected with chip by a lead, the central area of the heat dissipation bonding pad is provided with a deep gouge being embedded in for chip, to form a cofferdam in the marginal zone of heat dissipation bonding pad, silver slurry layer is provided between the bottom of the deep gouge and the lower surface and side wall of cofferdam and chip, the bottom of the deep gouge is provided with several heat exchange blind holes extended in heat dissipation bonding pad, has silver paste filling part in the heat exchange blind hole;The heat dissipation bonding pad is provided with separation trough far from the side of chip, and heat dissipation bonding pad is separated to form at least 2 pieces of pad monomers far from the side equal part of chip, is filled with heat conductive insulating item in the separation trough by the separation trough.The utility model not only passes through the setting of deep gouge and the blind hole that exchanges heat, and improves the heat dissipation effect of encapsulating structure, also passes through the setting of separation trough and heat conductive insulating item, reduce tin cream usage amount, reduces the probability of short circuit.

Description

Chip-packaging structure based on QFN
Technical field
The utility model relates to the chip-packaging structures based on QFN, belong to leadless packages technical field.
Background technique
QFN is a kind of leadless packages, is in square or rectangular, and there is the exposed weldering of large area in package bottom central location Disk has the conductive welding disk for realizing electrical connection around the encapsulation periphery of big pad for thermally conductive.Since QFN encapsulation is unlike passing SOIC and the TSOP encapsulation of system have gull wing lead like that, and the conductive path between internal pin and pad is short, electrodynamic capacity And routing resistance is very low in packaging body, so it can provide brilliant electrical property, and is used widely.
It in encapsulation process, needs that chip is bonded on thermal land using silver paste, here, silver paste functions not only as bonding Agent uses, and the heat transfer that superior heating conduction can generate chip is to thermal land, to reduce under working condition Chip temperature, protect chip;But since chip is connected by way of attaching with silver paste, contact area is less, leads Cause the heat dissipation effect of QFN encapsulation semiconductor devices to be improved.
Utility model content
The purpose of the utility model is to provide the chip-packaging structure based on QFN, by the setting of deep gouge and heat exchange blind hole, The contact area of chip and silver paste, silver paste and heat dissipation bonding pad is increased, to increase the heat dissipation capacity in the unit time, Jin Ergai It has been apt to the heat dissipation effect of encapsulating structure, meanwhile, pass through the setting of separation trough and heat conductive insulating item, can not only reduce tin cream makes Dosage reduces the probability that short circuit occurs, moreover it is possible to guarantee that the heat dissipation effect of heat dissipation bonding pad is unaffected.
In order to achieve the above objectives, the technical solution adopted in the utility model is: the chip-packaging structure based on QFN, including Heat dissipation bonding pad, chip and conductive welding disk in epoxy insulator, the chip are located on heat dissipation bonding pad, are located at heat dissipation bonding pad Periphery is equipped with several conductive welding disks, and the conductive welding disk is connected with chip by a lead, the central area of the heat dissipation bonding pad One is provided with the bottom of the deep gouge and to enclose for the deep gouge of chip insertion to form a cofferdam in the marginal zone of heat dissipation bonding pad Silver slurry layer is provided between weir portion and the lower surface and side wall of chip, the bottom of the deep gouge is provided with several and extends to heat dissipation Heat exchange blind hole in pad has silver paste filling part in the heat exchange blind hole;The heat dissipation bonding pad is provided with far from the side of chip Separation trough, the separation groove width are 0.1-0.3mm, and the side of the separation trough by heat dissipation bonding pad far from chip etc. point separates shape At at least 2 pieces of pad monomers, heat conductive insulating item is filled in the separation trough.
Further improved scheme is as follows in above-mentioned technical proposal:
1. in above scheme, the deep gouge depth is arranged no more than chip thickness.
2. in above scheme, the heat exchange blind hole is tapered blind hole, hole of the heat exchange blind hole close to chip one end port Diameter is greater than heat exchange aperture of the blind hole far from chip one end port.
3. in above scheme, being provided with stepped part on the cofferdam inside.
4. in above scheme, the heat conductive insulating thickness, which is less than, separates groove deep.
In 5 above schemes, the area of the pad monomer is not less than 0.3*0.3mm2
6. in above scheme, the spacing of the conductive welding disk and heat dissipation bonding pad is 0.3mm.
7. in above scheme, the conductive welding disk is T-block.
Due to the application of the above technical scheme, the utility model has the advantage that compared with prior art
1, chip-packaging structure of the utility model based on QFN opens up matched with chip in the middle part of heat dissipation bonding pad Corresponding chip so that silver paste is placed in deep gouge by staff in pasting chip, and is installed into deep gouge i.e. by deep gouge It can;At this point, chip lower part, in deep gouge, not only its bottom can pass through the silver slurry layer and deep gouge bottom adhesive of formation, chip The side wall of lower part also can mutually be bonded with the inner wall of the cofferdam outside deep gouge by silver slurry layer, and not only chip and silver slurry layer connect Contacting surface product increased, and the contact area of silver slurry layer and heat dissipation bonding pad also increased, so that in the unit time, more More heats conducts between chip and silver slurry layer, between silver slurry layer and heat dissipation bonding pad, and then improves QFN and encapsulate semiconductor devices Heat dissipation effect;Meanwhile separation trough is opened up on the heat dissipation bonding pad surface far from chip-side, pass through separation trough of different shapes Heat dissipation bonding pad is divided at least two pieces of pad monomers far from a part of equal part of chip, after being divided into multiple pad monomers, Pad monomer is less than former surface area of the heat dissipation bonding pad far from chip-side far from the surface area of chip-side, to reduce tin cream Usage amount, and then effectively control the short circuit phenomenon between heat dissipation bonding pad and conductive welding disk;And it is led on being filled in separation trough After thermal insulation item, the poor epoxy insulation resin of heat-conducting effect will not be filled by separating slot part, to guarantee heat dissipation bonding pad part Heat sinking function it is unaffected;In addition, with the reduction of tin cream usage amount, moreover it is possible to reduce patch cost.
2, chip-packaging structure of the utility model based on QFN opens up heat exchange blind hole in deep gouge bottom, and it is blind to exchange heat Hole is set as tapered blind hole, on the one hand, the setting for the blind hole that exchanges heat can accommodating portion silver paste, avoid extra silver paste from overflowing heavy Slot, on the other hand, after having silver paste filling part in the blind hole that exchanges heat, the contact area of silver paste and heat dissipation bonding pad is further increased, Package cooling effect is further promoted, also, with the raising of heat exchange blind hole quantity, encapsulating structure heat dissipation effect is gradually It improves.
3, chip-packaging structure of the utility model based on QFN, after upper stepped part is opened up on the inside of cofferdam, chip insertion When deep gouge, extra part silver paste is able to enter stepped part between cofferdam inner wall and chip lower sides, thus avoid it is extra Silver paste spread to chip upper surface in extrusion process, and influence the normal work of chip.
4, the thickness of heat conductive insulating item is set smaller than separation trough by chip-packaging structure of the utility model based on QFN Groove depth, prevent heat conductive insulating item is from being full of separation trough, thus in side reserved part space of the heat conductive insulating item far from chip, At this point, when carrying out patch operation, extra part tin cream is able to enter in separation trough, to avoid extra tin cream to heat dissipation The sprawling of pad surrounding, and conductive welding disk is touched, cause short circuit.
Detailed description of the invention
Attached drawing 1 is the structural schematic diagram of the chip-packaging structure based on QFN of the utility model embodiment 1;
Attached drawing 2 is the structural schematic diagram of the chip-packaging structure based on QFN of the utility model embodiment 2.
In the figures above: 1, heat dissipation bonding pad;11, deep gouge;12, cofferdam;121, stepped part;13, exchange heat blind hole;14, divide Separate slot;141, heat conductive insulating item;15, pad monomer;2, silver slurry layer;21, silver paste filling part;3, chip;4, conductive welding disk;5, draw Line;6, epoxy insulator.
Specific embodiment
Embodiment 1: the chip-packaging structure based on QFN, referring to attached drawing 1, including the heatsink welding being located in epoxy insulator 6 Disk 1, chip 3 and conductive welding disk 4, the chip 3 are located on heat dissipation bonding pad 1, are located at 1 periphery of heat dissipation bonding pad and are equipped with several conductions Pad 4, the conductive welding disk 4 and chip 3 are connected by a lead 5, and the central area of the heat dissipation bonding pad 1 is provided with one for chip 3 The deep gouge 11 of insertion, to form a cofferdam 12, the bottom of the deep gouge 11 and cofferdam 12 in the marginal zone of heat dissipation bonding pad 1 Silver slurry layer 2 is provided between the lower surface and side wall of chip 3, the bottom of the deep gouge 11 is provided with several and extends to heat dissipation Heat exchange blind hole 13 in pad 1 has silver paste filling part 21 in the heat exchange blind hole 13;The heat dissipation bonding pad 1 is far from chip 3 Side is provided with separation trough 14, and 14 width of separation trough is 0.1-0.3mm, and the separation trough 14 is by heat dissipation bonding pad 1 far from chip 3 Side equal part be separated to form at least 2 pieces of pad monomers 15, heat conductive insulating item 141 is filled in the separation trough 14.
Above-mentioned 11 depth of deep gouge is arranged no more than 3 thickness of chip;Above-mentioned heat exchange blind hole 13 is tapered blind hole, and above-mentioned heat exchange is blind Hole 13 is greater than heat exchange aperture of the blind hole 13 far from 3 one end port of chip close to the aperture of 3 one end port of chip;Above-mentioned cofferdam 12 Stepped part 121 is provided on inside.
Above-mentioned 141 thickness of heat conductive insulating item is less than 14 groove depth of separation trough;The area of above-mentioned pad monomer 15 is not less than 0.3* 0.3mm2, preferably 0.3*0.3mm2
The spacing of above-mentioned conductive welding disk 4 and heat dissipation bonding pad 1 is 0.3mm;Above-mentioned conductive welding disk 4 is T-block.
Embodiment 2: the chip-packaging structure based on QFN, referring to attached drawing 2, including the heatsink welding being located in epoxy insulator 6 Disk 1, chip 3 and conductive welding disk 4, the chip 3 are located on heat dissipation bonding pad 1, are located at 1 periphery of heat dissipation bonding pad and are equipped with several conductions Pad 4, the conductive welding disk 4 and chip 3 are connected by a lead 5, and the central area of the heat dissipation bonding pad 1 is provided with one for chip 3 The deep gouge 11 of insertion, to form a cofferdam 12, the bottom of the deep gouge 11 and cofferdam 12 in the marginal zone of heat dissipation bonding pad 1 Silver slurry layer 2 is provided between the lower surface and side wall of chip 3, the bottom of the deep gouge 11 is provided with several and extends to heat dissipation Heat exchange blind hole 13 in pad 1 has silver paste filling part 21 in the heat exchange blind hole 13;The heat dissipation bonding pad 1 is far from chip 3 Side is provided with separation trough 14, and 14 width of separation trough is 0.1-0.3mm, and the separation trough 14 is by heat dissipation bonding pad 1 far from chip 3 Side equal part be separated to form at least 2 pieces of pad monomers 15, heat conductive insulating item 141 is filled in the separation trough 14.
Above-mentioned 11 depth of deep gouge is arranged no more than 3 thickness of chip;Above-mentioned heat exchange blind hole 13 is tapered blind hole, and above-mentioned heat exchange is blind Hole 13 is greater than heat exchange aperture of the blind hole 13 far from 3 one end port of chip close to the aperture of 3 one end port of chip;Above-mentioned cofferdam 12 Stepped part 121 is provided on inside.
Above-mentioned 141 thickness of heat conductive insulating item is less than 14 groove depth of separation trough;
The area of above-mentioned pad monomer 15 is not less than 0.3*0.3mm2, preferably 0.3*0.3mm2
The spacing of above-mentioned conductive welding disk 4 and heat dissipation bonding pad 1 is 0.3mm.
When using above-mentioned QFN encapsulating structure, by the setting of deep gouge 11 and the blind hole 13 that exchanges heat, increasing chip 3 and silver While starching contact area, increase the contact area of silver paste and heat dissipation bonding pad 1, to increase in the unit time, chip 3 and silver The heat exchange amount of slurry, silver paste and heat dissipation bonding pad 1, so as to improve the heat dissipation effect of QFN encapsulating structure;Meanwhile passing through separation trough 14 Setting, makes heat dissipation bonding pad 1 be separated to form muti-piece pad monomer 15 far from a side surface equal part of chip 3, reduces heat dissipation bonding pad 1 When the patch of part and the contact area of PCB, to reduce the usage amount of tin cream;With the reduction of tin cream usage amount, on the one hand, The probability that tin cream spreads to conductive welding disk 4 from heat dissipation bonding pad 1 is reduced, pad monomer 15 and conductive welding disk 4 are effectively controlled Between short circuit phenomenon, on the other hand, moreover it is possible to reduce attachment cost.
In addition, the setting of deep gouge 11 can also facilitate the accurate chip 3 of staff, and silver paste is cooperated to stablize insertion deep gouge 11 chip 3 improves the stability that chip 3 is installed, to improve 3 package quality of chip.
And due to the setting of separation trough 14, in injection molding packaging, epoxy insulation resin can be filled into separation trough 14, be caused The thermal contact conductance area of heat dissipation bonding pad 1 and PCB reduce, and influence its heat-conducting effect, therefore, pass through heat conductive insulating item 141 Setting, while guaranteeing 1 heat-conducting effect of heat dissipation bonding pad, moreover it is possible to accommodate extra part tin using reserved 14 part of separation trough Cream further decreases the probability that short circuit occurs, and improves patch quality.
Wherein, when setting T-block for conductive welding disk 4, when resin plastic-sealed using epoxy insulation, T-block can be more preferable Combined with epoxy insulator 6, improve package quality.
The above embodiments are only for explaining the technical ideas and features of the present invention, and its object is to allow be familiar with technique Personage can understand the content of the utility model and implement accordingly, do not limit the protection scope of the present invention. All equivalent change or modifications according to made by the spirit of the present invention essence, should all cover the protection scope of the utility model it It is interior.

Claims (8)

1. a kind of chip-packaging structure based on QFN, including heat dissipation bonding pad (1), the chip (3) being located in epoxy insulator (6) With conductive welding disk (4), the chip (3) is located on heat dissipation bonding pad (1), is located at heat dissipation bonding pad (1) periphery and is equipped with several conductions Pad (4), the conductive welding disk (4) and chip (3) are connected by a lead (5), it is characterised in that: the heat dissipation bonding pad (1) Central area be provided with one for chip (3) insertion deep gouge (11), thus heat dissipation bonding pad (1) marginal zone formed a cofferdam (12), silver slurry layer is provided between the bottom and cofferdam (12) and the lower surface and side wall of chip (3) of the deep gouge (11) (2), the bottom of the deep gouge (11) is provided with several heat exchange blind holes (13) extended in heat dissipation bonding pad (1), and the heat exchange is blind There are silver paste filling part (21) in hole (13);The heat dissipation bonding pad (1) is provided with separation trough (14), institute far from the side of chip (3) Stating separation trough (14) width is 0.1-0.3mm, side equal part of the separation trough (14) by heat dissipation bonding pad (1) far from chip (3) At least 2 pieces of pad monomers (15) are separated to form, are filled with heat conductive insulating item (141) in the separation trough (14).
2. the chip-packaging structure according to claim 1 based on QFN, it is characterised in that: deep gouge (11) depth is not It is arranged greater than chip (3) thickness.
3. the chip-packaging structure according to claim 2 based on QFN, it is characterised in that: the heat exchange blind hole (13) is Tapered blind hole, heat exchange blind hole (13) are greater than heat exchange blind hole (13) far from chip (3) close to the aperture of chip (3) one end port The aperture of one end port.
4. the chip-packaging structure according to claim 3 based on QFN, it is characterised in that: on the inside of the cofferdam (12) On be provided with stepped part (121).
5. the chip-packaging structure according to claim 1 based on QFN, it is characterised in that: the heat conductive insulating item (141) Thickness is less than separation trough (14) groove depth.
6. the chip-packaging structure according to claim 1 based on QFN, it is characterised in that: the pad monomer (15) Area is not less than 0.3*0.3mm2
7. the chip-packaging structure according to claim 6 based on QFN, it is characterised in that: the conductive welding disk (4) and dissipate The spacing of hot weld disk (1) is 0.3mm.
8. the chip-packaging structure according to claim 1 based on QFN, it is characterised in that: the conductive welding disk (4) is T Type block.
CN201821959369.5U 2018-11-27 2018-11-27 Chip-packaging structure based on QFN Active CN208923104U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201821959369.5U CN208923104U (en) 2018-11-27 2018-11-27 Chip-packaging structure based on QFN

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201821959369.5U CN208923104U (en) 2018-11-27 2018-11-27 Chip-packaging structure based on QFN

Publications (1)

Publication Number Publication Date
CN208923104U true CN208923104U (en) 2019-05-31

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110493954A (en) * 2019-08-28 2019-11-22 成都傅立叶电子科技有限公司 PCB construction and preparation method thereof is buried in a kind of QFN device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110493954A (en) * 2019-08-28 2019-11-22 成都傅立叶电子科技有限公司 PCB construction and preparation method thereof is buried in a kind of QFN device
CN110493954B (en) * 2019-08-28 2024-03-22 成都傅立叶电子科技有限公司 QFN device embedded PCB structure and manufacturing method thereof

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