CN208819197U - A kind of switched circuit applied to VPX framework - Google Patents

A kind of switched circuit applied to VPX framework Download PDF

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Publication number
CN208819197U
CN208819197U CN201821740172.2U CN201821740172U CN208819197U CN 208819197 U CN208819197 U CN 208819197U CN 201821740172 U CN201821740172 U CN 201821740172U CN 208819197 U CN208819197 U CN 208819197U
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chip
bus
srio
exchange
fpga
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韩哲
张晓峰
陈伟峰
杨纯璞
黎晓
石斌
秦展
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Tianjin Optical Electrical Communication Technology Co Ltd
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Tianjin Optical Electrical Communication Technology Co Ltd
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Abstract

The utility model discloses a kind of switched circuits applied to VPX framework.The switched circuit include be responsible for completing the initial configuration of each chip and the management control module of monitoring on power board, the GbE Switching Module for the ethernet communication data exchange being responsible between each board, the SRIO communication data exchange being responsible between each board SRIO Switching Module and be responsible for completing the LVDS Switching Module of the LVDS communication data exchange between each board.The utility model is directed to a variety of function of exchange demands in data communication system to VPX power board, LVDS communication data function of exchange is realized using fpga chip, realize that GbE communication data exchanges using Ethernet switching chip, realize that SRIO communication data exchanges using SRIO exchange chip, VPX power board can be inserted into VPX system and realize a variety of functions of exchange.

Description

A kind of switched circuit applied to VPX framework
Technical field
The utility model relates to the data communication systems of national defence and aviation field, and in particular to one kind is applied to VPX framework Switched circuit.
Background technique
Novel VPX(VITA46) standard when since VME introducing after, for VME bus architecture it is most great be also it is most important Improvement, it will increase carupace width, integrate more I/O, extend format layout.Currently, VME64x is no longer satisfied National defence and the higher and higher performance of aviation field.Many applications, such as radar, image procossing, intelligent signal processing etc., due to by To the limitation of VME64x transmission bandwidth, system performance can not be further increased.VPX system is come into being, and VPX bus is VME skill The evolution of art.It replaces parallel bus using high-speed serial bus, so that military and aviation embedded computer system obtains more High performance.GbE(Gigabit Ethernet) it is the standard based on IP data communications, it is widely used between platform network and same Subsystem in one backboard.SRIO(Serial RapidIO) it is the best way that DSP application middle-high density multiprocessing cluster interconnects. GbE and SRIO is each advantageous, if being combined together these switching fabrics applied to will form a kind of powerful friendship in system Change structure.
Summary of the invention
In view of the problems existing in the prior art, the utility model provides a kind of switched circuit applied to VPX framework.
The technical scheme adopted by the utility model is that: a kind of switched circuit applied to VPX framework, it is characterised in that: should Switched circuit includes being responsible for completing the initial configuration of each chip and the management control module of monitoring on power board, being responsible for each board Between ethernet communication data exchange GbE Switching Module, be responsible between each board SRIO communication data exchange SRIO exchange Module and the LVDS Switching Module for being responsible for completing the LVDS communication data exchange between each board, wherein GbE Switching Module passes through GE Bus is connect with connector, and LVDS Switching Module is connect by LVDS bus with connector, and SRIO Switching Module is total by SRIO Line is connect with connector, and management control module is exchanged with GbE Switching Module, SRIO Switching Module, LVDS respectively by CTR bus Module connection.
Management control module described in the utility model use STM32 single-chip microcontroller, GbE Switching Module use BCM53346 with Too net exchange chip, SRIO Switching Module use CPS1848 exchange chip, and LVDS Switching Module uses FPGA-V6 chip, wherein STM32 single-chip microcontroller passes through I2C bus respectively, RESET line is connect with CPS1848 exchange chip;STM32 single-chip microcontroller passes through respectively QSPI bus, RESET line are connect with BCM53346 Ethernet switching chip;It is total that STM32 single-chip microcontroller passes through select Map respectively Line, spi bus, RESET line are connect with FPGA-V6 chip;STM32 single-chip microcontroller turns USB chip by UART and turns UART bus It is changed to usb bus and connects USB interface.
BCM53346 Ethernet switching chip described in the utility model connects transformer MAG by GE bus, by becoming Connector is connected by GE bus again after pressure isolation;BCM53346 Ethernet switching chip connects transformer MAG by GE bus, RJ45 network interface is connected by GE bus again after transformation is isolated;BCM53346 Ethernet switching chip is connected by GE bus FPGA-V6 chip;BCM53346 Ethernet switching chip connects STM32 single-chip microcontroller by FE bus;BCM53346 Ethernet is handed over It changes chip and STM32 single-chip microcontroller, QSPI FLASH chip is separately connected by QSPI bus;BCM53346 Ethernet switching chip is hung Connect DDR3 memory.
CPS1848 exchange chip described in the utility model connects connector by SRIO bus;CPS1848 exchange chip STM32 single-chip microcontroller is connected by I2C bus;FPGA-V6 chip is connected by SRIO bus.
It is total that FPGA-V6 chip described in the utility model passes through LVDS bus, high speed Serdes Transceiver respectively Line connects connector;FPGA-V6 chip connects PHY chip by RGMII bus, and PHY chip passes through GE bus again and connects BCM53346 Ethernet switching chip;FPGA-V6 chip connects CPS1848 exchange chip by SRIO bus;FPGA-V6 chip Mount DDR3 memory;FPGA-V6 chip passes through spi bus, selectMap bus connection STM32 single-chip microcontroller respectively.
Beneficial effect caused by the utility model is: this programme is directed in data communication system to the more of VPX power board Kind function of exchange demand realizes LVDS communication data function of exchange using fpga chip, Ethernet switching chip is utilized to realize GbE Communication data exchange realizes that SRIO communication data exchanges using SRIO exchange chip, and VPX power board can be inserted into real in VPX system Existing a variety of functions of exchange.
Detailed description of the invention
Fig. 1 is the utility model power board system block diagram;
Fig. 2 is the management control module circuit block diagram in Fig. 1;
Fig. 3 is the GbE Switching Module circuit block diagram in Fig. 1;
Fig. 4 is the SRIO Switching Module circuit block diagram in Fig. 1;
Fig. 5 is the LVDS Switching Module circuit block diagram in Fig. 1.
Specific embodiment
Below in conjunction with attached drawing, the utility model is described in further detail:
As shown in Figure 1, the switched circuit function division applied to VPX framework of the utility model is four functional modules: Management control module, GbE Switching Module, SRIO Switching Module and LVDS Switching Module.
Management control module function is mainly completed by STM32 single-chip microcontroller, is responsible for completing the initial configuration of each chip on plate And monitoring;GbE Switching Module function is mainly completed by BCM53346 Ethernet switching chip, is responsible for completing the ether between each board Net function of exchange;SRIO Switching Module function is completed by RapidIO CPS1848 exchange chip, is responsible between each board of completion SRIO communication data function of exchange, wherein channel width is SRIO × 4;LVDS Switching Module is mainly completed by FPGA-V6 chip, It is responsible for completing the LVDS communication data function of exchange between each board, and passes through the channel high speed Transceiver of FPGA-V6 chip By data rule.
As shown in Fig. 2, the management control function of this power board is mainly completed by STM32 single-chip microcontroller, STM32 single-chip microcontroller passes through SelectMap mode powers on automatic load FPGA program, completes the data communication between FPGA by spi bus;STM32 monolithic The initialization program of BCM53346 Ethernet switching chip is downloaded to its plug-in QSPI FLASH core by QSPI bus by machine In piece, guarantee to initialize after BCM53346 is powered on to start successfully;STM32 single-chip microcontroller completes CPS1848 by I2C bus and exchanges core The initial configuration and monitoring of piece;STM32 single-chip microcontroller turns USB chip by UART and converts usb bus and company for UART bus External USB interface is connect, realizes on-line debugging and status monitoring.
As shown in figure 3, GbE function of exchange is mainly completed by BCM53346 Ethernet switching chip, circuit power on after by The startup program of BCM53346 Ethernet switching chip is loaded into QSPI FLASH chip by QSPI bus by STM32 single-chip microcontroller In, after BCM53346 Ethernet switching chip powers on, startup program is loaded from QSPI FLASH chip, is completed initialization and is matched It sets;BCM53346 Ethernet switching chip passes through GE bus for the RJ45 network interface of back panel connector, FPGA-V6 chip and front panel It connects, realizes GbE communication data exchange in VPX system between each business board and business board, FPGA-V6 chip, preceding GbE communication data exchange between the RJ45 network interface of panel.
As shown in figure 4, SRIO function of exchange mainly by RapidIO CPS1848 exchange chip complete, circuit power on after by STM32 single-chip microcontroller by I2C bus initialization configure CPS1848 exchange chip, CPS1848 exchange chip by SRIO bus with FPGA-V6 chip and back panel connector interconnection, realize SRIO communication data function of exchange between each business board, wherein every channel Width is SRIO × 4.
As shown in figure 5, LVDS function of exchange is mainly completed by FPGA-V6 chip, circuit is led to after powering on by STM32 single-chip microcontroller SelectMap bus load FPGA program is crossed, FPGA-V6 chip is completed to hand over the data of STM32 single-chip microcontroller by spi bus Mutually, SRIO communication data function of exchange is completed by SRIO bus and CPS1848 exchange chip, passes through RGMII bus and PHY core Piece (physical chip in ethernet communication) completes the GbE communication data function of exchange with BCM53346 Ethernet switching chip, LVDS bus is connected to each business board by back panel connector, realizes the LVDS communication data exchange between each business board Function, will be in data rule to memory plane by the channel high speed Transceiver.
This power board is inserted into VPX system, is connected remaining board such as processing board, system board in system by power board It is connected together, realizes GbE exchange, the SRIO exchange, LVDS function of exchange between each board, and the high speed of FPGA can be passed through The channel Transceiver is by data rule.

Claims (2)

1. a kind of switched circuit applied to VPX framework, it is characterised in that: the switched circuit includes being responsible for completing on power board respectively The GbE friendship of the management control module, the ethernet communication data exchange being responsible between each board of the initial configuration and monitoring of chip Mold changing block, the SRIO Switching Module for the SRIO communication data exchange being responsible between each board and the responsible LVDS completed between each board are logical The LVDS Switching Module of letter data exchange, wherein GbE Switching Module is connect by GE bus with connector, and LVDS Switching Module is logical It crosses LVDS bus to connect with connector, SRIO Switching Module is connect by SRIO bus with connector, and management control module passes through CTR bus is connect with GbE Switching Module, SRIO Switching Module, LVDS Switching Module respectively.
2. a kind of switched circuit applied to VPX framework according to claim 1, it is characterised in that: the management control Molding block uses STM32 single-chip microcontroller, and GbE Switching Module uses BCM53346 Ethernet switching chip, and SRIO Switching Module uses CPS1848 exchange chip, LVDS Switching Module use FPGA-V6 chip, wherein STM32 single-chip microcontroller pass through respectively I2C bus, RESET line is connect with CPS1848 exchange chip;STM32 single-chip microcontroller pass through respectively QSPI bus, RESET line and BCM53346 with Too net exchange chip connects;STM32 single-chip microcontroller passes through select Map bus, spi bus, RESET line and FPGA-V6 core respectively Piece connection;STM32 single-chip microcontroller turns USB chip by UART and is usb bus by UART general line system and connects USB interface;
The BCM53346 Ethernet switching chip connects transformer MAG by GE bus, passes through again after transformation is isolated GE bus connects connector;BCM53346 Ethernet switching chip connects transformer MAG by GE bus, after transformation is isolated RJ45 network interface is connected by GE bus again;BCM53346 Ethernet switching chip connects FPGA-V6 chip by GE bus; BCM53346 Ethernet switching chip connects STM32 single-chip microcontroller by FE bus;BCM53346 Ethernet switching chip passes through QSPI bus is separately connected STM32 single-chip microcontroller, QSPI FLASH chip;BCM53346 Ethernet switching chip mounts DDR3 storage Device;
The CPS1848 exchange chip connects connector by SRIO bus;CPS1848 exchange chip is connected by I2C bus Connect STM32 single-chip microcontroller;FPGA-V6 chip is connected by SRIO bus;
The FPGA-V6 chip passes through LVDS bus, high speed Serdes Transceiver bus connection connector respectively; FPGA-V6 chip connects PHY chip by RGMII bus, and PHY chip passes through GE bus connection BCM53346 Ethernet exchanging again Chip;FPGA-V6 chip connects CPS1848 exchange chip by SRIO bus;FPGA-V6 chip mounts DDR3 memory; FPGA-V6 chip passes through spi bus, selectMap bus connection STM32 single-chip microcontroller respectively.
CN201821740172.2U 2018-10-26 2018-10-26 A kind of switched circuit applied to VPX framework Active CN208819197U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201821740172.2U CN208819197U (en) 2018-10-26 2018-10-26 A kind of switched circuit applied to VPX framework

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201821740172.2U CN208819197U (en) 2018-10-26 2018-10-26 A kind of switched circuit applied to VPX framework

Publications (1)

Publication Number Publication Date
CN208819197U true CN208819197U (en) 2019-05-03

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Application Number Title Priority Date Filing Date
CN201821740172.2U Active CN208819197U (en) 2018-10-26 2018-10-26 A kind of switched circuit applied to VPX framework

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CN (1) CN208819197U (en)

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