CN208691414U - A kind of DDR2 image storage IP kernel - Google Patents
A kind of DDR2 image storage IP kernel Download PDFInfo
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- CN208691414U CN208691414U CN201821429267.2U CN201821429267U CN208691414U CN 208691414 U CN208691414 U CN 208691414U CN 201821429267 U CN201821429267 U CN 201821429267U CN 208691414 U CN208691414 U CN 208691414U
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Abstract
The utility model discloses a kind of DDR2 images to store IP kernel, including IP kernel, the IP kernel includes img_in_fps module, img_out_fps module, img_in_check module and ddr2_img_ctrl module, the IP kernel connecting pin is equipped with ddr2_ip core, and ddr2_ip core connecting pin is equipped with ddr2 chip.The IP kernel of the utility model can dock the ddr2 chip of 32bit user side, and the shared mechanism of ddr can be realized with other devices, by providing the IP kernel of DDR2 image storage, allow user that image data is written to the IP kernel, and user does not have to how relationship specifically implements, achieve the purpose that simple and fast efficient realization cache image, to solve the problems, such as that the storage of DDR2 image is diversified.
Description
Technical field
The utility model relates to IP kernel field, in particular to a kind of DDR2 image stores IP kernel.
Background technique
After traditional camera obtains image, big city is stored the image in sdram, and the method for storage has very much, has
Storage based on ping-pong operation, there is a storage etc. based on read/write address, traditional storage mode be it is very inflexible, often
Remove to set the framework of storage according to actual needs, and reusability is lower.In image storing process, solving image buffer storage is primarily to ask
Topic, in addition to solving this problem, sometimes we need to do the resource of sdram one maximized utilization, such as with a part
Image is deposited, the address of another part is used to store other data, due to the variability of demand, causes to be frequently necessary to modify.
Therefore, it is necessary to solve the above problems to invent a kind of DDR2 image storage IP kernel.
Utility model content
The purpose of this utility model is to provide a kind of DDR2 images to store IP kernel, by providing the IP of DDR2 image storage
Core allows user that image data is written to the IP kernel, and user does not have to how relationship specifically implements, and reaches simple fast
The prompt efficient purpose for realizing cache image, to solve the problems, such as that the storage of DDR2 image is diversified, to solve above-mentioned background skill
The problem of being proposed in art.
To achieve the above object, the utility model provides the following technical solutions: a kind of DDR2 image storage IP kernel, including IP
Core, the IP kernel include img_in_fps module, img_out_fps module, img_in_check module and ddr2_img_ctrl
Module, the ddr2_img_ctrl module are responsible for storing and reading the image data stored in ddr2, and the IP kernel connecting pin is set
There is ddr2_ip core, ddr2_ip core connecting pin is equipped with ddr2 chip.
Preferably, the img_in_fps module is set to the output end of ddr2_img_ctrl module, the img_in_
Fps module is responsible for the input frame rate of statistical picture.
Preferably, the img_out_fps module is set to the output end of ddr2_img_ctrl module, the img_
Out_fps module is responsible for the frame per second of statistical picture output.
Preferably, the img_in_check module is set to the output end of ddr2_img_ctrl module, the img_
In_check module check actually enter image resolution ratio and the resolution ratio that user is arranged it is whether consistent.
Preferably, the ddr2_ip core is that user needs to generate.
The technical effect and advantage of the utility model:
1, by providing the IP kernel of DDR2 image storage, allow user that image data, and user is written to the IP kernel
Specifically how to be implemented without relationship, achieve the purpose that simple and fast efficient realization cache image, to solve DDR2 figure
As storing diversified problem；
2, the IP kernel can dock the ddr2 chip of 32bit user side, and the shared machine of ddr can be realized with other devices
System；
3, the width and height of image can be configured, can configure the initial address of DDR2, maximum address digit and access image
Number indicates the frame per second of input picture and the frame per second of output image in real time；
4, the thing that tradition needs are modified is generated to the module of needs by way of parametrization, and is directed to input picture
Resolution ratio done simple checking treatment, meanwhile, done statistical disposition for the frame per second of the image output and input, conveniently made
User's observation.
Detailed description of the invention
Fig. 1 is the entire block diagram of the utility model.
Fig. 2 is the transmission interface time diagram of the utility model.
Fig. 3 is the accept port time diagram of the utility model.
Fig. 4 is the utility model IP kernel basic structure schematic diagram.
In figure: 1 IP kernel, 2 ddr2_ip cores, 3 ddr2 chips.
Specific embodiment
The following will be combined with the drawings in the embodiments of the present invention, carries out the technical scheme in the embodiment of the utility model
Clearly and completely describe, it is clear that the described embodiments are only a part of the embodiments of the utility model, rather than whole
Embodiment.Based on the embodiments of the present invention, those of ordinary skill in the art are without making creative work
Every other embodiment obtained, fall within the protection scope of the utility model.
Embodiment 1
A kind of DDR2 image as shown in Figs 1-4 stores IP kernel, including IP kernel 1, and the IP kernel 1 includes img_in_fps mould
Block, img_out_fps module, img_in_check module and ddr2_img_ctrl module, the ddr2_img_ctrl module
It is responsible for storage and reads the image data stored in ddr2,1 connecting pin of IP kernel is equipped with ddr2_ip core 2, the ddr2_ip
2 connecting pin of core is equipped with ddr2 chip 3.
Further, in the above-mentioned technical solutions, the img_in_fps module is set to ddr2_img_ctrl module
Output end, the img_in_fps module are responsible for the input frame rate of statistical picture.
Further, in the above-mentioned technical solutions, the img_out_fps module is set to ddr2_img_ctrl module
Output end, the img_out_fps module be responsible for statistical picture output frame per second.
Further, in the above-mentioned technical solutions, the img_in_check module is set to ddr2_img_ctrl module
Output end, the img_in_check module check actually enter image resolution ratio and user setting resolution ratio whether one
It causes.
Further, in the above-mentioned technical solutions, the ddr2_ip core 2 is that user needs to generate.
Embodiment 2
As shown in Figs 1-4, this IP kernel 1 such as implements function such as:
Write image: when inputting piece image, first by first cache blocks of image buffers to ddr2 chip 3
(block) in, if having carried out piece image again, check whether next block is reading at this time, if abandoned reading
Otherwise the frame data are cached in the block, and so on, it is cached to the last one block and restarts again later.
Reading image: after writing piece image, just starting and read to enable, as next block for reading image and currently
Write block difference and can switch and read next block, after reading the last one caching, again switch to first it is slow
Reading image is deposited, and so on.
The width and height of image can be configured, can configure the initial address, maximum address digit and access image of ddr2 chip 3
Number (according to actual disposition).
The frame per second of input picture and the frame per second of output image can be indicated in real time.
As shown in Fig. 2, img_din_sop indicates the starting of piece image in specific operation, img_din_eop refers to
The end of diagram picture, img_din_vld indicate the validity of image data img_din, and img_in_fps indicates input picture
Frame per second.
As shown in figure 3, indicating that user can produce the request (rd_img_ for reading image when rd_img_rdy is 1
Req), when rd_img_req==1 when, image data can in next clock output, and have img_dout_vld come, indicate image
The validity of data, img_dout_sop indicate the starting of image, and img_dout_eop indicates the end of image, img_dout_
The frame per second of fps instruction output image.
As shown in figure 4, img_in_fps _ dy:u1 is responsible for the input frame rate of statistical picture；Img_out_fps_dy:u2 is negative
Blame the frame per second of statistical picture output；Img_in_check:u3 checks the resolution of the resolution ratio for actually entering image and user setting
Whether rate is consistent；Ddr2_img_ctrl:u0 is responsible for storing and reading the image data stored in ddr2 chip 3.
This practical working principle:
Referring to Figure of description 1-4. by providing the IP kernel 1 of 3 image of ddr2 chip storage, allow user to the IP
Image data is written in core 1, and user does not have to how relationship specifically implements, and reaches simple and fast efficient realization cache image
Purpose, thus solve the problems, such as 3 image of ddr2 chip storage it is diversified, the width and height of image can be configured, can configure ddr2
Initial address, maximum address digit and the number (according to actual disposition) for accessing image of chip 3, can indicate input figure in real time
The thing that tradition needs are modified is generated needs by way of parametrization by the frame per second of picture and the frame per second of output image, the program
Module, and done simple checking treatment for the resolution ratio of input picture, meanwhile, for the frame of the image output and input
Rate has done statistical disposition, convenient for users to observation.
User interface list
| Signal | I/O | Bit wide | |
| clk_in | I | 1 | The clock of input picture |
| clk_out | I | 1 | Export the clock of image |
| phy_clk | I | 1 | Phy clock, i.e. ddr2 IP kernel side clock |
| rst_n | I | 1 | Global reset |
| img_din | I | 32 | Image input data defaults 32bit |
| img_din_vld | I | 1 | Image input data effective index signal |
| img_din_sop | I | 1 | The input starting of one frame image |
| img_din_eop | I | 1 | One frame image end of input |
| img_in_fps | O | 10 | The frame per second of input picture indicates |
| flag_err_in | O | 1 | Input image resolution detection, if 1, then it represents that input image resolution mistake |
| rd_img_rdy | I | 1 | When the signal is 1, expression is had been prepared for, and can read data |
| rd_img_req | I | 1 | The request of image is read, high level is effective |
| img_dout | O | 32 | Read the data of image |
| img_dout_vld | O | 1 | Read image useful signal |
| img_dout_sop | O | 1 | Read the starting instruction of image |
| img_dout_sop | O | 1 | Read the termination instruction of image |
| img_dout_fps | O | 10 | Export the frame per second instruction of image |
| local_address | O | 23 | Generate the address of IP kernel |
| local_write_req | O | 1 | Generate the write request of IP kernel |
| local_read_req | O | 1 | Generate the read request of IP kernel |
| local_burstbegin | O | 1 | Generate the burstbegin signal of IP kernel |
| local_wdata | O | 32 | Generate IP kernel writes data |
| local_ready | I | 1 | Generate IP kernel gets out signal |
| local_rdata | I | 32 | Generate the reading data of IP kernel |
| local_rada_valid | I | 1 | Generate the reading data valid signal of IP kernel |
| local_init_done | I | 1 | Generate the initialization completion signal of IP kernel |
Parameterize list
| Parameter name | Default value | |
| IMG_DATA_IN_W | 32 | The bit wide (bit) of input picture |
| IMG_DATA_OUT_W | 32 | Export the bit wide (bit) of image |
| IMG_WIDTH | 640 | The width of input picture |
| IMG_HIGH | 480 | The height of input picture |
| IMG_IN_FIFO | 256 | More than or equal to 256 |
| IMG_OUT_FIFO | 256 | More than or equal to 256 |
| IMG_DDR_STR | 0 | User specifies the initial address of ddr |
| IMG_FIG | 3 | User specifies the preservation image number of ddr, and maximum saves 128 width |
| DDR_ADD | 23 | The address size for generating DDR2IP user side, according to actual disposition |
| TIME_1S_IN | 25_000000 | Input picture clock frequency (hz), the IP can be according to this Data-Statistics input frame rates |
| TIME_1S_OUT | 25_000000 | It exports picture clock frequency (hz), which can be according to this Data-Statistics output frame rate |
Finally, it should be noted that the above descriptions are merely preferred embodiments of the present invention, it is not limited to this
Utility model, although the utility model is described in detail with reference to the foregoing embodiments, for those skilled in the art
For, it is still possible to modify the technical solutions described in the foregoing embodiments, or to part of technical characteristic
It is equivalently replaced, within the spirit and principle of the utility model, any modification, equivalent replacement, improvement and so on,
It should be included within the scope of protection of this utility model.
Claims (5)
1. a kind of DDR2 image stores IP kernel (1), including IP kernel (1), it is characterised in that: the IP kernel (1) includes img_in_
Fps module, img_out_fps module, img_in_check module and ddr2_img_ctrl module, IP kernel (1) connecting pin
Equipped with ddr2_ip core (2), ddr2_ip core (2) connecting pin is equipped with ddr2 chip (3).
2. a kind of DDR2 image storage IP kernel (1) according to claim 1, it is characterised in that: the img_in_fps mould
Block is set to the output end of ddr2_img_ctrl module.
3. a kind of DDR2 image storage IP kernel (1) according to claim 1, it is characterised in that: the img_out_fps mould
Block is set to the output end of ddr2_img_ctrl module.
4. a kind of DDR2 image storage IP kernel (1) according to claim 1, it is characterised in that: the img_in_check
Module is set to the output end of ddr2_img_ctrl module.
5. a kind of DDR2 image storage IP kernel (1) according to claim 1, it is characterised in that: the ddr2_ip core (2)
It is that user needs to generate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821429267.2U CN208691414U (en) | 2018-09-03 | 2018-09-03 | A kind of DDR2 image storage IP kernel |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821429267.2U CN208691414U (en) | 2018-09-03 | 2018-09-03 | A kind of DDR2 image storage IP kernel |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN208691414U true CN208691414U (en) | 2019-04-02 |
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| CN201821429267.2U Active CN208691414U (en) | 2018-09-03 | 2018-09-03 | A kind of DDR2 image storage IP kernel |
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| Country | Link |
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2018
- 2018-09-03 CN CN201821429267.2U patent/CN208691414U/en active Active
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