CN208589987U - A kind of wide bandwidth SAW reader reception device - Google Patents

A kind of wide bandwidth SAW reader reception device Download PDF

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Publication number
CN208589987U
CN208589987U CN201821131584.6U CN201821131584U CN208589987U CN 208589987 U CN208589987 U CN 208589987U CN 201821131584 U CN201821131584 U CN 201821131584U CN 208589987 U CN208589987 U CN 208589987U
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signal
module
saw
analog
reception device
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CN201821131584.6U
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Chinese (zh)
Inventor
杨云涛
吴雅君
付道俊
王楠
阎毓杰
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719th Research Institute of CSIC
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719th Research Institute of CSIC
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Abstract

The utility model provides a kind of wide bandwidth SAW reader reception device, can match with the SAW ID-tag of the big code capacity small size of ISM 2.4GHz.RF carrier wave signal solution is transferred in the signal in setting bandwidth range by the wide bandwidth SAW reader reception device of the utility model by FBAR filter and broadband demodulator module, the direct processing to demodulated signal is realized by baseband signal conditioning module and analog-digital converter (ADC), can be matched with the SAW ID-tag of the big code capacity small size of ISM 2.4GHz.RF carrier wave signal solution is transferred to base band I/Q signal by broadband demodulator module by the wide bandwidth SAW reader reception device of the utility model, the direct processing to demodulated signal is realized by baseband signal conditioning module and analog-digital converter (ADC), without intermediate IF grades and correlation filter, parts number is less, mixing is spuious less, power consumption is lower.

Description

A kind of wide bandwidth SAW reader reception device
Technical field
The utility model relates to technical field of RFID, and in particular to a kind of wide bandwidth (being greater than 80MHz) surface acoustic wave Reader reception device.
Background technique
Acoustic surface wave radio frequency identifying system is mainly made of SAW ID-tag and SAW reader two parts, sound table The operation principle schematic diagram of surface wave radio-frequency recognition system is as shown in Figure 1, the working principle of acoustic surface wave radio frequency identifying system is as follows: After receiving inquiry signal inverse piezoelectricity occurs first inside it for SAW reader transmitting inquiry signal, SAW ID-tag Effect converts electrical signals to surface acoustic wave signal, and surface acoustic wave signal encounters during propagation in label by coding Reflection is generated after reflecting grating, due to the difference of encoding scheme, the response signal that SAW reader receives is also variant, sound Surface wave reader demodulates identification of the realization to SAW ID-tag encoded information after response signal.
SAW reader reception device in traditional acoustic surface wave radio frequency identifying system uses ISM 433MHz, ISM 920MHz frequency range, acoustic surface wave radio frequency identifying system work belt width causes SAW ID-tag oversized and marks The low problem of the code capacity of label.The acoustic surface wave radio frequency identifying system country of the big code capacity small size of ISM 2.4GHz is still Belonging to blank, main cause is that the SAW ID-tag of the big code capacity small size of 2.4GHz needs the up to high bandwidth of 83MHz, Accurately to decode the label requires SAW reader reception device that can demodulate the tag response signal of 83MHz bandwidth, this The time domain width of the response signal of sample SAW ID-tag is just sufficiently narrow, and then the small size of realization label and big code capacity.
Traditional wide bandwidth reception device in terms of reception bandwidth or working frequency range with acoustic surface wave radio frequency identifying system Characteristic is not consistent, it is difficult to match with the SAW ID-tag of the big code capacity small size of 2.4GHz.
Utility model content
In view of this, the present invention provides a kind of wide bandwidth SAW reader reception devices, can be with ISM The SAW ID-tag of the big code capacity small size of 2.4GHz matches.
A kind of wide bandwidth SAW reader reception device of the utility model, including FPGA module, synchronised clock electricity Road, local oscillator and the antenna being sequentially connected in series, RF switch, FBAR filter, broadband demodulator module, baseband signal conditioning module with And analog-digital converter;
Wherein, the FPGA module is connected by JESD204B high-speed interface with the analog-digital converter, passes through SPI interface It is connected with the analog-digital converter, the synchronous clock circuit, the local oscillator and the baseband signal conditioning module, passes through GPIO Interface is connected with the RF switch;In addition the synchronous clock circuit uses differential mode to be connected with the FPGA module;
The antenna is for receiving SAW ID-tag response signal;
The RF switch controls for realizing the reception of SAW ID-tag response signal;
The FBAR filter realizes loss and interference suppression for being filtered to SAW ID-tag response signal System;
The broadband demodulator module is used to SAW ID-tag response signal being demodulated into IQ baseband signal;
The baseband signal conditioning module is used to carry out signal condition to IQ baseband signal;
The analog-digital converter is used to carry out the IQ baseband signal after conditioning the conversion of analog signal to digital signal;
The FPGA module completes SAW ID-tag response for handling the IQ baseband signal after analog-to-digital conversion The decoding and verification of signal;
The synchronous clock circuit communicates between FPGA module and analog-digital converter provides jitter clock;
The local oscillator is used to provide local oscillation signal for broadband demodulator module.
It further, further include amplifier;The amplifier is serially connected in the FBAR filter and the broadband demodulator mould Between block, for amplifying processing to the RF carrier wave signal after filtering processing.
It further, further include transceiver insulation module, the transceiver insulation module is serially connected in RF switch and FBAR filter Between wave device, for avoiding strong jamming from being coupled to receiving channel.
Wherein, the main control chip of the FPGA module uses XC7Z045;Synchronous clock circuit uses AD9523 chip, together Walk 8 tunnel of clock output;Local oscillator uses ADRF4351 chip, is internally integrated phaselocked loop and voltage controlled oscillator;FBAR filter uses ACPF-7124 chip;RF switch uses SKY13286, isolation 60dB;High-speed AD converter uses AD9680 chip.
The utility model has the advantages that
The wide bandwidth SAW reader reception device of the utility model passes through FBAR filter and broadband demodulator mould RF carrier wave signal solution is transferred in the signal in setting bandwidth range by block, passes through baseband signal conditioning module and analog-to-digital conversion Device (ADC) realizes the direct processing to demodulated signal, can be with the surface acoustic wave mark of the big code capacity small size of ISM 2.4GHz Label match.The wide bandwidth SAW reader reception device of the utility model is believed RF carrier wave by broadband demodulator module Number solution is transferred to base band I/Q signal, is realized by baseband signal conditioning module and analog-digital converter (ADC) to the straight of demodulated signal Processing is connect, intermediate IF grades and correlation filter are not necessarily to, parts number is less, mixing is spuious less, power consumption is lower.
The wide bandwidth SAW reader reception device of the utility model is suitable for the frequency range of ISM 2.4GHz, is also suitable In the acoustic surface wave radio frequency identifying system of traditional ISM 433MHz and ISM 920MHz frequency range.
Detailed description of the invention
Fig. 1 is the operation principle schematic diagram of acoustic surface wave radio frequency identifying system;
Fig. 2 is the utility model wide bandwidth SAW reader reception device structure chart.
Specific embodiment
It develops simultaneously embodiment below with reference to figure, the utility model is described in detail.
The utility model provides a kind of wide bandwidth SAW reader reception device.
One, wide bandwidth SAW reader reception device is as follows:
A kind of wide bandwidth SAW reader reception device of the present embodiment is as shown in Fig. 2, include RF switch, day Line, transceiver insulation module, FBAR filter, low-noise amplifier, broadband demodulator module, baseband signal conditioning module, modulus turn Parallel operation (ADC), FPGA module and synchronous clock circuit and local oscillator.
Wherein, the FPGA module port 1 is connected using JESD204B high-speed interface with the analog-digital converter port 5, The FPGA module port 2 is using SPI interface and the analog-digital converter port 4, the synchronous clock circuit port 5, described Local oscillator port 1 is connected with baseband signal conditioning module port 5, the FPGA module port 3 using GPIO interface with it is described RF switch port 4, the transceiver insulation module port 2 are connected, and the FPGA module port 4 is using differential mode and described same Clock circuit port 3 is walked to be connected;
The RF switch port 1,3 is connected with the transceiver insulation module port 1, the antenna respectively;
The transceiver insulation module port 3 is connected with the input port of the FBAR filter;
The output port of the FBAR filter is connected with the low-noise amplifier input port;
The low-noise amplifier output port is connected with the broadband demodulator module port 1;
The broadband demodulator module port 2,3,4 respectively with the local oscillator port 3, baseband signal conditioning module port 2,1 is connected using differential mode;
Baseband signal conditioning module port 3,4 uses differential mode phase with the analog-digital converter port 2,1 respectively Even;The analog-digital converter port 3 is connected with the synchronous clock circuit port 1 using differential mode.
The antenna is used to receive the RF carrier wave signal of 2.4GHz;
The RF carrier wave signal of the 2.4GHz is SAW ID-tag response signal;
The RF switch controls for realizing the reception of RF carrier wave signal, and the RF switch port 1 can after connecting with 3 It is received with realizing;
The transceiver insulation module is a kind of circuit that receiving and transmitting signal is isolated, logical for avoiding strong jamming from being coupled to reception Road;
The FBAR filter is a kind of thin film bulk acoustic wave resonator type bandpass filter, for carrying out to RF carrier wave signal Filtering processing, the filtering processing that the low insertion loss and high interference of realization device inhibit;
The broadband demodulator module is used to RF carrier wave signal being demodulated into IQ baseband signal, is a kind of direct lower change in broadband Frequency circuit realizes the direct demodulation of RF carrier wave signal to base band I/Q signal;
The baseband signal conditioning module is a kind of comprising programmable low-pass filter and variable gain amplifier chip Signal conditioning circuit, for IQ baseband signal carry out signal condition;
The analog-digital converter is used to carry out the conversion of analog signal to digital signal to the IQ baseband signal after conditioning, this Embodiment is realized using a kind of analog-to-digital conversion 12 or more chips of GSPS sample rate.
The FPGA module is a kind of field programmable gate array of complete programmable integrated arm processor, not only may be used To realize JESD204B high-speed communication interface, moreover it is possible to which the arm processor realizing the hardware-accelerated of algorithm, while being internally integrated provides Enrich flexible external interface.It is needed according to decoding algorithm using corresponding signal processing side when device is in running order Method carries out digitized processing to I and Q baseband, completes the decoding and verification of SAW ID-tag response signal;
The main control chip of FPGA module in the present embodiment wide bandwidth reception device uses XC7Z045, includes 900 DSP Processing unit, 350K logic unit;Synchronous clock circuit uses AD9523 chip, the output of 8 road synchronised clocks;Local oscillator is to use ADRF4351 chip, is internally integrated phaselocked loop and voltage controlled oscillator;FBAR filter uses ACPF-7124 chip;RF switch Using SKY13286,60dB isolation;Analog-digital converter use AD9680 chip, 14,1GSPS sample rate.
The synchronous clock circuit communicates between FPGA module and analog-digital converter provides jitter clock;The local oscillator is A kind of frequency synthesizer of integrated phase lock and voltage controlled oscillator, provides local oscillation signal for broadband demodulator module;The low noise Amplifier is a kind of High Linear low-noise amplifier, as signal processing optimised devices, realizes to respond SAW ID-tag and believe Number processing is amplified, can also be not provided with, wide bandwidth SAW reader reception device is equally able to achieve wide bandwidth sound table Surface wave reader receives.
SAW ID-tag response signal is R (t) in the utility model:
R (t)=sin (w0*t)+sin ((w0+BW/n) * t)+...+sin ((w0+BW) * t)+n (t)
Wherein n is positive integer, and t is the time, and response signal R (t) includes the baseband signal of SAW ID-tag encoded information (bandwidth BW), radio-frequency carrier signal w0 and noise signal n (t).
Response signal R (t) is received by antenna, first passes around transceiver insulation module, can be effective by transceiver insulation module It avoids the strong jamming of local oscillator module from being coupled to receiving channel receiving end signal-to-noise ratio is caused to deteriorate;Signal is output to FBAR filter later Wave device and low-noise amplifier carry out signal condition, wherein the three dB bandwidth of FBAR filter is slightly larger than BW, mentions to greatest extent Height receives the signal-to-noise ratio of signal.
The local oscillation signal for the frequency w0 that broadband demodulator module is provided using local oscillator module will be after FBAR filter filtering Signal is directly converted to baseband signal I (t) and baseband signal Q (t), wherein
I (t)=sin ((BW/k*t)+sin ((2*BW/k*t)+...+sin ((w0+BW) * t)+n (t), k is positive integer,
Q (t)=cos ((BW/k*t)+cos ((2*BW/k*t)+...+cos ((w0+BW) * t)+n (t);
Baseband signal I (t) and baseband signal Q (t) does further signal processing using baseband signal conditioning module, locates Before managing FPGA by the filter corner frequency fc=1.2BW of the SPI programming port configuration module of baseband signal conditioning module and Gain, so that baseband signal I (t) and baseband signal Q (t) are in the optimum sampling state of analog-digital converter.
Then, I and Q two-way bandwidth is BW under the low jitter sampling clock that synchronous clock circuit provides by analog-digital converter Analog signal be converted into the digital signal that I and Q two-way bandwidth is BW ' respectively, the sampling clock of low jitter can be turned with climbing form number The number of significant digit of parallel operation reduces the distortion of signal.
Finally, being transferred to FPGA module by JESD204B high-speed interface.FPGA module is adopted according to the needs of decoding algorithm Digitized processing is carried out to I and Q baseband with corresponding signal processing method, realizes the solution of SAW ID-tag response signal Code and verification, and then the SAW ID-tag decoding operate of a cycle is completed, realize that bandwidth is the tag response signal of BW Demodulation and reception.
Two, the method for reseptance using the utility model wide bandwidth SAW reader reception device is as follows:
Specifically comprise the following steps:
Step 1, for device after working on power, FPGA module carries out initial configuration to reception device by SPI interface, if Local oscillator parameter is set, the synchronised clock of analog-digital converter sampling clock and synchronous clock circuit is configured, FPGA module passes through GPIO The port 1 of RF switch is connected to by interface with 3;
Step 2, SAW ID-tag response signal is received by antenna, is exported by transceiver insulation module and is given FBAR filter Signal condition is carried out with low-noise amplifier;
Step 3, broadband demodulator module to low noise amplifier output signal carry out directly demodulation generate the orthogonal I of two-way with Q baseband does further signal processing by baseband signal conditioning module and generates IQ baseband signal;
Step 4, analog-digital converter sample baseband signal conditioning module treated signal, passes through JESD204B high-speed interface It is transferred to FPGA module;
Step 5, FPGA module uses corresponding signal processing method to I and Q baseband according to the needs of decoding algorithm Digitized processing is carried out, realizes the decoding and verification of SAW ID-tag response signal, and then complete the sound surface of a cycle Wave label decoding operate repeats step 2-5, until all signals are received.
In conclusion the above is only the preferred embodiments of the present utility model only, it is not intended to limit the utility model Protection scope.Within the spirit and principle of the utility model, any modification, equivalent replacement, improvement and so on should all wrap Containing being within the protection scope of the utility model.

Claims (4)

1. a kind of wide bandwidth SAW reader reception device, which is characterized in that including FPGA module, synchronous clock circuit, Local oscillator and the antenna being sequentially connected in series, RF switch, FBAR filter, broadband demodulator module, baseband signal conditioning module and Analog-digital converter;
Wherein, the FPGA module is connected by JESD204B high-speed interface with the analog-digital converter, passes through SPI interface and institute It states analog-digital converter, the synchronous clock circuit, the local oscillator to be connected with the baseband signal conditioning module, passes through GPIO interface It is connected with the RF switch;In addition the synchronous clock circuit uses differential mode to be connected with the FPGA module;
The antenna is for receiving SAW ID-tag response signal;
The RF switch controls for realizing the reception of SAW ID-tag response signal;
The FBAR filter realizes loss and AF panel for being filtered to SAW ID-tag response signal;
The broadband demodulator module is used to SAW ID-tag response signal being demodulated into IQ baseband signal;
The baseband signal conditioning module is used to carry out signal condition to IQ baseband signal;
The analog-digital converter is used to carry out the IQ baseband signal after conditioning the conversion of analog signal to digital signal;
The FPGA module completes SAW ID-tag response signal for handling the IQ baseband signal after analog-to-digital conversion Decoding and verification;
The synchronous clock circuit communicates between FPGA module and analog-digital converter provides jitter clock;
The local oscillator is used to provide local oscillation signal for broadband demodulator module.
2. a kind of wide bandwidth SAW reader reception device as described in claim 1, which is characterized in that further include amplification Device;The amplifier is serially connected between the FBAR filter and the broadband demodulator module, for the RF after filtering processing Carrier signal amplifies processing.
3. a kind of wide bandwidth SAW reader reception device as described in claim 1, which is characterized in that further include transmitting-receiving Isolation module, the transceiver insulation module is serially connected between RF switch and FBAR filter, for avoiding strong jamming from coupling To receiving channel.
4. a kind of wide bandwidth SAW reader reception device as described in claim 1, which is characterized in that the FPGA mould The main control chip of block uses XC7Z045;Synchronous clock circuit uses AD9523 chip, and synchronised clock exports 8 tunnels;Local oscillator uses ADRF4351 chip, is internally integrated phaselocked loop and voltage controlled oscillator;FBAR filter uses ACPF-7124 chip;RF switch Using SKY13286, isolation 60dB;High-speed AD converter uses AD9680 chip.
CN201821131584.6U 2018-07-17 2018-07-17 A kind of wide bandwidth SAW reader reception device Expired - Fee Related CN208589987U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201821131584.6U CN208589987U (en) 2018-07-17 2018-07-17 A kind of wide bandwidth SAW reader reception device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201821131584.6U CN208589987U (en) 2018-07-17 2018-07-17 A kind of wide bandwidth SAW reader reception device

Publications (1)

Publication Number Publication Date
CN208589987U true CN208589987U (en) 2019-03-08

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Granted publication date: 20190308

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