CN208849764U - A kind of wide bandwidth SAW reader emitter - Google Patents

A kind of wide bandwidth SAW reader emitter Download PDF

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Publication number
CN208849764U
CN208849764U CN201821131583.1U CN201821131583U CN208849764U CN 208849764 U CN208849764 U CN 208849764U CN 201821131583 U CN201821131583 U CN 201821131583U CN 208849764 U CN208849764 U CN 208849764U
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signal
saw
wide
module
digital
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Inventor
杨云涛
张锦岚
阎毓杰
王楠
张华�
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719th Research Institute of CSIC
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719th Research Institute of CSIC
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Abstract

The utility model provides a kind of wide bandwidth SAW reader emitter, can match with the SAW ID-tag of the big code capacity small size of ISM 2.4GHz.The wide bandwidth SAW reader emitter of the utility model realizes the direct processing of decode bit stream signal by digital analog converter (DAC) and reconfigurable filter, the signal set in bandwidth range is effectively modulated in RF carrier wave signal by wide-band modulation module and FBAR filter, can be matched with the SAW ID-tag of the big code capacity small size of ISM 2.4GHz.The wide bandwidth SAW reader emitter of the utility model by wide-band modulation module by IQ bit stream modulates baseband signals to inquiry signal in, inquiry signal is issued by antenna, to get rid of intermediate IF grades and correlation filter, parts number is less, mixing is spuious less, power consumption is lower.The wide bandwidth SAW reader emitter of the utility model is also applied for the acoustic surface wave radio frequency identifying system of traditional ISM 433MHz and ISM 920MHz frequency range.

Description

A kind of wide bandwidth SAW reader emitter
Technical field
The utility model relates to technical field of RFID, and in particular to a kind of wide bandwidth (being greater than 80MHz) surface acoustic wave Reader emitter.
Background technique
Acoustic surface wave radio frequency identifying system is mainly made of SAW ID-tag and SAW reader two parts, sound table The operation principle schematic diagram of surface wave radio-frequency recognition system is as shown in Figure 1, the working principle of acoustic surface wave radio frequency identifying system is as follows: After receiving inquiry signal inverse piezoelectricity occurs first inside it for SAW reader transmitting inquiry signal, SAW ID-tag Effect converts electrical signals to surface acoustic wave signal, and surface acoustic wave signal encounters during propagation in label by coding Reflection is generated after reflecting grating, due to the difference of encoding scheme, the response signal that SAW reader receives is also variant, sound Surface wave reader demodulates identification of the realization to SAW ID-tag encoded information after response signal.
SAW reader emitter in traditional acoustic surface wave radio frequency identifying system uses ISM 433MHz, ISM 920MHz frequency range, acoustic surface wave radio frequency identifying system work belt width, bring identification apart from short, label sizes it is excessive and The low problem of the code capacity of label.The acoustic surface wave radio frequency identifying system of the big code capacity small size of ISM 2.4GHz is domestic Still belong to blank, main cause is that the SAW ID-tag of the big code capacity small size of 2.4GHz needs the up to high band of 83MHz Width, this requires SAW reader emitters can generate the inquiry signal of enough bandwidth, the response of SAW ID-tag The time domain width of signal is just sufficiently narrow, and then realizes remote identification distance, small size and big code capacity.
The transmitted bandwidth of traditional wide bandwidth emitter is either wide or narrow or is exactly working frequency range and sound Surface wave radio-frequency recognition system is not consistent, it is difficult to the SAW ID-tag of the big code capacity small size of 2.4GHz is mating makes With.
Utility model content
In view of this, the present invention provides a kind of wide bandwidth SAW reader emitters, can be with ISM The SAW ID-tag of the big code capacity small size of 2.4GHz matches.
A kind of wide bandwidth SAW reader emitter of the utility model, including FPGA module and be sequentially connected in series Digital analog converter, reconfigurable filter, wide-band modulation module, RF switch and antenna;Further include synchronous clock circuit and Local oscillator;
Wherein, the FPGA module is turned using SPI interface and the synchronous clock circuit, the local oscillator and the digital-to-analogue Parallel operation end is connected, and is connected using JESD204B high-speed interface with the digital analog converter, is opened using GPIO interface and the radio frequency It closes and is connected;In addition also it is connected using differential mode with the synchronous clock circuit;
The digital analog converter is connected using differential mode with the synchronous clock circuit;
The wide-band modulation module is connected using differential mode with the local oscillator;
The synchronous clock circuit communicates between FPGA module and digital analog converter provides jitter clock;
The local oscillator is used to provide local oscillation signal for wide-band modulation;
The bit stream signal of SAW ID-tag inquiry signal of the FPGA module for generating setting bandwidth all the way, and with Single bit stream signal is separated into two orthogonal concurrent bit stream I and Q baseband by the rate of raw data rate half;
The digital analog converter is used to digital bit stream I and Q baseband being converted into analog baseband signal;
The reconfigurable filter is used for the ladder-like output of smooth digital analog converter, reduces high frequency Nyquist mirror image;
Analog baseband signal is modulated to RF carrier wave signal by local oscillation signal by the wide-band modulation module;
The RF switch for realizing RF carrier wave signal emission control;
The antenna is for emitting RF carrier wave signal.
Wherein, the response of the reconfigurable filter is that the low-pass Bessel wave of LC passive linear phase responds.
It further, further include power amplifier, FBAR filter a and FBAR filter b;The wide-band modulation module It is connected with the input terminal of the FBAR filter a;The output end of the FBAR filter a and the power amplifier input phase Even;The power amplifier output port is connected with the input terminal of the FBAR filter b;The output of the FBAR filter b End is connected with the RF switch;FBAR filter a and FBAR the filter b combines completion modulation with the power amplifier The filtering and amplification of signal afterwards.
Wherein, the FBAR filter a and FBAR filter b is thin film bulk acoustic wave resonator type bandpass filter.
Wherein, the main control chip of the FPGA module uses XC7Z045;Synchronous clock circuit uses AD9523 chip, together Step clock output is 8 tunnels;Local oscillator uses ADRF4351 chip, is internally integrated phaselocked loop and voltage controlled oscillator;Digital analog converter is adopted With AD9144 chip;RF switch uses SKY13286, isolation 60dB.
It further, further include FBAR filter, broadband demodulator module, baseband signal conditioning module and analog-to-digital conversion Device;
Wherein, the FPGA module is connected by JESD204B high-speed interface with the analog-digital converter, passes through SPI interface It is connected with the analog-digital converter and the baseband signal conditioning module, is connected by GPIO interface with the RF switch;
The antenna is also used to receive SAW ID-tag response signal;
The RF switch controls for realizing the reception of SAW ID-tag response signal;
The FBAR filter realizes loss and interference suppression for being filtered to SAW ID-tag response signal System;
The broadband demodulator module is used to SAW ID-tag response signal being demodulated into IQ baseband signal;
The baseband signal conditioning module is used to carry out signal condition to IQ baseband signal;
The analog-digital converter is used to carry out the IQ baseband signal after conditioning the conversion of analog to digital signal;
The FPGA module completes SAW ID-tag response for handling the IQ baseband signal after analog-to-digital conversion The decoding and verification of signal;
The synchronous clock circuit communicates between FPGA module and analog-digital converter and digital analog converter provides shake Clock;
The local oscillator is used to provide local oscillation signal for wide-band modulation module and broadband demodulator module.
The utility model has the advantages that
The wide bandwidth SAW reader emitter of the utility model passes through digital analog converter (DAC) and reconstruct filter Wave device realizes the direct processing of decode bit stream signal, will be set in bandwidth range by wide-band modulation module and FBAR filter Signal is effectively modulated in RF carrier wave signal, can be mating with the SAW ID-tag of the big code capacity small size of ISM 2.4GHz It uses.The wide bandwidth SAW reader emitter of the utility model passes through wide-band modulation module for IQ bit stream baseband signal It is modulated in inquiry signal, inquiry signal is issued by antenna, to get rid of intermediate IF grades and correlation filter, parts number is more Less, mixing is spuious less, power consumption is lower.
The wide bandwidth SAW reader emitter of the utility model is also applied for traditional ISM 433MHz and ISM The acoustic surface wave radio frequency identifying system of 920MHz frequency range.
Detailed description of the invention
Fig. 1 is the operation principle schematic diagram of acoustic surface wave radio frequency identifying system;
Fig. 2 is the utility model wide bandwidth SAW reader emitter structure chart.
Specific embodiment
It develops simultaneously embodiment below with reference to figure, the utility model is described in detail.
The utility model provides a kind of wide bandwidth SAW reader emitter.
Embodiment 1: a kind of wide bandwidth SAW reader emitter of the present embodiment is as shown in Fig. 2, include FPGA Module and the digital analog converter being sequentially connected in series, reconfigurable filter, wide-band modulation module, FBAR filter a, power amplifier, FBAR filter b, RF switch and antenna;It further include synchronous clock circuit and local oscillator.
The FPGA module port 1 using SPI interface and the synchronous clock circuit port 1, the local oscillator port 2 and The digital analog converter port 2 is connected, and the FPGA module port 2 is connected using GPIO interface with the RF switch port 4, The FPGA module port 3 is connected using differential mode with the synchronous clock circuit port 2, and the FPGA module port 4 is adopted It is connected with JESD204B high-speed interface with the digital analog converter port 3;
Differential mode and the synchronous clock circuit port 3, described heavy is respectively adopted in the digital analog converter port 1,5,4 Structure port of wave filter 4 is connected with port 3;
The reconfigurable filter port 1,2 is respectively adopted differential mode and is connected with the wide-band modulation module port 1,2;
The wide-band modulation module port 4 is connected using differential mode with the local oscillator port 1, the wide-band modulation module Port 3 is connected with the input port of the FBAR filter 1;
The output port of the FBAR filter 1 is connected with the power amplifier input mouth;
The power amplifier output port is connected with the input port of the FBAR filter 2;
The output port of the FBAR filter 2 is connected with the RF switch port 2;
The RF switch port 3 is connected with the antenna.
The synchronous clock circuit communicates between FPGA module and digital analog converter provides jitter clock;
The local oscillator is the frequency synthesizer of a kind of integrated phase lock and voltage controlled oscillator, is wide-band modulation, demodulation module Local oscillation signal is provided.
The FPGA module is a kind of field programmable gate array of complete programmable integrated arm processor, not only may be used To realize JESD204B high-speed communication interface, moreover it is possible to which the arm processor realizing the hardware-accelerated of algorithm, while being internally integrated provides Enrich flexible external interface.The SAW ID-tag inquiry signal for setting bandwidth all the way is generated when device is started to work Single bit stream is separated into two orthogonal concurrent bit stream I and Q base band with the rate of raw data rate half and believed by bit stream signal Number, to limit final spectrum of carrier bandwidth, then numeric field over-sampling low-pass filtering is done to the two bit streams I and Q;The present embodiment The main control chip of FPGA module in wide bandwidth R-T unit uses XC7Z045, includes 900 DSP processing units, 350K logic Unit;Synchronous clock circuit uses AD9523 chip, the output of 8 road synchronised clocks;Local oscillator is using ADRF4351 chip, inside collection At phaselocked loop and voltage controlled oscillator;The digital analog converter uses AD9144 chip, 16 2.8GSPS sample rates;FBAR filtering Device uses ACPF-7124 chip;RF switch uses SKY13286,60dB isolation.
The digital analog converter is using 12 a kind of or more, the analog-digital chip of GSPS sample rate, by the number of high bandwidth Word bit stream I and Q baseband are converted into analog baseband signal;
The reconfigurable filter function is the ladder-like output of smooth digital analog converter, reduces high frequency Nyquist mirror image, most The broadband noise layer on modulator output end is reduced, limits to obtain optimal modulation accuracy, the two reconstruction filterings Device is designed to the low-pass Bessel wave response of LC passive linear phase, to realize low noise;
The wide-band modulation module is a kind of Direct conversion circuit in broadband, by local oscillation signal by analog baseband signal It is modulated to RF carrier wave signal;
The emission control of RF carrier wave signal is realized after connecting with 3 in the RF switch port 2.
A kind of wide bandwidth SAW reader emitter of the utility model, it is special according to the inquiry of SAW ID-tag Property, by signal S (t)=sin (wt)+sin (2*wt)+... the rectangular pulse of sin (n*wt) and a Tns wide do convolution, design The bit stream signal that bandwidth is BW all the way out, wherein BW=n*w, n are positive integer, and w is the frequency for forming the simple signal of signal S (t) Rate, S (t) are the mixed signal being made of the signal of multiple and different frequencies.Since the base band input of wide-band modulation module is wanted It asks and single bit stream signal is therefore being separated into two just with the rate of raw data rate half for I and Q two-way orthogonal signalling The concurrent bit stream I signal and Q signal of friendship to limit final spectrum of carrier bandwidth, then do numeric field to the two bit streams I and Q Over-sampling low-pass filtering.The digital signal that I and Q two-way bandwidth is BW is converted into I and Q two-way bandwidth by D/A converter module respectively For the analog signal of BW, D/A converter module is likely to occur signal bandwidth broadening in conversion process, signal present it is ladder-like and Phenomena such as introducing interference signal, therefore two reconfigurable filters are designed, the ladder-like output of the smooth DAC of reconfigurable filter is reduced high Frequency Nyquist mirror image reduces the broadband noise layer on modulator output end to the maximum extent, accurate to obtain optimal modulation Degree, the reconfigurable filter are responded using the low-pass Bessel wave of LC passive linear phase, corner frequency 1.2BW, with reality Existing low noise.After reconfigurable filter is handled, analog baseband signal is modulated to by wide-band modulation module by local oscillation signal RF carrier wave signal, RF carrier wave signal are construction sound surface acoustic wave tag queries signal.Finally, inquiry signal is by RF switch It is output to antenna, and then completes the SAW ID-tag inquiry operation of a cycle.
It is possible to further allow RF carrier wave signal using FBAR filter a, power amplifier and FBAR filter b into Row signal condition, wherein the three dB bandwidth of FBAR filter is slightly larger than BW, improves the signal-to-noise ratio of inquiry signal to greatest extent.Institute Stating FBAR filter a and FBAR filter b is a kind of thin film bulk acoustic wave resonator type bandpass filter, provides and is inserted into for device The filtering processing that loss and high interference inhibit;The power amplifier is a kind of wide-band radio frequency power amplifier.It is not provided with power The purpose of this utility model also may be implemented in amplifier and two FBAR filters, is equipped with power amplifier and two FBAR The emitter of filter is a kind of optimal enforcement example.
Embodiment 2: the present embodiment further includes FBAR filter, broadband demodulator module, base band letter on the basis of embodiment 1 Number conditioning module and analog-digital converter;
Wherein, the FPGA module is connected by JESD204B high-speed interface with the analog-digital converter, passes through SPI interface It is connected with the analog-digital converter and the baseband signal conditioning module, is connected by GPIO interface with the RF switch;
The antenna is also used to receive SAW ID-tag response signal;
The RF switch controls for realizing the reception of SAW ID-tag response signal;
The FBAR filter realizes loss and interference suppression for being filtered to SAW ID-tag response signal System;
The broadband demodulator module is used to SAW ID-tag response signal being demodulated into IQ baseband signal;
The baseband signal conditioning module is used to carry out signal condition to IQ baseband signal;
The analog-digital converter is used to carry out the IQ baseband signal after conditioning the conversion of analog to digital signal;
The FPGA module completes SAW ID-tag response for handling the IQ baseband signal after analog-to-digital conversion The decoding and verification of signal;
The synchronous clock circuit communicates between FPGA module and analog-digital converter and digital analog converter provides shake Clock;
The local oscillator is used to provide local oscillation signal for wide-band modulation module and broadband demodulator module.
Using the launching technique of the wide bandwidth SAW reader emitter of this utility model, specifically include as follows Step:
Step 1, after working on power, FPGA module carries out initialization to emitter by SPI interface and matches emitter It sets, local oscillator parameter is set, configure the synchronised clock of analog-digital converter sampling clock and synchronous clock circuit, FPGA module passes through RF switch port 2 is connected to by GPIO interface with 3;
Step 2, FPGA module generates the bit stream signal for setting bandwidth all the way, will be single with the rate of raw data rate half A bit stream is separated into two orthogonal concurrent bit stream I and Q, to limit final spectrum of carrier bandwidth, also needs to the two bit streams I Numeric field over-sampling low-pass filtering is done with Q, and after low-pass filtering, two bit stream signals are transferred to digital analog converter (DAC);
Step 3, digital analog converter (DAC) is converted into SAW ID-tag inquiry signal to the digital bit stream signal of high bandwidth Analog baseband signal;
Step 4, two reconfigurable filters of digital analog converter (DAC) output driving, the smooth DAC of reconfigurable filter are ladder-like defeated Out, high frequency Nyquist mirror image is reduced, reduces the broadband noise layer on modulator output end to the maximum extent.It is optimal to obtain Accuracy is modulated, the two reconfigurable filters are responded using the low-pass Bessel wave of LC passive linear phase, to realize low noise Sound;
Step 5, after reconfigurable filter is handled, wide-band modulation module is directly by SAW ID-tag inquiry signal Analog baseband signal converts directly in RF carrier wave, after the signal condition of power amplifier and FBAR filter 1 and 2, by RF switch is exported to antenna, and then completes the SAW ID-tag inquiry operation of a cycle, repeats step 2-5, until institute There is signal to be launched.
Signal transmitting is carried out using a kind of wide bandwidth SAW reader emitter as described in example 2 and is received, Signal transmitting includes the following steps:
Step 11, after working on power, FPGA module carries out initialization to R-T unit by SPI interface and matches emitter Set, local oscillator parameter be set, configure analog-digital converter and the sampling clock of digital analog converter and synchronous clock circuit it is synchronous when RF switch is connected to by clock, FPGA module by GPIO interface;
Step 12, FPGA module generates the bit stream signal for setting bandwidth all the way, will with the rate of raw data rate half Single bit stream is separated into two orthogonal concurrent bit stream I and Q baseband, does numeric field to the two bit streams I and Q baseband After over-sampling low-pass filtering, it is transferred to digital analog converter;
Step 13, digital analog converter converts input signals into the analog baseband signal of SAW ID-tag inquiry signal, And output a signal to reconfigurable filter;
Step 14, after reconfigurable filter is handled, SAW ID-tag is directly inquired signal by wide-band modulation module Analog baseband signal convert directly in RF carrier wave, exported by RF switch to antenna, and then complete the sound table of a cycle The operation of surface wave tag queries, repeats step 12-14, until all signals are launched;
Signal reception includes the following steps:
Step 21, SAW ID-tag response signal is received by antenna, is exported by transceiver insulation module to broadband demodulator Module;
Step 22, broadband demodulator module carries out directly demodulation to input signal and generates the orthogonal I and Q baseband of two-way, IQ baseband signal is generated by baseband signal conditioning module;
Step 23, high-speed AD converter sample baseband signal conditioning module treated signal, by JESD204B high FPGA module is defeated by quick access oral instructions;
Step 24, FPGA module is decoded and verifies to IQ baseband signal, completes the SAW ID-tag of a cycle Decoding operate repeats step 21-24, until all signals are received.
In conclusion the above is only the preferred embodiments of the present utility model only, it is not intended to limit the utility model Protection scope.Within the spirit and principle of the utility model, any modification, equivalent replacement, improvement and so on should all wrap Containing being within the protection scope of the utility model.

Claims (6)

1. a kind of wide bandwidth SAW reader emitter, which is characterized in that including FPGA module and be sequentially connected in series Digital analog converter, reconfigurable filter, wide-band modulation module, RF switch and antenna;It further include synchronous clock circuit and sheet Vibration;
Wherein, the FPGA module is using SPI interface and the synchronous clock circuit, the local oscillator and the digital analog converter End is connected, and is connected using JESD204B high-speed interface with the digital analog converter, using GPIO interface and the RF switch phase Even;In addition also it is connected using differential mode with the synchronous clock circuit;
The digital analog converter is connected using differential mode with the synchronous clock circuit;
The wide-band modulation module is connected using differential mode with the local oscillator;
The synchronous clock circuit communicates between FPGA module and digital analog converter provides jitter clock;
The local oscillator is used to provide local oscillation signal for wide-band modulation;
The FPGA module is used to generate the bit stream signal for setting the SAW ID-tag inquiry signal of bandwidth all the way, and with original Single bit stream signal is separated into two orthogonal concurrent bit stream I and Q baseband by the rate of data rate half;
The digital analog converter is used to digital bit stream I and Q baseband being converted into analog baseband signal;
The reconfigurable filter is used for the ladder-like output of smooth digital analog converter, reduces high frequency Nyquist mirror image;
Analog baseband signal is modulated to RF carrier wave signal by local oscillation signal by the wide-band modulation module;
The RF switch for realizing RF carrier wave signal emission control;
The antenna is for emitting RF carrier wave signal.
2. a kind of wide bandwidth SAW reader emitter as described in claim 1, which is characterized in that the reconstruct filter The response of wave device is that the low-pass Bessel wave of LC passive linear phase responds.
3. a kind of wide bandwidth SAW reader emitter as described in claim 1, which is characterized in that further include power Amplifier, FBAR filter a and FBAR filter b;The input terminal phase of the wide-band modulation module and the FBAR filter a Even;The output end of the FBAR filter a is connected with the power amplifier input;The power amplifier output port with The input terminal of the FBAR filter b is connected;The output end of the FBAR filter b is connected with the RF switch;It is described FBAR filter a and FBAR filter b combines the filtering and amplification of signal after completion modulation with the power amplifier.
4. a kind of wide bandwidth SAW reader emitter as claimed in claim 3, which is characterized in that the FBAR filter Wave device a and FBAR filter b is thin film bulk acoustic wave resonator type bandpass filter.
5. a kind of wide bandwidth SAW reader emitter as described in claim 1, which is characterized in that the FPGA mould The main control chip of block uses XC7Z045;Synchronous clock circuit uses AD9523 chip, and synchronised clock output is 8 tunnels;Local oscillator uses ADRF4351 chip, is internally integrated phaselocked loop and voltage controlled oscillator;Digital analog converter uses AD9144 chip;RF switch uses SKY13286, isolation 60dB.
6. a kind of wide bandwidth SAW reader emitter as described in any one of claim 1-5, feature exist In further including FBAR filter, broadband demodulator module, baseband signal conditioning module and analog-digital converter;
Wherein, the FPGA module is connected by JESD204B high-speed interface with the analog-digital converter, passes through SPI interface and institute It states analog-digital converter to be connected with the baseband signal conditioning module, be connected by GPIO interface with the RF switch;
The antenna is also used to receive SAW ID-tag response signal;
The RF switch controls for realizing the reception of SAW ID-tag response signal;
The FBAR filter realizes loss and AF panel for being filtered to SAW ID-tag response signal;
The broadband demodulator module is used to SAW ID-tag response signal being demodulated into IQ baseband signal;
The baseband signal conditioning module is used to carry out signal condition to IQ baseband signal;
The analog-digital converter is used to carry out the IQ baseband signal after conditioning the conversion of analog to digital signal;
The FPGA module completes SAW ID-tag response signal for handling the IQ baseband signal after analog-to-digital conversion Decoding and verification;
The synchronous clock circuit communicates between FPGA module and analog-digital converter and digital analog converter provides jitter clock;
The local oscillator is used to provide local oscillation signal for wide-band modulation module and broadband demodulator module.
CN201821131583.1U 2018-07-17 2018-07-17 A kind of wide bandwidth SAW reader emitter Expired - Fee Related CN208849764U (en)

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CN201821131583.1U CN208849764U (en) 2018-07-17 2018-07-17 A kind of wide bandwidth SAW reader emitter

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Application Number Priority Date Filing Date Title
CN201821131583.1U CN208849764U (en) 2018-07-17 2018-07-17 A kind of wide bandwidth SAW reader emitter

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