CN208538859U - A kind of encapsulating structure of image sensing chip - Google Patents
A kind of encapsulating structure of image sensing chip Download PDFInfo
- Publication number
- CN208538859U CN208538859U CN201820568608.8U CN201820568608U CN208538859U CN 208538859 U CN208538859 U CN 208538859U CN 201820568608 U CN201820568608 U CN 201820568608U CN 208538859 U CN208538859 U CN 208538859U
- Authority
- CN
- China
- Prior art keywords
- image sensing
- sensing chip
- substrate
- opening
- rectangular groove
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000000758 substrate Substances 0.000 claims abstract description 129
- 238000004806 packaging method and process Methods 0.000 claims description 20
- 239000005304 optical glass Substances 0.000 claims description 15
- 239000011248 coating agent Substances 0.000 claims description 13
- 238000000576 coating method Methods 0.000 claims description 13
- 230000003287 optical effect Effects 0.000 claims description 11
- 238000003466 welding Methods 0.000 claims description 11
- 238000007789 sealing Methods 0.000 claims description 9
- 239000011347 resin Substances 0.000 claims description 7
- 229920005989 resin Polymers 0.000 claims description 7
- 238000005538 encapsulation Methods 0.000 claims description 6
- 238000001914 filtration Methods 0.000 claims description 6
- NIXOWILDQLNWCW-UHFFFAOYSA-N acrylic acid group Chemical group C(C=C)(=O)O NIXOWILDQLNWCW-UHFFFAOYSA-N 0.000 claims description 4
- 239000005341 toughened glass Substances 0.000 claims description 4
- 230000035699 permeability Effects 0.000 claims description 3
- 229910000679 solder Inorganic materials 0.000 claims 1
- 230000002159 abnormal effect Effects 0.000 abstract description 7
- 230000000903 blocking effect Effects 0.000 abstract description 3
- 238000000034 method Methods 0.000 description 22
- 239000000853 adhesive Substances 0.000 description 11
- 230000001070 adhesive effect Effects 0.000 description 11
- 238000003384 imaging method Methods 0.000 description 9
- 239000000463 material Substances 0.000 description 9
- 239000010410 layer Substances 0.000 description 7
- 230000008569 process Effects 0.000 description 7
- 238000005476 soldering Methods 0.000 description 7
- 238000005520 cutting process Methods 0.000 description 5
- 239000004065 semiconductor Substances 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 239000002184 metal Substances 0.000 description 4
- 230000000149 penetrating effect Effects 0.000 description 4
- 229920002120 photoresistant polymer Polymers 0.000 description 4
- 239000012535 impurity Substances 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 238000000227 grinding Methods 0.000 description 2
- 238000000206 photolithography Methods 0.000 description 2
- 239000002356 single layer Substances 0.000 description 2
- 230000002411 adverse Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000007731 hot pressing Methods 0.000 description 1
- 238000003331 infrared imaging Methods 0.000 description 1
- 230000009545 invasion Effects 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012858 packaging process Methods 0.000 description 1
- 230000000750 progressive effect Effects 0.000 description 1
- 239000012780 transparent material Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Landscapes
- Solid State Image Pick-Up Elements (AREA)
Abstract
This application discloses a kind of encapsulating structures of image sensing chip, wherein, the substrate of the encapsulating structure has at least one level step structure towards the side of opening, and step structure is parallel to the step surface of the first surface of image sensing chip towards the image sensing chip, so that substrate is towards opening and far from the side of image sensing chip, partly or completely fully blocking incident ray is played to be irradiated to close to perpendicular to first surface, and the purpose of the step surface close to image sensing chip, to play the probability that incident ray is reflected into image sensing chip by the side for reducing substrate towards opening, and then realize the reflection reduced due to base openings side to light, and the pixel region of image sensing chip is made the possibility of the abnormal phenomenon of light convergence occur, it reduces since the region of these light convergence is exported in image sensing chip The probability that solar flare phenomenon is formed in image, improves the image quality of image sensing chip.
Description
Technical Field
The application relates to the technical field of image acquisition devices, in particular to a packaging structure of an image sensing chip.
Background
The image sensing chip is an electronic device capable of sensing external light and converting the external light into an electrical signal. The image sensor chip is usually manufactured by a semiconductor manufacturing process. After the image sensing chip is manufactured, a series of packaging processes are performed on the image sensing chip to form a packaged structure, so that the packaged structure is used in electronic equipment such as a digital camera and a digital video camera.
The packaging structure of the image sensing chip in the prior art mainly comprises a fan-out (Fanout) substrate, a transparent cover plate and the like, wherein the fan-out substrate comprises an opening, a pixel area of the image sensing chip is arranged towards the opening, so that light can irradiate on the pixel area through the opening, the transparent cover plate is arranged on one side of the opening, which deviates from the image sensing chip, and the transparent cover plate is used for protecting the pixel sensing chip.
However, in a specific use process, due to the reflection phenomenon that the opening side of the fan-out substrate faces the light, the abnormal phenomenon of light convergence is easily caused in a part of the pixel area of the image sensing chip, and a Flare (Flare) phenomenon is formed in an image output by the image sensing chip in the area where the light converges, so that the imaging quality of the image sensing chip is reduced.
SUMMERY OF THE UTILITY MODEL
In order to solve the technical problem, the present application provides a package structure of an image sensor chip, so as to reduce the possibility of an abnormal phenomenon that light is converged in a pixel area of the image sensor chip due to a reflection phenomenon that a side of an opening of a substrate faces light, thereby reducing the probability of a flare phenomenon formed in an image output by the image sensor chip due to the area where the light is converged, and improving the imaging quality of the image sensor chip.
In order to achieve the technical purpose, the embodiment of the application provides the following technical scheme:
a package structure of an image sensing chip comprises:
the image sensing chip comprises a first surface and a second surface which are opposite, wherein the first surface comprises a photosensitive area and a non-photosensitive area;
the substrate is positioned on one side, away from the second surface, of the image sensing chip and provided with an opening, and the photosensitive area is exposed from the opening;
the side surface of the substrate facing the opening is provided with at least one step structure, and the step structure is parallel to the step surface of the first surface and faces the image sensing chip.
Optionally, the method further includes: the lens module is arranged on the substrate, covers the opening and forms an optical cavity together with the substrate and the image sensing chip.
Optionally, a side of the substrate facing the opening has a first rectangular groove communicated with the opening, and the first rectangular groove is located on a side of the substrate facing the image sensing chip;
the first rectangular groove part penetrates through the substrate and forms a one-step structure with the substrate.
Optionally, an included angle between a diagonal line of the first rectangular groove and a plane parallel to the image sensing chip is smaller than a maximum light entrance angle of the lens module.
Optionally, a second rectangular groove and a third rectangular groove which are communicated with the opening are formed in the side surface, facing the opening, of the substrate, and the second rectangular groove and the third rectangular groove are both located on one side, facing the image sensing chip, of the substrate;
the second rectangular groove is embedded between the third rectangular groove and the substrate, and the second rectangular groove, the third rectangular groove and the substrate form a two-stage step structure.
Optionally, an included angle between a diagonal line of the second rectangular groove and a plane parallel to the image sensing chip is smaller than or equal to a maximum light entrance angle of the lens module;
the side length of the third rectangular groove parallel to the side of the image sensing chip meets a preset formula;
the preset formula is that c is more than or equal to (a + b) x tan α, wherein c is the side length of the third rectangular groove parallel to the side of the image sensing chip, a is the side length of the second rectangular groove perpendicular to the side of the image sensing chip, b is the side length of the third rectangular groove perpendicular to the side of the image sensing chip, and α is the maximum light advancing angle of the lens module.
Optionally, the surface of the side of the substrate facing the opening is a rough surface or coated with a diffuse reflection coating.
Optionally, the inclined ramp surface is coated with a light absorbing coating.
Optionally, a wiring line and a contact end connected to the wiring line are disposed on the substrate, and the wiring line is used for electrically connecting to an external circuit;
the photosensitive area of the image sensing chip is provided with a plurality of pixel points for collecting image information and a plurality of first welding pads connected with the pixel points, and the first welding pads are electrically connected with the contact ends.
Optionally, the first pad is electrically connected to the contact end through a conductive adhesive or a soldering structure.
Optionally, the method further includes: and a sealing resin located on the first pad and the wiring line toward the side of the opening.
Optionally, an external terminal electrically connected to the wiring line is further disposed on a surface of one side of the substrate facing the image sensing chip, and the external terminal is used for electrically connecting to the external circuit.
Optionally, the method further includes:
and an insulating film covering an exposed surface of the wiring line.
Optionally, the method further includes:
and the light source compensation device is arranged on the surface of one side of the substrate, which is far away from the image sensing chip.
Optionally, the wiring lines include a first interconnection line and a second interconnection line insulated from each other; wherein,
the first interconnection line is used for electrically connecting the pixel point with an external circuit;
the second interconnection line is used for electrically connecting the light source compensation device with an external circuit.
Optionally, the method further includes:
and the light-transmitting cover plate is fixed on one side of the substrate, which is far away from the image sensing chip, and covers the opening.
Optionally, the light-transmitting cover plate is a tempered glass cover plate or an acrylic cover plate.
Optionally, the light-transmitting cover plate is an optical glass cover plate;
the optical glass cover plate is optically transparent to at least one range of light wavelengths.
Optionally, the surface of the optical glass cover plate is further provided with an optical coating;
the optical coating at least has one of functions of antireflection, permeability increasing, infrared cut-off and visible light filtering.
It can be seen from the above technical solutions that, the embodiment of the present application provides a package structure of an image sensing chip, wherein a side surface of a substrate of the package structure facing an opening has at least one step structure, and a step surface of the step structure parallel to a first surface of the image sensing chip faces the image sensing chip, so that the substrate faces the opening and is away from the side surface of the image sensing chip, and the purpose of partially or completely blocking incident light from being irradiated to the step surface close to the image sensing chip and perpendicular to the first surface is achieved, so as to reduce a probability that the side surface of the substrate facing the opening reflects the incident light to the image sensing chip, thereby reducing a possibility of an abnormal phenomenon that light is converged in a pixel area of the image sensing chip due to reflection of light from an opening side of the substrate, and reducing a probability of a flare phenomenon formed in an image output by the image sensing chip due to areas where the light is converged, the imaging quality of the image sensing chip is improved.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below, it is obvious that the drawings in the following description are only embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
Fig. 1 is a schematic cross-sectional view illustrating a package structure of an image sensor chip according to an embodiment of the present disclosure;
fig. 2 is an enlarged schematic structural view of an M1 area of the package structure shown in fig. 1;
FIG. 3 is a top view of the package structure shown in FIG. 1 in a direction opposite to the Z-direction;
FIG. 4 is a top view of the package structure shown in FIG. 1 in the Z-direction;
fig. 5 is a schematic cross-sectional view illustrating a package structure of an image sensor chip according to another embodiment of the present disclosure;
fig. 6 is an enlarged schematic structural view of an M2 area of the package structure shown in fig. 2;
fig. 7 is a schematic cross-sectional view illustrating a package structure of an image sensor chip according to another embodiment of the present application;
fig. 8-13 are schematic flow charts illustrating a method for packaging an image sensor chip according to an embodiment of the present disclosure.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
In order to make the aforementioned objects, features and advantages of the present application more comprehensible, the present application is described in further detail with reference to the accompanying drawings and the detailed description.
Referring to fig. 1 to 4, fig. 1 is a schematic cross-sectional structure diagram of a package structure of an image sensor chip according to an embodiment of the present disclosure, fig. 2 is an enlarged schematic view of an area M1 of the package structure shown in fig. 1, fig. 3 is a top view of the package structure shown in fig. 1 in a direction opposite to a Z direction, fig. 4 is a top view of the package structure shown in fig. 1 in the Z direction, coordinate systems in the drawings provided in the present disclosure are right-handed coordinate systems established in a direction perpendicular to the image sensor chip and pointing to a substrate as the Z-axis forward direction, an X axis, a Y axis and a Z axis are perpendicular to each other, and we define the Z-axis extending direction as a first direction, the X-axis extending direction as a second direction and the Y-axis extending direction as a third direction.
The packaging structure comprises: the image sensing chip 11 comprises a first surface and a second surface which are opposite, the first surface comprises a photosensitive area C and a non-photosensitive area D, a plurality of pixel points 12 used for collecting image information are arranged on the photosensitive area C, and first welding pads 13 connected with the plurality of pixel points 12 are arranged on the non-photosensitive area D;
the substrate 20 is located on a side of the image sensing chip 11 facing away from the second surface, and for convenience of description, the substrate 20 is divided into a first area a and a second area B surrounding the first area a, the substrate 20 has an opening K, and a side of the substrate 20 facing the opening K has at least one step structure (in the embodiment shown in fig. 1, the step structure Stari1), and the step structure faces the image sensing chip 11 in parallel with a step surface of the first surface. The opening K is located in the first area a and exposes the photosensitive area C, and a wiring line 16 and a contact end connected to the wiring line 16 are disposed on the substrate 20. The wiring lines 16 include first interconnection lines for electrically connecting the pixel sites 12 with an external circuit. And the external circuit performs image processing according to the image information acquired by the pixel points 12. The first pad 13 is electrically connected to the contact point. Optionally, the first pad 13 is electrically connected to the contact end through a conductive adhesive or a soldering structure.
When the first bonding pad 13 is electrically connected to the contact terminal through a conductive adhesive, referring to fig. 7, fig. 7 is a schematic cross-sectional structure diagram of a package structure of an image sensing chip 11 according to an embodiment of the present disclosure, where the conductive adhesive 14' is disposed on a periphery of the image sensing chip 11, so that the image sensing chip 11 is bonded and fixed to the substrate 20 through the conductive adhesive 14', and in a direction perpendicular to the substrate 20, the conductive adhesive 14' surrounds all the pixel points 12 and does not overlap with the pixel points 12.
When the first pad 13 is electrically connected to the contact terminal through a soldering structure, referring to fig. 1, the soldering structure is a soldering bump 14 located on a side of the first pad 13 away from the substrate 20. In addition, optionally, still referring to fig. 1, the package structure further includes: the sealing resin 15 is located the first welding pad 13 and the wiring circuit 16 faces the side face of the opening K, the orthographic projection of the sealing resin 15 on the substrate 20 is located in the non-photosensitive area D and surrounds all the pixel points 12, and the sealing resin 15 can prevent external water vapor and impurities from entering the opening K through a gap between the first welding pad 13 and the welding structure or the conductive adhesive 14' to cause adverse effects on the imaging effect and the service life of the sensor chip. Also, to protect the routing lines 16, still referring to fig. 1, the package structure further includes: and an insulating film 21 covering an exposed surface of the wiring line 16, wherein the insulating film 21 can prevent the wiring line 16 from being corroded or oxidized by external moisture and the like, and improve the stability of the packaging structure.
In addition, the package structure further includes: and a lens module (not shown in the drawings) disposed on the substrate 20, wherein the lens module covers the opening K, and forms an optical cavity with the substrate 20 and the image sensor chip 11.
In order to ensure the imaging quality of the package structure in a weak light environment, still referring to fig. 1, the package structure provided in the embodiment of the present application further includes: and the light source compensation device 18 is arranged on the surface of the substrate 20, which is far away from the image sensing chip 11. Referring to fig. 3, the orthographic projection of the light source compensation device 18 on the substrate 20 is located in the second area B of the substrate 20, and does not overlap with the orthographic projection of the photosensitive area C of the image sensing chip 11 on the substrate 20. Optionally, the light source compensation device 18 is an LED device. The operation of the light source compensation means 18 may be controlled by an external circuit. The wiring line 16 further includes a second interconnection line for electrically connecting the light source compensation device 18 with an external circuit. The second interconnection line and the first interconnection line are insulated from each other.
In the embodiment of the present application, since the opening K of the substrate 20 exposes the photosensitive region C, the substrate 20 may be made of a non-transparent material, and a light-transmitting region is not required. Specifically, the substrate 20 may be a PCB substrate, an opaque plastic substrate, or a semiconductor substrate. Similarly, in order to further improve the sealing performance of the space where the photosensitive region C of the image sensor chip 11 is located, and avoid the invasion of external impurities, the package structure further includes: and the light-transmitting cover plate 19 is fixed on the side, away from the image sensing chip 11, of the substrate 20, and the light-transmitting cover plate 19 covers the opening K. Optionally, the light-transmitting cover plate 19 may be a tempered glass cover plate or an acrylic cover plate, and may also be an optical glass cover plate; wherein the optical glass cover plate is optically transparent to at least one range of light wavelengths. In some embodiments of the present application, in order to enrich the optical performance of the optical glass cover plate, the surface of the optical glass cover plate may also be provided with an optical coating; the optical coating at least has one of functions of antireflection, permeability increasing, infrared cut-off and visible light filtering. The antireflection function and the antireflection function mainly refer to functions of reducing or eliminating reflected light on the surface of the optical glass cover plate, so that the light transmission quantity of the optical glass cover plate is increased, and stray light of the packaging structure is reduced or eliminated; the infrared cut-off function is a function of filtering infrared wave bands and can prevent unnecessary heat from burning the optical glass cover plate; the visible light filtering function refers to a function of filtering a visible light portion in an incident light ray, so that the image sensing chip 11 with the packaging structure can be applied to the field of infrared imaging.
The substrate 20 may have a single-layer or multi-layer stacked structure, and the corresponding first interconnection and/or second interconnection may also have a single-layer or multi-layer stacked structure. When the substrate 20 is a PCB substrate or an opaque plastic substrate, and the first interconnection line and the second interconnection line are a multi-layer stacked structure, the first interconnection line and/or the second interconnection line may include a plurality of metal line layers and a metal plug or via connection structure interconnecting metal line layers of adjacent layers.
When the substrate 20 is a semiconductor substrate, the first interconnection line and/or the second interconnection line may include a via interconnection structure penetrating the semiconductor substrate and a rewiring metal line layer electrically connected to the via interconnection structure on the first surface and/or the second surface of the semiconductor substrate.
The number of the first interconnection lines is multiple (more than or equal to 2), the number of the second interconnection lines is multiple (more than or equal to 2), and different first interconnection lines and/or second interconnection lines are isolated and insulated from each other. The number of the first interconnection lines and the second interconnection lines and the wiring mode are set according to electronic components which need to be connected with an external circuit.
Referring to fig. 1 and 4, an external terminal 17 electrically connected to the wiring line 16 is further disposed on a side surface of the substrate 20 facing the image sensing chip 11, and the external terminal 17 is used for electrically connecting to the external circuit, so that the external circuit is electrically connected to the pixel 12 in the image sensing chip 11. Referring to fig. 4, the orthographic projection of the external connection terminal 17 on the substrate 20 is located at the second region B of the substrate 20, and does not overlap with the image sensing chip 11.
In order to ensure that the inclined slope of the substrate 20 can better reduce the probability that the side of the substrate 20 facing the opening K reflects light to the image sensor chip 11, the opening K of the substrate 20 is further defined in some embodiments below.
In all embodiments of the present application, the step surface of the step structure parallel to the first surface faces the image sensing chip 11, because the portion of the side of the substrate 20 facing the opening K and close to the image sensing chip 11 is the main structure for forming flare in the photosensitive area C of the image sensing chip 11, and therefore, in the embodiments of the present application, the step structure is configured as the "inverted step" structure shown in fig. 2 and 5, in order to make the substrate 20 facing the opening K and far away from the side of the image sensing chip 11, and to partially or completely block incident light from the image sensing chip 11 and to block incident light perpendicular to the step surface of the image sensing chip 11, so that the step surface close to the image sensing chip 11 cannot reflect the incident light to the image sensing chip 11, and thus the probability of the substrate 20 reflecting the incident light to the image sensing chip 11 towards the side of the opening K can be well reduced, further, the possibility that the abnormal phenomenon of light convergence occurs in the pixel area of the image sensing chip 11 due to the reflection of the light by the side surface of the opening K of the substrate 20 is reduced, the probability of the flare phenomenon formed in the image output by the image sensing chip 11 due to the area where the light converges is reduced, and the imaging quality of the image sensing chip 11 is improved.
Referring to fig. 1, fig. 2, fig. 5 and fig. 6, fig. 5 is a schematic cross-sectional structure diagram of a package structure of an image sensor chip 11 according to an embodiment of the present disclosure, and fig. 6 is an enlarged schematic view of an area M2 of the package structure shown in fig. 5.
In the embodiment shown in fig. 1 and 2, the side of the substrate 20 facing the opening K has a first rectangular groove G1 communicating with the opening K, and the first rectangular groove G1 is located on the side of the substrate 20 facing the image sensing chip 11;
the first rectangular groove G1 partially penetrates the substrate 20, and forms a one-step structure with the substrate 20 (the one-step structure is shown by the reference numeral Stair1 in fig. 1).
In order to ensure that the remaining side of the substrate 20 facing the opening K can completely shield the step surface of the step structure Stair1 perpendicular to the first plane, and prevent incident light from irradiating on the step surface, when the included angle β between the diagonal of the first rectangular groove G1 and the plane parallel to the image sensing chip 11 is equal to the maximum light-entering angle α of the lens module, referring to fig. 2, when the included angle β between the diagonal of the first rectangular groove G1 and the plane parallel to the image sensing chip 11 is equal to the maximum light-entering angle α of the lens module, the incident light can just graze the edge of the step structure Stair1 close to the first plane, so that when the included angle β is smaller than the maximum light-entering angle α of the lens module, the side of the substrate 20 facing the opening K can completely shield the step surface of the step structure Stair1 perpendicular to the first plane, and prevent the vertical surface close to the image sensing chip 11 from reflecting incident light to cause flare.
In the embodiment shown in fig. 5 and 6, the side of the substrate 20 facing the opening K has a second rectangular groove G2 and a third rectangular groove G3 communicating with the opening K, and the second rectangular groove G2 and the third rectangular groove G3 are both located on the side of the substrate 20 facing the image sensing chip 11;
the second rectangular groove G2 is embedded between the third rectangular groove G3 and the substrate 20, and the second rectangular groove G2, the third rectangular groove G3 and the substrate 20 form a two-step structure (denoted by stable 2 and stable 3 in fig. 5).
Similarly, in order to ensure that the remaining side of the substrate 20 facing the opening K completely blocks the step surface of the step structure Stair2 and Stair3 perpendicular to the first plane and prevent incident light from impinging on the step surface, the included angle between the diagonal of the second rectangular groove G2 and the plane parallel to the image sensing chip 11 is less than or equal to the maximum light advancing angle of the lens module, the side length of the third rectangular groove G3 parallel to the side of the image sensing chip 11 satisfies a predetermined formula, c ≧ (a + b) × tan α, where c is the side length of the third rectangular groove G3 parallel to the side of the image sensing chip 11, a is the side length of the second rectangular groove G2 perpendicular to the side of the image sensing chip 11, b is the side length of the third rectangular groove G5392 perpendicular to the side of the image sensing chip 11, 736 is the maximum light advancing angle of the side length of the image sensing chip G632 perpendicular to the side of the image sensing chip 11, and b is equal to the maximum light advancing angle of the flare angle of the side of the second rectangular groove G632 perpendicular to the side of the image sensing chip 14 when the flare structure Stair 19 and the side of the second rectangular groove G9 are parallel to the side of the image sensing chip 14, thus the vertical image sensing chip 14, when the flare structure is not exactly equal to the side of the image sensing chip 21, the vertical image sensing chip 21, the flare structure, the vertical image sensing chip 21 is formed by the side of the vertical image sensing chip, and the side of the vertical mirror structure Stair chip 21, and the side of the vertical mirror structure, and the side of the flare structure.
In other embodiments of the present application, the side of the substrate 20 facing the opening K may also have a three-stage, four-stage or even more step structure, which is not exhaustive herein.
In order to further avoid the flare formed in the photosensitive area C of the image sensor chip 11 due to the reflection of the side of the substrate 20 facing the light ray, in an embodiment of the present application, the side of the substrate 20 facing the opening K may be set to be a rough surface, and may be coated with a diffuse reflection coating on an inclined slope to avoid the mirror reflection of the side of the substrate 20 facing the incident light ray, so as to avoid the possibility of the flare formed in the photosensitive area C of the image sensor chip 11 due to the mirror reflection of the side of the substrate 20 facing the light ray.
In addition, in another embodiment of the present application, the side surface of the substrate 20 facing the opening K may also absorb incident light irradiated on the side surface by applying a light-absorbing coating, so as to reduce the reflection amount of the side surface for the incident light, thereby reducing the possibility of flare being formed in the photosensitive area C of the image sensor chip 11 due to the reflection of the light by the side surface of the substrate 20 facing the opening K.
As can be seen from the above description, the side of the substrate 20 facing the opening K of the package structure provided in the embodiment of the present application has at least one step structure, and the step surface of the step structure parallel to the first surface of the image sensing chip 11 faces the image sensing chip 11, so that the side of the substrate 20 facing the opening K and away from the image sensing chip 11 serves to partially or completely block incident light from being irradiated to the side close to the first surface and close to the step surface of the image sensing chip 11, thereby reducing the probability that the side of the substrate 20 facing the opening K reflects the incident light to the image sensing chip 11, further reducing the possibility of the abnormal phenomenon of light convergence occurring in the pixel area of the image sensing chip 11 due to the reflection of light by the side of the opening K of the substrate 20, and reducing the probability of the flare phenomenon formed in the image output by the image sensing chip 11 due to the area where the light converges, the imaging quality of the image sensing chip 11 is improved.
Based on the foregoing embodiment of the package structure, correspondingly, an embodiment of the present application further provides a method for packaging an image sensor chip 11, where the method for packaging is shown in fig. 8 to 13, and fig. 8 to 13 are schematic flow diagrams of the method for packaging provided by the embodiment of the present application, and the method for packaging includes:
s101: as shown in fig. 8 and 9, a sheet material 31 is provided, where the sheet material 31 includes a plurality of encapsulation areas 32 arranged in an array, a cutting street 30 is provided between adjacent encapsulation areas 32, and the encapsulation areas 32 include a first area a and a second area B surrounding the first area a;
fig. 8 is a schematic top view of the plate 31, and in the subsequent step, after cutting, the plate 31 is divided into a plurality of substrates 20. Fig. 9 is a schematic cross-sectional view taken along line AA' of fig. 8, wherein the encapsulation region 32 includes a first region a and a second region B surrounding the first region a; the first region a is used to form an opening K in a subsequent process.
The package region 32 is provided with a wiring line 16 and a contact terminal electrically connected to the wiring line 16; the wiring lines 16 include first interconnection lines for electrically connecting the pixel sites 12 with an external circuit. And the external circuit performs image processing according to the image information acquired by the pixel points 12. The wiring lines 16 and the contact terminals are not shown in fig. 8.
S102: as shown in fig. 10, an opening K penetrating through the plate material 31 is formed in the first area a of each of the package regions 32, and a side surface of the plate material 31 facing the opening K has at least one step structure, and a step surface parallel to the first surface faces the image sensing chip;
the opening K may be formed by using a laser, a photolithography process, a wet etching process, a mechanical grinding process, or any other similar method. In an embodiment of the present application, firstly, a photoresist is coated on the surface of the board 31, then a mask is disposed on the surface of the photoresist, the photoresist is patterned by using the mask as a mask, and the board 31 is subjected to photolithography by using the remaining patterned photoresist as a mask, so as to form an opening K penetrating through the board 31 in the first area a of each package region 32. In addition, at least one step structure of the side surface of the plate 31 facing the opening K may be formed by a mechanical grinding process, a half-tone mask etching process, or the like.
In the embodiment shown in fig. 10, the sidewall of the substrate 20 facing the opening K shows only one step structure, and in other embodiments of the present application, the sidewall of the substrate 20 facing the opening K may have a two-step, three-step, or more step structure. The present application does not limit this, which is determined by the actual situation.
S103: as shown in fig. 11, an image sensor chip 11 is fixed on each of the package regions 32, and a photosensitive area C of the image sensor chip 11 faces the opening K.
The image sensing chip 11 comprises a first surface and a second surface which are opposite, the first surface comprises a photosensitive area C and a non-photosensitive area D, and the photosensitive area C is provided with a plurality of pixel points 12 for collecting image information and a plurality of first welding pads 13 connected with the pixel points 12.
In general, in order to optimize the performance of the image sensor chip 11 or improve the reliability of the image sensor chip 11, in other trials of the present application, the packaging method includes:
s201: providing an initial plate 31, and forming cutting channels 30 on the initial plate 31 to form a plurality of packaging areas 32 arranged in an array, wherein the packaging areas 32 comprise a first area A and a second area B surrounding the first area A;
s202: in the second region B, a wiring line 16 and a contact terminal electrically connected to the wiring line 16 are formed to form a plate material 31, and the wiring line 16 is used for electrical connection with an external circuit.
Since the substrate 20 is cut from the plate 31, the material of the plate 31 is the same as the material of the substrate 20, and specific reference is made to the description in the package structure, which is not repeated herein.
S203: forming an opening K penetrating through the sheet material 31 in the first area a of each of the encapsulation areas 32, wherein the side of the sheet material 31 facing the opening K has at least one step structure;
s204: coating a conductive adhesive on the periphery of each package region 32, adhering an image sensing chip 11 to the conductive adhesive, and performing hot-pressing curing on the conductive adhesive to fix the image sensing chip 11 to the substrate 20 through the conductive adhesive and electrically connect the first bonding pad 13 of the image sensing chip 11 to the contact terminal;
or
Fixing an image sensing chip 11 on each of the package regions 32 by a soldering structure, so that the image sensing chip 11 is fixed to the substrate 20 by the soldering structure, and the first pads 13 of the image sensing chip 11 are electrically connected to the contact terminals;
the first bonding pad 13 is connected to a plurality of pixel points 12 of the image sensor chip 11 for collecting image information. Referring to fig. 12, the welding structure may be a welding projection.
S205: as shown in fig. 13, a sealing resin 15 is formed on the side surface of the first pad 13 and the wiring line 16 facing the opening K. The sealing resin 15 is used to enhance the sealing property of the space where the photosensitive region C is located, thereby preventing the intrusion of external impurities.
S206: referring to fig. 12, a transparent cover plate 19 is fixed on a side of the first area a away from the image sensor chip 11, so that the transparent cover plate 19 covers the opening K.
Optionally, the light-transmitting cover plate 19 may be a tempered glass cover plate or an acrylic cover plate, and may also be an optical glass cover plate; wherein the optical glass cover plate is optically transparent to at least one range of light wavelengths.
S207: a lens module (not shown in the drawings) is disposed on a side of the substrate 20 away from the image sensing chip 11, and the lens module covers the opening K to form an optical cavity with the substrate 20 and the image sensing chip 11.
S208: forming an external connection terminal 17 electrically connected to the wiring line 16 on each of the package regions 32, the external connection terminal 17 being used for electrical connection to the external circuit;
the external terminal 17 and the image sensing chip 11 are located on the same side of the plate 31.
The external terminal 17 is used for electrically connecting with the external circuit, so that the external circuit is electrically connected with the pixel 12 in the image sensing chip 11. The orthographic projection of the external connection terminal 17 on the substrate 20 is located at the position of the second area B of the substrate 20, and is not overlapped with the image sensing chip 11.
S209: a light source compensation device 18 is disposed on a surface of the second region B of each of the package regions 32 facing away from the image sensor chip 11.
The light source compensation device 18 is configured to ensure imaging quality of the packaged image sensing chip 11 in an environment with weak light, and an orthogonal projection of the light source compensation device 18 on the substrate 20 is located in the second area B of the substrate 20 and does not overlap an orthogonal projection of the photosensitive area C of the image sensing chip 11 on the substrate 20. Optionally, the light source compensation device 18 is an LED device. The operation of the light source compensation means 18 may be controlled by an external circuit. The wiring line 16 further includes a second interconnection line for electrically connecting the light source compensation device 18 with an external circuit. The second interconnection line and the first interconnection line are insulated from each other.
S210: the plate 31 is cut along the cutting streets 30 to form a plurality of package structures of the image sensor chips 11, after the cutting, the plate 31 is divided into a plurality of substrates 20, and each substrate 20 includes one of the package regions 32.
In summary, the embodiment of the present application provides a package structure of an image sensor chip 11 and a package method thereof, wherein a side surface of a substrate 20 of the package structure facing an opening K has at least one step structure, and a step surface of the step structure parallel to a first surface of the image sensor chip 11 faces the image sensor chip 11, so that the substrate 20 faces the opening K and is away from the side surface of the image sensor chip 11, and the purpose of partially or completely blocking incident light from being irradiated to the side surface close to the first surface and close to the step surface of the image sensor chip 11 is achieved, thereby reducing the probability that the side surface of the substrate 20 facing the opening K reflects the incident light to the image sensor chip 11, further reducing the possibility of abnormal phenomenon of light convergence in a pixel area of the image sensor chip 11 due to reflection of the side surface of the opening K of the substrate 20 to the light, the probability of flare phenomenon formed in the image output by the image sensing chip 11 due to the area where the light rays are converged is reduced, and the imaging quality of the image sensing chip 11 is improved.
It should be noted that, in the present specification, the embodiments are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments may be referred to each other. For the packaging method disclosed by the embodiment, since the packaging method corresponds to the packaging structure disclosed by the embodiment, the description is simple, and the relevant points can be referred to the corresponding parts of the packaging structure for description.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (19)
1. The utility model provides a packaging structure of image sensing chip which characterized in that includes:
the image sensing chip comprises a first surface and a second surface which are opposite, wherein the first surface comprises a photosensitive area and a non-photosensitive area;
the substrate is positioned on one side, away from the second surface, of the image sensing chip and provided with an opening, and the photosensitive area is exposed from the opening;
the side surface of the substrate facing the opening is provided with at least one step structure, and the step structure is parallel to the step surface of the first surface and faces the image sensing chip.
2. The package structure of claim 1, further comprising: the lens module is arranged on the substrate, covers the opening and forms an optical cavity together with the substrate and the image sensing chip.
3. The package structure according to claim 2, wherein a side of the substrate facing the opening has a first rectangular groove communicating with the opening, the first rectangular groove being located on a side of the substrate facing the image sensor chip;
the first rectangular groove part penetrates through the substrate and forms a one-step structure with the substrate.
4. The package structure of claim 3, wherein an angle between a diagonal of the first rectangular groove and a plane parallel to the image sensor chip is smaller than a maximum light entrance angle of the lens module.
5. The package structure according to claim 2, wherein a side of the substrate facing the opening has a second rectangular groove and a third rectangular groove communicating with the opening, and the second rectangular groove and the third rectangular groove are both located on a side of the substrate facing the image sensor chip;
the second rectangular groove is embedded between the third rectangular groove and the substrate, and the second rectangular groove, the third rectangular groove and the substrate form a two-stage step structure.
6. The package structure of claim 5, wherein an angle between a diagonal of the second rectangular groove and a plane parallel to the image sensor chip is smaller than or equal to a maximum light entrance angle of the lens module;
the side length of the third rectangular groove parallel to the side of the image sensing chip meets a preset formula;
the preset formula is that c is more than or equal to (a + b) x tan α, wherein c is the side length of the third rectangular groove parallel to the side of the image sensing chip, a is the side length of the second rectangular groove perpendicular to the side of the image sensing chip, b is the side length of the third rectangular groove perpendicular to the side of the image sensing chip, and α is the maximum light advancing angle of the lens module.
7. The package structure according to any one of claims 1 to 6, wherein a side surface of the substrate facing the opening is a rough surface or is coated with a diffuse reflective coating.
8. The encapsulation structure according to any one of claims 1 to 6, wherein a side surface of the substrate facing the opening is coated with a light absorbing coating.
9. The package structure according to claim 1, wherein a wiring line and a contact terminal connected to the wiring line are provided on the substrate, the wiring line being for electrical connection with an external circuit;
the photosensitive area of the image sensing chip is provided with a plurality of pixel points for collecting image information and a plurality of first welding pads connected with the pixel points, and the first welding pads are electrically connected with the contact ends.
10. The package structure of claim 9, wherein the first pad is electrically connected to the contact terminal by a conductive paste or a solder structure.
11. The package structure of claim 10, further comprising: and a sealing resin located on the first pad and the wiring line toward the side of the opening.
12. The package structure according to claim 9, wherein a surface of the substrate facing the image sensor chip is further provided with an external terminal electrically connected to the wiring line, and the external terminal is configured to be electrically connected to the external circuit.
13. The package structure of claim 12, further comprising:
and an insulating film covering an exposed surface of the wiring line.
14. The package structure of claim 9, further comprising:
and the light source compensation device is arranged on the surface of one side of the substrate, which is far away from the image sensing chip.
15. The package structure according to claim 14, wherein the wiring lines include first interconnection lines and second interconnection lines insulated from each other; wherein,
the first interconnection line is used for electrically connecting the pixel point with an external circuit;
the second interconnection line is used for electrically connecting the light source compensation device with an external circuit.
16. The package structure of claim 1, further comprising:
and the light-transmitting cover plate is fixed on one side of the substrate, which is far away from the image sensing chip, and covers the opening.
17. The package structure of claim 16, wherein the light transmissive cover plate is a tempered glass cover plate or an acrylic cover plate.
18. The package structure of claim 16, wherein the light transmissive cover plate is an optical glass cover plate;
the optical glass cover plate is optically transparent to at least one range of light wavelengths.
19. The package structure of claim 18, wherein the optical glass cover plate surface is further provided with an optical coating;
the optical coating at least has one of functions of antireflection, permeability increasing, infrared cut-off and visible light filtering.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201820568608.8U CN208538859U (en) | 2018-04-20 | 2018-04-20 | A kind of encapsulating structure of image sensing chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201820568608.8U CN208538859U (en) | 2018-04-20 | 2018-04-20 | A kind of encapsulating structure of image sensing chip |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN208538859U true CN208538859U (en) | 2019-02-22 |
Family
ID=65396775
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201820568608.8U Active CN208538859U (en) | 2018-04-20 | 2018-04-20 | A kind of encapsulating structure of image sensing chip |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN208538859U (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108520886A (en) * | 2018-04-20 | 2018-09-11 | 苏州晶方半导体科技股份有限公司 | A kind of encapsulating structure and its packaging method of image sensing chip |
| CN110351460A (en) * | 2019-06-22 | 2019-10-18 | 王之奇 | A kind of camera encapsulation module and its packaging method |
| WO2021190141A1 (en) * | 2020-03-26 | 2021-09-30 | 苏州晶方半导体科技股份有限公司 | Packaging structure for chip and packaging method therefor |
-
2018
- 2018-04-20 CN CN201820568608.8U patent/CN208538859U/en active Active
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108520886A (en) * | 2018-04-20 | 2018-09-11 | 苏州晶方半导体科技股份有限公司 | A kind of encapsulating structure and its packaging method of image sensing chip |
| CN108520886B (en) * | 2018-04-20 | 2024-07-09 | 苏州晶方半导体科技股份有限公司 | Packaging structure and packaging method of image sensing chip |
| CN110351460A (en) * | 2019-06-22 | 2019-10-18 | 王之奇 | A kind of camera encapsulation module and its packaging method |
| WO2021190141A1 (en) * | 2020-03-26 | 2021-09-30 | 苏州晶方半导体科技股份有限公司 | Packaging structure for chip and packaging method therefor |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN108364970A (en) | A kind of encapsulating structure and its packaging method of image sensing chip | |
| CN108447882A (en) | A kind of encapsulating structure and its packaging method of image sensing chip | |
| US7521790B2 (en) | Semiconductor device module and manufacturing method of semiconductor device module | |
| KR100903824B1 (en) | Electronic assembly for image sensor device and fabrication method thereof | |
| US20070126912A1 (en) | Camera module and manufacturing method for such a camera module | |
| CN108520886B (en) | Packaging structure and packaging method of image sensing chip | |
| CN105070734A (en) | Packaging structure and packaging method | |
| CN208538859U (en) | A kind of encapsulating structure of image sensing chip | |
| WO1992010856A1 (en) | Optoelectronic device component package and method of making the same | |
| WO2009130839A1 (en) | Optical device and electronic apparatus including the same | |
| CN109273474B (en) | Photosensitive chip packaging structure and packaging method thereof | |
| CN105244360A (en) | Packaging structure of photosensitive chip and packaging method thereof | |
| JP2005317745A (en) | Solid-state imaging apparatus and method for manufacturing the same | |
| KR20060046374A (en) | Solid state imaging device, semiconductor wafer and camera module | |
| CN208127212U (en) | A kind of encapsulating structure of image sensing chip | |
| CN109103208B (en) | Packaging method and packaging structure of image sensing chip | |
| US8547471B2 (en) | Camera module and method of manufacturing the camera module | |
| CN112635505A (en) | Packaging structure and packaging method | |
| CN204991711U (en) | Packaging structure | |
| CN208127211U (en) | A kind of encapsulating structure of image sensing chip | |
| JP2009123788A (en) | Solid-state imaging apparatus, method of manufacturing solid-state imaging apparatus, and photographic apparatus using the same solid-state imaging apparatus | |
| CN105118843A (en) | Packaging structure and packaging method | |
| JP4174664B2 (en) | OPTICAL MODULE, ITS MANUFACTURING METHOD, AND ELECTRONIC DEVICE | |
| CN213936192U (en) | Packaging structure | |
| CN113471152B (en) | Packaging structure and packaging method, camera module and electronic equipment |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant |