CN208443970U

CN208443970U - A kind of driver circuit plate aging test device of PCR instrument

Info

Publication number: CN208443970U
Application number: CN201820764409.4U
Authority: CN
Inventors: 胡炎昌; 伊波; 贾伟; 童国军; 石建军; 贺贤汉
Original assignee: HANGZHOU BIOER TECHNOLOGY Co Ltd
Current assignee: Hangzhou Bori Technology Co ltd
Priority date: 2018-05-22
Filing date: 2018-05-22
Publication date: 2019-01-29
Anticipated expiration: 2028-05-22

Abstract

The utility model discloses a kind of driver circuit plate aging test devices of PCR instrument.Human factor influences big in the test process of the driver circuit board test device of PCR instrument.The utility model includes motherboard power supply, control mainboard and fictitious load group；The fictitious load group includes the first fictitious load, the second fictitious load, third fictitious load, the 4th fictitious load, the 5th fictitious load and the 6th fictitious load；The control mainboard includes power-switching circuit, main control singlechip circuit, current sampling circuit, output interface circuit, accessory channel output signal indicating circuit, storage unit display circuit, display button interface circuit, memory cell data processing circuit, data storage circuit, feedback signal conversion circuit and memory cell signal interface circuit；The utility model makes tested PCR driver circuit plate complete test and aging in a stringent working environment by power-up, load.

Description

A kind of driver circuit plate aging test device of PCR instrument

Technical field

The utility model belongs to driving plate test aging technical field, and in particular to a kind of driver circuit plate of PCR instrument Test the device of aging.

Background technique

The common aging techniques of PCR domain-driven wiring board at present are as follows: debugging carries out the offline high/low temperature of veneer after testing Then impact aging carries out testing reinspection and picking out not conforming to panel again.Such process does not carry out fatigue to component in plate Phase test, can not pick out the unstable veneer in operational process, operation process is also too loaded down with trivial details.Debug the people of test process It is excessive for factor.

Summary of the invention

The purpose of this utility model is to provide a kind of devices of the driver circuit plate of PCR instrument test aging.

The utility model includes motherboard power supply, control mainboard and fictitious load group；The fictitious load group includes first Fictitious load, the second fictitious load, third fictitious load, the 4th fictitious load, the 5th fictitious load and the 6th fictitious load；Institute The control mainboard stated includes power-switching circuit, main control singlechip circuit, current sampling circuit, output interface circuit, assists leading to Road output signal indicating circuit, storage unit display circuit, display button interface circuit, memory cell data processing circuit, number According to memory circuit, feedback signal conversion circuit and memory cell signal interface circuit；Power-switching circuit passes through power voltage step down Module, the first voltage stabilizing chip and the second voltage stabilizing chip are master control single chip circuit, current sampling circuit, storage unit display electricity Road, memory cell data processing circuit, data storage circuit and the power supply of feedback signal conversion circuit；Main control singlechip circuit is logical It crosses first singlechip and sends driving signal to driving signal interface circuit；Current sampling circuit by the first digital voltage gauge outfit, Second digital voltage gauge outfit shows the voltage value of the first fictitious load, the second fictitious load both ends respectively；Feedback signal conversion electricity Road is converted the voltage value received to after switching value by photoelectrical coupler and is transferred to memory cell data processing circuit；Storage Cell data processing circuit is connected with storage unit display circuit.

Driving signal interface circuit is driving signal connecting terminal block；1 pin of driving signal connecting terminal block connects master control 4th data output end of single chip circuit, 3 pins connect the third data output end of main control singlechip circuit, and 5 pins connect master control First data output end of single chip circuit；9 pins connect the second data output end of main control singlechip circuit, and 13 pins connect master control 9th control output end of single chip circuit, 15 pins connect the 8th control output end of main control singlechip circuit, and 25 pins meet master Control the second control output end of single chip circuit, 26 pins connect the first control output end of main control singlechip circuit, 2,4,6,8, 10,12,14,16,18,20,22,24 and 29 pins connect the 3.3V output end of power-switching circuit, and 17 pins connect master control list The third control output end on piece electromechanics road, 19 pins connect the 4th control output end of main control singlechip circuit, and 7 pins connect master control 7th control output end of single chip circuit, 27 pins connect the 6th control output end of main control singlechip circuit, and 28 pins connect 5th control output end of main control singlechip circuit, 35 pins ground connection.

Output interface circuit includes the first transmission connecting terminal block and output wiring terminal row.First transmission connecting terminal block The first terminals of 2,4 pins and the first fictitious load, the second fictitious load be respectively connected with, 9 pins connect main control singlechip electricity The signal interaction end on road, 10 pins connect the anode of motherboard power supply, and 17,18,19,20 pins connect with the first of third fictitious load Line end, the first terminals of the 4th fictitious load, the 5th fictitious load the first terminals, the 6th fictitious load the first wiring End is respectively connected with；The second wiring termination of third fictitious load, the 4th fictitious load, the 5th fictitious load and the 6th fictitious load The anode of motherboard power supply.

1,2,9 and 10 pins of output wiring terminal row connect the second terminals of the first fictitious load, and 3,4,11 and 12 Pin connects the first terminals of the first fictitious load, and 5,6,13 and 14 pins connect the second terminals of the second fictitious load, 7,8,15 and 16 pins connect the first terminals of the second fictitious load.

Display button interface circuit includes the first communications line terminal block.First communications line terminal block 8,10,12, 14, one end of 16 pins and the first key, the second key, third key, the 4th key, the 5th key is respectively connected with；First presses Key, the second key, third key, the 4th key and the 5th key the other end be grounded；The 11 of first communications line terminal block And 13 pin connect the 5V output end of power-switching circuit, 7 and 9 pins are grounded, 1,3,5 pins and storage unit display electricity First signal input part, second signal input terminal, the third signal input part on road are respectively connected with.

Memory cell signal interface circuit includes the second communications line terminal block and the second transmission connecting terminal block.Second is logical 7 and 9 pins of news connecting terminal block are grounded, and 11 and 13 pins connect the 5V output end of power-switching circuit, 1,3,5 pins with The third of memory cell data processing circuit shows that output end, the second display output end, the first display output end are respectively connected with；The 9th signal of 2,4,6,8,10,12,14,16 pins and memory cell data processing circuit of two communication connecting terminal blocks is defeated Enter end to the 16th signal input part to be respectively connected with.

9 pins of the second transmission connecting terminal block connect the signal interaction end of memory cell data processing circuit.Second transmission 1,3 pins of connecting terminal block and two third analog input ends of feedback signal conversion circuit are respectively connected with；Second transmission 2,4 pins of connecting terminal block are respectively connected with two the 4th analog input ends of feedback signal conversion circuit；Second transmission First analog input end of the reversed feedback signal conversion circuit of 10 pins of connecting terminal block；Second transmission connecting terminal block 17, four the second analog input ends of 18,19,20 pins and feedback signal conversion circuit are respectively connected with.

Driving signal interface circuit is driving signal connecting terminal block.1 pin of driving signal connecting terminal block connects master control 4th data output end of single chip circuit, 3 pins connect the third data output end of main control singlechip circuit, and 5 pins connect master control First data output end of single chip circuit；9 pins connect the second data output end of main control singlechip circuit, and 13 pins connect master control 9th control output end of single chip circuit, 15 pins connect the 8th control output end of main control singlechip circuit, and 25 pins meet master Control the second control output end of single chip circuit, 26 pins connect the first control output end of main control singlechip circuit, 2,4,6,8, 10,12,14,16,18,20,22,24 and 29 pins connect the 3.3V output end of power-switching circuit, and 17 pins connect master control list The third control output end on piece electromechanics road, 19 pins connect the 4th control output end of main control singlechip circuit, and 7 pins connect master control 7th control output end of single chip circuit, 27 pins connect the 6th control output end of main control singlechip circuit, and 28 pins connect 5th control output end of main control singlechip circuit, 35 pins ground connection.

20 pins of 20 pins of the first transmission connecting terminal block and the second transmission connecting terminal block are with one 20 core wire beams are respectively connected with；20 pins of the first communications line terminal block draw with 20 of the second communications line terminal block Foot is respectively connected with a 20 core wire beams.

Further, the power-switching circuit includes the first voltage stabilizing chip, the second voltage stabilizing chip and power voltage step down mould Block；The model SUCS102412C of the power voltage step down module；The model SP1117M3- of first voltage stabilizing chip 3.3；The model NCP1117DT50G of second voltage stabilizing chip；1 pin of power voltage step down module connect motherboard power supply anode, One end of the cathode of 5th diode D5, the anode of first capacitor C1 and the second capacitor C2,2,3 pins connect motherboard power supply Cathode, the anode of the 5th diode D5, the cathode of first capacitor C1 and the second capacitor C2 other end, 4 pins meet the 7th capacitor C7 Anode, one end of third capacitor C3,1 pin of the first voltage stabilizing chip and the second voltage stabilizing chip 1 pin, 5 pin floating, 6 Pin is connected and is grounded with the other end of the cathode of the 7th capacitor C7 and third capacitor C3；3 pins of the first voltage stabilizing chip connect One end of four capacitor C4 and the anode of the 8th capacitor C8；The other end and the 8th of 2 pins of the first voltage stabilizing chip, the 4th capacitor C4 The cathode of capacitor C8 is grounded；3 pins of the second voltage stabilizing chip connect one end of the 6th capacitor C6 and the anode of the 9th capacitor C9；The 2 pins, the other end of the 6th capacitor C6 and the cathode of the 9th capacitor C9 of two voltage stabilizing chips are grounded；The 3 of first voltage stabilizing chip Pin is the 3.3V output end of power-switching circuit；3 pins of the second voltage stabilizing chip are the 5V output end of power-switching circuit.

Further, main control singlechip circuit includes first singlechip；The model P89V51 of first singlechip；First 29 pins of single-chip microcontroller connect the 5V output end of power-switching circuit, and 16 pins are grounded, and the 5V that 38 pins connect power-switching circuit is defeated Outlet, one end of the 5th capacitor C5, the first exclusion and the second exclusion common pin；The other end of 5th capacitor C5 is grounded；The Four normal pins of one exclusion and 34,35,36,37 pins of first singlechip are respectively connected with；Four of second exclusion are common Pin and 30,31,32,33 pins of first singlechip are respectively connected with；32,33 pins and the 6th key of first singlechip and One end of seven keys is respectively connected with；The other end of 6th key and the 7th key is grounded；4 pins of first singlechip connect first The cathode of one end of resistance R1 and the tenth capacitor C10；The other end of first resistor R1 is grounded；The anode of tenth capacitor C10 connects electricity The 5V output end of power-switching circuit；14 pins of first singlechip connect one end of the first crystal oscillator Z1 and the 11st capacitor C11, and 15 draw Foot connects the other end of the first crystal oscillator Z1 and one end of the 12nd capacitor C12；11st capacitor C11 and the 12nd capacitor C12 are another End is grounded；12 pins of first singlechip connect the cathode of the first buzzer；The anode of first buzzer connects power-switching circuit 5V output end；18 pins of first singlechip connect one end of the 7th resistance R7, and another termination the 9th of the 7th resistance R7 shines The anode of pipe D9, the cathode ground connection of the 9th luminous tube D9；19 pins of first singlechip connect one end of the 8th resistance R8, the 8th electricity Hinder the anode of the 8th luminous tube D8 of another termination of R8, the cathode ground connection of the 8th luminous tube D8；20 pins of first singlechip connect One end of 9th resistance R9, the anode of the 7th luminous tube D7 of another termination of the 9th resistance R9, the cathode of the 7th luminous tube D7 connect Ground；21 pins of first singlechip connect one end of the tenth resistance R10, the 6th luminous tube D6's of another termination of the tenth resistance R10 Anode, the cathode ground connection of the 6th luminous tube D6；1,3,8,9,10,11,30,36,37 pins of first singlechip are respectively master control First control output end of single chip circuit to the 9th control output end；41,42,43,44 pins of first singlechip are respectively First data output end of main control singlechip circuit is to the 4th data output end；31 pins of first singlechip are main control singlechip The signal interaction end of circuit；Remaining pin of first singlechip is hanging.

Further, current sampling circuit includes the first power conversion chip, second source conversion chip, the first number electricity Press gauge outfit and the second digital voltage gauge outfit；First power conversion chip, second source conversion chip model be NMK0505SAC；First digital voltage gauge outfit, the model of the second digital voltage gauge outfit are FY5140B；First power supply converts core Piece, second source conversion chip 1 pin connect the 5V output end of power-switching circuit, 2 pins are grounded.

3 pins of the first power conversion chip connect the first terminals of the first fictitious load, the 37th resistance R37, One end of 20 capacitor C20,2 pins of the first digital voltage gauge outfit, one end of resistor body and movable contact in the first potentiometer；The 4 pins of one power conversion chip connect the other end of the 37th resistance R37 and 3 pins of the first digital voltage gauge outfit；First One end of the 29th resistance R29 of another termination of resistor body in potentiometer；29th resistance R29 and the 20th capacitor C20 The other end connect one end of the 33rd resistance R33 and 1 pin of the first digital voltage gauge outfit；33rd resistance R33's Second terminals of the first fictitious load of another termination.

3 pins of second source conversion chip connect the first terminals of the second fictitious load, the 38th resistance R38, One end of 21 capacitor C21,2 pins of the second digital voltage gauge outfit, one end of resistor body and movable contact in the second potentiometer； 4 pins of second source conversion chip connect the other end of the 38th resistance R38 and 3 pins of the second digital voltage gauge outfit；The One end of the 30th resistance R30 of another termination of the interior resistor body of two potentiometers；30th resistance R30 and the 21st capacitor The other end of C21 connects one end of the 34th resistance R34 and 1 pin of the second digital voltage gauge outfit；34th resistance R34 The second fictitious load of another termination the second terminals.

Further, accessory channel output signal indicating circuit include the 16th luminous tube D16, the 17th luminous tube D17, 18th luminous tube D18 and the 19th luminous tube D19.16th luminous tube D16, the 17th luminous tube D17, the 18th luminous tube Anode and eleventh resistor R11, twelfth resistor R12, thirteenth resistor R13, the 14th electricity of D18, the 19th luminous tube D19 One end of resistance R14 is respectively connected with；Eleventh resistor R11, twelfth resistor R12, thirteenth resistor R13 and the 14th resistance R14 The other end connect the anode of motherboard power supply, the 16th luminous tube D16, the 17th luminous tube D17, the 18th luminous tube D18, The cathode and the first terminals of third fictitious load, the first terminals of the 4th fictitious load, the 5th mould of 19 luminous tube D19 First terminals of quasi- load, the first terminals of the 6th fictitious load are respectively connected with.

Further, memory cell data processing circuit includes second singlechip.The model P89V51 of second singlechip. 29 pins of second singlechip connect the 5V output end of power-switching circuit, 16 pins ground connection, and 38 pins connect power-switching circuit 5V output end, one end of the 25th capacitor C25, third exclusion and the 4th exclusion common pin；25th capacitor C25's Other end ground connection；Four normal pins of third exclusion and 34,35,36,37 pins of second singlechip are respectively connected with；4th row Four normal pins of resistance and 30,31,32,33 pins of second singlechip are respectively connected with；4 pins of second singlechip connect One end of 15 resistance R15 and the cathode of the 26th capacitor C26；The other end of 15th resistance R15 is grounded；26th The anode of capacitor C26 connects the 5V output end of power-switching circuit；14 pins of second singlechip connect the second crystal oscillator and the 27th One end of capacitor C27,15 pins connect the other end of the second crystal oscillator and one end of the 28th capacitor C28；27th capacitor C27 And the 28th the capacitor C28 other end be grounded；32 pins of second singlechip connect the cathode of the second buzzer；Second buzzing The anode of device connects the 5V output end of power-switching circuit；Second singlechip 40,41,42,43,44,1,2,3,18,19,20, 21,22,23,24,25 pins are respectively that the first signal input part to the 16th signal of memory cell data processing circuit inputs End；30,31 pins of second singlechip are respectively the IIC clock end of memory cell data processing circuit, IIC bi-directional data end； 35,36,37 pins of second singlechip are respectively the first display output end of memory cell data processing circuit, the second display Output end, third show output end；33 pins of second singlechip are the signal interaction end of memory cell data processing circuit.

Further, storage unit display circuit includes digital pipe driving chip sum number code pipe；Digital pipe driving chip Model TM1623；The model S02848A-B of charactron；9 and 25 pins of digital pipe driving chip connect the 24th electricity Hold one end of C24 and the 5V output end of power-switching circuit；26,29,32 pins of digital pipe driving chip and the 24th electricity The other end for holding C24 is grounded；Digital pipe driving chip 10,11,12,14,15,16,17,18,19,20,23,24,27, 28,14,16,13,3,5,11,15,7,12,9,10,4,8,6,2,1 pin of 30,31 pins and charactron M1 is respectively connected with； 3,4,5 pins of digital pipe driving chip are respectively the first signal input part of storage unit display circuit, second signal input End, third signal input part.

Further, data storage circuit includes storage chip；The model 24C01 of storage chip；Storage chip 1,2,3,4 and 7 pins are grounded, and 8 pins connect one end of the 29th capacitor C29 and the 5V output end of power-switching circuit；The The other end of 29 capacitor C29 is grounded；5,6 pins of storage chip and the two-way number of IIC of memory cell data processing circuit It is respectively connected with according to end, IIC clock end.

Further, feedback signal conversion circuit includes four the first signal feedback units and two second signal feedbacks Member；First signal feedback unit includes the first optocoupler；The first input end of first optocoupler connects one end of the 45th resistance R45, First output end ground connection, second output terminal connect one end of the 46th resistance R46；Another termination electricity of 46th resistance R46 The 5V output end of power-switching circuit.

Second signal feedback unit includes the second optocoupler and third optocoupler.The first input end and third optocoupler of second optocoupler The second input terminal connect one end of the 16th resistance R16；First input of the second input terminal and third optocoupler of the second optocoupler End is connected；First output end of the second optocoupler and third optocoupler is grounded；The second output terminal of second optocoupler connects the 17th resistance One end of R17；The 5V output end of another termination power-switching circuit of 17th resistance R17；The second output terminal of third optocoupler Connect one end of the 18th resistance R18；The 5V output end of another termination power-switching circuit of 18th resistance R18.

That end far from the first optocoupler of the 45th resistance R45 links together in four the first signal feedback units, The first analog input end as feedback signal conversion circuit；The second of the first optocoupler is defeated in four the first signal feedback units Enter four the second analog input ends that end is respectively feedback signal conversion circuit；First light in four the first signal feedback units The second output terminal of coupling and the first signal input part to the fourth signal input terminal of memory cell data processing circuit are respectively connected with.

That end far from the second optocoupler of the 16th resistance R16 is respectively feedback signal in two second signal feedback units Two third analog input ends of conversion circuit；The second input terminal difference of second optocoupler in two second signal feedback units For two the 4th analog input ends of feedback signal conversion circuit；The second of second optocoupler in two second signal feedback units Output end, third optocoupler second output terminal and memory cell data processing circuit the 5th signal input part it is defeated to the 8th signal Enter end to be respectively connected with.

The utility model has the beneficial effect that

The utility model makes tested PCR driver circuit plate in a stringent working environment by power-up and load Test and aging are completed, enables not conform to panel and exposes defect in advance, fatigue is spent into the component acceleration of instinct in its plate Phase.Rejected product is screened before engineering installation, improves stability of instrument and production efficiency.

Detailed description of the invention

Fig. 1 is the system block diagram of the utility model；

Fig. 2 is the circuit diagram of power-switching circuit in the utility model；

Fig. 3 is the circuit diagram of main control singlechip circuit in the utility model；

Fig. 4 is the circuit diagram of driving signal interface circuit in the utility model；

Fig. 5 is the circuit diagram of current sampling circuit in the utility model；

Fig. 6 is the wiring diagram of the first transmission connecting terminal block in the utility model；

Fig. 7 is the wiring diagram of output wiring terminal row in the utility model；

Fig. 8 is the circuit diagram of accessory channel output signal indicating circuit in the utility model；

Fig. 9 is the circuit diagram of storage unit display circuit in the utility model；

Figure 10 is the circuit diagram of display button interface circuit in the utility model；

Figure 11 is the circuit diagram of memory cell data processing circuit in the utility model；

Figure 12 is the circuit diagram of data storage circuit in the utility model；

Figure 13 is the circuit diagram of the first signal feedback unit in the utility model；

Figure 14 is the circuit diagram of second signal feedback unit in the utility model；

Figure 15 is the wiring diagram of the second communications line terminal block in the utility model；

Figure 16 is the wiring diagram of the second transmission connecting terminal block in the utility model；

Figure 17 is the inductance match curve figure of the utility model.

Specific embodiment

Below in conjunction with attached drawing, the utility model is described in further detail.

As shown in Figure 1, a kind of driver circuit plate aging test device of PCR instrument, including motherboard power supply 3, control mainboard With fictitious load group 4.Fictitious load group 4 includes the first fictitious load, the second fictitious load, third fictitious load, the 4th simulation Load, the 5th fictitious load, the 6th fictitious load.First fictitious load, the second fictitious load, third fictitious load, the 4th mould Quasi- load, the 5th fictitious load, the 6th fictitious load are all made of gold aluminum casing resistor.

Control mainboard includes power-switching circuit 101, main control singlechip circuit 102, driving signal interface circuit 103, electricity Flow sample circuit 104, output interface circuit 105, accessory channel output signal indicating circuit 106, storage unit display circuit 201, display button interface circuit 202, memory cell data processing circuit 203, data storage circuit 204, feedback signal turn Change circuit 205 and memory cell signal interface circuit 206.Power-switching circuit 101 passes through power voltage step down module for motherboard power supply 3 The 24V voltage of output is converted into 12V, and converts 3.3V for the 12V voltage that power module exports by the first voltage stabilizing chip and be Driving signal interface circuit 103 is powered, and is converted the 12V voltage that power voltage step down module exports to by the second voltage stabilizing chip U2 5V is master control single chip circuit 102, current sampling circuit 104, storage unit display circuit 201, memory cell data processing electricity Road 203, data storage circuit 204 and feedback signal conversion circuit 205 are powered.Main control singlechip circuit 102 is single by first Piece machine sends driving signal to driving signal interface circuit 103.Driving signal interface circuit 103 and fictitious load group 4 with quilt Drafting board 5 is connected.Current sampling circuit 104 shows the first mould by the first digital voltage gauge outfit, the second digital voltage gauge outfit respectively Intend the voltage value of load, the second fictitious load.The model of Board Under Test is transferred to by key and is deposited by display button interface circuit 202 Storage unit data processing circuit 203.Output interface circuit 105 and memory cell signal interface circuit 206 by the first fictitious load, The voltage value transmission of second fictitious load, third fictitious load, the 4th fictitious load, the 5th fictitious load, the 6th fictitious load To feedback signal conversion circuit 205.Feedback signal conversion circuit 205 is converted the voltage value received to by photoelectrical coupler Memory cell data processing circuit 203 is transferred to after switching value.Memory cell data processing circuit 203 will by second singlechip Whether the switching value for judging that the transmission of feedback signal conversion circuit 205 comes is correct, and generates detection code or error code.Storage is single First display circuit 201 by numeral method memory cell data processing circuit 203 transmission come detection code or mistake generation Code.Memory circuit 204 stores detection code or error code by storage chip.

As shown in Fig. 2, power-switching circuit 101 includes the first voltage stabilizing chip U1, the second voltage stabilizing chip U2 and power voltage step down Module U7.The model SUCS102412C of power voltage step down module U7.The model SU7117M3-3.3 of first voltage stabilizing chip U1. The model NCU7117DT50G of second voltage stabilizing chip U2.1 pin of power voltage step down module U7 connect 3 anode HV+ of motherboard power supply, One end of the cathode of 5th diode D5, the anode of first capacitor C1 and the second capacitor C2,2,3 pins connect motherboard power supply 3 Cathode HV-, the anode of the 5th diode D5, the cathode of first capacitor C1 and the second capacitor C2 other end, 4 pins connect the 7th capacitor The anode of C7, one end of third capacitor C3,1 pin of the first voltage stabilizing chip U1 and 1 pin of the second voltage stabilizing chip U2,5 pins Vacantly, 6 pins are connected and are grounded with the other end of the cathode of the 7th capacitor C7 and third capacitor C3.The 3 of first voltage stabilizing chip U1 Pin connects one end of the 4th capacitor C4 and the anode of the 8th capacitor C8；2 pins of first voltage stabilizing chip U1, the 4th capacitor C4 The cathode of the other end and the 8th capacitor C8 are grounded；3 pins of second voltage stabilizing chip U2 connect one end and the 9th of the 6th capacitor C6 The anode of capacitor C9；2 pins, the other end of the 6th capacitor C6 and the cathode of the 9th capacitor C9 of second voltage stabilizing chip U2 connects Ground.3 pins of first voltage stabilizing chip U1 are the 3.3V output end+3.3V of power-switching circuit 101.The 3 of second voltage stabilizing chip U2 Pin is the 5V output end+5V of power-switching circuit 101.

As shown in figure 3, main control singlechip circuit 102 includes first singlechip U3.The model of first singlechip U3 P89V51.29 pins of first singlechip U3 meet the 5V output end+5V of power-switching circuit 101,16 pins ground connection, and 38 pins connect 5V output end+the 5V of power-switching circuit 101, one end of the 5th capacitor C5, the first exclusion RR1 and the second exclusion RR2 it is public Pin.The other end of 5th capacitor C5 is grounded.Four normal pins of first exclusion RR1 and first singlechip U3 34,35, 36,37 pins are respectively connected with.Four normal pins of second exclusion RR2 and 30,31,32,33 pins of first singlechip U3 It is respectively connected with.One end of 32,33 pins and the 6th key S6 and the 7th key S7 of first singlechip U3 is respectively connected with.6th presses The other end of key S6 and the 7th key S7 are grounded.4 pins of first singlechip U3 connect one end and the tenth electricity of first resistor R1 Hold the cathode of C10.The other end of first resistor R1 is grounded.The 5V that the anode of tenth capacitor C10 connects power-switching circuit 101 is defeated Outlet+5V；14 pins of first singlechip U3 connect one end of the first crystal oscillator Z1 and the 11st capacitor C11, and 15 pins connect the first crystalline substance Shake the other end of Z1 and one end of the 12nd capacitor C12.11st capacitor C11 and the 12nd capacitor C12 other end are grounded.The 12 pins of one single-chip microcontroller U3 connect the cathode of the first buzzer LS1.The anode of first buzzer LS1 connects power-switching circuit 101 5V output end+5V.18 pins of first singlechip U3 connect one end of the 7th resistance R7, another termination of the 7th resistance R7 The anode of nine luminous tube D9, the cathode ground connection of the 9th luminous tube D9；19 pins of first singlechip U3 connect the 8th resistance R8's One end, the anode of the 8th luminous tube D8 of another termination of the 8th resistance R8, the cathode ground connection of the 8th luminous tube D8；First singlechip 20 pins of U3 connect one end of the 9th resistance R9, and the anode of the 7th luminous tube D7 of another termination of the 9th resistance R9, the 7th shines The cathode of pipe D7 is grounded；21 pins of first singlechip U3 connect one end of the tenth resistance R10, another termination of the tenth resistance R10 The anode of 6th luminous tube D6, the cathode ground connection of the 6th luminous tube D6.First singlechip U3 1,3,8,9,10,11,30, 36,37 pins are respectively the first control output end to the 9th control output end of main control singlechip circuit 102.First singlechip U3 41,42,43,44 pins be respectively main control singlechip circuit 102 the first data output end to the 4th data output end.The 31 pins of one single-chip microcontroller U3 are the signal interaction end of master control single chip circuit 102.Remaining pin of first singlechip U3 is outstanding It is empty.

As shown in figure 4, driving signal interface circuit 103 is driving signal connecting terminal block J3.Driving signal connecting terminal Row J3 has 40.1 pin of driving signal connecting terminal block J3 meets the 4th data output end CLK of main control singlechip circuit 102, 3 pins meet the third data output end DIN of main control singlechip circuit 102, and 5 pins connect the first number of main control singlechip circuit 102 According to output end FS；9 pins meet the second data output end CS of main control singlechip circuit 102, and 13 pins connect main control singlechip circuit 102 the 9th control output end DIR1,15 pins connect the 8th control output end DIR2 of main control singlechip circuit 102,25 pins The second control output end L-HOTLID of main control singlechip circuit 102 is met, 26 pins connect the first control of main control singlechip circuit 102 Output end R-HOTLID processed, 2,4,6,8,10,12,14,16,18,20,22,24 and 29 pins connect power-switching circuit 101 3.3V output end+3.3V, 17 pins meet the third control output end HEATER1 of main control singlechip circuit 102；Driving signal 19 pins of connecting terminal block J3 meet the 4th control output end HEATER2 of main control singlechip circuit 102, and 7 pins connect master control list The 7th control output end DA_LOAD on piece electromechanics road 102,27 pins connect the 6th control output of main control singlechip circuit 102 L-PWM is held, 28 pins connect the 5th control output end R-PWM of main control singlechip circuit 102,35 pins ground connection.Driving signal connects Remaining pin floating of line terminals row J3.

As shown in figure 5, current sampling circuit 104 include the first power conversion chip IC1, second source conversion chip IC2, First digital voltage gauge outfit BK1 and the second digital voltage gauge outfit BK2.First power conversion chip IC1, second source conversion chip The model of IC2 is NMK0505SAC.First digital voltage gauge outfit BK1, the second digital voltage gauge outfit BK2 model be FY5140B.First power conversion chip IC1, second source conversion chip IC2 1 pin meet the 5V of power-switching circuit 101 Output end+5V, 2 pins are grounded.

3 pins of first power conversion chip IC1 connect the first terminals TE1-, the 37th resistance of the first fictitious load R37, one end of the 20th capacitor C20,2 pins of the first digital voltage gauge outfit BK1, in the first potentiometer RP1 resistor body one End and movable contact.4 pins of first power conversion chip IC1 connect the other end and the first digital voltage of the 37th resistance R37 3 pins of gauge outfit BK1.One end of the 29th resistance R29 of another termination of resistor body in first potentiometer RP1.29th The other end of resistance R29 and the 20th capacitor C20 meet one end and the first digital voltage gauge outfit BK1 of the 33rd resistance R33 1 pin.Second terminals TE1+ of the first fictitious load of another termination of the 33rd resistance R33.

3 pins of second source conversion chip IC2 connect the first terminals TE2-, the 38th resistance of the second fictitious load R38, one end of the 21st capacitor C21,2 pins of the second digital voltage gauge outfit BK2, resistor body in the second potentiometer RP2 One end and movable contact.4 pins of second source conversion chip IC2 connect the other end and the second number electricity of the 38th resistance R38 Press 3 pins of gauge outfit BK2.One end of the 30th resistance R30 of another termination of the interior resistor body of second potentiometer RP2.30th The other end of resistance R30 and the 21st capacitor C21 connect one end and the second digital voltage gauge outfit of the 34th resistance R34 1 pin of BK2.Second terminals TE2+ of the second fictitious load of another termination of the 34th resistance R34.

As shown in Figures 6 and 7, output interface circuit 105 includes the first transmission connecting terminal block J19 and output wiring terminal row J21.2,4 pins of first transmission connecting terminal block J19 and the first terminals of the first fictitious load, the second fictitious load are distinguished It is connected, 9 pins meet the signal interaction end P0.6 of main control singlechip circuit 102, and 10 pins meet the positive HV+ of motherboard power supply, 17, 18, the first terminals OUT1 of 19,20 pins and third fictitious load, the first terminals OUT2 of the 4th fictitious load, the 5th First terminals OUT3 of fictitious load, the first terminals OUT4 of the 6th fictitious load are respectively connected with.First transmission terminals Remaining pin of son row J19 is hanging.Third fictitious load, the 4th fictitious load, the 5th fictitious load and the 6th fictitious load The second terminals meet the positive HV+ of motherboard power supply 3.

As shown in fig. 7,1,2,9 and 10 pins of output wiring terminal row J21 connect the second wiring of the first fictitious load TE1+ is held, 3,4,11 and 12 pins meet the first terminals TE1- of the first fictitious load, and 5,6,13 and 14 pins connect second Second terminals TE2+ of fictitious load, 7,8,15 and 16 pins meet the first terminals TE2- of the second fictitious load.

As shown in figure 8, accessory channel output signal indicating circuit 106 includes the 16th luminous tube D16, the 17th luminous tube D17, the 18th luminous tube D18 and the 19th luminous tube D19.16th luminous tube D16, the 17th luminous tube D17, the 18th Anode and eleventh resistor R11, twelfth resistor R12, thirteenth resistor R13, the of luminous tube D18, the 19th luminous tube D19 One end of 14 resistance R14 is respectively connected with.Eleventh resistor R11, twelfth resistor R12, the electricity of thirteenth resistor R13 and the 14th The other end of resistance R14 connects the positive HV+ of motherboard power supply, the 16th luminous tube D16, the 17th luminous tube D17, the 18th hair The of light pipe D18, the cathode of the 19th luminous tube D19 and the first terminals OUT1 of third fictitious load, the 4th fictitious load The first terminals OUT4 difference phase of one terminals OUT2, the first terminals OUT3 of the 5th fictitious load, the 6th fictitious load Even.

As shown in figure 9, storage unit display circuit 201 includes number pipe driving chip U6 and charactron M1.Charactron drives The model TM1623 of dynamic chip U6.The model S02848A-B of charactron.9 and 25 pins of digital pipe driving chip U6 are equal Meet one end of the 24th capacitor C24 and the 5V output end+5V of power-switching circuit 101.Digital pipe driving chip U6 26, 29, the other end of 32 pins and the 24th capacitor C24 are grounded.Digital pipe driving chip U6 10,11,12,14,15,16, 17,18,19,20,23,24,27,28,30,31 pins and charactron M1 14,16,13,3,5,11,15,7,12,9,10,4, 8,6,2,1 pin is respectively connected with.3,4,5 pins of digital pipe driving chip U6 are respectively the of storage unit display circuit 201 One signal input part DO, second signal input terminal CO, third signal input part SO.Remaining pin of digital pipe driving chip U6 is equal Vacantly.

As shown in Figure 10, display button interface circuit 202 includes the first communications line terminal block J4.First communications line end 8,10,12,14,16 pins of son row J4 are pressed with the first key S1, the second key S2, third key S3, the 4th key S4, the 5th One end of key S5 is respectively connected with.First key S1, the second key S2, third key S3, the 4th key S4 and the 5th key S5 The other end is grounded.11 and 13 pins of first communications line terminal block J4 connect the 5V output end of power-switching circuit 101+ The pin of 5V, 7 and 9 is grounded, and 1,3,5 pins and the first signal input part DO of storage unit display circuit 201, second signal are defeated Enter to hold CO, third signal input part SO to be respectively connected with.Remaining pin floating of first communications line terminal block J4.

As shown in figure 11, memory cell data processing circuit 203 includes second singlechip U4.The model of second singlechip U4 For P89V51.29 pins of second singlechip U4 meet the 5V output end+5V of power-switching circuit 101, and 16 pins ground connection, 38 draw Foot connects 5V output end+5V, one end of the 25th capacitor C25, third exclusion RR3 and the 4th exclusion of power-switching circuit 101 The common pin of RR4.The other end of 25th capacitor C25 is grounded.Four normal pins and the second monolithic of third exclusion RR3 34,35,36,37 pins of machine U4 are respectively connected with.Four normal pins of 4th exclusion RR4 and second singlechip U4 30, 31,32,33 pins are respectively connected with.4 pins of second singlechip U4 connect one end and the 26th capacitor of the 15th resistance R15 The cathode of C26.The other end of 15th resistance R15 is grounded.The anode of 26th capacitor C26 connects power-switching circuit 101 5V output end+5V；14 pins of second singlechip U4 connect one end of the second crystal oscillator Z2 and the 27th capacitor C27, and 15 pins connect The other end of second crystal oscillator Z2 and one end of the 28th capacitor C28.27th capacitor C27 and the 28th capacitor C28 are another One end is grounded.32 pins of second singlechip U4 connect the cathode of the second buzzer LS2.The anode of second buzzer LS2 connects electricity 5V output end+the 5V of power-switching circuit 101.Second singlechip U4 40,41,42,43,44,1,2,3,18,19,20,21, 22,23,24,25 pins are respectively that the first signal input part to the 16th signal of memory cell data processing circuit 203 inputs End.30,31 pins of second singlechip U4 are respectively that IIC clock end SCL2, IIC of memory cell data processing circuit 203 is bis- To data terminal SDA2.35,36,37 pins of second singlechip U4 are respectively the first aobvious of memory cell data processing circuit 203 Show that output end SI, the second display output end CI, third show output end DI.33 pins of second singlechip U4 are number of memory cells According to the signal interaction end F of processing circuit 203.Remaining pin of second singlechip U4 is hanging.

As shown in figure 12, data storage circuit 204 includes storage chip U5.The model 24C01 of storage chip U5.It deposits 1,2,3,4 and 7 pins of storage chip U5 are grounded, and 8 pins connect one end and the power-switching circuit 101 of the 29th capacitor C29 5V output end+5V.The other end of 29th capacitor C29 is grounded.5,6 pins and memory cell data of storage chip U5 IIC bi-directional data end SDA2, IIC clock end SCL2 of processing circuit 203 is respectively connected with.

As shown in Figs. 13 and 14, feedback signal conversion circuit 205 includes four the first signal feedback units and two second Signal feedback unit.First signal feedback unit includes the first optocoupler P1.The first input end of first optocoupler P1 connects the 45th One end of resistance R45, the first output end ground connection, second output terminal connect one end of the 46th resistance R46.46th resistance 5V output end+the 5V of another termination power-switching circuit 101 of R46；

As shown in figure 14, second signal feedback unit includes the second optocoupler P2 and third optocoupler P3.The of second optocoupler P2 The second input terminal of one input terminal and third optocoupler P3 connect one end of the 16th resistance R16.The second input of second optocoupler P2 End is connected with the first input end of third optocoupler P3；The first output end of second optocoupler P2 and third optocoupler P3 are grounded；Second The second output terminal of optocoupler P2 connects one end of the 17th resistance R17.Another termination power-switching circuit of 17th resistance R17 101 5V output end+5V；The second output terminal of third optocoupler P3 connects one end of the 18th resistance R18.18th resistance R18's 5V output end+the 5V of another termination power-switching circuit 101.

That end far from the first optocoupler P1 of the 45th resistance R45 is connected to one in four the first signal feedback units It rises, the first analog input end as feedback signal conversion circuit 205.First optocoupler P1 in four the first signal feedback units The second input terminal be respectively feedback signal conversion circuit 205 four the second analog input ends.Four the first signal feedbacks The first signal input part to the 4th letter of the second output terminal of first optocoupler P1 and memory cell data processing circuit 203 in unit Number input terminal is respectively connected with.

That end far from the second optocoupler P2 of the 16th resistance R16 is respectively feedback letter in two second signal feedback units Two third analog input ends of number conversion circuit 205.The second of the second optocoupler P2 is defeated in two second signal feedback units Enter two the 4th analog input ends that end is respectively feedback signal conversion circuit 205.In two second signal feedback units Second output terminal, the second output terminal of third optocoupler P3 of two optocoupler P2 is believed with the 5th of memory cell data processing circuit 203 Number input terminal to the 8th signal input part is respectively connected with.

As shown in figs, memory cell signal interface circuit 206 includes the second communications line terminal block J15 and the tenth Six connecting terminal block J16.7 and 9 pins of second communications line terminal block J15 are grounded, and 11 and 13 pins connect power supply conversion 5V output end+the 5V of circuit 101, the third of 1,3,5 pins and memory cell data processing circuit 203 show output end DI, the Two display output end CI, the first display output end SI are respectively connected with.Second communications line terminal block J15 2,4,6,8,10,12, 14, the 9th signal input part to the 16th signal input part of 16 pins and memory cell data processing circuit 203 is respectively connected with.

As shown in figure 16,9 pins of the second transmission connecting terminal block J16 connect the letter of memory cell data processing circuit 203 Number interaction end.1,3 pins of second transmission connecting terminal block J16 and two third analog quantitys of feedback signal conversion circuit 205 Input terminal is respectively connected with.Second transmits two the 4th of 2,4 pins of connecting terminal block J16 and feedback signal conversion circuit 205 Analog input end is respectively connected with, the first analog input end of the reversed feedback signal conversion circuit 205 of 10 pins, 17,18,19, Four the second analog input ends of 20 pins and feedback signal conversion circuit 205 are respectively connected with.Second communications line terminal block Remaining pin of the transmission of J15 and second connecting terminal block J16 is hanging.

20 pins of 20 pins of the first transmission connecting terminal block J19 and the second transmission connecting terminal block J16 It is respectively connected with a 20 core wire beams.20 pins and the second communications line terminal block of first communications line terminal block J4 20 pins of J15 are respectively connected with a 20 core wire beams

The principles of the present invention are as follows:

In power-switching circuit 101, the reversed protection of the 5th anti-power supply of diode D5 is used, if power supply is reversed, moment handle Power supply short circuit is burnt, to protect subsequent circuit.First capacitor C1 and the second capacitor C2 is input filter capacitor, makes to input Voltage is more stable.Power module U7 is isolation Voltage stabilizing module, it gives the voltage that motherboard power supply inputs and output to other circuits Voltage electric keep apart, make motherboard power supply and other circuits will not front and back interfere.And power module U7 can be by 12V voltage It exports to the first voltage stabilizing chip U1 and the second voltage stabilizing chip U2.12V voltage is converted into 3.3V voltage by the first voltage stabilizing chip U1.The 12V voltage is converted into 5V voltage by two voltage stabilizing chip U2.Third capacitor C3, the 4th capacitor C4, the 6th capacitor C7, the 7th capacitor C7, the 8th capacitor C8, the 9th capacitor C9 are filter capacitor.The module is the reliable supply voltage of other circuit with stable.

In main control singlechip circuit 102, first resistor R1 and the tenth capacitor C10 form electrification reset circuit, guarantee first Single-chip microcontroller U3 restarts work after fully powered up.First crystal oscillator Z1, the 11st capacitor C11 and the 12nd capacitor C12 composition system System clock, to mono- stable machine cycle of first singlechip U3.First exclusion RR1 and the second exclusion RR2 is single-chip microcontroller U3 P0 mouthfuls of pull-up resistors, for P0 mouthfuls of enough promotion abilities.First buzzer LS1 is pressed for issuing the 6th key S6 and the 7th The operation indicating sound of key S7.User selects different working conditions by the operational order of the 6th key S6 and the 7th key S7. 6th luminous tube D6, the 7th luminous tube D7, the 8th luminous tube D8 and the 9th luminous tube D9 are used for display working condition, and make first Single-chip microcontroller U3 is run according to pre-set programs.

In current sampling circuit 104, because the electric power network of Board Under Test delivery outlet is floating ground structure, current sampling circuit 104 pass through the first power conversion chip IC1, second source conversion chip IC2 for the first digital voltage gauge outfit BK1, the second number The power supply of voltmeter head BK2 respectively isolates.Because the output electric current for Board Under Test is very big, in order to guarantee precision, output electricity Flow valuve converts after sampling out voltage from load both ends and gets.Reduction formula such as formula (1):

In formula (1), U is the voltage value that digital voltage gauge outfit is shown；Ui is the voltage value at fictitious load both ends；RP is the 4th Potentiometer RP4, the 5th potentiometer RP5；Ra is with regard to the 29th resistance R29, the 30th resistance R30 in circuit；Rb is with regard in circuit The 33rd resistance R33, the 34th resistance R34.

Main channel output indicating circuit 105 is TE output indicating circuit.Referred to connecting the independent output of the first fictitious load For showing unit.If the voltage at the first fictitious load both ends is greater than TVS pipe D1 parameter voltages value, 3rd resistor R3 and TVS pipe D1 forms a voltage regulator circuit, and the 20th luminous tube D20 is driven after the 14th resistance R14 current limliting with TVS pipe D1 parameter voltages With the 24th luminous tube D24；If the voltage at the first fictitious load both ends is lower than TVS pipe D1 parameter voltages value, the first simulation The voltage for loading both ends is directly driven the 15th luminous tube D15 and second after 3rd resistor R3 and the 14th resistance R14 current limliting 14 luminous tube D24.Because the voltage at the first fictitious load both ends has positive and negative values, the 20th luminous tube D20 and the 20th Four luminous tube D24 respectively show the working condition of reversal.

It loads in cooling fan driving circuit 106, the selection of inductance L1 will be according to the output electricity of switching regulator IC U7 The parameter selections such as pressure, maximum input voltage, maximum load current.Selection method is as follows: firstly, calculating according to formula (2) formula Voltage microsecond constant (ET):

ET=(Vin-Vout) × Vout/Vin × 1000/f formula (2)

In formula (2), it is the output of switching regulator IC U7 that Vin, which is the maximum input voltage of switching regulator IC U7, Vout, Voltage, f are the working oscillation frequency values (52kHz) of switching regulator IC U7.After ET is determined, according to corresponding in Figure 17 Voltage microsecond constant and load current curve search the inductance value L of inductance L1.

The value meeting formula (3) of the capacitance C of 18th capacitor C18

C >=13300Vin/Vout × L formula (3)

In formula (3), L is the inductance value of the first inductance L1, and unit is μ H.The pressure voltage of 18th capacitor C18 should be greater than 1.5~2 times of rated output voltage.For 12V voltage output, it is recommended to use pressure voltage is the capacitor of 25V.

The load current value of 28th diode D28 is greater than 1.2 times of maximum load current, it is contemplated that load short circuits Maximum current of the load current value greater than switching regulator IC U7 of situation, the 28th diode D28 limits.28th The backward voltage of diode D28 is greater than 1.25 times of switching regulator IC U7 maximum input voltage.In the present embodiment, the 28th The Schottky diode of diode D28 selection 1N582x series.

Motherboard power supply output voltage by the 17th capacitor C17 filter after be directly inputted to switching regulator IC U7 1, 3 pins；5 pins of switching regulator IC U7 are output enable ends, are set as effective after ground connection；4 pins are high impedance reference voltage End, 2 pins are output ends；6th connecting terminal block J6 connects the cooling fan of load；18th capacitor C18 and the 19th capacitor C19 is output filter capacitor；Second resistance R2, the 28th resistance R28 and the 5th potentiometer RP5 are output to heat dissipation with making adjustments The voltage of blower is output to the specific voltage value Uo such as formula (4) of cooling fan:

In formula (4), VREF is the reference voltage value of switching regulator IC U7, is herein 1.23V.

The present apparatus is suitble to the aging of the PCR driving plate of model BYQ5615, BYQ5071 and BYQ5078.Model There are three the PCR driving plate tools of BYQ5615 to external port, is control port, output port and power port respectively.Model There are four the PCR driving plate tools of BYQ5071 to external port, is control port, output port, auxiliary output terminal mouth and power supply respectively Port.There are three the PCR driving plate tools of model BYQ5071 to external port, is control port, output port and power supply respectively Port.

The utility model is as follows to the working principle for carrying out aging by side plate of model BYQ5078:

Step 1: the control port of third connecting terminal block J3 and Board Under Test in driving signal interface circuit 103 is connected. The output port of output wiring terminal row J21 and Board Under Test in output interface circuit 105 are connected.By the power end of Board Under Test Mouth is connected with the positive HV+ of motherboard power supply, cathode HV-.

Step 2: user passes through the 6th key S6 and the 7th key S7 setting aging mould in main control singlechip circuit 102 Formula.First singlechip U3 in main control singlechip circuit 102 connects according to pre-set programs to third in driving signal interface circuit 103 Line terminals row J3 controls signal accordingly, is powered on Board Under Test to fictitious load from output port.In current sampling circuit 104 One digital voltage gauge outfit BK1, the second digital voltage gauge outfit BK2 show current two-way electric current.Meanwhile the voltage on fictitious load Pass through the first transmission connecting terminal block J19, the second communication in memory cell signal interface circuit 206 in output interface circuit 105 Connecting terminal block J15 is transferred to feedback signal conversion circuit 205 and is converted into switching value, is transmitted further to memory cell data processing electricity Road 203 is handled, if component is normal, be will test code and is shown on the charactron M1 of storage unit display circuit 201； If wrong, the error code that will test is shown on the charactron M1 of storage unit display circuit 201, and will test To error code store into data storage circuit 204 in storage chip U5, and in memory cell data processing circuit 203 Second buzzer LS2 issues alarm.

Claims

1. a kind of driver circuit plate aging test device of PCR instrument；Including motherboard power supply, control mainboard and fictitious load group； It is characterized by: the fictitious load group includes the first fictitious load, the second fictitious load, third fictitious load, the 4th mould Quasi- load, the 5th fictitious load and the 6th fictitious load；The control mainboard includes power-switching circuit, main control singlechip electricity Road, current sampling circuit, output interface circuit, accessory channel output signal indicating circuit, storage unit display circuit, display are pressed Key interface circuit, memory cell data processing circuit, data storage circuit, feedback signal conversion circuit and memory cell signal Interface circuit；Power-switching circuit is main control singlechip by power voltage step down module, the first voltage stabilizing chip and the second voltage stabilizing chip Circuit, current sampling circuit, storage unit display circuit, memory cell data processing circuit, data storage circuit and feedback Signal conversion circuit power supply；Main control singlechip circuit sends driving signal to driving signal interface circuit by first singlechip； Current sampling circuit shows the first fictitious load, the second mould by the first digital voltage gauge outfit, the second digital voltage gauge outfit respectively The voltage value at quasi- load both ends；Feedback signal conversion circuit converts switching value for the voltage value received by photoelectrical coupler After be transferred to memory cell data processing circuit；Memory cell data processing circuit is connected with storage unit display circuit；

Driving signal interface circuit is driving signal connecting terminal block；1 pin of driving signal connecting terminal block connects master control monolithic 4th data output end on electromechanical road, 3 pins connect the third data output end of main control singlechip circuit, and 5 pins connect master control monolithic First data output end on electromechanical road；9 pins connect the second data output end of main control singlechip circuit, and 13 pins connect master control monolithic 9th control output end on electromechanical road, 15 pins connect the 8th control output end of main control singlechip circuit, and 25 pins connect master control list Second control output end on piece electromechanics road, 26 pins connect the first control output end of main control singlechip circuit, 2,4,6,8,10, 12,14,16,18,20,22,24 and 29 pins connect the 3.3V output end of power-switching circuit, and 17 pins connect main control singlechip The third control output end of circuit, 19 pins connect the 4th control output end of main control singlechip circuit, and 7 pins connect master control monolithic 7th control output end on electromechanical road, 27 pins connect the 6th control output end of main control singlechip circuit, and 28 pins connect master control 5th control output end of single chip circuit, 35 pins ground connection；

Output interface circuit includes the first transmission connecting terminal block, output wiring terminal row；2, the 4 of first transmission connecting terminal block First terminals of pin and the first fictitious load, the second fictitious load are respectively connected with, and 9 pins connect the letter of main control singlechip circuit Number interaction end, 10 pins connect the anode of motherboard power supply, the first terminals of 17,18,19,20 pins and third fictitious load, the The first terminals difference of first terminals of four fictitious loads, the first terminals of the 5th fictitious load, the 6th fictitious load It is connected；Third fictitious load, the 4th fictitious load, the 5th fictitious load and the 6th fictitious load the second wiring termination mainboard electricity The anode in source；

1,2,9 and 10 pins of output wiring terminal row connect the second terminals of the first fictitious load, 3,4,11 and 12 pins Connect the first terminals of the first fictitious load, 5,6,13 and 14 pins connect the second terminals of the second fictitious load, 7,8, 15 and 16 pins connect the first terminals of the second fictitious load；

Display button interface circuit includes the first communications line terminal block；8,10,12,14, the 16 of first communications line terminal block One end of pin and the first key, the second key, third key, the 4th key, the 5th key is respectively connected with；First key, Two keys, third key, the 4th key and the 5th key the other end be grounded；Draw 11 and the 13 of first communications line terminal block Foot connects the 5V output end of power-switching circuit, and 7 and 9 pins are grounded, and the first of 1,3,5 pins and storage unit display circuit Signal input part, second signal input terminal, third signal input part are respectively connected with；

Memory cell signal interface circuit includes the second communications line terminal block and the second transmission connecting terminal block；Second communication connects 7 and 9 pins of line terminals row are grounded, and 11 and 13 pins connect the 5V output end of power-switching circuit, 1,3,5 pins and storage The third of cell data processing circuit shows that output end, the second display output end, the first display output end are respectively connected with；Second is logical 9th signal input part of 2,4,6,8,10,12,14,16 pins and memory cell data processing circuit of interrogating connecting terminal block is extremely 16th signal input part is respectively connected with；

9 pins of the second transmission connecting terminal block connect the signal interaction end of memory cell data processing circuit；Second transmission wiring 1,3 pins of terminal block and two third analog input ends of feedback signal conversion circuit are respectively connected with；Second transmission wiring 2,4 pins of terminal block are respectively connected with two the 4th analog input ends of feedback signal conversion circuit；Second transmission wiring First analog input end of the reversed feedback signal conversion circuit of 10 pins of terminal block；Second transmission connecting terminal block 17,18, 19, four the second analog input ends of 20 pins and feedback signal conversion circuit are respectively connected with；

Piece 20 cores of 20 pins for 20 pins of the first transmission connecting terminal block and the second transmission connecting terminal block Harness is respectively connected with；20 pins of the first communications line terminal block and 20 pins of the second communications line terminal block are used A piece 20 core wire beams are respectively connected with.

2. a kind of driver circuit plate aging test device of PCR instrument according to claim 1, it is characterised in that: described Power-switching circuit include the first voltage stabilizing chip, the second voltage stabilizing chip and power voltage step down module；The power voltage step down module Model SUCS102412C；The model SP1117M3-3.3 of first voltage stabilizing chip；Second voltage stabilizing chip Model NCP1117DT50G；1 pin of power voltage step down module connects motherboard power supply anode, the cathode of the 5th diode D5, the The anode of one capacitor C1 and one end of the second capacitor C2,2,3 pins are meeting the cathode of motherboard power supply, the 5th diode D5 just Pole, the cathode of first capacitor C1 and the second capacitor C2 other end, 4 pins connect the anode of the 7th capacitor C7, third capacitor C3 one 1 pin at end, 1 pin of the first voltage stabilizing chip and the second voltage stabilizing chip, 5 pin floating, the cathode of 6 pins and the 7th capacitor C7 And the other end of third capacitor C3 is connected and is grounded；3 pins of the first voltage stabilizing chip connect one end and the 8th electricity of the 4th capacitor C4 Hold the anode of C8；2 pins, the other end of the 4th capacitor C4 and the cathode of the 8th capacitor C8 of first voltage stabilizing chip are grounded；The 3 pins of two voltage stabilizing chips connect one end of the 6th capacitor C6 and the anode of the 9th capacitor C9；2 pins of the second voltage stabilizing chip, The other end of six capacitor C6 and the cathode of the 9th capacitor C9 are grounded；3 pins of the first voltage stabilizing chip are power-switching circuit 3.3V output end；3 pins of the second voltage stabilizing chip are the 5V output end of power-switching circuit.

3. a kind of driver circuit plate aging test device of PCR instrument according to claim 1, it is characterised in that: master control Single chip circuit includes first singlechip；The model P89V51 of first singlechip；29 pins of first singlechip connect power supply and turn Change the 5V output end of circuit, 16 pins ground connection, 38 pins connect the 5V output end of power-switching circuit, the 5th capacitor C5 one end, The common pin of first exclusion and the second exclusion；The other end of 5th capacitor C5 is grounded；Four normal pins of the first exclusion with 34,35,36,37 pins of first singlechip are respectively connected with；Four normal pins of the second exclusion and first singlechip 30, 31,32,33 pins are respectively connected with；One end of 32,33 pins and the 6th key and the 7th key of first singlechip is respectively connected with； The other end of 6th key and the 7th key is grounded；4 pins of first singlechip connect one end and the tenth electricity of first resistor R1 Hold the cathode of C10；The other end of first resistor R1 is grounded；The anode of tenth capacitor C10 connects the 5V output end of power-switching circuit； 14 pins of first singlechip connect one end of the first crystal oscillator Z1 and the 11st capacitor C11, and 15 pins meet the another of the first crystal oscillator Z1 End and one end of the 12nd capacitor C12；11st capacitor C11 and the 12nd capacitor C12 other end are grounded；First singlechip 12 pins connect the cathode of the first buzzer；The anode of first buzzer connects the 5V output end of power-switching circuit；First singlechip 18 pins connect one end of the 7th resistance R7, the anode of the 9th luminous tube D9 of another termination of the 7th resistance R7, the 9th luminous tube The cathode of D9 is grounded；19 pins of first singlechip connect one end of the 8th resistance R8, and another termination the 8th of the 8th resistance R8 is sent out The anode of light pipe D8, the cathode ground connection of the 8th luminous tube D8；20 pins of first singlechip connect one end of the 9th resistance R9, and the 9th The anode of the 7th luminous tube D7 of another termination of resistance R9, the cathode ground connection of the 7th luminous tube D7；21 pins of first singlechip One end of the tenth resistance R10 is connect, the anode of the 6th luminous tube D6 of another termination of the tenth resistance R10, the 6th luminous tube D6's is negative Pole ground connection；1,3,8,9,10,11,30,36,37 pins of first singlechip are respectively that the first control of main control singlechip circuit is defeated Outlet is to the 9th control output end；41,42,43,44 pins of first singlechip are respectively the first number of main control singlechip circuit According to output end to the 4th data output end；31 pins of first singlechip are the signal interaction end of master control single chip circuit；First Remaining pin of single-chip microcontroller is hanging.

4. a kind of driver circuit plate aging test device of PCR instrument according to claim 1, it is characterised in that: electric current Sample circuit includes the first power conversion chip, second source conversion chip, the first digital voltage gauge outfit and the second digital voltage Gauge outfit；First power conversion chip, second source conversion chip model be NMK0505SAC；First digital voltage gauge outfit, The model of second digital voltage gauge outfit is FY5140B；First power conversion chip, 1 pin of second source conversion chip are equal The 5V output end of power-switching circuit is connect, 2 pins are grounded；

3 pins of the first power conversion chip connect the first terminals of the first fictitious load, the 37th resistance R37, the 20th One end of capacitor C20,2 pins of the first digital voltage gauge outfit, one end of resistor body and movable contact in the first potentiometer；First electricity 4 pins of source conversion chip connect the other end of the 37th resistance R37 and 3 pins of the first digital voltage gauge outfit；First current potential One end of the 29th resistance R29 of another termination of resistor body in device；29th resistance R29's and the 20th capacitor C20 is another One end connects one end of the 33rd resistance R33 and 1 pin of the first digital voltage gauge outfit；33rd resistance R33's is another Terminate the second terminals of the first fictitious load；

3 pins of second source conversion chip connect the first terminals of the second fictitious load, the 38th resistance R38, the 20th One end of one capacitor C21,2 pins of the second digital voltage gauge outfit, one end of resistor body and movable contact in the second potentiometer；Second 4 pins of power conversion chip connect the other end of the 38th resistance R38 and 3 pins of the second digital voltage gauge outfit；Second electricity One end of the 30th resistance R30 of another termination of the interior resistor body of position device；30th resistance R30's and the 21st capacitor C21 The other end connects one end of the 34th resistance R34 and 1 pin of the second digital voltage gauge outfit；34th resistance R34 it is another Second terminals of one the second fictitious load of termination.

5. a kind of driver circuit plate aging test device of PCR instrument according to claim 1, it is characterised in that: auxiliary Multi-channel output signal indicating circuit includes the 16th luminous tube D16, the 17th luminous tube D17, the 18th luminous tube D18 and the tenth Nine luminous tube D19；16th luminous tube D16, the 17th luminous tube D17, the 18th luminous tube D18, the 19th luminous tube D19 One end of anode and eleventh resistor R11, twelfth resistor R12, thirteenth resistor R13, the 14th resistance R14 is respectively connected with； Eleventh resistor R11, twelfth resistor R12, thirteenth resistor R13 and the 14th resistance R14 the other end connect motherboard power supply Anode, the cathode of the 16th luminous tube D16, the 17th luminous tube D17, the 18th luminous tube D18, the 19th luminous tube D19 With the first terminals of third fictitious load, the first terminals of the 4th fictitious load, the 5th fictitious load the first terminals, First terminals of the 6th fictitious load are respectively connected with.

6. a kind of driver circuit plate aging test device of PCR instrument according to claim 1, it is characterised in that: storage Cell data processing circuit includes second singlechip；The model P89V51 of second singlechip；29 pins of second singlechip connect The 5V output end of power-switching circuit, 16 pins ground connection, 38 pins connect the 5V output end of power-switching circuit, the 25th capacitor One end of C25, third exclusion and the 4th exclusion common pin；The other end of 25th capacitor C25 is grounded；Third exclusion 34,35,36,37 pins of four normal pins and second singlechip are respectively connected with；Four normal pins of the 4th exclusion and the 30,31,32,33 pins of two single-chip microcontrollers are respectively connected with；4 pins of second singlechip connect one end and of the 15th resistance R15 The cathode of 26 capacitor C26；The other end of 15th resistance R15 is grounded；The anode of 26th capacitor C26 connects power supply conversion The 5V output end of circuit；14 pins of second singlechip connect one end of the second crystal oscillator and the 27th capacitor C27, and 15 pins connect One end of the other end of two crystal oscillators and the 28th capacitor C28；27th capacitor C27 and the 28th capacitor C28 other end It is grounded；32 pins of second singlechip connect the cathode of the second buzzer；The anode of second buzzer connects power-switching circuit 5V output end；40,41,42,43,44,1,2,3,18,19,20,21,22,23,24,25 pins of second singlechip are respectively to deposit First signal input part of storage unit data processing circuit is to the 16th signal input part；30,31 pins of second singlechip point It Wei not the IIC clock end of memory cell data processing circuit, IIC bi-directional data end；35,36,37 pins of second singlechip point Not Wei memory cell data processing circuit first display output end, second display output end, third show output end；Second is single 33 pins of piece machine are the signal interaction end of memory cell data processing circuit.

7. a kind of driver circuit plate aging test device of PCR instrument according to claim 1, it is characterised in that: storage Unit display circuit includes digital pipe driving chip sum number code pipe；The model TM1623 of digital pipe driving chip；Charactron Model S02848A-B；9 and 25 pins of digital pipe driving chip connect one end and the power supply conversion of the 24th capacitor C24 The 5V output end of circuit；26,29,32 pins of digital pipe driving chip and the other end of the 24th capacitor C24 are grounded；Number 10,11,12,14,15,16,17,18,19,20,23,24,27,28,30,31 pins of code pipe driving chip are with charactron M1's 14,16,13,3,5,11,15,7,12,9,10,4,8,6,2,1 pin is respectively connected with；3,4,5 pins of digital pipe driving chip Respectively the first signal input part of storage unit display circuit, second signal input terminal, third signal input part.

8. a kind of driver circuit plate aging test device of PCR instrument according to claim 1, it is characterised in that: data Memory circuit includes storage chip；The model 24C01 of storage chip；1,2,3,4 and 7 pins of storage chip are grounded, and 8 Pin connects one end of the 29th capacitor C29 and the 5V output end of power-switching circuit；Another termination of 29th capacitor C29 Ground；5,6 pins of storage chip are respectively connected with the IIC bi-directional data end of memory cell data processing circuit, IIC clock end.

9. a kind of driver circuit plate aging test device of PCR instrument according to claim 1, it is characterised in that: feedback Signal conversion circuit includes four the first signal feedback units and two second signal feedback units；First signal feedback unit packet Include the first optocoupler；The first input end of first optocoupler connects one end of the 45th resistance R45, and the first output end ground connection, second is defeated One end of the 46th resistance R46 is terminated out；The 5V output end of another termination power-switching circuit of 46th resistance R46；

Second signal feedback unit includes the second optocoupler and third optocoupler；The of the first input end of second optocoupler and third optocoupler Two input terminals connect one end of the 16th resistance R16；The first input end phase of second input terminal of the second optocoupler and third optocoupler Even；First output end of the second optocoupler and third optocoupler is grounded；The second output terminal of second optocoupler connects the 17th resistance R17's One end；The 5V output end of another termination power-switching circuit of 17th resistance R17；The second output terminal of third optocoupler connects the tenth One end of eight resistance R18；The 5V output end of another termination power-switching circuit of 18th resistance R18；

That end far from the first optocoupler of the 45th resistance R45 links together in four the first signal feedback units, as First analog input end of feedback signal conversion circuit；Second input terminal of the first optocoupler in four the first signal feedback units Respectively four the second analog input ends of feedback signal conversion circuit；First optocoupler in four the first signal feedback units Second output terminal and the first signal input part to the fourth signal input terminal of memory cell data processing circuit are respectively connected with；

That end far from the second optocoupler of the 16th resistance R16 is respectively feedback signal conversion in two second signal feedback units Two third analog input ends of circuit；The second input terminal of the second optocoupler is respectively anti-in two second signal feedback units Two the 4th analog input ends of feedback signal conversion circuit；Second output of the second optocoupler in two second signal feedback units End, the second output terminal of third optocoupler and the 5th signal input part to the 8th signal input part of memory cell data processing circuit It is respectively connected with.