CN108508353A - The driver circuit plate high temperature accelerated test aging equipment of PCR instrument - Google Patents

The driver circuit plate high temperature accelerated test aging equipment of PCR instrument Download PDF

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Publication number
CN108508353A
CN108508353A CN201810494187.3A CN201810494187A CN108508353A CN 108508353 A CN108508353 A CN 108508353A CN 201810494187 A CN201810494187 A CN 201810494187A CN 108508353 A CN108508353 A CN 108508353A
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China
Prior art keywords
pins
circuit
fictitious load
connect
capacitance
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CN201810494187.3A
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CN108508353B (en
Inventor
胡炎昌
伊波
贾伟
童国军
石建军
贺贤汉
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HANGZHOU BIOER TECHNOLOGY Co Ltd
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HANGZHOU BIOER TECHNOLOGY Co Ltd
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Priority to CN201810494187.3A priority Critical patent/CN108508353B/en
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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)

Abstract

The invention discloses the driver circuit plate high temperature accelerated test aging equipments of PCR instrument.Human factor influences big in the test process of the driver circuit board test device of PCR instrument.The present invention includes host and insulating box.Host includes bottom case, panel, motherboard power supply, control mainboard, cooling fan and fictitious load group.Insulating box includes outer housing, temperature controller and heating wire.Control mainboard includes power-switching circuit, main control singlechip circuit, drive signal interface circuit, current sampling circuit, main channel output indicating circuit, fan drive circuit, output interface circuit, accessory channel output signal indicating circuit, storage unit display circuit, display button interface circuit, memory cell data processing circuit, data storage circuit, feedback signal conversion circuit and memory cell signal interface circuit.The present invention makes tested PCR driver circuits plate complete test and aging in a stringent working environment by power-up, load, heating.

Description

The driver circuit plate high temperature accelerated test aging equipment of PCR instrument
Technical field
The invention belongs to drive board test aging technical field, and in particular to a kind of driver circuit board test of PCR instrument The device of aging.
Background technology
The common aging techniques of PCR domain-drivens wiring board are at present：Debugging carries out the offline high/low temperature of veneer after testing Then impact aging carries out testing reinspection and picking out not conforming to panel again.Such process does not carry out fatigue to component in plate Phase tests, and can not pick out the unstable veneer in operational process, operation process is also too loaded down with trivial details.Debug the people of test process It is excessive for factor.
Invention content
The purpose of the present invention is to provide a kind of devices of the driver circuit board test aging of PCR instrument.
The present invention includes host and insulating box.The host includes bottom case, panel, motherboard power supply, control mainboard, heat dissipation Wind turbine and fictitious load group.The fictitious load group include the first fictitious load, the second fictitious load, third fictitious load, 4th fictitious load, the 5th fictitious load, the 6th fictitious load, the 7th fictitious load and the 8th fictitious load.Cooling fan, One fictitious load, the second fictitious load, third fictitious load, the 4th fictitious load, the 5th fictitious load, the 6th fictitious load, 7th fictitious load, the 8th fictitious load, motherboard power supply and control mainboard are each attached in bottom case.Panel is fixed on the side of bottom case Portion；The insulating box includes outer housing, temperature controller and heating wire；Bottom case is fixed in the outer housing and host；Temperature controller Mounted on the side of outer housing；Heating wire is fixed on the inside of inner housing；Heating wire is connected with temperature controller.
The control mainboard includes that power-switching circuit, main control singlechip circuit, drive signal interface circuit, electric current take Sample circuit, main channel output indicating circuit, fan drive circuit, output interface circuit, accessory channel output signal indicating circuit, Storage unit display circuit, display button interface circuit, memory cell data processing circuit, data storage circuit, feedback letter Number conversion circuit and memory cell signal interface circuit.Power-switching circuit by power voltage step down module, the first voltage stabilizing chip and Second voltage stabilizing chip is drive signal interface circuit, main control singlechip circuit, current sampling circuit, fan drive circuit, storage Unit display circuit, memory cell data processing circuit, data storage circuit and the power supply of feedback signal conversion circuit；Master control list Piece electromechanics road sends drive signal by first singlechip to drive signal interface circuit；Current sampling circuit passes through the first number Voltmeter head, the second digital voltage gauge outfit, third digital voltage gauge outfit, the 4th digital voltage gauge outfit show that the first simulation is negative respectively Load, the second fictitious load, third fictitious load, the 4th fictitious load both ends voltage value；Main channel exports indicating circuit Four independent output indicating units；Four independent output indicating units show the first fictitious load, second by luminous tube respectively Fictitious load, third fictitious load, the current direction on the 4th fictitious load；Fan drive circuit is driven by switching regulator IC Dynamic cooling fan；The model of Board Under Test is transferred to memory cell data processing circuit by display button interface circuit by button； First fictitious load, the second fictitious load, third fictitious load, the 4th fictitious load, the 5th fictitious load, the 6th simulation are negative Load, the 7th fictitious load, the 8th fictitious load voltage value after output interface circuit and memory cell signal interface circuit It is transferred to feedback signal conversion circuit；Feedback signal conversion circuit is converted out the voltage value received to by photoelectrical coupler It is transferred to memory cell data processing circuit after the amount of pass；Memory cell data processing circuit will determine that feedback by second singlechip Whether the switching value that signaling conversion circuit transmission comes is correct；Storage unit display circuit passes through numeral method memory cell data The detection code or error code that processing circuit transmission comes；Memory circuit stores detection code or wrong generation by storage chip Code.
Further, the host further includes Board Under Test power supply and host flip plate.The Board Under Test power supply is fixed In bottom case；The one side edge of the host flip plate and the top of bottom case are hinged；First fictitious load, the second simulation Load, third fictitious load, the 4th fictitious load, the 5th fictitious load, the 6th fictitious load, the 7th fictitious load and the 8th mould Quasi- load is all made of gold aluminum casing resistor；Four angles of the bottom case bottom surface are fixed respectively with four rubber blocks.
Further, the power-switching circuit includes the first voltage stabilizing chip, the second voltage stabilizing chip and power voltage step down mould Block.The model SUCS102412C of the power voltage step down module；The model SP1117M3- of first voltage stabilizing chip 3.3；The model NCP1117DT50G of second voltage stabilizing chip；1 pin of power voltage step down module connect motherboard power supply anode, One end of the cathode of 5th diode D5, the anode of the first capacitance C1 and the second capacitance C2,2,3 pins connect the negative of motherboard power supply Pole, the anode of the 5th diode D5, the cathode of the first capacitance C1 and the second capacitance C2 other ends, 4 pins connect the 7th capacitance C7's Anode, one end of third capacitance C3,1 pin of the first voltage stabilizing chip and the second voltage stabilizing chip 1 pin, 5 pins are hanging, and 6 draw Foot is connected and is grounded with the other end of the cathode of the 7th capacitance C7 and third capacitance C3；3 pins of the first voltage stabilizing chip connect the 4th The anode of one end of capacitance C4 and the 8th capacitance C8；2 pins of the first voltage stabilizing chip, the other end of the 4th capacitance C4 and the 8th electricity The cathode for holding C8 is grounded；3 pins of the second voltage stabilizing chip connect one end of the 6th capacitance C6 and the anode of the 9th capacitance C9；Second 2 pins, the other end of the 6th capacitance C6 and the cathode of the 9th capacitance C9 of voltage stabilizing chip are grounded；Draw the 3 of first voltage stabilizing chip Foot is the 3.3V output ends of power-switching circuit；3 pins of the second voltage stabilizing chip are the 5V output ends of power-switching circuit.
Further, main control singlechip circuit includes first singlechip；The model P89V51 of first singlechip.First is single 29 pins of piece machine connect the 5V output ends of power-switching circuit, 16 pins ground connection, and 38 pins connect the 5V outputs of power-switching circuit End, one end of the 5th capacitance C5, the first exclusion and the second exclusion common pin；The other end of 5th capacitance C5 is grounded；First Four normal pins of exclusion and 34,35,36,37 pins of first singlechip are respectively connected with；Four of second exclusion commonly draw Foot and 30,31,32,33 pins of first singlechip are respectively connected with；32,33 pins and the 6th button and the 7th of first singlechip One end of button is respectively connected with；The other end of 6th button and the 7th button is grounded；4 pins of first singlechip connect the first electricity Hinder one end of R1 and the cathode of the tenth capacitance C10；The other end of first resistor R1 is grounded；The anode of tenth capacitance C10 connects power supply The 5V output ends of conversion circuit；14 pins of first singlechip connect one end of the first crystal oscillator Z1 and the 11st capacitance C11,15 pins Connect the other end of the first crystal oscillator Z1 and one end of the 12nd capacitance C12；11st capacitance C11 and the 12nd capacitance C12 other ends It is grounded；12 pins of first singlechip connect the cathode of the first buzzer；The anode of first buzzer connects power-switching circuit 5V output ends；18 pins of first singlechip connect one end of the 7th resistance R7, the 9th luminous tube of another termination of the 7th resistance R7 The anode of D9, the cathode ground connection of the 9th luminous tube D9；19 pins of first singlechip connect one end of the 8th resistance R8, the 8th resistance The anode of the 8th luminous tube D8 of another termination of R8, the cathode ground connection of the 8th luminous tube D8；20 pins of first singlechip connect One end of nine resistance R9, the anode of the 7th luminous tube D7 of another termination of the 9th resistance R9, the cathode ground connection of the 7th luminous tube D7； 21 pins of first singlechip connect one end of the tenth resistance R10, and the 6th luminous tube D6 of another termination of the tenth resistance R10 is just Pole, the cathode ground connection of the 6th luminous tube D6；1,3,8,9,10,11,30,34,35,36,37 pins of first singlechip are respectively First control output end of main control singlechip circuit to the 11st control output end；41,42,43,44 pins of first singlechip Respectively the first data output end of main control singlechip circuit is to the 4th data output end；31 pins of first singlechip are master control The signal interaction end of single chip circuit；Remaining pin of first singlechip is hanging.
Drive signal interface circuit includes the first connecting terminal block, the second connecting terminal block and third connecting terminal block；The One connecting terminal block, the second connecting terminal block and third connecting terminal block have 40；First connecting terminal block, the second terminals 1 pin of son row and third connecting terminal block connects the 4th data output end of main control singlechip circuit, and 3 pins connect master control list The third data output end on piece electromechanics road, 5 pins connect the first data output end of main control singlechip circuit；9 pins meet master The second data output end of single chip circuit is controlled, 13 pins connect the 11st control output end of main control singlechip circuit, and 15 draw Foot connects the tenth control output end of main control singlechip circuit, and 25 pins connect the second control output of main control singlechip circuit End, 26 pins connect the first control output end of main control singlechip circuit, 2,4,6,8,10,12,14,16,18,20,22,24 and 29 pins connect the 3.3V output ends of power-switching circuit.
17 pins of the first connecting terminal block, 27 pins of the second connecting terminal block and third connecting terminal block connect master control The third control output end of single chip circuit；First connecting terminal block, 28 pins of the second connecting terminal block and third terminals The 19th pin of son row connects the 4th control output end of main control singlechip circuit；11 pins of the first connecting terminal block connect third Data output end, 17 pins connect the 9th control output end of main control singlechip circuit, and 19 pins connect the of main control singlechip circuit Eight control output ends；7 pins of third connecting terminal block connect the 7th control output end of main control singlechip circuit, and 27 pins connect 6th control output end of main control singlechip circuit, 28 pins connect the 5th control output end of main control singlechip circuit, 35 pins Ground connection；Remaining pin of first connecting terminal block, the second connecting terminal block and third connecting terminal block is hanging.
Further, current sampling circuit includes the first power conversion chip, second source conversion chip, third power supply turn Change chip, the 4th power conversion chip, the first digital voltage gauge outfit, the second digital voltage gauge outfit, third digital voltage gauge outfit and 4th digital voltage gauge outfit；First power conversion chip, second source conversion chip, third power conversion chip and the 4th power supply The model of conversion chip is NMK0505SAC；First digital voltage gauge outfit, the second digital voltage gauge outfit, third digital voltmeter The model of head and the 4th digital voltage gauge outfit is FY5140B；First power conversion chip, second source conversion chip, third 1 pin of power conversion chip and the 4th power conversion chip connects the 5V output ends of power-switching circuit, and 2 pins are grounded.
3 pins of the first power conversion chip connect the first terminals of the first fictitious load, the 37th resistance R37, One end of 20 capacitance C20,2 pins of the first digital voltage gauge outfit, one end of resistive element and movable contact in the first potentiometer；The 4 pins of one power conversion chip connect the other end of the 37th resistance R37 and 3 pins of the first digital voltage gauge outfit；First One end of the 29th resistance R29 of another termination of resistive element in potentiometer；29th resistance R29 and the 20th capacitance C20 The other end connect one end of the 33rd resistance R33 and 1 pin of the first digital voltage gauge outfit；33rd resistance R33's Second terminals of the first fictitious load of another termination.
3 pins of second source conversion chip connect the first terminals of the second fictitious load, the 38th resistance R38, One end of 21 capacitance C21,2 pins of the second digital voltage gauge outfit, one end of resistive element and movable contact in the second potentiometer； 4 pins of second source conversion chip connect the other end of the 38th resistance R38 and 3 pins of the second digital voltage gauge outfit；The One end of the 30th resistance R30 of another termination of the interior resistive element of two potentiometers；30th resistance R30 and the 21st capacitance The other end of C21 connects one end of the 34th resistance R34 and 1 pin of the second digital voltage gauge outfit；34th resistance R34 The second fictitious load of another termination the second terminals.
3 pins of third power conversion chip connect the first terminals of third fictitious load, the 39th resistance R39, One end of 22 capacitance C22,2 pins of third digital voltage gauge outfit, one end of resistive element and movable contact in third potentiometer； 4 pins of third power conversion chip connect the other end of the 39th resistance R39 and 3 pins of third digital voltage gauge outfit；The One end of the 31st resistance R31 of another termination of the interior resistive element of three potentiometers；The electricity of 31st resistance R31 and the 22nd The other end for holding C22 connects one end of the 35th resistance R35 and 1 pin of third digital voltage gauge outfit；35th resistance Second terminals of the third fictitious load of R35.
3 pins of the 4th power conversion chip connect the first terminals of the 4th fictitious load, the 40th resistance R40, second One end of 13 capacitance C23,2 pins of the 4th digital voltage gauge outfit, one end of resistive element and movable contact in the 4th potentiometer；The 4 pins of four power conversion chips connect the other end of the 40th resistance R40 and 3 pins of the 4th digital voltage gauge outfit；4th electricity One end of the 32nd resistance R32 of another termination of the interior resistive element of position device；32nd resistance R32 and the 23rd capacitance The other end of C23 connects one end of the 36th resistance R36 and 1 pin of the 4th digital voltage gauge outfit；36th resistance R36 The 4th fictitious load of another termination the second terminals.
Independent output indicating unit includes TVS pipe D1；One end of a 13rd capacitance C13 of termination of TVS pipe D1, the 20th The anode of the cathode of luminous tube D20, the 24th luminous tube D24；The 24th resistance R24 of another termination of TVS pipe D1, third The other end of one end of resistance R3 and the 13rd capacitance C13；The 20th luminous tube D20 of another termination of 24th resistance R24 Anode and the 24th luminous tube D24 cathode.
That end of TVS pipe D1 far from 3rd resistor R3 and the first fictitious load, second in four independent output indicating units Fictitious load, third fictitious load, the 4th fictitious load the first terminals be respectively connected with；In four independent output indicating units That end of 3rd resistor R3 far from TVS pipe D1 and the first fictitious load, the second fictitious load, third fictitious load, the 4th simulation Second terminals of load are respectively connected with；TVS pipe D1 is close to that end of 3rd resistor R3 point in four independent output indicating units Not Wei main channel export the first indication output end of indicating circuit, the second indication output end, third indication output end, the 4th instruction Output end.
Further, load cooling fan driving circuit includes switching regulator IC and the 6th connecting terminal block；6th connects The connecting terminal block that line terminals row is two；The model LM2576D2T-ADJR4G of switching regulator IC；Switching regulator IC 1 pin connect the anode of motherboard power supply and the anode of the 17th capacitance C17,3 and 5 pins meet the cathode of motherboard power supply, the tenth The cathode of seven capacitance C17, the 28th resistance R28, one end of the 19th capacitance C19, the 18th capacitance C18 cathode and second The anode of 18 diode D28；2 pins of switching regulator IC connect the cathode of the 28th diode D28 and one end of inductance； The anode of the 18th capacitance C18 of another termination of inductance, the other end of the 19th capacitance C19, one end of second resistance R2 and One terminals of six connecting terminal blocks；The cathode of the wiring termination motherboard power supply of 6th connecting terminal block；6th wiring Terminal block is connected with the power supply interface of cooling fan；In the 5th potentiometer of another termination of second resistance R2 one end of resistive element and Movable contact；4 pins of switching regulator IC connect the interior resistive element of the 5th potentiometer the other end and the 28th resistance R28 it is another One end.
Further, output interface circuit connects including the 19th connecting terminal block, the 20th connecting terminal block, the 21st Line terminals row, the 22nd connecting terminal block and the 23rd connecting terminal block；1,3,5,7 pins of the 19th connecting terminal block It is defeated with the first indication output end of main channel output indicating circuit, the second indication output end, third indication output end, the 4th instruction Outlet is respectively connected with, 2,4,6,8 pins and the first fictitious load, the second fictitious load, the 4th fictitious load of third fictitious load The first terminals be respectively connected with, 9 pins connect the signal interaction end of main control singlechip circuit, and 10 pins are connecing motherboard power supply just First terminals of pole, 17,18,19,20 pins and the 5th fictitious load, the first terminals, the 7th mould of the 6th fictitious load First terminals of quasi- load, the first terminals of the 8th fictitious load are respectively connected with；5th fictitious load, the 6th simulation are negative Second terminals of load, the 7th fictitious load and the 8th fictitious load connect the anode of motherboard power supply.
1,2,3,4 pins of the 20th connecting terminal block and the second terminals, the first fictitious load of the first fictitious load The first terminals, the second terminals of the second fictitious load, the first terminals of the second fictitious load are respectively connected with.
5,6 and 7 pins of the 22nd connecting terminal block connect the first terminals of the 5th fictitious load, and 10,11 and 12 Pin connects the first terminals of the 6th fictitious load, and 18,19 and 20 pins connect the first terminals of the 7th fictitious load, 26,27 and 28 pins connect the first terminals of the 8th fictitious load, and 32,33 and 34 pins connect the cathode of motherboard power supply；The Remaining pin of 22 connecting terminal blocks is hanging.
1,2,9 and 10 pins of the 21st connecting terminal block connect the second terminals of the first fictitious load, and 3,4,11 And 12 pin connect the first terminals of the first fictitious load, 5,6,13 and 14 pins connect the second wiring of the second fictitious load End, 7,8,15 and 16 pins connect the first terminals of the second fictitious load.
1,2,3,4,5,6,7,8 pins of the 23rd connecting terminal block and the second terminals of the first fictitious load, First terminals of one fictitious load, the second terminals of the second fictitious load, the first terminals of the second fictitious load, third The second terminals, the first terminals of third fictitious load, the second terminals of the 4th fictitious load, the 4th mould of fictitious load First terminals of quasi- load are respectively connected with；10,12,14,16 pins of the 23rd connecting terminal block and the 5th fictitious load The first terminals, the first terminals of the 6th fictitious load, the first terminals of the 7th fictitious load, the 8th fictitious load First terminals.
Display button interface circuit includes the 4th connecting terminal block；8,10,12,14,16 pins of the 4th connecting terminal block It is respectively connected with one end of the first button, the second button, third button, the 4th button, the 5th button；First button, second are pressed Key, third button, the 4th button and the 5th button the other end be grounded；11 and 13 pins of the 4th connecting terminal block connect electricity The 5V output ends of power-switching circuit, 7 and 9 pins are grounded, and the first signal of 1,3,5 pins and storage unit display circuit inputs End, second signal input terminal, third signal input part are respectively connected with.
Memory cell signal interface circuit includes the 15th connecting terminal block and the 16th connecting terminal block；15th wiring 7 and 9 pins of terminal block are grounded, and 11 and 13 pins connect the 5V output ends of power-switching circuit, and 1,3,5 pins are single with storage The third of metadata processing circuit shows that output end, the second display output end, the first display output end are respectively connected with；15th connects 13rd signal input part of 2,4,6,8,10,12,14,16 pins and the memory cell data processing circuit of line terminals row is to the 20 signal input parts are respectively connected with.
9 pins of the 16th connecting terminal block connect the signal interaction end of memory cell data processing circuit；16th wiring 1,3,5,7 pins of terminal block and four third analog input ends of feedback signal conversion circuit are respectively connected with；16th connects Four the 4th analog input ends of 2,4,6,8 pins and feedback signal conversion circuit of line terminals row are respectively connected with；16th First analog input end of the reversed feedback signal conversion circuit of 10 pins of connecting terminal block；16th connecting terminal block 17, 18, four the second analog input ends of 19,20 pins and feedback signal conversion circuit are respectively connected with.
20 pins of the 19th connecting terminal block and piece 20 cores of 20 pins for the 16th connecting terminal block Harness is respectively connected with；20 pins of the 4th connecting terminal block and 20 pins of the 15th connecting terminal block are with one 20 Core wire beam is respectively connected with.
Further, accessory channel output signal indicating circuit include the 16th luminous tube D16, the 17th luminous tube D17, 18th luminous tube D18 and the 19th luminous tube D19；16th luminous tube D16, the 17th luminous tube D17, the 18th luminous tube Anode and eleventh resistor R11, twelfth resistor R12, thirteenth resistor R13, the 14th electricity of D18, the 19th luminous tube D19 One end of resistance R14 is respectively connected with；Eleventh resistor R11, twelfth resistor R12, thirteenth resistor R13 and the 14th resistance R14 The other end connect the anode of motherboard power supply, the 16th luminous tube D16, the 17th luminous tube D17, the 18th luminous tube D18, The first terminals, the 7th mould of the cathode of 19 luminous tube D19 and the first terminals of the 5th fictitious load, the 6th fictitious load First terminals of quasi- load, the first terminals of the 8th fictitious load are respectively connected with.
Further, memory cell data processing circuit includes second singlechip；The model P89V51 of second singlechip； 29 pins of second singlechip connect the 5V output ends of power-switching circuit, 16 pins ground connection, and 38 pins connect power-switching circuit 5V output ends, one end of the 25th capacitance C25, third exclusion and the 4th exclusion common pin；25th capacitance C25's The other end is grounded；Four normal pins of third exclusion and 34,35,36,37 pins of second singlechip are respectively connected with；4th row Four normal pins of resistance and 30,31,32,33 pins of second singlechip are respectively connected with；4 pins of second singlechip connect the tenth One end of five resistance R15 and the cathode of the 26th capacitance C26；The other end of 15th resistance R15 is grounded；26th capacitance The anode of C26 connects the 5V output ends of power-switching circuit；14 pins of second singlechip connect the second crystal oscillator and the 27th capacitance One end of C27,15 pins connect the other end of the second crystal oscillator and one end of the 28th capacitance C28；27th capacitance C27 and The 28 capacitance C28 other ends are grounded；32 pins of second singlechip connect the cathode of the second buzzer；Second buzzer is just Pole connects the 5V output ends of power-switching circuit；Second singlechip 40,41,42,43,44,1,2,3,5,7,8,9,18,19,20, 21,22,23,24,25 pins are respectively that the first signal input part to the 20th signal of memory cell data processing circuit inputs End；30,31 pins of second singlechip are respectively the IIC clock ends of memory cell data processing circuit, IIC bi-directional datas end； 35,36,37 pins of second singlechip be respectively memory cell data processing circuit first display output end, second display it is defeated Outlet, third show output end；33 pins of second singlechip are the signal interaction end of memory cell data processing circuit.
Storage unit display circuit includes digital pipe driving chip sum number code pipe；The model of digital pipe driving chip TM1623；The model S02848A-B of charactron；9 and 25 pins of digital pipe driving chip connect the 24th capacitance C24's The 5V output ends of one end and power-switching circuit；26,29,32 pins of digital pipe driving chip and the 24th capacitance C24's The other end is grounded；10,11,12,14,15,16,17,18,19,20,23,24,27,28,30, the 31 of digital pipe driving chip 14,16,13,3,5,11,15,7,12,9,10,4,8,6,2,1 pin of pin and charactron M1 is respectively connected with；Charactron drives 3,4,5 pins of chip are respectively the first signal input part, second signal input terminal, third signal of storage unit display circuit Input terminal.
Data storage circuit includes storage chip；The model 24C01 of storage chip；1,2,3,4 and the 7 of storage chip Pin is grounded, and 8 pins connect one end of the 29th capacitance C29 and the 5V output ends of power-switching circuit；29th capacitance The other end of C29 is grounded；When 5,6 pins of storage chip are with the IIC bi-directional datas end of memory cell data processing circuit, IIC Zhong Duan is respectively connected with.
Further, feedback signal conversion circuit includes four the first signal feedback units and four second signal feedbacks Member；First signal feedback unit includes the first optocoupler；The first input end of first optocoupler connects one end of the 45th resistance R45, First output end is grounded, and second output terminal connects one end of the 46th resistance R46；Another termination electricity of 46th resistance R46 The 5V output ends of power-switching circuit.
Second signal feedback unit includes the second optocoupler and third optocoupler；The first input end and third optocoupler of second optocoupler The second input terminal connect one end of the 16th resistance R16；First input of the second input terminal of the second optocoupler and third optocoupler End is connected；First output end of the second optocoupler and third optocoupler is grounded；The second output terminal of second optocoupler connects the 17th resistance One end of R17；The 5V output ends of another termination power-switching circuit of 17th resistance R17；The second output terminal of third optocoupler Connect one end of the 18th resistance R18；The 5V output ends of another termination power-switching circuit of 18th resistance R18.
That end far from the first optocoupler of the 45th resistance R45 links together in four the first signal feedback units, The first analog input end as feedback signal conversion circuit；The second of the first optocoupler is defeated in four the first signal feedback units Enter four the second analog input ends that end is respectively feedback signal conversion circuit；First light in four the first signal feedback units The second output terminal of coupling and the first signal input part to the fourth signal input terminal of memory cell data processing circuit are respectively connected with.
That end far from the second optocoupler of the 16th resistance R16 is respectively feedback signal in four second signal feedback units Four third analog input ends of conversion circuit；The second input terminal difference of second optocoupler in four second signal feedback units For four the 4th analog input ends of feedback signal conversion circuit；The second of second optocoupler in four second signal feedback units The 5th signal input part to the tenth binary signal of the second output terminal and memory cell data processing circuit of output end, third optocoupler Input terminal is respectively connected with.
The invention has the advantages that：
The present invention makes tested PCR driver circuits plate in a stringent working environment by power-up, load, heating Test and aging are completed, enables not conform to panel and exposes defect in advance, fatigue is spent into the component acceleration of instinct in its plate Phase.Defective work is screened before engineering installation, improves stability of instrument and production efficiency.
Description of the drawings
Fig. 1 is the overall structure diagram of the present invention；
Fig. 2 is the exploded perspective view of host in the present invention；
Fig. 3 is the exploded perspective view of insulating box in the present invention；
Fig. 4 is the system block diagram of control mainboard in the present invention；
Fig. 5 is the circuit diagram of power-switching circuit in the present invention；
Fig. 6 is the circuit diagram of main control singlechip circuit in the present invention；
Fig. 7 is the circuit diagram of drive signal interface circuit in the present invention；
Fig. 8 is the circuit diagram of current sampling circuit in the present invention；
Fig. 9 is the circuit diagram that indicating unit is independently exported in the present invention；
Figure 10 is the circuit diagram of fan drive circuit in the present invention；
Figure 11 is the wiring diagram of the 19th connecting terminal block in the present invention；
Figure 12 is the wiring diagram of the 20th connecting terminal block in the present invention；
Figure 13 is the wiring diagram of the 21st connecting terminal block in the present invention；
Figure 14 is the wiring diagram of the 22nd connecting terminal block in the present invention；
Figure 15 is the wiring diagram of the 23rd connecting terminal block in the present invention；
Figure 16 is the circuit diagram of accessory channel output signal indicating circuit in the present invention；
Figure 17 is the circuit diagram of storage unit display circuit in the present invention；
Figure 18 is the circuit diagram of display button interface circuit in the present invention；
Figure 19 is the circuit diagram of memory cell data processing circuit in the present invention；
Figure 20 is the circuit diagram of data storage circuit in the present invention；
Figure 21 is the circuit diagram of the first signal feedback unit in the present invention；
Figure 22 is the circuit diagram of second signal feedback unit in the present invention；
Figure 23 is the wiring diagram of the 15th connecting terminal block in the present invention；
Figure 24 is the wiring diagram of the 16th connecting terminal block in the present invention；
Figure 25 is the inductance match curve figure of the present invention.
Specific implementation mode
Below in conjunction with attached drawing, the invention will be further described.
As shown in Fig. 1,2,3,4,5,6, the driver circuit plate high temperature accelerated test aging equipment of PCR instrument, including host 3 With insulating box 4.Host 3 includes bottom case 301, panel 302, host flip plate 303, motherboard power supply 304, Board Under Test power supply 305, control Mainboard, Current Display, cooling fan 306, rubber block 307 and fictitious load group 308 processed.Fictitious load group 308 includes First fictitious load, the second fictitious load, third fictitious load, the 4th fictitious load, the 5th fictitious load, the 6th simulation are negative Load, the 7th fictitious load and the 8th fictitious load.First fictitious load, the second fictitious load, third fictitious load, the 4th simulation Load, the 5th fictitious load, the 6th fictitious load, the 7th fictitious load and the 8th fictitious load are all made of gold aluminum casing resistor. Four angles of 301 bottom surface of bottom case are fixed respectively with four rubber blocks 307.Panel 302 is fixed on the side of bottom case 301.It dissipates Air-heater 306, the first fictitious load, the second fictitious load, third fictitious load, the 4th fictitious load, the 5th fictitious load, Six fictitious loads, the 7th fictitious load, the 8th fictitious load, motherboard power supply 304, Board Under Test power supply 305 and control mainboard are solid It is scheduled in bottom case 301.Current Display is fixed on panel 302.The top of the one side edge and bottom case 301 of host flip plate 303 Portion is hinged.
Insulating box 4 includes outer housing 401, inner housing 402, temperature controller 403, heating wire and insulating box flip plate 404.Shell The bottom of body 401 and the top of bottom case 301 in host 3 are fixed.Inner housing 402 is fixed on the inside of outer housing 401.Temperature controller 403 are mounted on the side of outer housing 401.Heating wire is fixed on the inside of inner housing 402.Heating wire is connected with temperature controller 403.It is permanent The one side edge of incubator flip plate 404 is hinged with the top edge of outer housing 401.
Control mainboard includes power-switching circuit 101, main control singlechip circuit 102, drive signal interface circuit 103, electricity Flow sample circuit 104, main channel output indicating circuit 105, fan drive circuit 106, output interface circuit 107, accessory channel Output signal indicating circuit 109, storage unit display circuit 201, display button interface circuit 202, memory cell data processing Circuit 203, data storage circuit 204, feedback signal conversion circuit 205 and memory cell signal interface circuit 206.Power supply turns It changes circuit 101 and the 24V voltages that motherboard power supply 304 exports is converted by 12V by power voltage step down module, and pass through the first voltage stabilizing core It is that drive signal interface circuit 103 is powered that piece, which converts the 12V voltages that power voltage step down module exports to 3.3V, passes through the second voltage stabilizing It is master control single chip circuit 102, current sampling circuit 104, wind turbine that chip U2, which converts the 12V voltages that power module exports to 5V, Driving circuit 106, storage unit display circuit 201, memory cell data processing circuit 203, data storage circuit 204 and anti- Feedback signal conversion circuit 205 is powered.Main control singlechip circuit 102 is sent out by first singlechip to drive signal interface circuit 103 Send drive signal.Drive signal interface circuit 103 and fictitious load group 308 are connected with Board Under Test 5.Current sampling circuit 104 It is shown respectively by the first digital voltage gauge outfit, the second digital voltage gauge outfit, third digital voltage gauge outfit, the 4th digital voltage gauge outfit Show the first fictitious load, the second fictitious load, third fictitious load, the 4th fictitious load both ends voltage value.Main channel exports Indicating circuit 105 includes four independent output indicating units.Four independent output indicating units show the by luminous tube respectively One fictitious load, the second fictitious load, third fictitious load, the current direction on the 4th fictitious load.Fan drive circuit 106 Cooling fan 306 is driven by switching regulator IC.Display button interface circuit 202 is transmitted the model of Board Under Test by button To memory cell data processing circuit 203.Output interface circuit 107 and memory cell signal interface circuit 206 are simulated first Load, the second fictitious load, third fictitious load, the 4th fictitious load, the 5th fictitious load, the 6th fictitious load, the 7th mould Intend load, the voltage value of the 8th fictitious load is transferred to feedback signal conversion circuit 205.Feedback signal conversion circuit 205 passes through Photoelectrical coupler converts after switching value the voltage value received to and is transferred to memory cell data processing circuit 203.Storage is single Metadata processing circuit 203 by second singlechip will determine that feedback signal conversion circuit 205 transmission come switching value whether just Really, and detection code or error code are generated.Storage unit display circuit 201 is handled by numeral method memory cell data The detection code or error code that the transmission of circuit 203 comes.Memory circuit 204 stores detection code or mistake by storage chip Code.
As shown in figure 5, power-switching circuit 101 includes the first voltage stabilizing chip U1, the second voltage stabilizing chip U2 and power voltage step down Module U7.The model SUCS102412C of power voltage step down module U7.The model SU7117M3-3.3 of first voltage stabilizing chip U1. The model NCU7117DT50G of second voltage stabilizing chip U2.1 pin of power voltage step down module U7 connect 304 anode HV+ of motherboard power supply, One end of the cathode of 5th diode D5, the anode of the first capacitance C1 and the second capacitance C2,2,3 pins connect motherboard power supply 304 Cathode HV-, the anode of the 5th diode D5, the cathode of the first capacitance C1 and the second capacitance C2 other ends, 4 pins connect the 7th electricity Hold the anode of C7, one end of third capacitance C3,1 pin of the first voltage stabilizing chip U1 and 1 pin of the second voltage stabilizing chip U2,5 draw Foot is hanging, and 6 pins are connected and are grounded with the other end of the cathode of the 7th capacitance C7 and third capacitance C3.First voltage stabilizing chip U1's 3 pins connect one end of the 4th capacitance C4 and the anode of the 8th capacitance C8；2 pins of first voltage stabilizing chip U1, the 4th capacitance C4 The cathode of the other end and the 8th capacitance C8 are grounded；3 pins of second voltage stabilizing chip U2 connect one end and the 9th of the 6th capacitance C6 The anode of capacitance C9；2 pins, the other end of the 6th capacitance C6 and the cathode of the 9th capacitance C9 of second voltage stabilizing chip U2 connects Ground.3 pins of first voltage stabilizing chip U1 are the 3.3V output ends+3.3V of power-switching circuit 101.The 3 of second voltage stabilizing chip U2 Pin is the 5V output ends+5V of power-switching circuit 101.
As shown in fig. 6, main control singlechip circuit 102 includes first singlechip U3.The model of first singlechip U3 P89V51.29 pins of first singlechip U3 meet the 5V output ends+5V of power-switching circuit 101,16 pins ground connection, and 38 pins connect 5V output ends+the 5V of power-switching circuit 101, one end of the 5th capacitance C5, the first exclusion RR1 and the second exclusion RR2 it is public Pin.The other end of 5th capacitance C5 is grounded.Four normal pins of first exclusion RR1 with the 34 of first singlechip U3,35, 36,37 pins are respectively connected with.Four normal pins of second exclusion RR2 and 30,31,32,33 pins of first singlechip U3 point Xiang Lian not.One end of 32,33 pins and the 6th button S6 and the 7th button S7 of first singlechip U3 is respectively connected with.6th button The other end of S6 and the 7th button S7 are grounded.4 pins of first singlechip U3 connect one end and the tenth capacitance of first resistor R1 The cathode of C10.The other end of first resistor R1 is grounded.The anode of tenth capacitance C10 connects the 5V output ends of power-switching circuit 101 +5V；14 pins of first singlechip U3 connect one end of the first crystal oscillator Z1 and the 11st capacitance C11, and 15 pins meet the first crystal oscillator Z1 The other end and the 12nd capacitance C12 one end.11st capacitance C11 and the 12nd capacitance C12 other ends are grounded.First is single 12 pins of piece machine U3 connect the cathode of the first buzzer LS1.The anode of first buzzer LS1 meets the 5V of power-switching circuit 101 Output end+5V.18 pins of first singlechip U3 connect one end of the 7th resistance R7, and another termination the 9th of the 7th resistance R7 shines The anode of pipe D9, the cathode ground connection of the 9th luminous tube D9；19 pins of first singlechip U3 connect one end of the 8th resistance R8, and the 8th The anode of the 8th luminous tube D8 of another termination of resistance R8, the cathode ground connection of the 8th luminous tube D8；Draw the 20 of first singlechip U3 Foot connects one end of the 9th resistance R9, and the anode of the 7th luminous tube D7 of another termination of the 9th resistance R9, the 7th luminous tube D7's is negative Pole is grounded；21 pins of first singlechip U3 connect one end of the tenth resistance R10, and another termination the 6th of the tenth resistance R10 shines The anode of pipe D6, the cathode ground connection of the 6th luminous tube D6.1,3,8,9,10,11,30,34,35,36, the 37 of first singlechip U3 Pin is respectively the first control output end to the 11st control output end of main control singlechip circuit 102.First singlechip U3's 41,42,43,44 pins are respectively the first data output end to the 4th data output end of main control singlechip circuit 102.First is single 31 pins of piece machine U3 are the signal interaction end of master control single chip circuit 102.Remaining pin of first singlechip U3 is hanging.
As shown in fig. 7, drive signal interface circuit 103 include the first connecting terminal block J1, the second connecting terminal block J2 and Third connecting terminal block J3.First connecting terminal block J1, the second connecting terminal block J2 and third connecting terminal block J3 have 40. 1 pin of first connecting terminal block J1, the second connecting terminal block J2 and third connecting terminal block J3 connect main control singlechip circuit 102 the 4th data output end CLK, 3 pins meet the third data output end DIN of main control singlechip circuit 102, and 5 pins are equal Meet the first data output end FS of main control singlechip circuit 102；The second data that 9 pins connect main control singlechip circuit 102 are defeated Outlet CS, 13 pins meet the 11st control output end DIR1 of main control singlechip circuit 102, and 15 pins connect main control singlechip Tenth control output end DIR2 of circuit 102,25 pins meet the second control output end L- of main control singlechip circuit 102 HOTLID, 26 pins meet the first control output end R-HOTLID of main control singlechip circuit 102,2,4,6,8,10,12,14, 16,18,20,22,24 and 29 pins meet the 3.3V output ends+3.3V of power-switching circuit 101.
17 pins of first connecting terminal block J1,27 pins of the second connecting terminal block J2 and third connecting terminal block J3 are equal Meet the third control output end HEATER1 of main control singlechip circuit 102；First connecting terminal block J1, the second connecting terminal block J2 28 pins and the 19th pin of third connecting terminal block J3 connect the 4th control output end of main control singlechip circuit 102 HEATER2.11 pins of first connecting terminal block J1 meet third data output end CS, and 17 pins connect main control singlechip circuit 102 The 9th control output end DIR3,19 pins meet the 8th control output end DIR4 of main control singlechip circuit 102.Third terminals 7 pins of son row J3 meet the 7th control output end DA_LOAD of main control singlechip circuit 102, and 27 pins connect main control singlechip 6th control output end L-PWM of circuit 102,28 pins meet the 5th control output end R-PWM of main control singlechip circuit 102, 35 pins are grounded.Remaining pin of first connecting terminal block J1, the second connecting terminal block J2 and third connecting terminal block J3 are hanging.
As shown in figure 8, current sampling circuit 104 include the first power conversion chip IC1, second source conversion chip IC2, Third power conversion chip IC3, the 4th power conversion chip IC4, the first digital voltage gauge outfit BK1, the second digital voltage gauge outfit BK2, third digital voltage gauge outfit BK3 and the 4th digital voltage gauge outfit BK4.First power conversion chip IC1, second source conversion The model of chip IC 2, third power conversion chip IC3 and the 4th power conversion chip IC4 is NMK0505SAC.First number The type of voltmeter head BK1, the second digital voltage gauge outfit BK2, third digital voltage gauge outfit BK3 and the 4th digital voltage gauge outfit BK4 Number it is FY5140B.First power conversion chip IC1, second source conversion chip IC2, third power conversion chip IC3 and 1 pin of four power conversion chip IC4 meets the 5V output ends+5V of power-switching circuit 101, and 2 pins are grounded.
3 pins of first power conversion chip IC1 connect the first terminals TE1-, the 37th resistance of the first fictitious load R37, one end of the 20th capacitance C20,2 pins of the first digital voltage gauge outfit BK1, in the first potentiometer RP1 resistive element one End and movable contact.4 pins of first power conversion chip IC1 connect the other end and the first digital voltage of the 37th resistance R37 3 pins of gauge outfit BK1.One end of the 29th resistance R29 of another termination of resistive element in first potentiometer RP1.29th The other end of resistance R29 and the 20th capacitance C20 meet one end and the first digital voltage gauge outfit BK1 of the 33rd resistance R33 1 pin.Second terminals TE1+ of the first fictitious load of another termination of the 33rd resistance R33.
3 pins of second source conversion chip IC2 connect the first terminals TE2-, the 38th resistance of the second fictitious load R38, one end of the 21st capacitance C21,2 pins of the second digital voltage gauge outfit BK2, resistive element in the second potentiometer RP2 One end and movable contact.4 pins of second source conversion chip IC2 connect the other end and the second number electricity of the 38th resistance R38 Press 3 pins of gauge outfit BK2.One end of the 30th resistance R30 of another termination of the interior resistive element of second potentiometer RP2.30th The other end of resistance R30 and the 21st capacitance C21 connect one end and the second digital voltage gauge outfit of the 34th resistance R34 1 pin of BK2.Second terminals TE2+ of the second fictitious load of another termination of the 34th resistance R34.
3 pins of third power conversion chip IC3 connect the first terminals TE3-, the 39th resistance of third fictitious load R39, one end of the 22nd capacitance C22,2 pins of third digital voltage gauge outfit BK3, resistive element in third potentiometer RP3 One end and movable contact.4 pins of third power conversion chip IC3 connect the other end and third number electricity of the 39th resistance R39 Press 3 pins of gauge outfit BK3.One end of the 31st resistance R31 of another termination of the interior resistive element of third potentiometer RP3.Third The other end of 11 resistance R31 and the 22nd capacitance C22 connects one end and the third digital voltmeter of the 35th resistance R35 1 pin of head BK3.Second terminals TE3+ of the third fictitious load of the 35th resistance R35.
3 pins of 4th power conversion chip IC4 connect the first terminals TE4-, the 40th resistance of the 4th fictitious load R40, one end of the 23rd capacitance C23,2 pins of the 4th digital voltage gauge outfit BK4, resistive element in the 4th potentiometer RP4 One end and movable contact.4 pins of 4th power conversion chip IC4 connect the other end and the 4th digital voltage of the 40th resistance R40 3 pins of gauge outfit BK4.One end of the 32nd resistance R32 of another termination of the interior resistive element of 4th potentiometer RP4.30th The other end of two resistance R32 and the 23rd capacitance C23 connects one end and the 4th digital voltage gauge outfit of the 36th resistance R36 1 pin of BK4.Second terminals TE4+ of the 4th fictitious load of another termination of the 36th resistance R36.
As shown in figure 9, independent output indicating unit includes TVS pipe D1.TVS pipe is the abbreviation of Transient Suppression Diode.TVS The one of pipe D1 is terminating one end of the 13rd capacitance C13, the cathode of the 20th luminous tube D20, the 24th luminous tube D24 just Pole.The 24th resistance R24 of another termination, one end of 3rd resistor R3 and the other end of the 13rd capacitance C13 of TVS pipe D1. The anode of the 20th luminous tube D20 of another termination of 24th resistance R24 and the cathode of the 24th luminous tube D24.
That end of TVS pipe D1 far from 3rd resistor R3 and the first fictitious load, second in four independent output indicating units Fictitious load, third fictitious load, the 4th fictitious load the first terminals be respectively connected with.In four independent output indicating units That end of 3rd resistor R3 far from TVS pipe D1 and the first fictitious load, the second fictitious load, third fictitious load, the 4th simulation Second terminals of load are respectively connected with.TVS pipe D1 is close to that end of 3rd resistor R3 point in four independent output indicating units Not Wei main channel export the first indication output end T1 of indicating circuit 105, the second indication output end T2, third indication output end T3, the 4th indication output end T4.
As shown in Figure 10, load cooling fan driving circuit 106 includes switching regulator IC U8 and the 6th connecting terminal block J6.The connecting terminal block that 6th connecting terminal block J6 is two.The model LM2576D2T-ADJR4G of switching regulator IC U8. 1 pin of switching regulator IC U8 connects the anode of the positive HV+ and the 17th capacitance C17 of motherboard power supply, and 3 and 5 pins meet master The cathode HV- of plate power supply 304, the cathode of the 17th capacitance C17, the 28th resistance R28, one end of the 19th capacitance C19, The cathode of 18 capacitance C18 and the anode of the 28th diode D28.2 pins of switching regulator IC U8 connect the 28th The cathode of pole pipe D28 and one end of inductance L1.Anode, the 19th capacitance C19 of the 18th capacitance C18 of another termination of inductance L1 The other end, one end of second resistance R2 and a terminals of the 6th connecting terminal block J6.The one of 6th connecting terminal block J6 The cathode HV- of a wiring termination motherboard power supply 304.6th connecting terminal block J6 is connected with the power supply interface of cooling fan 306.The One end of resistive element and movable contact in the 5th potentiometer RP5 of another termination of two resistance R2.4 pins of switching regulator IC U8 connect The other end of the interior resistive element of 5th potentiometer RP5 and the other end of the 28th resistance R28.
As shown in Figure 11,12,13,14 and 15, output interface circuit 107 includes the 19th connecting terminal block J19, the 20th Connecting terminal block J20, the 21st connecting terminal block J21, the 22nd connecting terminal block J22 and the 23rd connecting terminal block J23.First indication output end of 1,3,5,7 pins of the 19th connecting terminal block J19 and main channel output indicating circuit 105 T1, the second indication output end T2, third indication output end T3, the 4th indication output end T4 are respectively connected with, 2,4,6,8 pins and One fictitious load, the second fictitious load, the 4th fictitious load of third fictitious load the first terminals be respectively connected with, 9 pins connect The signal interaction end P0.6 of main control singlechip circuit 102,10 pins meet the positive HV+ of motherboard power supply, 17,18,19,20 pins with The first of first terminals OUT1 of the 5th fictitious load, the first terminals OUT2 of the 6th fictitious load, the 7th fictitious load Terminals OUT3, the 8th fictitious load the first terminals OUT4 be respectively connected with.Remaining pin of 19th connecting terminal block J19 It is hanging.5th fictitious load, the 6th fictitious load, the 7th fictitious load and the 8th fictitious load the second terminals meet master The positive HV+ of plate power supply 304.
As shown in figure 12,1,2,3,4 pins of the 20th connecting terminal block J20 and the second terminals of the first fictitious load TE1+, the first terminals TE1- of the first fictitious load, the second terminals TE2+ of the second fictitious load, the second fictitious load First terminals TE2- is respectively connected with.
As shown in figure 14,5,6 and 7 pins of the 22nd connecting terminal block J22 connect the first of the 5th fictitious load and connect Line end OUT1,10,11 and 12 pins meet the first terminals OUT2 of the 6th fictitious load, and 18,19 and 20 pins connect the 7th First terminals OUT3 of fictitious load, 26,27 and 28 pins meet the first terminals OUT4 of the 8th fictitious load, and 32,33 And 34 pin meet the cathode HV- of motherboard power supply 304.Remaining pin of 22nd connecting terminal block J22 is hanging.
As shown in figure 13,1,2,9 and 10 pins of the 21st connecting terminal block J21 connect the second of the first fictitious load Terminals TE1+, 3,4,11 and 12 pins meet the first terminals TE1- of the first fictitious load, and 5,6,13 and 14 pins connect Second terminals TE2+ of the second fictitious load, 7,8,15 and 16 pins meet the first terminals TE2- of the second fictitious load.
As shown in figure 15,1,2,3,4,5,6,7,8 pins of the 23rd connecting terminal block J23 and the first fictitious load Second terminals TE1+, the first terminals TE1- of the first fictitious load, the second terminals TE2+ of the second fictitious load, second The first wiring of first terminals TE2- of fictitious load, the second terminals TE3+, third fictitious load of third fictitious load The first terminals TE4- of TE3-, the second terminals TE4+ of the 4th fictitious load, the 4th fictitious load is held to be respectively connected with.Second 10,12,14,16 pins of 13 connecting terminal block J23 and the first terminals OUT1, the 6th fictitious load of the 5th fictitious load The first terminals OUT2, the first terminals OUT3 of the 7th fictitious load, the 8th fictitious load the first terminals OUT4.The Remaining pin of 23 connecting terminal block J23 is hanging.
As shown in figure 16, accessory channel output signal indicating circuit 109 shines including the 16th luminous tube D16, the 17th Pipe D17, the 18th luminous tube D18 and the 19th luminous tube D19.16th luminous tube D16, the 17th luminous tube D17, the 18th Anode and eleventh resistor R11, twelfth resistor R12, thirteenth resistor R13, the of luminous tube D18, the 19th luminous tube D19 One end of 14 resistance R14 is respectively connected with.Eleventh resistor R11, twelfth resistor R12, the electricity of thirteenth resistor R13 and the 14th The other end of resistance R14 meets the positive HV+ of motherboard power supply, and the 16th luminous tube D16, the 17th luminous tube D17, the 18th shine The first of pipe D18, the first terminals OUT1 of the cathode of the 19th luminous tube D19 and the 5th fictitious load, the 6th fictitious load Terminals OUT2, the first terminals OUT3 of the 7th fictitious load, the 8th fictitious load the first terminals OUT4 be respectively connected with.
As shown in figure 17, storage unit display circuit 201 includes number pipe driving chip U6 and charactron M1.Charactron drives The model TM1623 of dynamic chip U6.The model S02848A-B of charactron.9 and 25 pins of digital pipe driving chip U6 are equal Meet one end of the 24th capacitance C24 and the 5V output ends+5V of power-switching circuit 101.Digital pipe driving chip U6 26, 29, the other end of 32 pins and the 24th capacitance C24 are grounded.Digital pipe driving chip U6 10,11,12,14,15,16, 17,18,19,20,23,24,27,28,30,31 pins and charactron M1 14,16,13,3,5,11,15,7,12,9,10,4, 8,6,2,1 pin is respectively connected with.3,4,5 pins of digital pipe driving chip U6 are respectively the of storage unit display circuit 201 One signal input part DO, second signal input terminal CO, third signal input part SO.Remaining pin of digital pipe driving chip U6 is equal Vacantly.
As shown in figure 18, display button interface circuit 202 includes the 4th connecting terminal block J4.4th connecting terminal block J4's 8, the one of 10,12,14,16 pins and the first button S1, the second button S2, third button S3, the 4th button S4, the 5th button S5 End is respectively connected with.First button S1, the second button S2, third button S3, the other end of the 4th button S4 and the 5th button S5 are equal Ground connection.The 5V pins of output end+5V, 7 and 9 that 11 and 13 pins of 4th connecting terminal block J4 connect power-switching circuit 101 are equal Ground connection, the first signal input part DO, second signal input terminal CO, third of 1,3,5 pins and storage unit display circuit 201 believe Number input terminal SO is respectively connected with.Remaining pin of 4th connecting terminal block J4 is hanging.
As shown in figure 19, memory cell data processing circuit 203 includes second singlechip U4.The model of second singlechip U4 For P89V51.29 pins of second singlechip U4 connect the 5V output ends+5V of power-switching circuit 101,16 pins ground connection, 38 pins Meet 5V output ends+5V, one end of the 25th capacitance C25, third exclusion RR3 and the 4th exclusion RR4 of power-switching circuit 101 Common pin.The other end of 25th capacitance C25 is grounded.Four normal pins and second singlechip of third exclusion RR3 34,35,36,37 pins of U4 are respectively connected with.Four normal pins of 4th exclusion RR4 with the 30 of second singlechip U4,31, 32,33 pins are respectively connected with.4 pins of second singlechip U4 meet one end and the 26th capacitance C26 of the 15th resistance R15 Cathode.The other end of 15th resistance R15 is grounded.The anode of 26th capacitance C26 connects the 5V outputs of power-switching circuit 101 End+5V；14 pins of second singlechip U4 connect one end of the second crystal oscillator Z2 and the 27th capacitance C27, and 15 pins connect the second crystalline substance Shake the other end of Z2 and one end of the 28th capacitance C28.27th capacitance C27 and the 28th capacitance C28 other ends are equal Ground connection.32 pins of second singlechip U4 connect the cathode of the second buzzer LS2.The anode of second buzzer LS2 connects power supply conversion 5V output ends+the 5V of circuit 101.Second singlechip U4 40,41,42,43,44,1,2,3,5,7,8,9,18,19,20,21, 22,23,24,25 pins are respectively that the first signal input part to the 20th signal of memory cell data processing circuit 203 inputs End.30,31 pins of second singlechip U4 are respectively that IIC clock ends SCL2, IIC of memory cell data processing circuit 203 are bis- To data terminal SDA2.35,36,37 pins of second singlechip U4 are respectively the first aobvious of memory cell data processing circuit 203 Show that output end SI, the second display output end CI, third show output end DI.33 pins of second singlechip U4 are number of memory cells According to the signal interaction end F of processing circuit 203.Remaining pin of second singlechip U4 is hanging.
As shown in figure 20, data storage circuit 204 includes storage chip U5.The model 24C01 of storage chip U5.It deposits 1,2,3,4 and 7 pins of storage chip U5 are grounded, and 8 pins connect one end and the power-switching circuit 101 of the 29th capacitance C29 5V output ends+5V.The other end of 29th capacitance C29 is grounded.At 5,6 pins and memory cell data of storage chip U5 IIC bi-directional datas end SDA2, IIC clock end SCL2 of reason circuit 203 is respectively connected with.
As shown in figs. 21 and 22, feedback signal conversion circuit 205 includes four the first signal feedback units and four second Signal feedback unit.First signal feedback unit includes the first optocoupler P1.The first input end of first optocoupler P1 connects the 45th One end of resistance R45, the first output end ground connection, second output terminal connect one end of the 46th resistance R46.46th resistance 5V output ends+the 5V of another termination power-switching circuit 101 of R46；
As shown in figure 22, second signal feedback unit includes the second optocoupler P2 and third optocoupler P3.The of second optocoupler P2 The second input terminal of one input terminal and third optocoupler P3 connect one end of the 16th resistance R16.The second input of second optocoupler P2 End is connected with the first input end of third optocoupler P3；The first output end of second optocoupler P2 and third optocoupler P3 are grounded；Second The second output terminal of optocoupler P2 connects one end of the 17th resistance R17.Another termination power-switching circuit of 17th resistance R17 101 5V output ends+5V；The second output terminal of third optocoupler P3 connects one end of the 18th resistance R18.18th resistance R18's 5V output ends+the 5V of another termination power-switching circuit 101.
That end far from the first optocoupler P1 of the 45th resistance R45 is connected to one in four the first signal feedback units It rises, the first analog input end as feedback signal conversion circuit 205.First optocoupler P1 in four the first signal feedback units The second input terminal be respectively feedback signal conversion circuit 205 four the second analog input ends.Four the first signal feedbacks The first signal input part to the 4th letter of the second output terminal of first optocoupler P1 and memory cell data processing circuit 203 in unit Number input terminal is respectively connected with.
That end far from the second optocoupler P2 of the 16th resistance R16 is respectively feedback letter in four second signal feedback units Four third analog input ends of number conversion circuit 205.The second of the second optocoupler P2 is defeated in four second signal feedback units Enter four the 4th analog input ends that end is respectively feedback signal conversion circuit 205.In four second signal feedback units 5th letter of the second output terminal of two optocoupler P2, the second output terminal of third optocoupler P3 and memory cell data processing circuit 203 Number input terminal to the tenth binary signal input terminal is respectively connected with.
As shown in figs. 23 and 24, memory cell signal interface circuit 206 includes the 15th connecting terminal block J15 and the 16th Connecting terminal block J16.7 and 9 pins of 15th connecting terminal block J15 are grounded, and 11 and 13 pins connect power-switching circuit The third of 101 5V output ends+5V, 1,3,5 pins and memory cell data processing circuit 203 shows that output end DI, second show Show that output end CI, the first display output end SI are respectively connected with.2,4,6,8,10,12,14, the 16 of 15th connecting terminal block J15 The 13rd signal input part to the 20th signal input part of pin and memory cell data processing circuit 203 is respectively connected with.
As shown in figure 24,9 pins of the 16th connecting terminal block J16 connect the signal of memory cell data processing circuit 203 Interaction end.1,3,5,7 pins of 16th connecting terminal block J16 and four third analog quantitys of feedback signal conversion circuit 205 Input terminal is respectively connected with.2,4,6,8 pins of 16th connecting terminal block J16 with the four of feedback signal conversion circuit 205 the Four analog input ends are respectively connected with.The first of the reversed feedback signal conversion circuit of 10 pins of 16th connecting terminal block J16 205 Analog input end.17,18,19,20 pins of 16th connecting terminal block J16 with four of feedback signal conversion circuit 205 Second analog input end is respectively connected with.Remaining pin of 15th connecting terminal block J15 and the 16th connecting terminal block J16 is equal Vacantly.
20 pins of 19th connecting terminal block J19 and 20 pins of the 16th connecting terminal block J16 are with one 20 core wire beam of root is respectively connected with.20 pins of 4th connecting terminal block J4 and 20 of the 15th connecting terminal block J15 Pin is respectively connected with a 20 core wire beams
The principle of the present invention is as follows：
In power-switching circuit 101, the reversed protection of the 5th anti-power supplys of diode D5 is used, if power supply is reversed, moment handle Power supply short circuit is burnt, to protect subsequent circuit.First capacitance C1 and the second capacitance C2 is input filter capacitor, keeps input electric Pressure is more stablized.Power module U7 is isolation Voltage stabilizing module, the voltage and export to other circuits that it inputs motherboard power supply Voltage electric is kept apart, and makes motherboard power supply will not front and back interference with other circuits.And power module U7 can be defeated by 12V voltages Go out to the first voltage stabilizing chip U1 and the second voltage stabilizing chip U2.12V voltages are converted into 3.3V voltages by the first voltage stabilizing chip U1.Second 12V voltages are converted into 5V voltages by voltage stabilizing chip U2.Third capacitance C3, the 4th capacitance C4, the 6th capacitance C7, the 7th capacitance C7, 8th capacitance C8, the 9th capacitance C9 are filter capacitor.The module is the reliable supply voltage of other circuit with stable.
In main control singlechip circuit 102, first resistor R1 and the tenth capacitance C10 form electrification reset circuit, ensure first Microcontroller U3 restarts work after fully powered up.First crystal oscillator Z1, the 11st capacitance C11 and the 12nd capacitance C12 compositions system System clock, gives mono- stable machine cycle of first singlechip U3.First exclusion RR1 and the second exclusion RR2 is microcontroller U3 P0 mouthfuls of pull-up resistors, for giving P0 stomatopods enough promotion abilities.First buzzer LS1 for send out the 6th button S6 and the 7th by The operation indicating sound of key S7.User selects different working conditions by the operational order of the 6th button S6 and the 7th button S7. 6th luminous tube D6, the 7th luminous tube D7, the 8th luminous tube D8 and the 9th luminous tube D9 are used for display working condition, and make first Microcontroller U3 is run according to pre-set programs.
In current sampling circuit 104, because the electric power network of Board Under Test delivery outlet is floating ground structure, current sampling circuit 104 are turned by the first power conversion chip IC1, second source conversion chip IC2, third power conversion chip IC3, the 4th power supply Chip IC 4 is changed by the first digital voltage gauge outfit BK1, the second digital voltage gauge outfit BK2, third digital voltage gauge outfit BK3, the 4th number The power supply of word voltmeter head BK4 respectively isolates.Because the output current for Board Under Test is very big, in order to ensure precision, output Current value converts after sampling out voltage from load both ends and gets.Reduction formula such as formula (1)：
In formula (1), U is the voltage value that digital voltage gauge outfit is shown；Ui is the voltage value at fictitious load both ends；RP is the 4th The output resistance of potentiometer RP4, the 5th potentiometer RP5, the 6th potentiometer RP6 or the 7th potentiometer RP7；Ra is with regard in circuit The resistance value of 29th resistance R29, the 30th resistance R30, the 31st resistance R31 or the 32nd resistance R32；Rb is just electric The resistance of the 33rd resistance R33, the 34th resistance R34, the 35th resistance R35 or the 36th resistance R36 in road Value
Main channel output indicating circuit 105 is TE output indicating circuits.Independent output to connect the first fictitious load refers to For showing unit.If the voltage at the first fictitious load both ends is more than TVS pipe D1 parameter voltages values, 3rd resistor R3 and TVS pipe D1 forms a regulator circuit, and the 20th luminous tube D20 is driven after the 14th resistance R14 current limlitings with TVS pipe D1 parameter voltages With the 24th luminous tube D24；If the voltage at the first fictitious load both ends is less than TVS pipe D1 parameter voltages values, the first simulation The voltage for loading both ends is directly driven the 15th luminous tube D15 and second after 3rd resistor R3 and the 14th resistance R14 current limlitings 14 luminous tube D24.Because the voltage at the first fictitious load both ends has positive and negative values, the 20th luminous tube D20 and the 20th Four luminous tube D24 respectively show the working condition of reversal.
Load in cooling fan driving circuit 106, the selection of inductance L1 will according to the output voltage of switching regulator IC U7, The parameter selections such as maximum input voltage, maximum load current.Selection method is as follows：First, electricity is calculated according to formula (2) formula Press microsecond constant (ET)：
ET=(Vin-Vout) × Vout/Vin × 1000/f formulas (2)
In formula (2), it is the output of switching regulator IC U7 that Vin, which is the maximum input voltage of switching regulator IC U7, Vout, Voltage, f are the working oscillation frequency values (52kHz) of switching regulator IC U7.After ET is determined, corresponding electricity in 5 according to fig. 2 Microsecond constant and load current curve is pressed to search the inductance value L of inductance L1.
The value meeting formula (3) of the capacitance C of 18th capacitance C18
C >=13300Vin/Vout × L formulas (3)
In formula (3), L is the inductance value of the first inductance L1, and unit is μ H.The pressure voltage of 18th capacitance C18 should be greater than 1.5~2 times of rated output voltage.For 12V voltage outputs, it is recommended to use pressure voltage is the capacitance of 25V.
The load current value of 28th diode D28 is more than 1.2 times of maximum load current, it is contemplated that load short circuits Maximum current of the load current value more than switching regulator IC U7 of situation, the 28th diode D28 limits.28th The backward voltage of pole pipe D28 is more than 1.25 times of switching regulator IC U7 maximum input voltages.In the present embodiment, the 28th Pole pipe D28 selects the Schottky diode of 1N582x series.
The voltage of motherboard power supply output by be directly inputted to after the 17th capacitance C17 filtering switching regulator IC U7 1, 3 pins；5 pins of switching regulator IC U7 are output Enable Pins, are set as effective after ground connection；4 pins are high impedance reference voltage End, 2 pins are output ends；6th connecting terminal block J6 connects the cooling fan of load；18th capacitance C18 and the 19th capacitance C19 is output filter capacitor；Second resistance R2, the 28th resistance R28 and the 5th potentiometer RP5 are output to heat dissipation with making adjustments The voltage of wind turbine is output to the specific voltage value Uo such as formulas (4) of cooling fan：
In formula (4), VREF is the reference voltage value of switching regulator IC U7, is herein 1.23V.
The present apparatus is suitble to the aging of the PCR driving plates of model BYQ5615, BYQ5071 and BYQ5078.Model There are three the PCR driving plates tools of BYQ5615 to external port, is control port, output port and power port respectively.Model There are four the PCR driving plates tools of BYQ5071 to external port, is control port, output port, auxiliary output terminal mouth and power supply respectively Port.There are three the PCR driving plates tools of model BYQ5071 to external port, is control port, output port and power end respectively Mouthful.
The present invention is as follows to the operation principle for being carried out aging by side plate of model BYQ5615：
Step 1: by the control terminal of the first connecting terminal block J1 and Board Under Test BYQ5615 in drive signal interface circuit 103 Mouth connection.The output port of the 23rd connecting terminal block J23 and Board Under Test BYQ5615 in output interface circuit 107 is connected It connects.The power port of Board Under Test BYQ5615 is connected with the positive HV+ of motherboard power supply, cathode HV-.
Step 2: will be placed into insulating box by side plate.Then constant temperature box cover is shut, power supply is opened, insulating box is set Temperature, enable Board Under Test as early as possible, expose defect as far as possible, and be recorded in storage unit for offline search.
Step 3: user passes through the 6th button S6 and the 7th button S7 setting aging moulds in main control singlechip circuit 102 Then formula passes through the first button S1, the second button S2, third button S3, the 4th button in display button interface circuit 202 The model of S4, the 5th button S5 setting Board Under Tests, and open monitoring mode.First singlechip in main control singlechip circuit 102 U3 controls signal accordingly according to pre-set programs to the first connecting terminal block J1 in drive signal interface circuit 103, makes Board Under Test It is powered up from output port to fictitious load.First digital voltage gauge outfit BK1, the second digital voltmeter in current sampling circuit 104 Head BK2, third digital voltage gauge outfit BK3 and the 4th digital voltage gauge outfit BK4 show four current road electric currents.Meanwhile simulation is negative Voltage in load passes through in the 19th connecting terminal block J19, memory cell signal interface circuit 206 in output interface circuit 107 15th connecting terminal block J15 is transferred to feedback signal conversion circuit 205 and is converted into switching value, is transmitted further to memory cell data Processing circuit 203 is handled, if component is normal, will detect code includes the number in storage unit display circuit 201 On pipe M1；If wrong, by the error code detected include on the charactron M1 of storage unit display circuit 201, And store the error code detected into storage chip U5 in data storage circuit 204, and memory cell data is handled Second buzzer LS2 sends out alarm in circuit 203.
The present invention is as follows to the operation principle for being carried out aging by side plate of model BYQ5071：
Step 1: the control port of the second connecting terminal block J2 and Board Under Test in drive signal interface circuit 103 is connected. The output port of the 22nd connecting terminal block J22 and Board Under Test in output interface circuit 107 are connected.By output interface electricity The auxiliary output terminal mouth of the 20th connecting terminal block J20 and Board Under Test in road 107 connect.By the power port of Board Under Test and master Positive HV+, the cathode HV- of plate power supply are connected.
Step 2: will be placed into insulating box by side plate.Then constant temperature box cover is shut, power supply is opened, insulating box is set Temperature, enable Board Under Test as early as possible, expose defect as far as possible, and be recorded in storage unit for offline search.
Step 3: user passes through the 6th button S6 and the 7th button S7 setting aging moulds in main control singlechip circuit 102 Then formula passes through the first button S1, the second button S2, third button S3, the 4th button in display button interface circuit 202 The model of S4, the 5th button S5 setting Board Under Tests, and open monitoring mode.First singlechip in main control singlechip circuit 102 U3 controls signal accordingly according to pre-set programs to the second connecting terminal block J2 in drive signal interface circuit 103, makes Board Under Test It is powered up from output port to fictitious load.First digital voltage gauge outfit BK1, the second digital voltmeter in current sampling circuit 104 Head BK2, third digital voltage gauge outfit BK3 and the 4th digital voltage gauge outfit BK4 show four current road electric currents.
Meanwhile Board Under Test is also power-up from auxiliary output terminal mouth to fictitious load, and accessory channel output signal instruction electricity The LED light on road 109 corresponds to the working condition of instruction auxiliary output terminal mouth.Voltage on fictitious load passes through output interface electricity The 15th connecting terminal block J15 is transferred in the 19th connecting terminal block J19, memory cell signal interface circuit 206 in road 107 Feedback signal conversion circuit 205 is simultaneously converted into switching value, is transmitted further to memory cell data processing circuit 203 and is handled, such as Fruit component is normal, then includes on the charactron M1 of storage unit display circuit 201 by detection code；It, will if wrong The error code detected is shown on the charactron M1 of storage unit display circuit 201, and the error code detected is deposited It stores up in data storage circuit 204 in storage chip U5, and the second buzzer LS2 in memory cell data processing circuit 203 Send out alarm.
The present invention is as follows to the operation principle for being carried out aging by side plate of model BYQ5078：
Step 1: the control port of third connecting terminal block J3 and Board Under Test in drive signal interface circuit 103 is connected. The output port of the 21st connecting terminal block J21 and Board Under Test in output interface circuit 107 are connected.By the electricity of Board Under Test Source port is connected with the positive HV+ of motherboard power supply, cathode HV-.
Step 2: will be placed into insulating box by side plate.Then constant temperature box cover is shut, power supply is opened, insulating box is set Temperature, enable Board Under Test as early as possible, expose defect as far as possible, and be recorded in storage unit for offline search.
Step 3: user passes through the 6th button S6 and the 7th button S7 setting aging moulds in main control singlechip circuit 102 Then formula passes through the first button S1, the second button S2, third button S3, the 4th button in display button interface circuit 202 The model of S4, the 5th button S5 setting Board Under Tests, and open monitoring mode.First singlechip in main control singlechip circuit 102 U3 controls signal accordingly according to pre-set programs to third connecting terminal block J3 in drive signal interface circuit 103, makes Board Under Test It is powered up from output port to fictitious load.First digital voltage gauge outfit BK1, the second digital voltmeter in current sampling circuit 104 Head BK2, third digital voltage gauge outfit BK3 and the 4th digital voltage gauge outfit BK4 show four current road electric currents.Meanwhile simulation is negative Voltage in load passes through in the 19th connecting terminal block J19, memory cell signal interface circuit 206 in output interface circuit 107 15th connecting terminal block J15 is transferred to feedback signal conversion circuit 205 and is converted into switching value, is transmitted further to memory cell data Processing circuit 203 is handled, if component is normal, will detect code includes the number in storage unit display circuit 201 On pipe M1；If wrong, by the error code detected include on the charactron M1 of storage unit display circuit 201, And store the error code detected into storage chip U5 in data storage circuit 204, and memory cell data is handled Second buzzer LS2 sends out alarm in circuit 203.

Claims (10)

  1. The driver circuit plate high temperature accelerated test aging equipment of 1.PCR instruments, including host and insulating box；It is characterized in that：Institute The host stated includes bottom case, panel, motherboard power supply, control mainboard, cooling fan and fictitious load group；The fictitious load group Including the first fictitious load, the second fictitious load, third fictitious load, the 4th fictitious load, the 5th fictitious load, the 6th simulation Load, the 7th fictitious load and the 8th fictitious load；Cooling fan, the first fictitious load, the second fictitious load, third simulation are negative Load, the 4th fictitious load, the 5th fictitious load, the 6th fictitious load, the 7th fictitious load, the 8th fictitious load, motherboard power supply And control mainboard is each attached in bottom case；Panel is fixed on the side of bottom case；The insulating box include outer housing, temperature controller and Heating wire；Bottom case is fixed in the outer housing and host；Temperature controller is mounted on the side of outer housing；Heating wire is fixed on inner casing The inside of body；Heating wire is connected with temperature controller；
    The control mainboard includes power-switching circuit, main control singlechip circuit, drive signal interface circuit, current sampling electricity Road, main channel output indicating circuit, fan drive circuit, output interface circuit, accessory channel output signal indicating circuit, storage Unit display circuit, display button interface circuit, memory cell data processing circuit, data storage circuit, feedback signal turn Change circuit and memory cell signal interface circuit；Power-switching circuit passes through power voltage step down module, the first voltage stabilizing chip and second Voltage stabilizing chip is drive signal interface circuit, main control singlechip circuit, current sampling circuit, fan drive circuit, storage unit Display circuit, memory cell data processing circuit, data storage circuit and the power supply of feedback signal conversion circuit；Main control singlechip Circuit sends drive signal by first singlechip to drive signal interface circuit；Current sampling circuit passes through the first digital voltage Gauge outfit, the second digital voltage gauge outfit, third digital voltage gauge outfit, the 4th digital voltage gauge outfit show respectively the first fictitious load, Second fictitious load, third fictitious load, the 4th fictitious load both ends voltage value；It includes four that main channel, which exports indicating circuit, Independent output indicating unit；Four independent output indicating units show the first fictitious load, the second simulation by luminous tube respectively Current direction in load, third fictitious load, the 4th fictitious load；Fan drive circuit is driven by switching regulator IC to be dissipated Air-heater；The model of Board Under Test is transferred to memory cell data processing circuit by display button interface circuit by button；First Fictitious load, the second fictitious load, third fictitious load, the 4th fictitious load, the 5th fictitious load, the 6th fictitious load, Seven fictitious loads, the 8th fictitious load voltage value be transferred to after output interface circuit and memory cell signal interface circuit Feedback signal conversion circuit；After feedback signal conversion circuit converts the voltage value received to switching value by photoelectrical coupler It is transferred to memory cell data processing circuit；Memory cell data processing circuit is connected with storage unit display circuit.
  2. 2. the driver circuit plate high temperature accelerated test aging equipment of PCR instrument according to claim 1, it is characterised in that： The host further includes Board Under Test power supply and host flip plate；The Board Under Test power supply is fixed in bottom case；The host The one side edge of flip plate and the top of bottom case are hinged；First fictitious load, the second fictitious load, third simulation are negative Load, the 4th fictitious load, the 5th fictitious load, the 6th fictitious load, the 7th fictitious load and the 8th fictitious load are all made of Huang Golden aluminum casing resistor；Four angles of the bottom case bottom surface are fixed respectively with four rubber blocks.
  3. 3. the driver circuit plate high temperature accelerated test aging equipment of PCR instrument according to claim 1, it is characterised in that： The power-switching circuit includes the first voltage stabilizing chip, the second voltage stabilizing chip and power voltage step down module；The power voltage step down The model SUCS102412C of module；The model SP1117M3-3.3 of first voltage stabilizing chip；Second voltage stabilizing The model NCP1117DT50G of chip；It is positive, the 5th diode D5 negative that 1 pin of power voltage step down module connects motherboard power supply Pole, the anode of the first capacitance C1 and the second capacitance C2 one end, 2,3 pins meet the cathode of motherboard power supply, the 5th diode D5 Anode, the first capacitance C1 cathode and the second capacitance C2 other ends, 4 pins meet the anode of the 7th capacitance C7, third capacitance C3 One end, 1 pin of the first voltage stabilizing chip and 1 pin of the second voltage stabilizing chip, 5 pins are hanging, 6 pins and the 7th capacitance C7's The other end of cathode and third capacitance C3 are connected and are grounded；3 pins of the first voltage stabilizing chip connect one end and of the 4th capacitance C4 The anode of eight capacitance C8；2 pins, the other end of the 4th capacitance C4 and the cathode of the 8th capacitance C8 of first voltage stabilizing chip connect Ground；3 pins of the second voltage stabilizing chip connect one end of the 6th capacitance C6 and the anode of the 9th capacitance C9；Draw the 2 of second voltage stabilizing chip The cathode of foot, the other end of the 6th capacitance C6 and the 9th capacitance C9 is grounded；3 pins of the first voltage stabilizing chip are power supply conversion electricity The 3.3V output ends on road；3 pins of the second voltage stabilizing chip are the 5V output ends of power-switching circuit.
  4. 4. the driver circuit plate high temperature accelerated test aging equipment of PCR instrument according to claim 1, it is characterised in that： Main control singlechip circuit includes first singlechip；The model P89V51 of first singlechip；29 pins of first singlechip connect electricity The 5V output ends of power-switching circuit, 16 pins ground connection, 38 pins connect the 5V output ends of power-switching circuit, the 5th capacitance C5 one It holds, the common pin of the first exclusion and the second exclusion；The other end of 5th capacitance C5 is grounded；Four normal pins of the first exclusion It is respectively connected with 34,35,36,37 pins of first singlechip；Four normal pins of the second exclusion and the 30 of first singlechip, 31,32,33 pins are respectively connected with；One end of 32,33 pins and the 6th button and the 7th button of first singlechip is respectively connected with； The other end of 6th button and the 7th button is grounded；4 pins of first singlechip connect one end and the tenth electricity of first resistor R1 Hold the cathode of C10；The other end of first resistor R1 is grounded；The anode of tenth capacitance C10 connects the 5V output ends of power-switching circuit； 14 pins of first singlechip connect one end of the first crystal oscillator Z1 and the 11st capacitance C11, and 15 pins meet the another of the first crystal oscillator Z1 End and one end of the 12nd capacitance C12；11st capacitance C11 and the 12nd capacitance C12 other ends are grounded；First singlechip 12 pins connect the cathode of the first buzzer；The anode of first buzzer connects the 5V output ends of power-switching circuit；First singlechip 18 pins connect one end of the 7th resistance R7, the anode of the 9th luminous tube D9 of another termination of the 7th resistance R7, the 9th luminous tube The cathode of D9 is grounded；19 pins of first singlechip connect one end of the 8th resistance R8, and another termination the 8th of the 8th resistance R8 is sent out The anode of light pipe D8, the cathode ground connection of the 8th luminous tube D8；20 pins of first singlechip connect one end of the 9th resistance R9, and the 9th The anode of the 7th luminous tube D7 of another termination of resistance R9, the cathode ground connection of the 7th luminous tube D7；21 pins of first singlechip One end of the tenth resistance R10 is connect, the anode of the 6th luminous tube D6 of another termination of the tenth resistance R10, the 6th luminous tube D6's is negative Pole is grounded；1,3,8,9,10,11,30,34,35,36,37 pins of first singlechip are respectively the first of main control singlechip circuit Control output end to the 11st control output end；41,42,43,44 pins of first singlechip are respectively main control singlechip circuit The first data output end to the 4th data output end；31 pins of first singlechip are the signal interaction of master control single chip circuit End；Remaining pin of first singlechip is hanging；
    Drive signal interface circuit includes the first connecting terminal block, the second connecting terminal block and third connecting terminal block；First connects The 4th data that 1 pin of line terminals row, the second connecting terminal block and third connecting terminal block connect main control singlechip circuit are defeated Outlet, 3 pins connect the third data output end of main control singlechip circuit, and 5 pins connect the first number of main control singlechip circuit According to output end；9 pins connect the second data output end of main control singlechip circuit, and 13 pins connect the of main control singlechip circuit 11 control output ends, 15 pins connect the tenth control output end of main control singlechip circuit, and 25 pins connect main control singlechip Second control output end of circuit, 26 pins connect the first control output end of main control singlechip circuit, 2,4,6,8,10,12, 14,16,18,20,22,24 and 29 pins connect the 3.3V output ends of power-switching circuit；
    17 pins of the first connecting terminal block, 27 pins of the second connecting terminal block and third connecting terminal block connect master control monolithic The third control output end on electromechanical road；First connecting terminal block, 28 pins of the second connecting terminal block and third connecting terminal block The 19th pin connect the 4th control output end of main control singlechip circuit；11 pins of the first connecting terminal block connect third data Output end, 17 pins connect the 9th control output end of main control singlechip circuit, and 19 pins connect the 8th control of main control singlechip circuit Output end processed；7 pins of third connecting terminal block connect the 7th control output end of main control singlechip circuit, and 27 pins connect master control 6th control output end of single chip circuit, 28 pins connect the 5th control output end of main control singlechip circuit, 35 pins ground connection； Remaining pin of first connecting terminal block, the second connecting terminal block and third connecting terminal block is hanging.
  5. 5. the driver circuit plate high temperature accelerated test aging equipment of PCR instrument according to claim 1, it is characterised in that： Current sampling circuit includes the first power conversion chip, second source conversion chip, third power conversion chip, the 4th power supply turn Change chip, the first digital voltage gauge outfit, the second digital voltage gauge outfit, third digital voltage gauge outfit and the 4th digital voltage gauge outfit； First power conversion chip, second source conversion chip, the model of third power conversion chip and the 4th power conversion chip are equal For NMK0505SAC；First digital voltage gauge outfit, the second digital voltage gauge outfit, third digital voltage gauge outfit and the 4th digital voltage The model of gauge outfit is FY5140B；First power conversion chip, second source conversion chip, third power conversion chip and 1 pin of four power conversion chips connects the 5V output ends of power-switching circuit, and 2 pins are grounded；
    3 pins of the first power conversion chip connect the first terminals of the first fictitious load, the 37th resistance R37, the 20th One end of capacitance C20,2 pins of the first digital voltage gauge outfit, one end of resistive element and movable contact in the first potentiometer；First electricity 4 pins of source conversion chip connect the other end of the 37th resistance R37 and 3 pins of the first digital voltage gauge outfit；First current potential One end of the 29th resistance R29 of another termination of resistive element in device；29th resistance R29's and the 20th capacitance C20 is another One end connects one end of the 33rd resistance R33 and 1 pin of the first digital voltage gauge outfit；33rd resistance R33's is another Terminate the second terminals of the first fictitious load；
    3 pins of second source conversion chip connect the first terminals of the second fictitious load, the 38th resistance R38, the 20th One end of one capacitance C21,2 pins of the second digital voltage gauge outfit, one end of resistive element and movable contact in the second potentiometer；Second 4 pins of power conversion chip connect the other end of the 38th resistance R38 and 3 pins of the second digital voltage gauge outfit；Second electricity One end of the 30th resistance R30 of another termination of the interior resistive element of position device；30th resistance R30's and the 21st capacitance C21 The other end connects one end of the 34th resistance R34 and 1 pin of the second digital voltage gauge outfit；34th resistance R34 it is another Second terminals of one the second fictitious load of termination；
    3 pins of third power conversion chip connect the first terminals of third fictitious load, the 39th resistance R39, the 20th One end of two capacitance C22,2 pins of third digital voltage gauge outfit, one end of resistive element and movable contact in third potentiometer；Third 4 pins of power conversion chip connect the other end of the 39th resistance R39 and 3 pins of third digital voltage gauge outfit；Third electricity One end of the 31st resistance R31 of another termination of the interior resistive element of position device；31st resistance R31 and the 22nd capacitance The other end of C22 connects one end of the 35th resistance R35 and 1 pin of third digital voltage gauge outfit；35th resistance R35 Third fictitious load the second terminals；
    3 pins of the 4th power conversion chip connect the first terminals of the 4th fictitious load, the 40th resistance R40, the 23rd One end of capacitance C23,2 pins of the 4th digital voltage gauge outfit, one end of resistive element and movable contact in the 4th potentiometer；4th electricity 4 pins of source conversion chip connect the other end of the 40th resistance R40 and 3 pins of the 4th digital voltage gauge outfit；4th potentiometer Interior resistive element the 32nd resistance R32 of another termination one end；32nd resistance R32's and the 23rd capacitance C23 The other end connects one end of the 36th resistance R36 and 1 pin of the 4th digital voltage gauge outfit；36th resistance R36's is another Second terminals of one the 4th fictitious load of termination；
    Independent output indicating unit includes TVS pipe D1；One end of a 13rd capacitance C13 of termination of TVS pipe D1, the 20th shine The anode of the cathode of pipe D20, the 24th luminous tube D24；The 24th resistance R24 of another termination of TVS pipe D1,3rd resistor The other end of one end of R3 and the 13rd capacitance C13；The 20th luminous tube D20 of another termination of 24th resistance R24 is just The cathode of pole and the 24th luminous tube D24；
    That end of TVS pipe D1 far from 3rd resistor R3 and the first fictitious load, the second simulation in four independent output indicating units Load, third fictitious load, the 4th fictitious load the first terminals be respectively connected with；Third in four independent output indicating units That end of resistance R3 far from TVS pipe D1 and the first fictitious load, the second fictitious load, third fictitious load, the 4th fictitious load The second terminals be respectively connected with；TVS pipe D1 is respectively close to that end of 3rd resistor R3 in four independent output indicating units First indication output end of main channel output indicating circuit, the second indication output end, third indication output end, the 4th instruction output End.
  6. 6. the driver circuit plate high temperature accelerated test aging equipment of PCR instrument according to claim 1, it is characterised in that： It includes switching regulator IC and the 6th connecting terminal block to load cooling fan driving circuit；6th connecting terminal block is two and connects Line terminals are arranged；The model LM2576D2T-ADJR4G of switching regulator IC；1 pin of switching regulator IC connects motherboard power supply The anode of anode and the 17th capacitance C17,3 and 5 pins connect the cathode of motherboard power supply, the cathode of the 17th capacitance C17, second 18 resistance R28, one end of the 19th capacitance C19, the cathode of the 18th capacitance C18 and the anode of the 28th diode D28； 2 pins of switching regulator IC connect the cathode of the 28th diode D28 and one end of inductance；Another termination the 18th of inductance The anode of capacitance C18, the other end of the 19th capacitance C19, one of one end of second resistance R2 and the 6th connecting terminal block connect Line end；The cathode of the wiring termination motherboard power supply of 6th connecting terminal block；The confession of 6th connecting terminal block and cooling fan Electrical interface is connected；One end of resistive element and movable contact in the 5th potentiometer of another termination of second resistance R2；Switching regulator IC 4 pins connect the 5th potentiometer interior resistive element the other end and the 28th resistance R28 the other end.
  7. 7. the driver circuit plate high temperature accelerated test aging equipment of PCR instrument according to claim 1, it is characterised in that： Output interface circuit includes the 19th connecting terminal block, the 20th connecting terminal block, the 21st connecting terminal block, the 22nd Connecting terminal block and the 23rd connecting terminal block；1,3,5,7 pins of the 19th connecting terminal block and main channel output indicate The first indication output end, the second indication output end, third indication output end, the 4th indication output end of circuit are respectively connected with, 2, 4, the first terminals difference of 6,8 pins and the first fictitious load, the second fictitious load, the 4th fictitious load of third fictitious load It is connected, 9 pins connect the signal interaction end of main control singlechip circuit, and 10 pins connect the anode of motherboard power supply, 17,18,19,20 pins With the first terminals of the 5th fictitious load, the first terminals of the 6th fictitious load, the 7th fictitious load the first terminals, First terminals of the 8th fictitious load are respectively connected with；5th fictitious load, the 6th fictitious load, the 7th fictitious load and the 8th Second terminals of fictitious load connect the anode of motherboard power supply；
    The of 1,2,3,4 pins of the 20th connecting terminal block and the second terminals of the first fictitious load, the first fictitious load One terminals, the second terminals of the second fictitious load, the second fictitious load the first terminals be respectively connected with；
    5,6 and 7 pins of the 22nd connecting terminal block connect the first terminals of the 5th fictitious load, 10,11 and 12 pins Connecing the first terminals of the 6th fictitious load, 18,19 and 20 pins connect the first terminals of the 7th fictitious load, and 26,27 And 28 pin connect the first terminals of the 8th fictitious load, 32,33 and 34 pins connect the cathode of motherboard power supply；22nd Remaining pin of connecting terminal block is hanging；
    1,2,9 and 10 pins of the 21st connecting terminal block connect the second terminals of the first fictitious load, and 3,4,11 and 12 Pin connects the first terminals of the first fictitious load, and 5,6,13 and 14 pins connect the second terminals of the second fictitious load, 7,8,15 and 16 pins connect the first terminals of the second fictitious load；
    1,2,3,4,5,6,7,8 pins of the 23rd connecting terminal block and the second terminals, the first mould of the first fictitious load First terminals of quasi- load, the second terminals of the second fictitious load, the first terminals of the second fictitious load, third simulation Second terminals of load, the first terminals of third fictitious load, the second terminals of the 4th fictitious load, the 4th simulation are negative The first terminals carried are respectively connected with；10,12,14,16 pins of the 23rd connecting terminal block and the of the 5th fictitious load The first of one terminals, the first terminals of the 6th fictitious load, the first terminals of the 7th fictitious load, the 8th fictitious load Terminals；
    Display button interface circuit includes the 4th connecting terminal block；8,10,12,14,16 pins of the 4th connecting terminal block and One button, the second button, third button, the 4th button, the 5th button one end be respectively connected with；First button, the second button, The other end of three buttons, the 4th button and the 5th button is grounded；11 and 13 pins of the 4th connecting terminal block connect power supply and turn The 5V output ends of circuit are changed, 7 and 9 pins are grounded, the first signal input part of 1,3,5 pins and storage unit display circuit, Second signal input terminal, third signal input part are respectively connected with；
    Memory cell signal interface circuit includes the 15th connecting terminal block and the 16th connecting terminal block；15th connecting terminal 7 and 9 pins of row are grounded, and 11 and 13 pins connect the 5V output ends of power-switching circuit, 1,3,5 pins and number of memory cells Show that output end, the second display output end, the first display output end are respectively connected with according to the third of processing circuit；15th terminals 2,4,6,8,10,12,14,16 pins of son row and the 13rd signal input part of memory cell data processing circuit to the 20th Signal input part is respectively connected with；
    9 pins of the 16th connecting terminal block connect the signal interaction end of memory cell data processing circuit；16th connecting terminal Four third analog input ends of 1,3,5,7 pins and feedback signal conversion circuit of row are respectively connected with；16th terminals Four the 4th analog input ends of 2,4,6,8 pins and feedback signal conversion circuit of son row are respectively connected with；16th wiring First analog input end of the reversed feedback signal conversion circuit of 10 pins of terminal block；16th connecting terminal block 17,18, 19, four the second analog input ends of 20 pins and feedback signal conversion circuit are respectively connected with；
    A piece 20 core wire beams of 20 pins of the 19th connecting terminal block and 20 pins of the 16th connecting terminal block It is respectively connected with；20 pins of the 4th connecting terminal block and piece 20 core wires of 20 pins for the 15th connecting terminal block Beam is respectively connected with.
  8. 8. the driver circuit plate high temperature accelerated test aging equipment of PCR instrument according to claim 1, it is characterised in that： Accessory channel output signal indicating circuit include the 16th luminous tube D16, the 17th luminous tube D17, the 18th luminous tube D18 and 19th luminous tube D19；16th luminous tube D16, the 17th luminous tube D17, the 18th luminous tube D18, the 19th luminous tube The anode of D19 and one end of eleventh resistor R11, twelfth resistor R12, thirteenth resistor R13, the 14th resistance R14 are distinguished It is connected；Eleventh resistor R11, twelfth resistor R12, thirteenth resistor R13 and the 14th resistance R14 the other end connect mainboard The anode of power supply, the 16th luminous tube D16, the 17th luminous tube D17, the 18th luminous tube D18, the 19th luminous tube D19 The first terminals, the first terminals of the 6th fictitious load, the first of the 7th fictitious load of cathode and the 5th fictitious load connect Line end, the 8th fictitious load the first terminals be respectively connected with.
  9. 9. the driver circuit plate high temperature accelerated test aging equipment of PCR instrument according to claim 1, it is characterised in that： Memory cell data processing circuit includes second singlechip；The model P89V51 of second singlechip；Draw the 29 of second singlechip Foot connects the 5V output ends of power-switching circuit, 16 pins ground connection, and 38 pins connect the 5V output ends of power-switching circuit, the 25th One end of capacitance C25, the common pin of third exclusion and the 4th exclusion；The other end of 25th capacitance C25 is grounded；Third is arranged Four normal pins of resistance and 34,35,36,37 pins of second singlechip are respectively connected with；Four normal pins of the 4th exclusion It is respectively connected with 30,31,32,33 pins of second singlechip；4 pins of second singlechip connect one end of the 15th resistance R15 And the 26th capacitance C26 cathode；The other end of 15th resistance R15 is grounded；The anode of 26th capacitance C26 connects power supply The 5V output ends of conversion circuit；14 pins of second singlechip connect one end of the second crystal oscillator and the 27th capacitance C27,15 pins Connect the other end of the second crystal oscillator and one end of the 28th capacitance C28；27th capacitance C27 and the 28th capacitance C28 are another One end is grounded；32 pins of second singlechip connect the cathode of the second buzzer；The anode of second buzzer connects power supply conversion electricity The 5V output ends on road；40,41,42,43,44,1,2,3,5,7,8,9,18,19,20,21,22,23,24, the 25 of second singlechip Pin is respectively the first signal input part to the 20th signal input part of memory cell data processing circuit；Second singlechip 30,31 pins are respectively the IIC clock ends of memory cell data processing circuit, IIC bi-directional datas end；Second singlechip 35, 36,37 pins be respectively the first display output end of memory cell data processing circuit, the second display output end, third show it is defeated Outlet；33 pins of second singlechip are the signal interaction end of memory cell data processing circuit；
    Storage unit display circuit includes digital pipe driving chip sum number code pipe；The model TM1623 of digital pipe driving chip； The model S02848A-B of charactron；9 and 25 pins of digital pipe driving chip connect the 24th capacitance C24 one end and The 5V output ends of power-switching circuit；26,29,32 pins of digital pipe driving chip and the other end of the 24th capacitance C24 It is grounded；10,11,12,14,15,16,17,18,19,20,23,24,27,28,30,31 pins of digital pipe driving chip with 14,16,13,3,5,11,15,7,12,9,10,4,8,6,2,1 pin of charactron M1 is respectively connected with；Digital pipe driving chip 3,4,5 pins are respectively the first signal input part, second signal input terminal, third the signal input of storage unit display circuit End；
    Data storage circuit includes storage chip；The model 24C01 of storage chip；1,2,3,4 and 7 pins of storage chip It is grounded, 8 pins connect one end of the 29th capacitance C29 and the 5V output ends of power-switching circuit；29th capacitance C29's The other end is grounded；5,6 pins of storage chip and the IIC bi-directional datas end of memory cell data processing circuit, IIC clock ends point Xiang Lian not.
  10. 10. the driver circuit plate high temperature accelerated test aging equipment of PCR instrument according to claim 1, it is characterised in that： Feedback signal conversion circuit includes four the first signal feedback units and four second signal feedback units；First signal feedback Member includes the first optocoupler；The first input end of first optocoupler connects one end of the 45th resistance R45, and the first output end is grounded, the One end of two the 46th resistance R46 of output termination；The 5V of another termination power-switching circuit of 46th resistance R46 is exported End；
    Second signal feedback unit includes the second optocoupler and third optocoupler；The first input end of second optocoupler and the of third optocoupler Two input terminals connect one end of the 16th resistance R16；Second input terminal of the second optocoupler and the first input end phase of third optocoupler Even；First output end of the second optocoupler and third optocoupler is grounded；The second output terminal of second optocoupler connects the 17th resistance R17's One end；The 5V output ends of another termination power-switching circuit of 17th resistance R17；The second output terminal of third optocoupler connects the tenth One end of eight resistance R18；The 5V output ends of another termination power-switching circuit of 18th resistance R18；
    That end far from the first optocoupler of the 45th resistance R45 links together in four the first signal feedback units, as First analog input end of feedback signal conversion circuit；Second input terminal of the first optocoupler in four the first signal feedback units Respectively four the second analog input ends of feedback signal conversion circuit；First optocoupler in four the first signal feedback units Second output terminal and the first signal input part to the fourth signal input terminal of memory cell data processing circuit are respectively connected with；
    That end far from the second optocoupler of the 16th resistance R16 is respectively feedback signal conversion in four second signal feedback units Four third analog input ends of circuit；The second input terminal of the second optocoupler is respectively anti-in four second signal feedback units Four the 4th analog input ends of feedback signal conversion circuit；Second output of the second optocoupler in four second signal feedback units End, the second output terminal of third optocoupler and the 5th signal input part to the tenth binary signal of memory cell data processing circuit input End is respectively connected with.
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CN111580574A (en) * 2019-11-25 2020-08-25 东莞市腾迪机电科技有限公司 Process control and execution integrated controller and process control method
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CN113176493A (en) * 2021-04-22 2021-07-27 海光信息技术股份有限公司 Chip test mainboard, test system and test method
CN118465495A (en) * 2024-05-06 2024-08-09 中国电子产品可靠性与环境试验研究所（（工业和信息化部电子第五研究所）（中国赛宝实验室）） Test circuit and chip test method

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