CN208335572U - The three non-linear cai's circuits of rank asinh - Google Patents
The three non-linear cai's circuits of rank asinh Download PDFInfo
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- CN208335572U CN208335572U CN201820337620.8U CN201820337620U CN208335572U CN 208335572 U CN208335572 U CN 208335572U CN 201820337620 U CN201820337620 U CN 201820337620U CN 208335572 U CN208335572 U CN 208335572U
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Abstract
A kind of three non-linear cai's circuits of rank asinh, its the first, second and third operational amplifier A1, A2, A3 constitute linear inverting integrator, fourth, fifth operational amplifier A4, A5 constitutes linear inverting amplifier, and first, fourth, three operational amplifier A1, A4, A3 output ends are respectively chaotic signal output end X1, X2, X3；Inverting integrator A1 is connect with amplifier A5, inverting integrator A2 respectively；Inverting integrator A2 is connect with the first operational amplifier A1, four-operational amplifier A4 respectively；Inverting integrator A3 is connect with second operational amplifier A2；The utility model is chaos circuit, and the various waveforms, phasor and chaos that can export the non-linear Chua's chaotic circuit of asinh develop curve, may be constructed chaotic secret communication system.
Description
Technical field
The invention belongs to nonlinear circuits, often claim chaos circuit, and in particular to a kind of three non-linear Cai of rank asinh
Family name's circuit.
Background technique
Cai's circuit is a kind of chaos circuit being widely studied in recent years, there is classical cai's circuit, deformation Cai Shi electricity
Road, to coupling cai's circuit, function congruence cai's circuit, topoligical equivalence cai's circuit, the three non-linear cai's circuits of rank hyperbolic sine
Deng, in the cai's circuit of these types there are no based on the diode for working in asinh nonlinear state Cai Shi electricity
Road is the deficiency of existing chaos circuit technology.
Summary of the invention
Present invention aim to address the deficiencies of the above problem, provide one kind by five operational amplifiers and two diodes
The three non-linear cai's circuits of rank asinh of composition, can export 3 waveform diagrams and 3 phasors, can export stable
The double vortex chaotic signals of three ranks.
The technical solution adopted by the present invention to solve the technical problems is: the three non-linear cai's circuits of rank asinh,
It is made of and constitutes with two diodes five operational amplifiers, in which: the first operational amplifier (A1) inverting input terminal and third
Resistance (R3), the 4th resistance (R4) connect, non-inverting input terminal ground connection connects in parallel first between inverting input terminal and output end
Capacitor (C1) and first resistor (R1), output end and second resistance (R2), the 5th resistance (R5) connection, output end is X1 defeated
Outlet；Second operational amplifier (A2) inverting input terminal and the 5th resistance (R5), the 6th resistance (R6) connection, homophase input termination
Ground connects the 7th resistance (R in parallel between inverting input terminal and output end7) and the second capacitor (C2), output end and the 4th electricity
Hinder (R4), the 8th resistance (R8) connection；Third operational amplifier (A3) inverting input terminal and the tenth resistance (R10) connection, with mutually defeated
Enter end ground connection, third capacitor (C is connected between inverting input terminal and output end3), output end and the 6th resistance (R6) connection, output
End is X3 output end；Four-operational amplifier (A4) inverting input terminal and the 8th resistance (R8) connection, non-inverting input terminal ground connection,
The 9th resistance (R is connected between inverting input terminal and output end9), output end and the tenth resistance (R10) connection, output end is X2
Output end；5th operational amplifier (A5) inverting input terminal and second resistance (R2) connection, non-inverting input terminal ground connection, anti-phase input
Two diodes are connected between end and output end, two diodes are connected in inverse parallel, output end and 3rd resistor (R3) even
It connects.
First resistor (the R1) it is variable resistance, the chaos of the three non-linear cai's circuits of rank asinh can be observed
The various curves developed.
The beneficial effects of the present invention are: can export tri- chaotic waves signals of X1, X2 and X3 and X1-X2, X1-X3 with
Tri- chaos phasors of X2-X3；Above-mentioned various chaotic signals can be shown on oscillograph；Pass through certain specific electrical resistances such as first
Resistance (R1) replaced by variable resistance after, thus it is possible to vary the chaotic characteristic of various chaotic signals described above, can be in oscillograph
The various curves of the three non-linear cai's circuits of rank asinh of upper display, can also carry out three non-linear Cai of rank asinh
Various other experiments of family name's circuit.The present invention is suitable for university's chaos education of science, experimental teaching and demonstration, scientific popularization is tested
Demonstration etc..
Detailed description of the invention
Fig. 1 is the non-linear cai's circuit schematic diagram of three rank asinhs.
Fig. 2 is three rank asinh Nonlinear Characteristic Curves.
Fig. 3 is the non-linear cai's circuit X1 waveform diagram of three rank asinhs.
Fig. 4 is the non-linear cai's circuit X2 waveform diagram of three rank asinhs.
Fig. 5 is the non-linear cai's circuit X3 waveform diagram of three rank asinhs.
Fig. 6 is the non-linear cai's circuit X1-X2 output phasor of three rank asinhs.
Fig. 7 is the non-linear cai's circuit X1-X3 output phasor of three rank asinhs.
Specific embodiment
Referring to attached drawing 1, the embodiment of the present invention is made of five operational amplifiers and two diodes, in which: the first fortune
Calculate amplifier A1Inverting input terminal and 3rd resistor R3, the 4th resistance R4Connection, non-inverting input terminal ground connection, inverting input terminal with it is defeated
First capacitor C in parallel is connected between outlet1With first resistor R1, output end and second resistance R2, the 5th resistance R5Connection, it is defeated
Outlet is X1 output end；Second operational amplifier A2Inverting input terminal and the 5th resistance R5, the 6th resistance R6Connection, with mutually defeated
Enter end ground connection, the 7th resistance R in parallel is connected between inverting input terminal and output end7With the second capacitor C2, output end and the 4th electricity
Hinder R4, the 8th resistance R8Connection；Third operational amplifier A3Inverting input terminal and the tenth resistance R10Connection, non-inverting input terminal ground connection,
Third capacitor C is connected between inverting input terminal and output end3, output end and the 6th resistance R6Connection, output end are X3 output
End；Four-operational amplifier A4Inverting input terminal and the 8th resistance R8Connection, non-inverting input terminal ground connection, inverting input terminal and output
The 9th resistance R is connected between end9, output end and the tenth resistance R10Connection, output end is X2 output end；5th operational amplifier
A5Inverting input terminal and second resistance R2Connection, non-inverting input terminal ground connection, connects two two poles between inverting input terminal and output end
Pipe, two diodes are connected in inverse parallel, output end and 3rd resistor R3Connection.
By X1 output end, X2 output end and X3 output end are connected to oscilloscope signal input terminal in Fig. 1 or computer is related
Interface can show the waveform of X1, X2 and X3, be observed using the phasor mode of oscillograph, X1 output end waveform signal such as Fig. 2 institute
Show, X2 output end waveform signal as shown in figure 3, X3 output end waveform signal as shown in figure 4, X1-X2 output end phasor signal such as
Shown in Fig. 5, X1-X3 output end phasor signal is as shown in fig. 6, X2-X3 output end phasor signal is as shown in Figure 7.By Fig. 2 to figure
7, it was demonstrated that effectiveness of the invention.If first resistor (R1) replaced by variable resistance, continuously change resistance value, can observe mixed
The various curves of ignorant differentiation can carry out three rank asinh cai's circuits by two identical circuits by appropriate connection
Synchronization and the various experiments such as chaotic secret communication.
The component parameter of the embodiment of the present invention is as follows: A1、A2、A3、A4、A5Model TL082 or TL084, diode-type
Number be 2CK11, C1=C2=C3=0.01uF, R1=3k Ω (variable resistance), R2=20k Ω, R3=R7=R8=R9=10k
Ω, R4=7.6k Ω, R5=1.2k Ω, R6=1.1k Ω, R10=4.3k Ω.
Claims (2)
1. the three non-linear cai's circuits of rank asinh, it is characterized in that: three-order chaos circuit, by five operational amplifiers and two
A diode is constituted, and exports three waveform diagrams and three two-dimentional phasors, five operational amplifiers and two diodes,
In: the first operational amplifier (A1) inverting input terminal is connect with 3rd resistor (R3), the 4th resistance (R4), homophase input termination
Ground connects first capacitor (C1) and first resistor (R1) in parallel, output end and the second electricity between inverting input terminal and output end
(R2), the connection of the 5th resistance (R5) are hindered, output end is X1 output end；Second operational amplifier (A2) inverting input terminal and the 5th
Resistance (R5), the connection of the 6th resistance (R6), non-inverting input terminal ground connection connect in parallel the 7th between inverting input terminal and output end
Resistance (R7) and the second capacitor (C2), output end are connect with the 4th resistance (R4), the 8th resistance (R8)；Third operational amplifier
(A3) inverting input terminal is connect with the tenth resistance (R10), and non-inverting input terminal ground connection connects the between inverting input terminal and output end
Three capacitors (C3), output end are connect with the 6th resistance (R6), and output end is X3 output end；Four-operational amplifier (A4) reverse phase
Input terminal is connect with the 8th resistance (R8), and non-inverting input terminal ground connection connects the 9th resistance between inverting input terminal and output end
(R9), output end is connect with the tenth resistance (R10), and output end is X2 output end；5th operational amplifier (A5) anti-phase input
End is connect with second resistance (R2), non-inverting input terminal ground connection, two diodes of connection between inverting input terminal and output end, and two
Diode is connected in inverse parallel, and output end is connect with 3rd resistor (R3).
2. the non-linear cai's circuit of three ranks asinh according to claim 1, it is characterized in that: the first resistor
It (R1) is variable resistance.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201820337620.8U CN208335572U (en) | 2018-03-13 | 2018-03-13 | The three non-linear cai's circuits of rank asinh |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201820337620.8U CN208335572U (en) | 2018-03-13 | 2018-03-13 | The three non-linear cai's circuits of rank asinh |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN208335572U true CN208335572U (en) | 2019-01-04 |
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ID=64783109
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201820337620.8U Expired - Fee Related CN208335572U (en) | 2018-03-13 | 2018-03-13 | The three non-linear cai's circuits of rank asinh |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN208335572U (en) |
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2018
- 2018-03-13 CN CN201820337620.8U patent/CN208335572U/en not_active Expired - Fee Related
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| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20190104 Termination date: 20200313 |