CN208297469U - Device testing apparatus and test macro - Google Patents

Device testing apparatus and test macro Download PDF

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Publication number
CN208297469U
CN208297469U CN201821024935.3U CN201821024935U CN208297469U CN 208297469 U CN208297469 U CN 208297469U CN 201821024935 U CN201821024935 U CN 201821024935U CN 208297469 U CN208297469 U CN 208297469U
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Prior art keywords
tested
substrate
testing apparatus
face
pockets
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CN201821024935.3U
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Chinese (zh)
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赵杨
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Dynax Semiconductor Inc
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Dynax Semiconductor Inc
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Abstract

The utility model provides a kind of device testing apparatus and test macro, is related to technical field of semiconductors.Using device testing apparatus provided by the embodiments of the present application, tested device can be placed in the pockets of test board in one of them face to be tested, so that the face to be tested positioned at Different Plane of tested device can be in contact with test board.The device testing apparatus structure is simple, more convenient in progress solderability test using the device testing apparatus, and testing efficiency can be improved, meet the testing requirements of different encapsulation specification devices.

Description

Device testing apparatus and test macro
Technical field
The utility model relates to technical field of semiconductors, in particular to a kind of device testing apparatus and test macro.
Background technique
Solderability be electronic component is carried out, a kind of relatively conventional failtests or test, it is therefore an objective to electricity The Weldability of sub- component is evaluated.For surface mount device (Surface Mounted Device), can be used The method of simulation welding (Surface Mount Process Simulation Test) carries out solderability test.But surface is pasted The device testing apparatus for filling device can not be suitable for testing the device of other encapsulated types.
Utility model content
In view of this, the present invention provides a kind of device testing apparatus and test macros, can be to a variety of encapsulation classes The device of type carries out solderability test.
The technical scheme that the utility model is provided is as follows:
A kind of device testing apparatus, for carrying out solderability test, the device to be tested at least one tested device Part includes multiple faces to be tested, and plane where multiple faces to be tested is located at least two planes, the device testing apparatus Including test board, in which:
The upper surface of the test board is provided at least one pockets, and the pockets are for accommodating one of them The face to be tested, after wherein one face to be tested is accommodated in the pockets, other faces to be tested and institute The upper surface for stating test board is in contact.
Further, the face to be tested includes the bottom face to be tested that can be accommodated in the pockets and use In the non-bottom face to be tested being in contact with the upper surface of the test board;
The pockets include bottom portion of groove and multiple recess edges, plane and the groove where the recess edge Plane where plane and the bottom face to be tested where the distance between plane where bottom, with the non-bottom face to be tested The distance between match.
Further, the tested device includes multiple electrodes, the planar shaped that the electrode is contacted with the test board At the face to be tested, the pockets are contained in described for accommodating one of electrode in one of electrode When in pockets, other electrodes are in contact with the upper surface of the test board.
Further, the tested device includes ontology, bottom electrode and peripheral electrode, and the bottom electrode setting exists The ontology side, the peripheral electrode setting is in plane and the groove-bottom where the ontology side, the recess edge The distance between plane where portion, the surface contacted with the peripheral electrode with the test board and the bottom electrode top surface The distance between place plane matches.
Further, the test board includes first substrate and multiple the second substrates, and the second substrate is arranged described First substrate side, has gap between multiple the second substrates, and the gap between multiple the second substrates forms the pockets.
Further, the first substrate and the second substrate are ceramic wafer.
Further, the face to be tested is located at least three planes, and the multiple the second substrate is stacked, and every layer The thickness of two substrates matches with the distance between plane where the face to be tested.
Further, the length of the first substrate, width are much larger than the thickness of the first substrate.
Further, the length of the second substrate, width are much larger than the thickness of the second substrate.
The utility model additionally provides a kind of test macro, and the test macro includes multiple above-mentioned device detection dresses It sets.
Using device testing apparatus provided by the embodiments of the present application, tested device can be put in one of them face to be tested It sets in the pockets of test board, so that the face to be tested positioned at Different Plane of tested device can be with test board phase Contact.The device testing apparatus structure is simple, is carrying out more convenient, the Ke Yiti of solderability test using the device testing apparatus High testing efficiency meets the testing requirement of different encapsulation specification devices.
To enable the above objects, features, and advantages of the utility model to be clearer and more comprehensible, preferred embodiment is cited below particularly, and Cooperate appended attached drawing, is described in detail below.
Detailed description of the invention
It, below will be to use required in embodiment in order to illustrate more clearly of the technical solution of the utility model embodiment Attached drawing be briefly described, it should be understood that the following drawings illustrates only some embodiments of the utility model, therefore should not be by Regard the restriction to range as, for those of ordinary skill in the art, without creative efforts, may be used also To obtain other relevant attached drawings according to these attached drawings.
Fig. 1 is a kind of structural schematic diagram of device testing apparatus provided by the embodiment of the utility model.
Fig. 2 is the structural schematic diagram of another device testing apparatus provided by the embodiment of the utility model.
Fig. 3 is a kind of side view signal of the applicable tested device of device testing apparatus provided by the embodiment of the utility model Figure.
Fig. 4 is a kind of the schematic diagram of the section structure of device testing apparatus provided by the embodiment of the utility model.
Fig. 5 is that the side view after a kind of device testing apparatus provided by the embodiment of the utility model is combined with tested device is shown It is intended to.
Fig. 6 is that the vertical view after a kind of device testing apparatus provided by the embodiment of the utility model is combined with tested device is shown It is intended to.
Fig. 7 is the cross-section structure signal after a kind of device testing apparatus brushing solder provided by the embodiment of the utility model Figure.
Fig. 8 is the plan structure signal after a kind of device testing apparatus brushing solder provided by the embodiment of the utility model Figure.
Fig. 9 is to be combined after a kind of device testing apparatus brushing solder provided by the embodiment of the utility model with tested device Structural schematic diagram.
Figure 10 is the structural schematic diagram of another device testing apparatus provided by the embodiment of the utility model.
Figure 11 shows for first substrate in another device testing apparatus shown in Fig. 10 and the structure after the second substrate separation It is intended to.
Figure 12 is the structural schematic diagram of another device testing apparatus provided by the embodiment of the utility model.
Figure 13 is the structural schematic diagram after another device testing apparatus shown in Fig. 10 is combined with tested device.
Icon: 10- device testing apparatus;100- test board;101- pockets;102- first substrate;The second base of 103- Plate;20- tested device;201- ontology;202- bottom electrode;203- peripheral electrode;30- solder.
Specific embodiment
Below in conjunction with attached drawing in the utility model embodiment, the technical scheme in the embodiment of the utility model is carried out clear Chu is fully described by, it is clear that the described embodiments are only a part of the embodiments of the utility model, rather than whole realities Apply example.The component of the utility model embodiment being usually described and illustrated herein in the accompanying drawings can be come with a variety of different configurations Arrangement and design.Therefore, the detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit below The range of claimed invention, but it is merely representative of the selected embodiment of the utility model.Based on the utility model Embodiment, those skilled in the art's every other embodiment obtained without making creative work, all Belong to the range of the utility model protection.
It should also be noted that similar label and letter indicate similar terms in following attached drawing, therefore, once a certain Xiang Yi It is defined in a attached drawing, does not then need that it is further defined and explained in subsequent attached drawing.Meanwhile it is practical new at this In the description of type, term " first ", " second " etc. are only used for distinguishing description, are not understood to indicate or imply relatively important Property.
When testing the solderability of device by simulating welding method, need to use a substrate flat as test Platform.The characteristics of according to the pin of laboratory sample or being evaluated welding surface is brushed on the solder of respective shapes on the substrate.So Afterwards, according to pin or it is evaluated the corresponded manner of welding surface, laboratory sample is placed on substrate.Each pin of device at this time Or it is evaluated welding surface and can be in contact with the solder on ceramic substrate.Later, ceramic substrate is placed together with device above In reflux furnace apparatus, the welding process of device under truth is simulated.Ceramic substrate is taken out later, and device above is taken Under, the solder bonding situation for analyzing each pin under the microscope provides experiment knot according to the criterion of the experimental project Fruit.
This kind of experimental method or experimental substrate at present can only test a certain semiconductor devices, this kind of device It is evaluated welding surface or each pin in the same plane.If the pin of device is in Different Plane, above-mentioned test method is used It will meet difficulty, such device just cannot use the method for simulation welding to carry out solderability test.
In view of this, the embodiment of the present application provides a kind of device testing apparatus 10, for at least one device to be tested Part 20 carries out welding test, and the tested device 20 includes multiple faces to be tested, plane position where multiple faces to be tested In at least two planes, as depicted in figs. 1 and 2, which includes test board 100.The test board 100 Upper surface is provided at least one pockets 101, and the pockets 101 are used to accommodate one of them described face to be tested, After wherein one face to be tested is accommodated in the pockets 101, other faces to be tested and the test board 100 Upper surface be in contact.
The setting position of pockets 101 and quantity can according to test it needs to be determined that, can be set on a test board 100 Set one or more pockets 101.When carrying out welding test, one or more can be placed in a pockets 101 A tested device 20.Device testing apparatus 10 in the embodiment of the present application can carry out the device for including multiple faces to be tested Welding test, multiple faces to be tested of tested device 20 can be located at Different Plane.
In one embodiment, the face to be tested includes that the bottom that can be accommodated in the pockets 101 is waited for Test surfaces and non-bottom face to be tested for being in contact with the upper surface of the test board 100.
The pockets 101 include bottom portion of groove and multiple recess edges, plane where the recess edge with it is described Where plane and the bottom face to be tested where the distance between plane where bottom portion of groove, with the non-bottom face to be tested The distance between plane matches.
It is understood that multiple non-bottom faces to be tested can be in the same plane, bottom face to be tested is located at not In same another plane.When carrying out welding test using device testing apparatus 10, bottom face to be tested can be placed into appearance Groove 101 is received, at this point, multiple non-bottom faces to be tested in the same plane can connect with corresponding recess edge Touching.Also, due to the distance between plane where plane where recess edge and the bottom portion of groove, with non-bottom face to be tested The distance between plane matches where place plane and bottom face to be tested.As shown in Figure 3 and Figure 4, non-bottom face to be tested The distance between plane where place plane and bottom test surfaces is h1, plane where plane where bottom portion of groove and recess edge The distance between be h2.The length of h1 and h2 matches.In the embodiment of the present application, recess edge is on 100 surface of test board Part in addition to groove 101.When part of the test board 100 in addition to pockets 101 is a plane, test board 100 Surface formed pockets 101 recess edge.Match in addition, can also be formed on test board 100 with pockets 101 Step surface, the shape of the step surface can match with the shape in the face to be tested of tested device, to tested device When being tested, a certain face to be tested of tested device can be put into groove, other faces to be tested are placed on step surface On.The fixation to tested device is realized by step surface, and tested device is prevented to be subjected to displacement during the test.At this point, The recess edge of step surface formation pockets 101.
In addition, multiple non-bottom faces to be tested may be located in Different Plane, to such tested device 20 into When row test, in order to enable each face to be tested can be in contact with the solder 30 on test board 100, different recess edges with The distance between bottom portion of groove difference, the distance between different recess edges and bottom portion of groove and the length of above-mentioned h1 match, So that all non-bottom faces to be tested can be recessed with receiving when bottom test surfaces are placed in pockets 101 The side edge of slot 101 is touched.
As shown in Figure 5 and Figure 6, when implementing, one of them in multiple faces to be tested may be accommodated in pockets In 101, it is to be understood that plane where the face to be tested that is contained in pockets 101 be and other faces to be tested where Plane is different.In test, when one of them face to be tested is placed in pockets 101, the tested device 20 Other faces to be tested can be touched with the side edge of pockets 101.The bottom of pockets 101 can with one of them to Face contact is tested, or one of them face to be tested has a certain distance with this, to cover solder in pockets 101 After 30, which can be in contact with solder 30.The edge and 101 bottom of pockets of pockets 101 The distance between can be determined according to the case where different face to be tested of tested device 20.
It as shown in Figure 7 to 9, can be in pockets when using the device testing apparatus 10 in the embodiment of the present application The solder 30 of the certain area of predeterminated position brushing in 101, and the upper table of edge, that is, test board 100 in pockets 101 The brushing shape of the solder 30 of the certain area of predeterminated position brushing in face, solder 30 can be true according to the structure of tested device 20 It is fixed.After the completion of solder 30 is brushed, so that it may tested device 20 is placed in pockets 101, so that tested device 20 bottom face to be tested is in contact with the solder 30 inside pockets 101, other non-bottoms face to be tested and pockets The solder 30 at 101 edges is in contact.Then device testing apparatus 10 can be placed on reflow ovens together with tested device 20 In, and by the temperature condition in control reflow ovens face to be tested is stuck together with corresponding solder 30, thus complete At the welding process in the true welding situation of simulation.After the completion of simulating welding, can be used the equipment such as microscope to it is each to The weld bonds situation of test surfaces provides corresponding test result according to the criterion of the tested device 20.
In another embodiment specific implementation mode, the tested device 20 may include multiple electrodes, the electrode and institute The plane for stating the contact of test board 100 forms the face to be tested, and the pockets 101 are used to accommodate one of electrode, When one of electrode is contained in the pockets 101, other electrodes connect with the upper surface of the test board 100 Touching.
It is detailed, then as shown in figure 3, the tested device 20 may include ontology 201, bottom electrode 202 and periphery Electrode 203, in 201 side of ontology, the peripheral electrode 203 is arranged in the ontology 201 for the setting of bottom electrode 202 Side, the distance between plane where plane where the recess edge and the bottom portion of groove are same with the peripheral electrode 203 The distance between plane matches where 202 top surface of surface and the bottom electrode that the test board 100 contacts.
It is understood that when testing the tested device 20 in this way with multiple electrodes, on test board 100 The width of pockets 101 can match with the size of the bottom electrode 202, allow bottom electrode 202 by card It connects in pockets 101.Pockets 101 can have multiple recess edges, and the quantity of recess edge can be according to periphery The distribution situation of electrode 203 determines that, as shown, there are two recess edges for the tool of pockets 101 in figure, such structure can To be suitable for the case where peripheral electrode 203 is distributed in 201 two sides of ontology.If the peripheral electrode 203 of tested device 20 is distributed In three or more sides, then the recess edge of pockets 101 may be set to be three or more, meanwhile, it is recessed The distance between groove edge and bottom portion of groove match with the distance between peripheral electrode 203 and bottom electrode 202, to survey The peripheral electrode 203 of every side can be in contact with recess edge when examination.
Again as shown in figure 3, between the different peripheral electrodes 203 and bottom electrode 202 of the tested device 20 in figure away from From equal, correspondingly, the distance between two recess edges of pockets 101 and bottom portion of groove can be equal.
When implementing, if forming above-mentioned test board 100 by manufacturing groove on one piece of substrate, simulation welding is being carried out When, due to needing preparatory brushing solder, the pockets 101 formed on one piece of substrate are it is possible that solder painting brushing effects are paid no attention to The case where thinking.If forming test board using two-layer substrate and pockets can present one piece of base when carrying out solder brushing Squeegee section solder on plate after the completion of brushing, then top substrate layer is stacked, then brushes remaining solder, such solder brushing effect Fruit can meet the requirement of simulation welding test.
Therefore, in the embodiment of the present application, as shown in Figure 10 to Figure 13, the test board 100 may include first substrate 102 and multiple the second substrates 103, the second substrate 103 is arranged in 102 side of first substrate, multiple the second substrates 103 Between there is gap, the gap between multiple the second substrates 103 forms the pockets 101.First substrate 102 and the second base Plate 103 can use ceramic wafer, can be glued between the second substrate 103 and first substrate 102 and or glue and.Multiple second The size in the gap between substrate 103 can determine according to the actual size of tested device 20, between the second substrate 103 between The size of the electrode of the size and tested device 20 of gap is to matching.As described above, if the bottom electrode of tested device 20 202 length is L, then the distance between two the second substrates 103 can be slightly larger than L, so that the bottom of tested device 20 Electrode 202 can be placed between two the second substrates 103, place only two the in the bottom electrode 202 of tested device 20 When between two substrates 103, other electrodes of tested device 20 can be in contact with the upper surface of the second substrate 103.Second base The thickness of plate 103 can be determined according to the distance between the peripheral electrode 203 of tested device 20 and bottom electrode 202.Such as figure Shown, the thickness of two the second substrates 103 can be the same or different.
The thickness of the first substrate 102 can be 0.5cm to 1cm.If 102 thickness of first substrate is blocked up, it will affect The heat dissipation of device testing apparatus 10 is easily broken if too thin.It is understood that the length and width of first substrate 102 The length and width of degree and the second substrate 103 is all much larger than the thickness of first substrate 102 or the second substrate 103.In the second base When plate 103 is not bonded with first substrate 102, the second substrate 103 is only stacked on first substrate 102, adjustment that can be more flexible Thickness between multiple the second substrates 103, convenient for reusing.
As shown, the multiple electrodes of tested device 20 are located in two planes, the peripheral electrode of tested device 20 203 are located at the two sides of ontology 201, correspondingly, the second substrate 103 is two, the gap between two the second substrates 103, which is formed, to hold Receive groove 101.When the bottom electrode 202 of tested device 20 is placed between two the second substrates 103, peripheral electrode 203 It can be in contact respectively with two the second substrates 103.
If the face to be tested of tested device 20 is located in three or more planes, it is arranged on first substrate 102 The second substrate 103 can be with for two or more layers, the distance between the thickness of the second substrate 103 of different layers and face to be tested Match.
In conclusion using device testing apparatus 10 provided by the embodiments of the present application, it can be by tested device 20 wherein One face to be tested is placed in the pockets 101 of test board 100 so that tested device 20 be located at Different Plane to Test surfaces can be in contact with test board 100.10 structure of device testing apparatus is simple, is existed using the device testing apparatus 10 It is more convenient to carry out solderability test, testing efficiency can be improved, meets the testing requirement of different encapsulation specification devices.
The above descriptions are merely preferred embodiments of the present invention, is not intended to limit the utility model, for this For the technical staff in field, various modifications and changes may be made to the present invention.It is all in the spirit and principles of the utility model Within, any modification, equivalent replacement, improvement and so on should be included within the scope of protection of this utility model.It should be noted that To: similar label and letter indicate similar terms in following attached drawing, therefore, once determined in a certain Xiang Yi attached drawing Justice does not need then that it is further defined and explained in subsequent attached drawing.
Above description is only a specific implementation of the present invention, but the protection scope of the utility model is not limited to In this, anyone skilled in the art within the technical scope disclosed by the utility model, can readily occur in variation Or replacement, it should be covered within the scope of the utility model.Therefore, the protection scope of the utility model is answered described with power Subject to the protection scope that benefit requires.

Claims (10)

1. a kind of device testing apparatus, which is characterized in that described for carrying out solderability test at least one tested device Tested device includes multiple faces to be tested, and plane where multiple faces to be tested is located at least two planes, the device Test device includes test board, in which:
The upper surface of the test board is provided at least one pockets, and the pockets are for accommodating described in one of them Face to be tested, after wherein one face to be tested is accommodated in the pockets, other faces to be tested and the survey The upper surface of test plate (panel) is in contact.
2. device testing apparatus according to claim 1, which is characterized in that the face to be tested includes that can be accommodated in institute State the face to be tested of the bottom in pockets and the non-bottom face to be tested for being in contact with the upper surface of the test board;
The pockets include bottom portion of groove and multiple recess edges, plane and the bottom portion of groove where the recess edge Where the distance between place plane, with the non-bottom face to be tested where plane and the bottom face to be tested between plane Distance match.
3. device testing apparatus according to any one of claims 1 or 2, which is characterized in that the tested device packet Multiple electrodes are included, the plane that the electrode is contacted with the test board forms the face to be tested, and the pockets are for holding Receive one of electrode, when one of electrode is contained in the pockets, other electrodes and the test board Upper surface be in contact.
4. device testing apparatus according to claim 2, which is characterized in that the tested device includes ontology, bottom Electrode and peripheral electrode, in the ontology side, the peripheral electrode is arranged in the ontology side for the bottom electrode setting, The distance between plane where plane where the recess edge and the bottom portion of groove, with the peripheral electrode with the test The distance between plane matches where the surface of plate contact and the bottom electrode top surface.
5. device testing apparatus according to claim 1, which is characterized in that the test board includes first substrate and multiple The second substrate, the second substrate, which is arranged between the first substrate side, multiple the second substrates, has gap, and multiple second Gap between substrate forms the pockets.
6. device testing apparatus according to claim 5, which is characterized in that the first substrate and the second substrate are ceramics Plate.
7. device testing apparatus according to claim 5, which is characterized in that it is flat that the face to be tested is located at least three Face, the multiple the second substrate are stacked, where the thickness of every layer of the second substrate and the face to be tested between plane away from From matching.
8. device testing apparatus according to claim 5, which is characterized in that the length of the first substrate, width are long-range In the thickness of the first substrate.
9. device testing apparatus according to claim 5, which is characterized in that the length of the second substrate, width are long-range In the thickness of the second substrate.
10. a kind of test macro, which is characterized in that the test macro includes described in multiple claim 1 to 9 any one Device testing apparatus.
CN201821024935.3U 2018-06-29 2018-06-29 Device testing apparatus and test macro Active CN208297469U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201821024935.3U CN208297469U (en) 2018-06-29 2018-06-29 Device testing apparatus and test macro

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201821024935.3U CN208297469U (en) 2018-06-29 2018-06-29 Device testing apparatus and test macro

Publications (1)

Publication Number Publication Date
CN208297469U true CN208297469U (en) 2018-12-28

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Application Number Title Priority Date Filing Date
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