CN208190525U - A kind of source Z T-type three-level inverter based on coupling inductance - Google Patents
A kind of source Z T-type three-level inverter based on coupling inductance Download PDFInfo
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- CN208190525U CN208190525U CN201820771858.1U CN201820771858U CN208190525U CN 208190525 U CN208190525 U CN 208190525U CN 201820771858 U CN201820771858 U CN 201820771858U CN 208190525 U CN208190525 U CN 208190525U
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Abstract
The utility model is the novel source the Z T-type three-level inverter based on coupling inductance, including DC power supply, two derided capacitors, DC side impedance network and T-type three-level inverter circuit；DC side impedance network includes upper end coupling inductance, lower end coupling inductance, capacitor C1And capacitor C2；Upper end coupling inductance, lower end coupling inductance first winding left end connect with its secondary winding left end by diode, first winding right end passes through diode and connect with its secondary winding right end；Capacitor C1It is connected between upper end coupling inductance first winding left end and lower end coupling inductance secondary winding right end, capacitor C2It is connected between lower end coupling inductance first winding left end and upper end coupling inductance secondary winding right end.The utility model solves the problems, such as the problem that existing three level neutral-point-clamped type inverter sensitizing factor of the source Z is limited, switching device number is mostly big with switching loss and excessive using component number when high based on the source switched inductors Z three-level inverter sensitizing factor.
Description
Technical field
The utility model relates to a kind of novel multi-level converters, specifically, being to be related to a kind of Z based on coupling inductance
Source T-type three-level inverter.
Background technique
The impedance network of Z-source inverter has boost capability, and it is straight-through become a kind of normal working condition, reduce pair
The requirement of DC input voitage, improves reliability.It is widely applied in electric machine speed regulation, field of new energy generation.
Z source impedance network can be with conventional three level neutral-point-clampeds (Neutral point clamped, NPC) type inversion
Device or T-type three-level inverter are bonded three level NPC inverter of single source Z type or the source Z T-type inverter.But above 2 kinds of lists
The source Z type three-level inverter voltage gain is not high, fails the advantages of giving full play to three-level inverter, and NPC type inverter
Have the shortcomings that switching device is more, switching loss is big.
By improving impedance network, can substantially be mentioned using switched inductors (Switched-inductor, SL) impedance network
High boost capability, but there are still certain deficiencies: it, can only be by increasing switched inductors list in the case where straight-through duty ratio is certain
The quantity of member improves sensitizing factor, but 1 unit of every increase is it is necessary to increasing by 2 inductance and 3 diodes, component number
Increase will greatly increase the cost and failure rate of inverter.
Utility model content
The utility model is in order to solve three level NPC type inverter of single source Z type, the list source Z type T-type three-level inverter and base
In the problems of the source the Z three-level inverter of switched inductors, devise a kind of based on coupling inductance (Coupled-
Inductor the novel source Z T-type three-level inverter) only can improve sensitizing factor by changing the turn ratio of coupling inductance,
Without increasing the quantity of component, reduce costs and failure rate.
Z source T-type three-level inverter of the utility model based on coupling inductance, including DC power supply, two derided capacitors,
DC side impedance network and T-type three-level inverter circuit, DC side impedance network are connected to DC power supply and T-type tri-level inversion
Between circuit, DC power supply both ends, midpoint and T-type three after two derided capacitors series connection are connected in parallel on after two derided capacitors series connection
Level inverter circuit connection；
The DC side impedance network includes upper end coupling inductance, lower end coupling inductance, capacitor C1And capacitor C2；Upper end coupling
It closes inductance and lower end coupling inductance is all made of transformer；Upper end coupling inductance first winding left end passes through diode D1It is secondary with it
The connection of winding left end, first winding right end pass through diode D2It is connect with its secondary winding right end；Lower end coupling inductance once around
Group left end passes through diode D4It is connect with its secondary winding left end, first winding right end passes through diode D3With its secondary winding right side
End connection；Capacitor C1It is connected between upper end coupling inductance first winding left end and lower end coupling inductance secondary winding right end, electricity
Hold C2It is connected between lower end coupling inductance first winding left end and upper end coupling inductance secondary winding right end.
Preferably, the upper end coupling inductance passes through diode VD1It is connect with DC power anode, lower end coupling inductance is logical
Cross diode VD2It is connect with DC power cathode.
Preferably, the number of turns of the upper end coupling inductance first winding is less than the number of turns of its secondary winding；The lower end coupling
The number of turns for closing inductance first winding is less than the number of turns of its secondary winding.
Preferably, the T-type three-level inverter circuit includes IGBT switch SA1、SA2、SA3、SA4、SB1、SB2、SB3、SB4、
SC1、SC2、SC3And SC4, IGBT switch in Sx1、Sx2、Sx3And Sx4Constitute a bridge arm in T-shape, x ∈ { A, B, C }；3
IGBT switch Sx2Emitter link together and connect with two derided capacitors after midpoint connect, Sx3Emitter with
Sx1And Sx4Midpoint be connected, while 3 output ends as T-type three-level inverter circuit.
The utility model solves that existing three level neutral-point-clamped type inverter sensitizing factor of the source Z is limited, derailing switch number of packages
The mesh mostly big problem with switching loss, and it is high based on the source switched inductors Z three-level inverter sensitizing factor when use component
The excessive problem of quantity.The utility model is excellent compared with conventional three level NPC inverters and conventional T-type three-level inverter
Point has:
Conventional three-level inverter is buck topology, needs higher DC input voitage, and upper and lower bridge in order to prevent
Arm is straight-through, and dead time need to usually be arranged, output waveform is caused to distort；And the topological structure of the utility model includes coupling introducing
After the impedance network for closing inductance, capacitor and diode, the requirement to DC input voitage is reduced, and inverter is allowed to work in
Pass-through state, dead time that no setting is required.
The advantages of the utility model is compared with three level NPC inverter of the list source Z and the list source Z T-type three-level inverter has:
The above 2 kinds of list source Z three-level inverters are using conventional Z source impedance network, and sensitizing factor is smaller, and boost capability has
Limit；And the utility model uses the impedance network based on coupling inductance, greatly improves boost capability.
The advantages of the utility model is compared with the source the Z three-level inverter based on switched inductors has:
The impedance network of the source Z three-level inverter based on switched inductors uses switched inductors, certain in straight-through duty ratio
In the case where, sensitizing factor can only be improved by increasing the quantity of switched inductors unit, but 1 unit of every increase is it is necessary to increasing
Add 2 inductance and 3 diodes, the increase of component number will greatly increase the cost and failure rate of inverter.And this is practical
Novel New Topological uses the impedance network based on coupling inductance, and sensitizing factor increases with the increase of coupling inductance turn ratio
Add, only can improve sensitizing factor by changing turn ratio, without increasing the quantity of component, reduces costs and failure rate.
Detailed description of the invention
Fig. 1 is Z source T-type three-level inverter topology structure chart of the utility model based on coupling inductance；
Fig. 2 is pass-through state equivalent circuit diagram on the source the Z T-type three-level inverter based on coupling inductance；
Fig. 3 is pass-through state equivalent circuit diagram under the source the Z T-type three-level inverter based on coupling inductance；
Fig. 4 is the non-pass-through state equivalent circuit diagram of the source Z T-type three-level inverter based on coupling inductance, and leakage inductance is being released
Exoergic amount；
Fig. 5 is the non-pass-through state equivalent circuit diagram of the source Z T-type three-level inverter based on coupling inductance, leakage inductance release
Energy finishes；
Fig. 6 is T-type three-level inverter three dimensional vector diagram；
Fig. 7 is sector S in Fig. 61Division figure；
In Fig. 8, (a) is traditional T-type three-level inverter modulation waveform figure, (b) is modulated for the source Z T-type three-level inverter
Waveform diagram；
Fig. 9 is the source the Z T-type three-level inverter simulation result schematic diagram based on coupling inductance, wherein (a), (b), (c) point
It Wei not DC-link voltage, output line voltage and load phase voltage waveform.
Specific embodiment
Referring to Fig. 1, Z source T-type three-level inverter of the utility model based on coupling inductance includes DC power supply, two points
Voltage capacitance, DC side impedance network and T-type three-level inverter circuit, DC side impedance network are connected to DC power supply and T-type three
Between level inverter circuit；DC side impedance network is used to improve the voltage of input DC power and exports inverse to three level of T-type
The pulsating dc voltage that impedance network exports is converted into three level voltages and exported by power transformation road, T-type three-level inverter circuit.
DC side impedance network includes 2 coupling inductances, 2 capacitor C1And C2And 6 diode D1、D2、D3、D4、
VD1And VD2.2 coupling inductances, that is, upper end coupling inductance and lower end coupling inductance, upper end coupling inductance are set to DC side impedance
The top of network, lower end coupling inductance are set to the lower part of DC side impedance network；The structure of 2 coupling inductances is identical, is
Transformer, the first winding of each coupling inductance and the number of turns of secondary winding are respectively npAnd ns.On the top of impedance network, two
Pole pipe VD1Cathode directly connect with the first winding left end of upper end coupling inductance, first winding left end pass through diode D1With two
Secondary winding left end connection, first winding right end pass through diode D2It is connect with secondary winding right end.In the lower part of impedance network, two
Pole pipe VD2Anode connect with the first winding left end of lower end coupling inductance, first winding left end pass through diode D4With it is secondary around
The connection of group left end, first winding right end pass through diode D3It is connect with secondary winding right end.Capacitor C1、C2Above and below connection in " X " shape
2 coupling inductances, capacitor C1Be connected to upper end coupling inductance first winding left end and lower end coupling inductance secondary winding right end it
Between, capacitor C2It is connected between lower end coupling inductance first winding left end and upper end coupling inductance secondary winding right end.Diode
VD1Anode, diode VD2Cathode is connect with the anode of DC power supply, cathode respectively.
2 derided capacitors CS1And CS2It is connected in parallel after series connection with DC power supply.T-type three-level inverter circuit mainly includes
12 IGBT switch SA1、SA2、SA3、SA4、SB1、SB2、SB3、SB4、SC1、SC2、SC3、SC4, IGBT switch in Sx1、Sx2、Sx3、Sx4
Constitute a bridge arm in T-shape, x ∈ { A, B, C }.3 IGBT switch Sx2Emitter link together and with partial pressure electricity
Hold CS1And CS2Midpoint connection；Sx3Emitter and Sx1And Sx4Midpoint be connected, while as T-type three-level inverter circuit
3 output ends.
The utility model has 2 half straight-through (above leading directly to and lower straight-through) based on the source the Z T-type three-level inverter of coupling inductance
With 1 non-pass-through state.Each coupling inductance has 2 windings, and the number of turns of first winding and secondary winding is respectively npAnd ns, ns>
np.If k is coupling factor, k2=Lm/(Lm+Lk), LmAnd LkThe respectively magnetizing inductance and leakage inductance of coupling inductance.
Upper straight-through equivalent circuit is as shown in Figure 2.U in figuremFor magnetizing inductance voltage.It is led directly in A phase if impedance network passes through,
The then S of A phaseA1、SA2And SA3Conducting.Diode VD1Conducting, derided capacitors CS1On voltage udc/ 2 are applied to top coupling inductance
Magnetizing inductance both ends, umIt is left positive right negative, because of ns>np, diode D1Cut-off, diode D2Conducting；Lower diode VD2It cuts
Only, diode D3Conducting, diode D4Cut-off.Straight-through equivalent circuit is as shown in Figure 3 down.It is led directly under A phase if impedance network passes through,
The then S of A phaseA2、SA3And SA4Conducting.Diode VD2Conducting, derided capacitors CS2On voltage udc/ 2 are applied to lower part coupling inductance
Magnetizing inductance both ends, umThe right side is being born just in a left side, because of ns>np, diode D4Cut-off, diode D3Conducting；Upper diode VD1It cuts
Only, diode D1Cut-off, diode D2Conducting.
It is no matter upper straight-through or lower straight-through, have:
U in formulainLFor the low-voltage peak value of DC-link voltage, ukFor leakage inductance voltage.
For being led directly in A phase, the coupling inductance L on topkAnd LmSeries connection, flows through identical electric current, therefore uk/um=
(LkdiU/dt)/(LmdiU/ dt)=Lk/Lm=(1-k2)/k2, substitute into formula (1) and both obtain um=k2udc/2。
Non- pass-through state equivalent circuit is as shown in figure 4, leakage inductance L at this timekIt releases energy, diode VD1、VD2、D2And D3It leads
It is logical, diode D1And D4Cut-off.At this moment have:
U in formulainH1The high level peak value of DC-link voltage during releasing energy for leakage inductance.Leakage inductance energy is discharged to needed for 0
Time is T1, corresponding duty ratio is d1, then there is T1=d1Ts, wherein TsFor switch periods.Then, the equivalent electricity of non-pass-through state
Road becomes shown in Fig. 5, diode VD1、VD2、D1And D4Conducting, diode D2And D3Cut-off.At this moment have:
U in formulainH2The high level peak value of DC-link voltage after for leakage inductance energy release.
If upper straight-through and lower straight-through duty ratio is ds, according to magnetizing inductance voltage is flat in 1 switch periods when stable state
Mean value is 0, is had:
It arranges above formula to obtain in impedance network, capacitor C2Both end voltage are as follows:
Because Z source network is symmetrical, capacitor C1And C2Voltage is equal, uC1=uC2=uC.It is obtained by formula (3) and formula (5):
B is sensitizing factor in formula.As k=1 and d1=0 up-to-date style (6) simplifies are as follows:
It can be seen that sensitizing factor increases with the increase of coupling inductance turn ratio N.
As for pulse duration modulation method, the SVPWM method of straight-through time slice insertion can be used.T-type three-level inverter has
19 voltage vectors, wherein vector (V 6 big13~V18) vector space of hexagon is divided into 6 sectors (S1~S6), and
Each sector can be divided into 6 delta-shaped regions again, as shown in Figure 6.With sector S1For, it is divided into A1、A2、C1、C2, B, D totally 6
A triangle, as shown in Figure 7.
Leading directly to vector under straight-through vector sum on being reasonably inserted into the mechanism of conventional voltage vector can be in not shadow
Boosting is realized under the premise of ringing the source Z T-type three-level inverter output waveform.In order not to increase on-off times, upper lead directly to should be in { 1 }
It is inserted into state and { 0 } stateful switchover process, and lower lead directly to should be inserted into { 0 } state and { -1 } stateful switchover process.
With reference voltage urPositioned at sector S1Triangle C1It is illustrated for interior.The tune of traditional T-type three-level inverter
Shown in (a) in waveform such as Fig. 8 processed, vector sequence of operation is V1-V7-V2-V1-V2-V7-V1.The source Z T-type three-level inverter
Shown in (b) in modulation waveform such as Fig. 8, according to the insertion principle of straight-through vector, in the modulating wave of traditional T-type three-level inverter
On the basis of, it is inserted into upper straight-through vector in A phase, vector is led directly in the case where C phase is inserted into.Fig. 8 is examined, it can be found that following vector V closely2
That (00-1) is vector V1(0-1-1), i.e., within this 2 vector action times, the switch function of A phase is always 0.If straight-through
Time is longer, is more than vector V2The maximum effect time of (00-1), it may be considered that by upper straight-through extended durations of action to vector V1
In the action time of (0-1-1), because no matter A phase is in { 0 } state or goes up pass-through state, the phase voltage that A phase exports all is
0, i.e., output voltage is not influenced.In addition, vector V1Also 4 sections of insertions are not necessarily divided into, it is longer lower straight in order to obtain
The logical time, both ends vector V can be enabled1(100) action time is longer than intermediate vector V2The action time of (00-1).Enable V1(100)
Action time and V2(00-1) and V1The sum of (0-1-1) action time is equal, is (ta+tb)/2 (are in half of switch periods
(ta+tb)/4).On lead directly to the V in A phase2(00-1) and V1Insertion, the lower V led directly in C phase in (0-1-1) action time1(100)
Insertion in action time, the period for being inserted into straight-through vector see (b) figure dash area in Fig. 8, upper straight-through time tUSIt is led directly to lower
Time tDSIt is equal, i.e. tUS=tDS=tS。
Fig. 9 is the source the Z T-type three-level inverter simulation result based on coupling inductance, wherein (a), (b), (c) are respectively directly
Flow chain voltage, output line voltage and load phase voltage waveform.Parameter used in emulation are as follows: DC voltage udcThe source=200V, Z
Capacitor C in impedance network1=C2=800 μ F, switching frequency fS=10kHz, the turn ratio N of coupling inductance are taken as 3, modulation because
Sub- M=0.7, sensitizing factor B=12.13, i.e. ds=0.3938.As seen from the figure, DC-link voltage is between 2382V and 1191V
Pulsation.Due to the pressure drop of equivalent resistance, DC-link voltage is slightly less than theoretical value uinH2=12.13 × 200=2426V.Output line
Voltage peak is 2382V, and load phase voltage amplitude is 831V, slightly less than theoretical value 849V (0.7 × 12.13 × 200/2).By imitating
True result is it is found that the source the Z T-type three-level inverter based on coupling inductance shows very strong boost capability.
It is above-mentioned although specific embodiments of the present invention are described with reference to the accompanying drawings, but it is not practical new to this
The limitation of type protection scope, those skilled in the art should understand that, based on the technical solution of the present invention, ability
Field technique personnel do not need to make the creative labor the various modifications or changes that can be made still in the protection model of the utility model
Within enclosing.
Claims (4)
1. the novel source the Z T-type three-level inverter based on coupling inductance, including the resistance of DC power supply, two derided capacitors, DC side
Anti- network and T-type three-level inverter circuit, DC side impedance network be connected to DC power supply and T-type three-level inverter circuit it
Between, DC power supply both ends are connected in parallel on after two derided capacitors series connection, the midpoint and three level of T-type after two derided capacitors series connection are inverse
Become circuit connection, it is characterised in that:
The DC side impedance network includes upper end coupling inductance, lower end coupling inductance, capacitor C1And capacitor C2；Upper end coupling electricity
Sense is all made of transformer with lower end coupling inductance；Upper end coupling inductance first winding left end passes through diode D1With its secondary winding
Left end connection, first winding right end pass through diode D2It is connect with its secondary winding right end；Lower end coupling inductance first winding is left
End passes through diode D4It is connect with its secondary winding left end, first winding right end passes through diode D3Connect with its secondary winding right end
It connects；Capacitor C1It is connected between upper end coupling inductance first winding left end and lower end coupling inductance secondary winding right end, capacitor C2Even
It connects between lower end coupling inductance first winding left end and upper end coupling inductance secondary winding right end.
2. the novel source the Z T-type three-level inverter according to claim 1 based on coupling inductance, which is characterized in that described
Upper end coupling inductance passes through diode VD1It is connect with DC power anode, lower end coupling inductance passes through diode VD2With direct current
The connection of source cathode.
3. the novel source the Z T-type three-level inverter according to claim 1 based on coupling inductance, which is characterized in that described
The number of turns of upper end coupling inductance first winding is less than the number of turns of its secondary winding；The number of turns of the lower end coupling inductance first winding
Less than the number of turns of its secondary winding.
4. the novel source the Z T-type three-level inverter according to claim 1 based on coupling inductance, which is characterized in that described
T-type three-level inverter circuit includes IGBT switch SA1、SA2、SA3、SA4、SB1、SB2、SB3、SB4、SC1、SC2、SC3And SC4, IGBT opens
The S in the Central Shanxi Plainx1、Sx2、Sx3And Sx4Constitute a bridge arm in T-shape, x ∈ { A, B, C }；3 IGBT switch Sx2Emitter connect
Midpoint after being connected together and connecting with two derided capacitors is connect, Sx3Emitter and Sx1And Sx4Midpoint be connected, together
3 output ends of Shi Zuowei T-type three-level inverter circuit.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109995260A (en) * | 2019-03-05 | 2019-07-09 | 上海电力学院 | A kind of power grid control method based on the quasi- source Z three-level inverter |
| CN110058111A (en) * | 2019-04-22 | 2019-07-26 | 浙江万里学院 | T-type three-level inverter method for diagnosing faults based on phase voltage residual error |
-
2018
- 2018-05-23 CN CN201820771858.1U patent/CN208190525U/en active Active
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109995260A (en) * | 2019-03-05 | 2019-07-09 | 上海电力学院 | A kind of power grid control method based on the quasi- source Z three-level inverter |
| CN109995260B (en) * | 2019-03-05 | 2020-10-23 | 上海电力学院 | Power grid control method based on quasi-Z-source three-level inverter |
| CN110058111A (en) * | 2019-04-22 | 2019-07-26 | 浙江万里学院 | T-type three-level inverter method for diagnosing faults based on phase voltage residual error |
| CN110058111B (en) * | 2019-04-22 | 2021-01-15 | 浙江万里学院 | Fault diagnosis method for T-type three-level inverter based on phase voltage residual errors |
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