CN208157417U - 一种功率管 - Google Patents

一种功率管 Download PDF

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CN208157417U
CN208157417U CN201820813880.8U CN201820813880U CN208157417U CN 208157417 U CN208157417 U CN 208157417U CN 201820813880 U CN201820813880 U CN 201820813880U CN 208157417 U CN208157417 U CN 208157417U
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power tube
substrate
runner
insulation board
copper
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李增珍
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Shanghai Xunsun Co ltd
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HANGZHOU DEEP ICE TECHNOLOGY Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors

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  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

本实用新型属于晶体管结构技术领域，具体涉及一种功率管封装结构。其包括覆铜绝缘板，半导体芯片，接线端子，覆铜绝缘板通过焊层焊接在基板上，其特征在于基板中设置有流道。本实用新型通过直接在功率管的基板上设置流道，避免了客户应用中的接触热阻，增加了功率管的应用温度范围。

Description

一种功率管
技术领域
本实用新型属于晶体管结构技术领域，具体涉及一种功率管封装结构。
背景技术
标准功率管中，不同数量功率半导体芯片(可以为IGBT、MOS、Diode和FRED等)焊接到覆铜绝缘板上，覆铜绝缘板再焊接到基板上。这个基板往往是由金属铜制作的实心金属块，其作用在于将半导体芯片的热量扩散开，并传导到客户的散热系统中。客户的散热系统诸如风冷散热器、水冷板，是通过导热界面材料与该基板连接的。 因此，当前的功率管设计时，重点考虑如何减小从芯片到客户散热器、水冷板之间的热阻。这包括1.基板自身的导热热阻；2.基板到散热器、水冷板的接触热阻。为减小基板自身的导热热阻，当前功率管的设计厂商思路集中在使用高导热率的材料做基板，如铜；努力优化基板的厚度，使基板的厚度足够薄，但是还能保证热量能有效的扩散开。为减小基板到客户散热器、水冷板的接触热阻，功率管设计厂商的思路集中在提高基板安装面的平面度、减小粗糙度的方向。但是这些方向只能略微改善，并没有质的改变。比如，对于热功率密度400W/cm2的功率管，在50PSI的压力情况下，通过对基板的粗糙度从一般的机加更改为抛光工艺，能把接触热阻从0.05℃*cm2/W降低到0.04℃*cm2/W,但是，接触热阻导致的温差依然有16℃，这意味着，原本客户的散热器最高温度只有50℃的情况下，功率管的基板温度已经达到了66℃。为了使功率管维持在50℃，那要求客户的散热器最高温度要低于34℃。硬是把该功率管的使用温度范围降低了16℃。原本能在全球使用的产品，变成了只能在空调房里使用的产品。
发明内容
为了解决现有技术中的上述不足，本实用新型用了不同的思路，不再集中在如何降低功率管基板安装面的接触热阻上，也不需要去减薄基板的厚度，而是反其道而为之，将基板厚度增加，并且在基板中设置流道，该流道留有进出口接头，与客户的冷却系统相连接。从而实现了客户的冷却系统与功率管直接对接，不在存在基板于客户散热设备之间的接触热阻。
为实现上述目的，本实用新型采用以下技术方案：
一种功率管，包含覆铜绝缘板（1），其两侧有铜层（7），半导体芯片(2)通过焊层（6）焊接在覆铜绝缘板（1）的铜层（7）上，接线端子（3），覆铜绝缘板（1）通过焊层（6）焊接在基板（4）上，其特征在于基板（4）中设置有流道（5）。
作为优选，流道（5）只存在一个进水口和一个出水口供客户连接外部流道。
作为优选，流道（5）是内置在基板（4）中的。
作为优选，流道（5）可以是一条通道，也可以是多条通道并联。
作为优选，流道（5）的等效截面积A，功率管的发热功率P，存在如下关系：(0.79e-10)*P<A<(1.19e-6)*P 其中，P的单位是瓦，A的单位是平方米，系数用的是科学记数法。
对于面积A和功率P之间的关系,我们是通过大量（1000多个测试结果）的实验测试的得到的数据归纳的结果。通过实验发现，如果面积A小于(0.79e-10)*P，流道5内的流体压力损失过大，常规的冷却水泵不足以提供足够的供水压力的问题；如果面积A大于(1.19e-6)*P，该方案的散热效果很差，还不如常规的功率管结构散热效果。实验结果显示，上述A的范围为绝对范围，超出该范围，该方案无效。而经过对实验数据的归纳，以下A的范围为优选范围(2.38e-9)*P<A<(4.76e-7)*P；进一步，流道等效截面积A的最优值范围如下：(4.76e-9)*P<A<(1.19e-8)*P。
附图说明
图1是实施例1中采用了本实用新型的一种功率管的截面示意图。
具体实施方式
下面结合附图和实施例，对本实用新型做进一步详尽描述。
实施例1：
如图1所示，一种采用了本实用新型的功率管，包含覆铜绝缘板（1），其两侧有铜层（7），半导体芯片(2)通过焊层（6）焊接在覆铜绝缘板（1）的铜层（7）上，芯片（2）的功率为13400W，接线端子（3），覆铜绝缘板（1）通过焊层（6）焊接在基板（4）上，基板（4）中设置有流道（5），流道（5）的等效截面积为88mm2，A=(6.56e-9)*P，该值在我们的最优范围内(4.76e-9)*P<A<(1.19e-8)*P。该功率管在通纯净水12L/min的流量的情况下，半导体芯片（2）的温升在50度左右。以许可结温125℃计算，则该功率管的使用温度范围可以高达75℃。即冷却水的温度高达75℃，该功率管依然能正常工作，工业应用中，低于75℃的冷却水是非常容易获得的。而常规的功率管，一般需要的冷却水温度低于45℃。因此该功率管使用温度范围大大提升，技术效果显著。
应当理解，本领域的普通技术人员无需创造性劳动就可以根据本实用新型的构思、数据做出诸多修改和变化。因此，凡本技术领域中技术人员依本实用新型的构思在现有技术的基础上通过逻辑分析、推理或者有限的实验可以得到的技术方案，皆应在由权利要求书所确定的保护范围内。

Claims (5)

1.一种功率管，包含覆铜绝缘板（1），其两侧有铜层（7），半导体芯片(2)通过焊层（6）焊接在覆铜绝缘板（1）的铜层（7）上，接线端子（3），覆铜绝缘板（1）通过焊层（6）焊接在基板（4）上，其特征在于基板（4）中设置有流道（5）。
2.根据权利要求1所述的一种功率管，其特征在于流道（5）只存在一个进水口和一个出水口供客户连接外部流道。
3.根据权利要求1所述的一种功率管，其特征在于，流道（5）是内置在基板（4）中的。
4.根据权利要求1所述的一种功率管，其特征在于，流道（5）可以是由一条通道，也可以是多条通道并联。
5.根据权利要求1所述的一种功率管，其特征在于，流道（5）的等效截面积A，功率管的发热功率P，存在如下关系：
(0.79e-10)*P<A<(1.19e-6)*P其中，P的单位是瓦，A的单位是平方米，系数用的是科学记数法。
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108493244A (zh) * 2018-05-29 2018-09-04 杭州玄冰科技有限公司 一种功率管

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108493244A (zh) * 2018-05-29 2018-09-04 杭州玄冰科技有限公司 一种功率管

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Effective date of registration: 20231221

Address after: Room 1458, Building 6, No. 1150 Lanfeng Road, Fengxian District, Shanghai, March 2014

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Patentee before: HANGZHOU DEEP ICE TECH Ltd.