CN208126335U - LDO electrifying timing sequence adjustment circuit and master chip power supply circuit - Google Patents
LDO electrifying timing sequence adjustment circuit and master chip power supply circuit Download PDFInfo
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- CN208126335U CN208126335U CN201820620580.8U CN201820620580U CN208126335U CN 208126335 U CN208126335 U CN 208126335U CN 201820620580 U CN201820620580 U CN 201820620580U CN 208126335 U CN208126335 U CN 208126335U
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Abstract
The utility model discloses a kind of LDO electrifying timing sequence adjustment circuit and master chip power supply circuits, including power input, resistance, first capacitor, switching device and power output end；Power input connects the first end of first capacitor, the first end of the second end connection resistance of first capacitor, the second end ground connection of resistance；Switching device includes control terminal, the first connecting pin and second connection end, and switching device is the device of the first connecting pin and second connection end conducting when control terminal voltage is lower than threshold voltage；The second end of the control terminal connection first capacitor of switching device, the first connecting pin connect power input, and second connection end connects power output end；Power output end is used to connect the energization pins of LDO chip.
Description
Technical field
The utility model embodiment is related to field of circuit technology more particularly to a kind of LDO electrifying timing sequence adjustment circuit and master
Chip power supply circuit.
Background technique
In the control system framework of current touch-control plate, the requirement there are multiple functional modules to electrifying timing sequence is different
Problem.Low pressure difference linear voltage regulator (low dropout regulator, abbreviation LDO) is widely used in as touch-control plate
Functional module power supply, but LDO cannot change the electrifying timing sequence of itself, power management chip can only be used to control its electrifying timing sequence,
But electrifying timing sequence is controlled using power management chip, circuit is complex and higher cost.
Utility model content
The utility model embodiment provides a kind of LDO electrifying timing sequence adjustment circuit and master chip power supply circuit, realizes and uses
Simple circuit structure controls LDO electrifying timing sequence, and cost is relatively low.
In a first aspect, the utility model embodiment provides a kind of LDO electrifying timing sequence adjustment circuit, including power input,
Resistance, first capacitor, switching device and power output end；
The power input connects the first end of the first capacitor, and the second end of the first capacitor connects the electricity
The first end of resistance, the second end ground connection of the resistance；
The switching device includes control terminal, the first connecting pin and second connection end, and the switching device is to work as control terminal
When voltage is lower than threshold voltage, the device of the first connecting pin and second connection end conducting；The control terminal of the switching device connects
The second end of the first capacitor, the first connecting pin connect the power input, and second connection end connects the power supply output
End；The power output end is used to connect the energization pins of LDO chip.
Second aspect, the utility model embodiment provide a kind of master chip power supply circuit, the master chip power supply circuit packet
Include LDO chip and LDO electrifying timing sequence adjustment circuit as previously described；The energization pins of the LDO chip connect on the LDO
The power output end of electric time sequence adjusting circuit；The output pin of the LDO chip is used to connect the power supply of touch-control plate master chip
Pin.
The utility model embodiment is realized by increasing RC circuit and switching device as LDO electrifying timing sequence adjustment circuit
Switching device is just connected after for a period of time in capacitor charging, connects power input and the energization pins of LDO chip, to make
The capacitance by adjusting resistance and first capacitor in RC circuit is obtained, the power-on time of adjustment LDO chip, solution may be implemented
Certainly the prior art is realized using circuit complexity, the problem with high costs of power management chip control electrifying timing sequence using simple
Circuit structure control LDO electrifying timing sequence, reduce the effect of cost.
Detailed description of the invention
Fig. 1 is the structural schematic diagram for the LDO electrifying timing sequence adjustment circuit that the utility model embodiment one provides；
Fig. 2 is the structural schematic diagram for the master chip power supply circuit that the utility model embodiment two provides；
Fig. 3 is the structural schematic diagram for the master chip power supply circuit that the utility model embodiment three provides.
Specific embodiment
The utility model is described in further detail with reference to the accompanying drawings and examples.It is understood that herein
Described specific embodiment is used only for explaining the utility model, rather than the restriction to the utility model.It further needs exist for
It is bright, part relevant to the utility model is illustrated only for ease of description, in attached drawing rather than entire infrastructure.
Embodiment one
It is the structural schematic diagram for the LDO electrifying timing sequence adjustment circuit that the utility model embodiment one provides referring to Fig. 1, Fig. 1.
As shown in Figure 1, the LDO electrifying timing sequence adjustment circuit includes power input VIN, resistance R1, first capacitor C1, switching device Q1
With power output end VOUT；The second end of the first end of power input VIN connection first capacitor C1, first capacitor C1 connects electricity
Hinder the first end of R1, the second end ground connection of resistance R1；Switching device Q1 includes control terminal G, the first connecting pin S and second connection end
D, switching device Q1 are the device of the first connecting pin S and second connection end D conducting when the voltage of control terminal G is lower than threshold voltage
Part；The second end of the control terminal G connection first capacitor C1 of switching device Q1, the first connecting pin S connection power input VIN, the
Two connecting pin D connection power output end VOUT；Power output end VOUT is used to connect the energization pins of LDO chip.
The working principle of the LDO electrifying timing sequence adjustment circuit is：When power input VIN is powered on, the both ends first capacitor C1
Voltage cannot be mutated, and power input VIN charges to first capacitor C1, and first capacitor C1 both end voltage increases, so that resistance R1
Both end voltage decline, when the voltage (i.e. the voltage of the first end of resistance R1) of the second end of first capacitor C1 drops below threshold value
When voltage, the first connecting pin of switching device and second connection end conducting so that LDO chip connection power input VIN and on
Electricity, therefore, by adjusting the resistance value of resistance R1 and the capacitance of first capacitor C1, the power-on time of adjustable LDO chip.
There are many embodiments by switching device Q1, such as using PNP triode or relay etc., in the present embodiment, in conjunction with
The considerations of power demand, turn-on time and cost, selects p-type metal-oxide-semiconductor.I.e. preferably, switching device Q1 is p-type metal-oxide-semiconductor, p-type
The source electrode of metal-oxide-semiconductor is the first connecting pin S of switching device Q1, and the drain electrode of p-type metal-oxide-semiconductor is the second connection end D of switching device Q1；
The grid of p-type metal-oxide-semiconductor is the control terminal G of switching device Q1.
In conclusion the technical solution of the present embodiment, by increasing RC circuit and switching device as LDO electrifying timing sequence tune
Whole circuit is realized and switching device is just connected after for a period of time in capacitor charging, makes the energization pins of power input and LDO chip
Connection, so that adjustment LDO chip may be implemented by adjusting the capacitance of resistance and first capacitor in RC circuit
Power-on time solves the problems, such as that the prior art is complicated, with high costs using the circuit of power management chip control electrifying timing sequence, real
LDO electrifying timing sequence is now controlled using simple circuit structure, reduces the effect of cost.
Embodiment two
Referring to fig. 2, Fig. 2 is that the utility model embodiment two provides the structural schematic diagram of master chip power supply circuit, master chip
Power supply circuit includes LDO chip U1 and LDO electrifying timing sequence adjustment circuit 10.
The LDO electrifying timing sequence adjustment circuit include power input VIN, resistance R1, first capacitor C1, switching device Q1 and
Power output end；The first end of power input VIN connection first capacitor C1, the second end connection resistance R1's of first capacitor C1
First end, the second end ground connection of resistance R1；Switching device Q1 includes control terminal G, the first connecting pin S and second connection end D, switch
Device Q1 is the device of the first connecting pin S and second connection end D conducting when the voltage of control terminal G is lower than threshold voltage；Switch
The second end of the control terminal G connection first capacitor C1 of device Q1, the first connecting pin S connection power input VIN, second connection end
D connection power output end.
The power output end of the energization pins VI connection LDO electrifying timing sequence adjustment circuit 10 of LDO chip U1；LDO chip U1
Output pin VO be used to connect the energization pins of touch-control plate master chip.
Master chip power supply circuit provided in this embodiment, the LDO electrifying timing sequence adjustment circuit 10 including the offer of embodiment one,
Therefore with the corresponding technical effect.Since the output pin VO of LDO chip U1 is used to connect the power supply of touch-control plate master chip
Pin, therefore, it is different which is able to solve requirement of multiple functional modules to logical sequence in touch-control plate
It is the problem of cause, available to be widely applied.
Embodiment three
It is the master chip power supply circuit that the utility model embodiment three provides referring to Fig. 3, Fig. 3.The present embodiment master chip supplies
Circuit includes LDO chip U1 and LDO electrifying timing sequence adjustment circuit 10.The LDO electrifying timing sequence adjustment circuit 10 is that this is practical new
The LDO electrifying timing sequence adjustment circuit that type any embodiment provides.The energization pins VI connection LDO electrifying timing sequence tune of LDO chip U1
The power output end of whole circuit 10；The output pin VO of LDO chip U1 is used to connect the energization pins of touch-control plate master chip.
On the basis of above scheme, master chip power supply circuit further includes LDO input 20 He of Dolby circuit in the present embodiment
LDO exports Dolby circuit 30.LDO inputs energization pins VI, the LDO input of the first end connection LDO chip U1 of Dolby circuit 20
The second end of Dolby circuit 20 is grounded；LDO exports the output pin VO, LDO of the first end connection LDO chip U1 of Dolby circuit 30
Export the second end ground connection of Dolby circuit 30.One end electrical signal ports of Dolby circuit, other end ground connection can play decoupling work
With reducing the ripple and high-frequency noise of the electrical signal ports.
LDO inputs Dolby circuit 20 and LDO output Dolby circuit 30 can be there are many implementation.
In a kind of wherein embodiment, LDO input Dolby circuit 20 includes the second capacitor C2 being connected in parallel and third
Capacitor C3；The first end of second capacitor C2 is the first end that LDO inputs Dolby circuit 20, and the second end of the second capacitor C2 is LDO
Input the second end of Dolby circuit 20.
In a kind of wherein embodiment, LDO output Dolby circuit 30 includes the 4th capacitor C4 being connected in parallel, the 5th electricity
Hold C5, the 6th capacitor C6 and the 7th capacitor C7；The first end of 4th capacitor C4 is the first end that LDO exports Dolby circuit 30, the
The second end of four capacitor C4 is the second end that LDO exports Dolby circuit 30.
In conclusion the technical solution of the present embodiment, by increasing RC circuit and switching device as LDO electrifying timing sequence tune
Whole circuit is realized and switching device is just connected after for a period of time in capacitor charging, makes the energization pins of power input and LDO chip
Connection, so that adjustment LDO chip may be implemented by adjusting the capacitance of resistance and first capacitor in RC circuit
Power-on time then adjusts the power-on time of touch-control plate master chip, when multiple functional modules are to logic in solution touch-control plate
The inconsistent problem of the requirement of sequence is realized and controls electrifying timing sequence using simple circuit structure, reduces the effect of cost.And
The energization pins and output pin of LDO chip are equipped with Dolby circuit, and touch-control plate master chip is made to obtain more stable power supply.
It should be noted that without conflicting with each other, those skilled in the art can will retouch in this specification
The feature of the different embodiments or examples and different embodiments or examples stated is combined.
In addition, term " first ", " second " are used for descriptive purposes only and cannot be understood as indicating or suggesting relative importance
Or implicitly indicate the quantity of indicated technical characteristic.Define " first " as a result, the feature of " second " can be expressed or
Implicitly include at least one this feature.
Note that above are only the preferred embodiment and institute's application technology principle of the utility model.Those skilled in the art's meeting
Understand, the utility model is not limited to specific embodiment described here, is able to carry out for a person skilled in the art various bright
Aobvious variation, readjustment and substitution is without departing from the protection scope of the utility model.Therefore, although passing through above embodiments
The utility model is described in further detail, but the utility model is not limited only to above embodiments, is not departing from
It can also include more other equivalent embodiments in the case that the utility model is conceived, and the scope of the utility model is by appended
Scope of the claims determine.
Claims (6)
1. a kind of LDO electrifying timing sequence adjustment circuit, which is characterized in that including power input, resistance, first capacitor, derailing switch
Part and power output end；
The power input connects the first end of the first capacitor, and the second end of the first capacitor connects the resistance
First end, the second end ground connection of the resistance；
The switching device includes control terminal, the first connecting pin and second connection end, and the switching device is when control terminal voltage
When lower than threshold voltage, the device of the first connecting pin and second connection end conducting；Described in the control terminal connection of the switching device
The second end of first capacitor, the first connecting pin connect the power input, and second connection end connects the power output end；Institute
Power output end is stated for connecting the energization pins of LDO chip.
2. LDO electrifying timing sequence adjustment circuit as described in claim 1, which is characterized in that the switching device is p-type metal-oxide-semiconductor,
The source electrode of the p-type metal-oxide-semiconductor is the first connecting pin of the switching device, and the drain electrode of the p-type metal-oxide-semiconductor is the switching device
Second connection end；The grid of the p-type metal-oxide-semiconductor is the control terminal of the switching device.
3. a kind of master chip power supply circuit, which is characterized in that the master chip power supply circuit includes LDO chip and such as claim
LDO electrifying timing sequence adjustment circuit described in 1 or 2；The energization pins of the LDO chip connect the LDO electrifying timing sequence adjustment electricity
The power output end on road；The output pin of the LDO chip is used to connect the energization pins of touch-control plate master chip.
4. master chip power supply circuit as claimed in claim 3, which is characterized in that the master chip power supply circuit further includes LDO
It inputs Dolby circuit and LDO exports Dolby circuit；The first end of the LDO input Dolby circuit connects the confession of the LDO chip
Electric pin, the second end ground connection of the LDO input Dolby circuit；The first end of the LDO output Dolby circuit connects the LDO
The output pin of chip, the second end ground connection of the LDO output Dolby circuit.
5. master chip power supply circuit as claimed in claim 4, which is characterized in that the LDO input Dolby circuit includes parallel connection
The second capacitor and third capacitor of connection；The first end of second capacitor is the first end that the LDO inputs Dolby circuit, institute
The second end for stating the second capacitor is the second end of LDO input Dolby circuit.
6. master chip power supply circuit as claimed in claim 4, which is characterized in that the LDO output Dolby circuit includes parallel connection
The 4th capacitor, the 5th capacitor, the 6th capacitor and the 7th capacitor of connection；The first end of 4th capacitor is LDO output
The first end of Dolby circuit, the second end of the 4th capacitor are the second end that the LDO exports Dolby circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201820620580.8U CN208126335U (en) | 2018-04-27 | 2018-04-27 | LDO electrifying timing sequence adjustment circuit and master chip power supply circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201820620580.8U CN208126335U (en) | 2018-04-27 | 2018-04-27 | LDO electrifying timing sequence adjustment circuit and master chip power supply circuit |
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| Publication Number | Publication Date |
|---|---|
| CN208126335U true CN208126335U (en) | 2018-11-20 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201820620580.8U Active CN208126335U (en) | 2018-04-27 | 2018-04-27 | LDO electrifying timing sequence adjustment circuit and master chip power supply circuit |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114546086A (en) * | 2020-11-25 | 2022-05-27 | 北京比特大陆科技有限公司 | Chip, series power supply circuit, data processing equipment and computer server |
-
2018
- 2018-04-27 CN CN201820620580.8U patent/CN208126335U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114546086A (en) * | 2020-11-25 | 2022-05-27 | 北京比特大陆科技有限公司 | Chip, series power supply circuit, data processing equipment and computer server |
| WO2022111359A1 (en) * | 2020-11-25 | 2022-06-02 | 北京比特大陆科技有限公司 | Chip, series power supply circuit, data processing device, and computer server |
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