CN207937832U - A kind of filter based on ARM and FPGA - Google Patents
A kind of filter based on ARM and FPGA Download PDFInfo
- Publication number
- CN207937832U CN207937832U CN201820510704.7U CN201820510704U CN207937832U CN 207937832 U CN207937832 U CN 207937832U CN 201820510704 U CN201820510704 U CN 201820510704U CN 207937832 U CN207937832 U CN 207937832U
- Authority
- CN
- China
- Prior art keywords
- arm
- fpga
- filter
- interfaces
- dds
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Measurement And Recording Of Electrical Phenomena And Electrical Characteristics Of The Living Body (AREA)
Abstract
The utility model discloses a kind of filters based on ARM and FPGA, include FPGA integrated circuits, switch capacitor filter, analog switch and the filter circuit of LCD touch display modules, ARM control panels, field programmable gate array；The LCD touch display modules are bi-directionally connected with arm processor, and the ARM control panels are connect with FPGA integrated circuits by SPI interface, FPGA integrated circuit multi-channel synchronous connecting valves capacitive filter, analog switch and filter circuit.The utility model can allow the parameter selection and programmable configuration that user can be by the intuitive operation setting filter of LCD touch screen；And the programmable selection of high-pass filter, low-pass filter, bandpass filter, bandstop filter configuration may be implemented.
Description
Technical field
The utility model is related to a kind of filters, and in particular to a kind of filter based on ARM and FPGA.
Background technology
Conventional measurement systems usually contain noise and many letters unrelated with being measured from the signal that sensor picks up
Number, and original measuring signal is through transmission, amplification, transformation, operation and various other processing procedures, can also be mixed into it is various not
With the noise of form, to influence measurement accuracy.These noise general randoms are strong, it is difficult to be directly separated from time domain, but limit
In the mechanism of its generation, noise power is limited, and is distributed according to certain rules in a certain specific frequency band of frequency domain.Letter
Number split circuit generally uses filter to realize the inhibition of noise, extracts required measuring signal.But the filter used in system
The form and cutoff frequency of wave device are often fixed, it is difficult to accomplish adjustable, this just brings some inconvenience to the design of system.
Generally also use volume bigger both at home and abroad at present, channel and adjustable gear adjust using mechanical knob pure
Analog filter；For testing engineering, volume is inconvenient to carry greatly, and channel is few for complicated system engineering test
The more space requirements of equipment of demand are big, and adjustable gear is few and regulation stall is inconvenient.
Invention content
The utility model proposes a kind of filter based on ARM and FPGA, channel is more, exponent number is high, quantitative more per channel
Grade is programmable, or per the stepless programmable input filter frequency in channel.
The utility model is achieved through the following technical solutions：
A kind of filter based on ARM and FPGA, it is characterised in that：Including LCD touch display modules, ARM control panels, show
Field programmable gate array FPGA integrated circuits, switch capacitor filter, analog switch and filter circuit；The FPGA is integrated
Circuit includes the DDS DIGITAL FREQUENCYs conjunction of ARM interfaces, external memory interface, FPGA internal control registers, the main waveform of control
Grow up to be a useful person, the DDS digital frequency synthesizers of modulation waveform, 1851 interfaces of AD, peripheral control unit HC 595,7920 interfaces of AD,
9755 interfaces of AD, 5662 interface modules of AD；The ARM interfaces are posted with external memory interface and FPGA internal controls respectively
Storage is bi-directionally connected；The external memory interface is connect with the DDS digital frequency synthesizers for controlling main waveform, described
External memory interface is connect after the DDS digital frequency synthesizers by controlling main waveform with 9755 interfaces of AD；Described
FPGA internal control registers respectively with control the DDS digital frequency synthesizers of main waveform, the digital frequencies of DDS of modulation waveform
Rate synthesizer, peripheral control unit HC 595 and the connection of 1851 interfaces of AD；The FPGA internal control registers pass through control
It is connect with 9755 interfaces of AD after the DDS digital frequency synthesizers of main waveform；The FPGA internal control registers pass through tune
It is connect with 5662 interfaces of AD after the DDS digital frequency synthesizers of waveform processed；7920 interface of AD and modulation waveform
DDS digital frequency synthesizers, the DDS digital frequency synthesizers of modulation waveform are synthesized with the DDS DIGITAL FREQUENCYs of main waveform
Device connects, and 7920 interfaces of AD are digital by the DDS digital frequency synthesizers of modulation waveform and the DDS of main waveform
It is connect with external memory interface after frequency synthesizer；The output end of the LCD touch display modules connects with LCD touch screen
It connects, input terminal and the ARM control panels of the LCD touch display modules are bi-directionally connected, and the ARM control panels pass through SPI interface
It is connect with the ARM interfaces in FPGA integrated circuits, FPGA integrated circuit multi-channel synchronous connecting valves capacitive filter, simulation
Switch and filter circuit.
Further, the LCD touch display modules include panel and keypad module, touch drive module, serial line interface
Module and network card interface module, the panel and keypad module touch drive module, serial excuse module and network card interface module
It is bi-directionally connected respectively with ARM control panels.
Further, for the LCD touch screen using resistive touch screen, origin is touch screen X resistance face and Y
Resistance face, which is connected, to be generated at minimum voltage.
Further, the A/D converter of the ARM control panels being internally integrated using successive approximation.
Further, ARM control panels and the communication interface of FPGA integrated circuits use SPI interface, once transmit digit order number
Number is 24.
Further, the switch capacitor filter using to simulation continuous signal directly carries out data sampling with
The active filter of processing.
Further, the active filter is free of A/D and D/A conversion portions.
（Three）Advantageous effect
The utility model proposes a kind of filter based on ARM and FPGA, compared with prior art, with following
Advantageous effect：
（1）The design of LCD touch display modules so that filter can be directly arranged by LCD touch screen in filter
Parameter and it is programmed.
（2）The design of FPGA can realize multichannel multi-grade（Stepless changing）The adjustment selection of frequency filtering point；
（3）High-pass filter, low-pass filter, bandpass filter, bandreject filtering may be implemented in the combination of ARM and FPGA
The programmable selection of device configuration.
（4）The design of switch capacitor filter have applied widely, low-power consumption, high reliability, miniaturization and it is low at
This advantages of.
Description of the drawings
Fig. 1 is the total system schematic block diagram of the utility model.
Fig. 2 is the overall structure schematic block diagram of FPGA in the utility model.
Fig. 3 is the circuit connection diagram of LCD touch screen in the utility model.
Fig. 4 is the circuit connection diagram of switch capacitor filter in the utility model.
Specific implementation mode
The following will be combined with the drawings in the embodiments of the present invention, carries out the technical scheme in the embodiment of the utility model
Clearly and completely describe.The described embodiments are only a part of the embodiments of the utility model, rather than whole implementation
Example.Without departing from the design concept of the present utility model, ordinary people in the field does the technical solution of the utility model
The all variations and modifications gone out, should fall within the protection scope of the present utility model.
Embodiment：
As shown in Figure 1, a kind of filter based on ARM and FPGA, including it is LCD touch display modules, ARM control panels, existing
Field programmable gate array FPGA integrated circuits, switch capacitor filter, analog switch and filter circuit；The LCD touches aobvious
Show that one end of module is connect with LCD touch display screens, the other end and the two-way company of ARM control panels of the LCD touch display modules
It connects.The LCD touch display modules include panel and keypad module, touch drive module, serial interface module and network card interface
Module, the panel and keypad module, touch drive module, serial interface module and network card interface module are double with ARM control panels
To connection.The ARM control panels are bi-directionally connected by SPI interface and FPGA integrated circuits.FPGA integrated circuit multichannels are same
Walk connecting valve capacitive filter, analog switch and filter circuit.
System drives LCD touch display screens by 32 risc processors of ARM Cortex-M3, realizes human-computer exchange behaviour
Make interface.Information exchange is carried out to FPGA/CPLD by arm processor；After FPGA/CPLD receives the information of ARM, utilization is mostly logical
Road synchronizes stepless frequency modulation algorithm and exports stepless adjustable frequency to control switch capacitor filter, Combinational Logic Control analog switch
And the operation of filter circuit；Realize the multi-grade of multi-channel filter（It is stepless）Adjustable, programmable, the configurable a variety of filters of selection
The filter of wave mode, including low-pass filter, high-pass filter, bandpass filter, bandstop filter.
It is posted as shown in Fig. 2, the FPGA integrated circuits include ARM interfaces, external memory interface, FPGA internal controls
Storage, the DDS digital frequency synthesizers of the main waveform of control, modulation waveform DDS digital frequency synthesizers, AD 1851 connect
Mouth, external control HC 595,7920 interfaces of AD, 9755 interfaces of AD, 5662 interface modules of AD；The ARM interfaces respectively with
External memory interface and FPGA internal control registers are bi-directionally connected；The external memory interface and the main waveform of control
DDS digital frequency synthesizers connect, and the external memory interface is synthesized by controlling the DDS DIGITAL FREQUENCYs of main waveform
It is connect with 9755 interfaces of AD after device；The FPGA internal control registers are synthesized with the DDS DIGITAL FREQUENCYs of main waveform respectively
Device, the DDS digital frequency synthesizers of modulation waveform, external control HC 595 and AD 1851 connections；Inside the FPGA
It is connect with 9755 interfaces of AD after the DDS digital frequency synthesizers that control register passes through main waveform；Control inside the FPGA
It is connect with 5662 interfaces of AD after the DDS digital frequency synthesizers that register processed passes through modulation waveform；The AD 7920 connects
Mouth is connect with the DDS digital frequency synthesizers of modulation waveform, DDS digital frequency synthesizers and the main waveform of modulation waveform
DDS digital frequency synthesizers connect, 7920 interfaces of AD by the DDS digital frequency synthesizers of modulation waveform with
It is connect with external memory interface after the DDS digital frequency synthesizer digital frequency synthesizers of main waveform；
The communication of FPGA and ARM control panels uses SPI interface, primary transmission 24；When write operation, high 20 as ground
Location, when reading data, high 16 are used as data；Low 4 are used as control command.When write operation, be first written corresponding 20 bit address and
Control command, and it is stored in the address module of FPGA internal control registers, then FPGA internal controls are written in 16 data and are posted
The output module of storage, and finish writing flag bit to data；By data according to reading and writing Sequential output external memory after, data
Flag bit will be removed automatically.When reading data, corresponding 20 bit address and control command is first written, ARM was delayed after the regular hour,
16 data are read FPGA internal control registers by ARM interfaces, and read the flag bit of data；FPGA internal controls are deposited
The data that device is read are combined into 24 data with flag bit and are sent to ARM, and ARM can judge whether data according to flag bit
Correctly.
The circuit of the LCD touch screen connects as shown in figure 3, the LCD touch screen is using resistive touch
Screen, resistive touch screen judge to press the flag bit of touch screen by the variation range of voltage, and the flag bit of origin is tactile
Screen X resistance face is touched to connect with Y resistance face at generation minimum voltage.System first samples angular coordinate touch screen, according to
Numerical value determines coordinate range.
ARM control panels are internally integrated the A/D converter using successive approximation, are controlled by FPGA internal control registers
D/A converter starts to sound out by turn successively to compare from a high position to low level.
The circuit of the switch capacitor filter connect as shown in figure 4, the switch capacitor filter using
The active filter of data sampling and processing is directly carried out to simulation continuous signal；The active filter is free of A/D and D/A
Conversion portion.
Claims (7)
1. a kind of filter based on ARM and FPGA, it is characterised in that：Including LCD touch display modules, ARM control panels, show
Field programmable gate array FPGA integrated circuits, switch capacitor filter, analog switch and filter circuit；The FPGA is integrated
Circuit includes the DDS DIGITAL FREQUENCYs conjunction of ARM interfaces, external memory interface, FPGA internal control registers, the main waveform of control
Grow up to be a useful person, the DDS digital frequency synthesizers of modulation waveform, 1851 interfaces of AD, peripheral control unit HC 595,7920 interfaces of AD,
9755 interfaces of AD, 5662 interface modules of AD；The ARM interfaces are posted with external memory interface and FPGA internal controls respectively
Storage is bi-directionally connected；The external memory interface is connect with the DDS digital frequency synthesizers for controlling main waveform, described
External memory interface is connect after the DDS digital frequency synthesizers by controlling main waveform with 9755 interfaces of AD；Described
FPGA internal control registers respectively with control the DDS digital frequency synthesizers of main waveform, the digital frequencies of DDS of modulation waveform
Rate synthesizer, peripheral control unit HC 595 and the connection of 1851 interfaces of AD；The FPGA internal control registers pass through control
It is connect with 9755 interfaces of AD after the DDS digital frequency synthesizers of main waveform；The FPGA internal control registers pass through tune
It is connect with 5662 interfaces of AD after the DDS digital frequency synthesizers of waveform processed；7920 interface of AD and modulation waveform
DDS digital frequency synthesizers, the DDS digital frequency synthesizers of modulation waveform are synthesized with the DDS DIGITAL FREQUENCYs of main waveform
Device connects, and 7920 interfaces of AD are digital by the DDS digital frequency synthesizers of modulation waveform and the DDS of main waveform
It is connect with external memory interface after frequency synthesizer；The output end of the LCD touch display modules connects with LCD touch screen
It connects, input terminal and the ARM control panels of the LCD touch display modules are bi-directionally connected, and the ARM control panels pass through SPI interface
It is connect with the ARM interfaces in FPGA integrated circuits, FPGA integrated circuit multi-channel synchronous connecting valves capacitive filter, simulation
Switch and filter circuit.
2. a kind of filter based on ARM and FPGA according to claim 1, it is characterised in that：The LCD touches aobvious
Show that module includes panel and keypad module, touches drive module, serial interface module and network card interface module, the panel and keypad
Module, touch drive module, serial excuse module and network card interface module are bi-directionally connected with ARM control panels respectively.
3. a kind of filter based on ARM and FPGA according to claim 1, it is characterised in that：The LCD touch screen
Using resistive touch screen, origin is that touch screen X resistance face is connected with Y resistance face at generation minimum voltage.
4. a kind of filter based on ARM and FPGA according to claim 1, it is characterised in that：The ARM control panels
The A/D converter being internally integrated using successive approximation.
5. a kind of filter based on ARM and FPGA according to claim 1, it is characterised in that：ARM control panels with
The communication interface of FPGA integrated circuits uses SPI interface, and the primary digit that transmits is 24.
6. a kind of filter based on ARM and FPGA according to claim 1, it is characterised in that：The switching capacity
Filter is using the active filter for directly carrying out data sampling and processing to simulation continuous signal.
7. a kind of filter based on ARM and FPGA according to claim 6, it is characterised in that：The active power filtering
Device is free of A/D and D/A conversion portions.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201820510704.7U CN207937832U (en) | 2018-04-11 | 2018-04-11 | A kind of filter based on ARM and FPGA |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201820510704.7U CN207937832U (en) | 2018-04-11 | 2018-04-11 | A kind of filter based on ARM and FPGA |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN207937832U true CN207937832U (en) | 2018-10-02 |
Family
ID=63656620
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201820510704.7U Expired - Fee Related CN207937832U (en) | 2018-04-11 | 2018-04-11 | A kind of filter based on ARM and FPGA |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN207937832U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108303937A (en) * | 2018-04-11 | 2018-07-20 | 淮安信息职业技术学院 | A kind of filter based on ARM and FPGA |
-
2018
- 2018-04-11 CN CN201820510704.7U patent/CN207937832U/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108303937A (en) * | 2018-04-11 | 2018-07-20 | 淮安信息职业技术学院 | A kind of filter based on ARM and FPGA |
| CN108303937B (en) * | 2018-04-11 | 2023-09-19 | 江苏电子信息职业学院 | Filter based on ARM and FPGA |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN100470207C (en) | Low-power consumption two-wire system vortex flowmeter | |
| CN110289859A (en) | Parallel time based on multi-disc ADC replaces High Speed Sampling System | |
| CN201130369Y (en) | Multichannel synchronous data capturing card based on VXI bus | |
| CN104899167A (en) | Portable high-speed data acquisition method based on FPGA | |
| CN201130946Y (en) | Multichannel synchronous data capturing card based on PXI bus | |
| CN111141333A (en) | Multichannel integrated form sensor data collection station | |
| CN207937832U (en) | A kind of filter based on ARM and FPGA | |
| CN104237905A (en) | Big Dipper detector | |
| CN113281610A (en) | Electric power traveling wave fault location system | |
| CN201247466Y (en) | High speed real-time data collection system | |
| CN1104628C (en) | Digital signal processing system of vortex street flowmeter | |
| CN203054048U (en) | Touch and portable-type digital storage oscilloscope based on NIOS II platform | |
| CN203883807U (en) | Digital atomic frequency standard system circuit | |
| CN205583839U (en) | Computer integrated protection measurement and control device of transformer substation | |
| CN206922765U (en) | Touch order vectors modulation signal generator | |
| CN108303937A (en) | A kind of filter based on ARM and FPGA | |
| CN205899431U (en) | Function signal generator based on singlechip | |
| CN210572277U (en) | Chip with water quality detection interface | |
| CN211401294U (en) | Multichannel integrated form sensor data collection station | |
| CN110361515B (en) | Chip with water quality detection interface | |
| CN204376876U (en) | Data acquisition system | |
| CN203732930U (en) | An energy source data acquisition terminal with two RS485 interfaces | |
| CN106767969A (en) | A kind of signal recorder | |
| CN2781628Y (en) | Selection type reactive power compensation controller | |
| CN104485924A (en) | Multi-path high-power high-frequency signal generator used for piezoelectric ceramics |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20181002 |
|
| CF01 | Termination of patent right due to non-payment of annual fee |