CN207925523U - Memory device and electronic equipment - Google Patents
Memory device and electronic equipment Download PDFInfo
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- CN207925523U CN207925523U CN201820308110.8U CN201820308110U CN207925523U CN 207925523 U CN207925523 U CN 207925523U CN 201820308110 U CN201820308110 U CN 201820308110U CN 207925523 U CN207925523 U CN 207925523U
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- Mram Or Spin Memory Techniques (AREA)
- Hall/Mr Elements (AREA)
- Semiconductor Memories (AREA)
Abstract
The utility model embodiment provides a kind of memory device and electronic equipment.The memory device includes：Resistive material, the first conductive layer stacked gradually, magnetic tunnel junction and the second conductive layer；Resistive material is between the first conductive layer and the second conductive layer；Resistive material is fitted in the edge of magnetic tunnel junction, with coated magnetic tunnel knot；Magnetic tunnel junction includes：Magnetic fixed bed, barrier layer and the free magnetic layer stacked gradually；It is formed with conductive channel in the region of magnetic tunnel junction in resistive material, the both ends of conductive channel are connected on magnetic fixed bed and free magnetic layer.The memory device that the utility model embodiment provides can be equivalent to the parallel connection of magnetic memory cells and electric impedance memory unit on electricity structure, have many advantages, such as fast read or write speed, unlimited read-write operation and high switch ratio.
Description
Technical field
The utility model is related to technical field of semiconductors more particularly to a kind of memory devices and electronic equipment.
Background technology
Currently, magnetic RAM (Magnetic Random Memory, MRAM) is novel nonvolatile storage,
It is not necessarily to continued power in data storage procedure, the influence of leakage current during device data is kept can be reduced.
Although MRAM has magnetoresistive characteristic, and has the characteristics that fast read or write speed, unlimited read-write operation and anti-irradiation,
But the switch ratio (ON/OFF ratio) of MRAM is relatively low.Lower switch ratio makes MRAM in the prior art be difficult to meet
To the demand of the memory device of higher performance in practical application.
Utility model content
The utility model embodiment provide a kind of memory device and electronic equipment, and it is an object of the present invention to provide it is a kind of both have read
The advantages that writing rate is fast, unlimited read-write operation also has the memory device of high switch ratio.
In order to solve the above-mentioned technical problem, one embodiment of the utility model provides a kind of memory device.The memory device
Including：Resistive material, the first conductive layer stacked gradually, magnetic tunnel junction and the second conductive layer；The resistive material is located at
Between first conductive layer and second conductive layer；The resistive material is fitted in the edge of the magnetic tunnel junction,
To wrap up the magnetic tunnel junction；The magnetic tunnel junction includes：Magnetic fixed bed, barrier layer and the magnetism stacked gradually is certainly
By layer；Wherein, the direction of magnetization of the magnetic fixed bed is fixed, the direction of magnetization of the free magnetic layer can in externally-applied magnetic field or
It is overturn under the action of polarization current；Conductive lead to is formed in the resistive material in the region of the magnetic tunnel junction
The both ends in road, the conductive channel are connected on the magnetic fixed bed and the free magnetic layer.
Optionally, the conductive channel is ion channel.
Optionally, the magnetic tunnel junction is in elliptic cylindrical shape or cylindrical-shaped structure；The conductive channel includes multiple；It is multiple
The conductive channel is formed in around the side of the elliptic cylindrical shape or the cylindrical-shaped structure.
Optionally, the resistive material includes：It is one or more in silica, silicon nitride and hafnium oxide.
Optionally, when the resistive material is silica, resistive material and the magnetism described in the resistive material middle-range
The ratio of silicon ion concentration and oxygen ion concentration is the first ratio in region of the distance at the interface of tunnel knot less than 10nm；It is described
The distance at the interface of resistive material and the magnetic tunnel junction described in resistive material middle-range is dense more than silicon ion in the region of 10nm
The ratio of degree and oxygen ion concentration is the second ratio；First ratio is more than second ratio；The conductive channel is silicon
Ion channel.
Optionally, the magnetic fixed bed includes：The magnetic reference layer and pinned magnetic layer of stacking；The magnetic reference layer
Between the pinned magnetic layer and the barrier layer；The direction of magnetization in the magnetic reference layer and the pinned magnetic layer
It is fixed, and the direction of magnetization in the magnetic reference layer and the pinned magnetic layer is opposite；Wherein, the magnetic reference layer and institute
It includes ferromagnetic metallic material to state free magnetic layer；The pinned magnetic layer includes antiferromagnetic metal material.
Optionally, the magnetic reference layer further includes nonmagnetic material and/or oxide；The free magnetic layer is also
Including nonmagnetic material and/or oxide；The nonmagnetic material include one kind in tantalum, ruthenium, tungsten, iridium, platinum or
It is a variety of.
Optionally, the magnetic reference layer is comprehensive ferromagnetic layer SyF structures.
Optionally, the barrier layer is magnesium oxide layer；The free magnetic layer be double-layer structure, including CoFe layer and
CoFeB layer；The CoFe layer is between the CoFeB layer and the magnesium oxide layer.
Optionally, the magnetic tunnel junction further includes：With the seed layer of first conductive layer contact and with described second
The coating of conductive layer contact.
A kind of electronic equipment is provided in another embodiment of the utility model.The electronic equipment includes above-mentioned memory
Part and semiconductor substrate；First conductive layer deposition is on the semiconductor substrate.
The utility model embodiment proposes a kind of while having impedance operator and the novel non-volatile memory of magnetoresistive characteristic
Device cell, the memory device can be equivalent to the parallel connection of magnetic memory cells and electric impedance memory unit on electricity structure,
Have the advantages that magnetic memory cells and electric impedance memory unit respectively, that is, there is high switch ratio, fast read/write characteristics, nothing
It the advantages that limit time read-write operation, realizes and integrates quick computing function and stable storage function in same device cell.
Description of the drawings
In order to illustrate the embodiment of the utility model or the technical proposal in the existing technology more clearly, below will be to embodiment
Or attached drawing needed to be used in the description of the prior art is briefly described, it should be apparent that, the accompanying drawings in the following description is
Some embodiments of the utility model, for those of ordinary skill in the art without creative efforts,
Other drawings may also be obtained based on these drawings.
Fig. 1 is the structural schematic diagram for the memory device that one embodiment of the utility model provides；
Fig. 2 is the memory device that provides of one embodiment of the utility model in the structural schematic diagram not plus when the second conductive layer；
Fig. 3 a are that the logic that one embodiment of the utility model provides stores sequence diagram；
Fig. 3 b are the transparent storage sequence diagram that another embodiment of the utility model provides；
Fig. 4 is the flow diagram of the preparation method for the memory device that one embodiment of the utility model provides；
Fig. 5 is the structural schematic diagram for the memory device with conductive channel that another embodiment of the utility model provides.
Specific implementation mode
It is new below in conjunction with this practicality to keep the purpose, technical scheme and advantage of the utility model embodiment clearer
Attached drawing in type embodiment, the technical scheme in the utility model embodiment is clearly and completely described, it is clear that is retouched
The embodiment stated is the utility model a part of the embodiment, instead of all the embodiments.Based on the implementation in the utility model
Example, every other embodiment obtained by those of ordinary skill in the art without making creative efforts belong to
The range of the utility model protection.
The term used in the utility model embodiment is the purpose only merely for description specific embodiment, and is not intended to
Limit the utility model.The utility model embodiment and the "an" of singulative used in the attached claims,
" described " and "the" are also intended to including most forms, unless context clearly shows that other meanings, " a variety of " generally comprise to
It is two kinds few, but it includes at least one situation to be not excluded for.
It should be appreciated that term "and/or" used herein is only a kind of incidence relation of description affiliated partner, indicate
There may be three kinds of relationships, for example, A and/or B, can indicate：Individualism A, exists simultaneously A and B, individualism B these three
Situation.In addition, character "/" herein, it is a kind of relationship of "or" to typically represent forward-backward correlation object.
Depending on context, word as used in this " if ", " if " can be construed to " ... when " or
" when ... " or " in response to determination " or " in response to monitoring ".Similarly, context is depended on, phrase " if it is determined that " or " such as
Fruit monitor (condition or event of statement) " can be construed to " when determining " or " in response to determination " or " when monitoring (statement
Condition or event) when " or " in response to monitoring (condition or event of statement) ".
It should also be noted that, the terms "include", "comprise" or its any other variant are intended to nonexcludability
Including so that commodity or system including a series of elements include not only those elements, but also include not clear
The other element listed, or further include for this commodity or the intrinsic element of system.In the feelings not limited more
Under condition, the element that is limited by sentence "including a ...", it is not excluded that including the element commodity or system in also
There are other identical elements.
Before being described in detail to the technical solution of the utility model, the state of the art is briefly explained
It states.
Fig. 1 is the structural schematic diagram for the memory device that one embodiment of the utility model provides.As shown in Figure 1, the memory
Part, including resistive material 4, the first conductive layer 1 stacked gradually, magnetic tunnel junction 2 and the second conductive layer 3；The resistive material
Material 4 is between first conductive layer 1 and second conductive layer 3；The resistive material 4 is fitted in the magnetic tunnel junction
2 edge, to wrap up the magnetic tunnel junction 2；The magnetic tunnel junction 2 includes：The magnetic fixed bed 21 that stacks gradually, gesture
Barrier layer 22 and free magnetic layer 23；Wherein, the direction of magnetization of the magnetic fixed bed 21 is fixed, the free magnetic layer 23
The direction of magnetization can be overturn under the action of externally-applied magnetic field or polarization current；Close to the magnetic tunnel in the resistive material 4
Conductive channel is formed in the region of road knot 2, the both ends of the conductive channel are connected to the magnetic fixed bed 21 and institute
It states on free magnetic layer 23.
Wherein, first conductive layer 1 and second conductive layer 3 include：Tantalum, ruthenium, aluminium, copper, platinum, copper nitride, chromium, gold
In it is one or more.As shown in Figure 1, above-mentioned memory device can be considered that interior outer double-layer structure, endothecium structure are by magnetic tunnel
It ties (Magnetic Tunnel Junctions, MTJ) to constitute, layer structure is made of resistive material 4.It is close in resistive material 4
It is formed with conductive channel in magnetic tunnel junction 2 and the region at the interface of resistive material 4.The conductive channel and the magnetic tunnel
Knot is in parallel on electricity structure.In addition, magnetic tunnel junction 2, the first conductive layer 1 and the second conductive layer 3 constitute MRAM；Resistive
Material 4, the first conductive layer 1 and the second conductive layer 3 constitute RRAM, and therefore, above-mentioned memory can regard MRAM's and RRAM as
Parallel-connection structure.Since core function unit is MTJ in MRAM, core function unit is MIM (metal-insulator media-gold in RRAM
Belong to, Metal-Insulator-Metal), therefore, as shown in Figure 1, in above-mentioned memory device, it can also regard MTJ and MIM as
Parallel connection.
In the prior art, MRAM has magnetoresistive characteristic, and fast, unlimited read-write operation and anti-irradiation with read or write speed
The features such as, but the switch ratio (ON/OFF ratio) of MRAM is relatively low；The advantages of RRAM is can to obtain bigger on-off ratio
Rate, and thermal stability is good, but MRAM is compared, RRAM is limited to its conductive filament break-make mechanism, and read or write speed is slower, and reads and writes number
Receive limitation physically.Therefore, memory device provided by the utility model is due to above-mentioned characteristic in parallel, while having above-mentioned
The advantages of MRAM and RRAM respectively not only have many advantages, such as that read or write speed is fast, unlimited read-write operation, also have high on-off ratio
The advantages that rate and good thermal stability.It will describe in detail below to the application of above-mentioned memory device：
Since MTJ includes that parallel configuration (P) and antiparallel configuration (AP), MIM include at least high-impedance state (High
Resistance State, HRS) and low configuration (Low Resistance state, LRS), therefore, the utility model embodiment
This four configurations therefore can also while realizing store function including at least P, AP, HRS and LRS for the memory device of middle offer
Realize logical calculated.
By above-mentioned memory device applications in logic store (logic-in-memory) basic ideas be：Utilize this practicality
The MTJ mentioned in novel and characteristic parallel with one another in structure MIM realize that high speed logic calculates using MTJ, use MIM realities
Existing mass data storage.Wherein MTJ can be overturn between parastate P and antiparallel state AP, and MIM can be in high-impedance state
HRS and low resistance state LRS are overturn.When MIM is in high-impedance state, MTJ can be used to carry out calculating operation, in-between result is temporary
In P the or AP states of MTJ.Later, the result of calculation in MTJ according to a certain mapping relations (such as：By AP states and LRS
Corresponding, P states and HRS are corresponding) it is stored among the HRS or LRS of MIM, realize non-volatile memory.
In order to facilitate the operation principle of logic storage is understood, will be introduced below with specific implementation：Such as：This reality
Turnover voltage with MTJ in the memory device of novel offer is 0.4V, and the turnover voltage of MIM is 0.9V, is used in this example
To the resistance of MTJ and MIM units be respectively：RAP=1390 Ω, RP=1160 Ω, RHRS=64500 Ω, RLRS=660 Ω.
6 continuous states being related in this example are defined as follows：
Initialization：(INIT defines the original state of MTJ and MIM in this stage)；
(Com. realizes high speed logic computing function that is, within this stage using MTJ for calculating；This stage may include repeatedly counting
Calculate operation)；
Storage (Storing in this stage stores the data being calculated in MTJ of upper stage into MIM)；
(Sleeping, i.e., stop the power supply to device in this stage, and data realize non-volatile deposit in MIM for suspend mode
Storage)；
(the data stored in MIM are again restored in MTJ by Restoring, be the meter of next level segment for data recovery
It is considered preparation)；
It calculates (Com. MTJ can be used to be calculated into according to high speed logic that is, within this stage).
The sequence diagram arrived involved in this application is as shown in Figure 3a：Wherein Voltage refers to memory device shown in Fig. 1
The first conductive layer and the second conductive layer on the applied voltage that is added；MTJ-State is the state of MTJ；MIM-State is
The state of MIM, current are the total current by the memory device.
When initialization, additional+0.1V voltages, the original state for defining MTJ is AP states, and the original state of MIM is HRS states；
When to the memory device application+0.4V voltages, MIM cell resistances remain unchanged, and are still in HRS states, and MTJ is turned over by AP states
Switch to P states；Calculation stages have been subsequently entered, logical calculated is carried out by MTJ, HRS states has been in always in calculation stages MIM, is counting
At the end of the calculation stage, the state of the MTJ can be read by external reading circuit, if reading MTJ is in AP states, additional+
0.9V voltages so that MTJ is P states by the overturning of AP states, and is LRS states by HRS overturnings by MIM, thereby realizes the calculating of MTJ
As a result AP states store the LRS states (mapping relations i.e. defined above) into MIM.After current calculating, device is in suspend mode
State, waiting calculate next time.Before calculating starts next time, the result of calculation that will be stored in MIM is needed to be restored in MTJ,
Recovery process includes：The state of MIM is read by external reading circuit, if the MIM read is LRS states, no matter MTJ is
What state, as long as additional -0.9V voltages, you can it is AP states to overturn MTJ, meanwhile, it is HRS states that can also overturn MIM by LRS
(note：Add two purposes of -0.9V voltages：First, being AP states by MTJ overturnings, to realize that data are restored；Second is that MIM is turned over by LRS
Switch to HRS states, the result accuracy that MTJ carries out logical calculated when MIM is in high configuration can be higher than when MIM is in low resistance state
Logical calculated precision).Subsequently enter calculation stages next time.
You need to add is that：The stage that (1) marks in Fig. 3 a is the first time calculating operation of calculation stages com.1, (2) mark
The stage of note is the last time calculating operation of calculation stages com.1；(6) stage marked is calculation stages com.2 next time
First time calculating operation.
It should be noted that when it is P states that external reading circuit, which reads the state that MTJ is obtained, since MIM has been in HRS
State (preset mapping relations are exactly that P states correspond to HRS states), it is therefore not necessary to add+0.9V voltages to carry out data storage, directly
Connect suspend mode.If the state read out from MIM is HRS, plus it is P states (note that+0.4V voltages, which can overturn MTJ,：If plus
+ 0.9V voltages inevitably result in MIM and are overturn from HRS to LRS states, and when MIM is LRS states, MTJ carries out logical calculated precision meeting
Decline).
Further, since resistance when MIM is in high-impedance state HRS is much larger than the resistance of MTJ, and when MIM is in low resistance state LRS
Resistance again be far below MTJ resistance.In view of the characteristic in parallel of MTJ and MIM, therefore when MIM is in LRS, memory device
All-in resistance is mainly determined that at this moment, the change of the state of MTJ is difficult to be read by the resistance of MIM, in outside, is equivalent to MTJ
Resistance state got up by " hiding ", i.e. MTJ is in " transparent " (Transparent) state；Conversely, when MIM is in HRS, device
Resistance is mainly determined by the resistance of MTJ, therefore external parallel (P) and antiparallel (AP) two configurations that can read MTJ, is equivalent to
MTJ is in " opaque " (Opaque) state.Therefore, the memory device in the present embodiment can also be achieved transparent storage.
In this example, added magnetic field act as auxiliary MTJ overturning, in practical applications according to MTJ film layer design and
Characteristic is different, it is not essential however to existing.Such as：It, can be additional by applying when the thinner thickness of the free magnetic layer in MTJ
Voltage applies polarization current, to realize the overturning of MTJ；When the magnetic free layer thickness in MTJ is thicker, can not rely solely on
It realizes that MTJ is overturn by applying polarization current, MTJ can be assisted to overturn by adding externally-applied magnetic field.In addition, for MIM and
Speech is to apply electric field by pressing applied voltage, the overturning of MIM is realized by electric field.When MIM is in high-impedance state HRS,
Conductive filament in MIM is off；When MIM is in low resistance state LRS, the conductive filament in MIM is in the conduction state.
Fig. 3 b are a sequence diagram of transparent storage application example, wherein Mag.field is auxiliary magnetic field, Voltage is outer
Making alive, MTJ-state are MTJ configurations, MIM-state is MIM configurations, the parallel resistance that Device-state is memory device
Configuration, current are the total current for flowing through the memory device.
In this example, in the starting stage, the original state for defining MTJ is P states, and the original state for defining MIM is LRS
State.When the additional magnetic fields 0Oe and additional -0.9V voltages, the resistance states of MTJ are constant, and MIM is HRS states by the overturning of LRS states；
When the additional magnetic fields -104Oe and additional -0.4V voltages, the resistance states invariant state of MIM, MTJ is AP states by the overturning of P states.
By Fig. 3 b it is found that in " opaque " (Opaque) state phase, when MIM is in HRS states, additional -0.4V voltages
And when the magnetic fields -104Oe or additional+0.4V voltages and the magnetic fields+110Oe, the overturning of MTJ resistance states is embodied to the storage
In the parallel resistance configuration of device, therefore, the configuration variation of MTJ can be read.
In " transparent " (Transparent) state phase, when MIM is in LRS states, additional -0.4V voltages and -
The magnetic fields 104Oe or additional+0.4V voltages and the magnetic fields+110Oe, the overturning of MTJ resistance states, which does not embody, arrives the memory device
Parallel resistance configuration on, therefore, the variation of the configuration of MTJ cannot be read.
The resistance of MTJ and MIM units is respectively in this example：RAP=1390 Ω, RP=1160 Ω, RHRS=64500
Ω and RLRS=660 Ω.
The utility model embodiment proposes a kind of while having impedance operator and the novel non-volatile memory of magnetoresistive characteristic
Device cell, the memory device can be equivalent to the parallel connection of magnetic memory cells and electric impedance memory unit on electricity structure,
Have the advantages that magnetic memory cells (MRAM) and electric impedance memory unit (RRAM) are respective simultaneously, that is, there is high on-off ratio
The advantages that rate, fast read/write characteristics, unlimited read-write operation, realize in same device cell integrate quick computing function and
Stable storage function.
Further, the first conductive layer can be deposited in semiconductor substrate or dielectric substrate.The semiconductor substrate can be with
To be integrated with the chip of various devices.That is 10 identified in Fig. 1 can be semiconductor substrate or dielectric substrate.This reality
This is not especially limited with novel, can be selected according to actual needs.
In a kind of achievable method, as shown in Figure 1, the magnetism fixed bed 21 is covered in first conductive layer 1
On；Second conductive layer 2 is covered on the free magnetic layer 23；The resistive material 4 is fitted in the magnetic fixed bed
21,22 edge of the free magnetic layer 23 and the barrier layer.
In another achievable scheme, the free magnetic layer 23 is covered on first conductive layer 1；Described
Two conductive layers 2 are covered on the magnetic fixed bed 21；The resistive material 4 is fitted in the magnetic fixed bed 21, the magnetic
22 edge of free love layer 23 and the barrier layer.
Wherein, the direction of magnetization in magnetic fixed bed 21 is fixed, and the direction of magnetization in free magnetic layer 23 can add pole outside
It is overturn under the action of galvanic current or externally-applied magnetic field.
It should be noted that conductive lead to is formed in the resistive material 4 in the region of the magnetic tunnel junction 2
Road.The conductive channel is just present in the interface after the completion of prepared by the memory device.So, it is deposited described
When memory device is applied in logical calculated or transparent storage, which can be directly entered working condition, without in memory
Part both ends press larger voltage or electric current to form conductive channel, reduce power consumption.Specifically, the conductive channel is ion
Channel.
Further, the magnetic tunnel junction 2 can be in elliptic cylindrical shape or cylindrical-shaped structure, and the resistive material 4 is fitted in
The side of the elliptic cylindrical shape or cylindrical-shaped structure.The conductive channel includes multiple；Multiple conductive channels are formed in institute
Around the side for stating elliptic cylindrical shape or the cylindrical-shaped structure, i.e., multiple conductive channels are along elliptic cylindrical shape or cylindrical-shaped structure
The circumferential direction of magnetic tunnel junction is arranged in order.The both ends of each conductive channel are connected to the magnetism in the multiple conductive channel
On fixed bed 21 and the free magnetic layer 23, and multiple conductive channels are distributed in the side of elliptic cylindrical shape or cylindrical-shaped structure
Around.Such as：As shown in figure 5, the platinum manganese stacked gradually, ferro-cobalt boron, ruthenium and ferro-cobalt boron are magnetic fixed bed 21, it is covered in institute
It is free magnetic layer 23 to state the ferro-cobalt boron above magnesia, and magnesia is barrier layer 22, and conductive channel 41 is connected to magnetic fixation
On layer 21 and free magnetic layer 23.As shown in Fig. 2, the magnetic tunnel-junction 2 is in elliptic cylindrical shape.Fig. 2 is vertical view, the upper end of MTJ
Face is oval.
It should be noted that prepare based on magnetic anisotropy in face (In-plane Magnetic Anisotropy,
When MTJ IMA), MTJ can be designed to elliptic cylindrical shape, passing through the magnetization side in externally-applied magnetic field fixed magnetic reference layer in this way
Xiang Shi can add externally-applied magnetic field, so that the direction of magnetization in the magnetic reference layer and institute along the elliptical long axis direction
It is consistent to state long axis direction.In addition, can also when magnetic free layer thickness is thicker, along auxiliary magnetic field in long axis direction addition face with
Assist MTJ overturnings.It is preparing based on perpendicular magnetic anisotropic (Perpendicular Magnetic Anisotropy, PMA)
When MTJ, MTJ can both be arranged to cylindrical-shaped structure.It should be noted that the benefit for being arranged to cylindrical-shaped structure has：Convenient for contracting
Small device size and simple for process.
Specifically, the region in the resistive material close to the magnetic tunnel junction refers to resistive material middle-range institute
The distance for stating the interface of resistive material and the magnetic tunnel junction is less than the region of 10nm.In general, resistive material middle-range institute
State the distance at the interface of resistive material and the magnetic tunnel junction less than will appear in the region of 10nm a kind of cation or bear from
Sub- clustering phenomena, exactly because also cation or anion aggregation, just forms above-mentioned conductive channel.Therefore, above-mentioned to lead
Region present in electric channel be the interface of resistive material and the magnetic tunnel junction described in the resistive material middle-range away from
From the region less than 10nm.
In addition, the magnetism fixed bed 21 can be magnetic reference layer, or the combination for magnetic reference layer and pinned magnetic layer.
In a kind of achievable scheme, the magnetism fixed bed 21 includes magnetic reference layer, the magnetization side in the magnetic reference layer
To fixation.In another achievable scheme, as shown in Figure 1, the magnetism fixed bed 21 includes：The magnetic reference layer of stacking
211 and pinned magnetic layer 212；The magnetic reference layer 211 is between the pinned magnetic layer 212 and the barrier layer 22；
The direction of magnetization in the magnetic reference layer 211 and the pinned magnetic layer 212 is fixed, and the magnetic reference layer 211 and institute
The direction of magnetization stated in pinned magnetic layer 212 is opposite；Wherein, the magnetic reference layer 211 and the free magnetic layer 23 include
Ferromagnetic metallic material；The pinned magnetic layer 212 includes antiferromagnetic metal material.Preferably, the magnetic reference layer further includes
Nonmagnetic material and/or oxide；The free magnetic layer further includes nonmagnetic material and/or oxide；It is described
Nonmagnetic material includes one or more in tantalum, ruthenium, tungsten, iridium, platinum.Pass through the nonmagnetic material and/or oxygen
Compound can optimize the magnetism characteristic of thin magnetic film.The oxide can be metal oxide, such as：Magnesia, three oxidations two
Aluminium etc..
When the direction of magnetization in the free magnetic layer 23 is consistent with the direction of magnetization in the magnetic reference layer 211, then
For parallel state P；When the direction of magnetization in free magnetic layer 23 with the direction of magnetization in the magnetic reference layer 211 on the contrary, being then
Anti-parallel state AP.Resistance when resistance when MTJ is in parallel state P is less than in anti-parallel state AP.
Further, the conductive channel is connected between the magnetic reference layer 211 and the free magnetic layer 23.
When it is implemented, the pinned magnetic layer 212 can be covered on first conductive layer 1；The magnetic reference
Layer 211 is covered in the pinned magnetic layer 212；The barrier layer 22 is covered in the magnetic reference layer 211；The magnetism
Free layer 23 is covered on the barrier layer 22, and second conductive layer 3 is covered on the free magnetic layer 23.Alternatively, will
The free magnetic layer 23 is covered on first conductive layer 1, and the barrier layer 22 is covered on the free magnetic layer 23,
The magnetic reference layer 211 is covered on the barrier layer 22；The pinned magnetic layer 212 is covered in the magnetic reference
On layer 211, second conductive layer is covered on the pinning layer 212.
Since there are anti-ferromagnetic coupling interactions can guarantee magnetic reference between magnetic reference layer 211 and pinned magnetic layer 212
The direction of magnetization in layer 211 is fixed.
Above-mentioned resistive material includes：Silica (SiOx), it is one or more in silicon nitride and hafnium oxide, this
Outside, the resistive material may also include：Al2O3,CoO,NiO,FeOx,CuxO,TiO2,MnO2,TaOx, ZnO, ZrO2In one kind
It is or a variety of, wherein the x is the number more than or equal to 1.
When the resistive material 4 is silica, resistive material 4 described in 4 middle-range of resistive material and the magnetic tunnel
The ratio of silicon ion concentration and oxygen ion concentration is the first ratio in region of the distance at the interface of road knot 2 less than 10nm；It is described
Silicon ion in region of the distance at the interface of resistive material 4 and the magnetic tunnel junction 2 described in 4 middle-range of resistive material more than 10nm
The ratio of concentration and oxygen ion concentration is the second ratio；First ratio is more than second ratio；The conductive channel is
Silicon ion channel.It that is to say, the distance at the interface of resistive material 4 and the magnetic tunnel junction 2 described in 4 middle-range of resistive material
Occurs silicon ion aggregation in region less than 10nm, so as to form silicon ion channel.
When the resistive material is silica (SiOx) when, the conductive channel, also referred to as conductive filament (Conductive
Filament, CF), it is Si ion channels (Si pathway), it should be understood that：The conductive filament CF in the example of other resistive materials
It can be made of other ion channels.
Further, the magnetic reference layer 211 is that comprehensive ferromagnetic layer SyF (synthetic ferrimagnetic) is tied
Structure.The structure composition is ferromagnetic layer/non-ferromagnetic layers/ferromagnetic layer, i.e., includes one layer of non-ferromagnetic layers between two ferromagnetic layers, such as：
Magnetic reference layer 211 includes ferro-cobalt boron layer, layer of ruthenium and the ferro-cobalt boron layer stacked gradually in Fig. 5, wherein layer of ruthenium is non-ferromagnetic layers.
Compared to single ferromagnetic layer structure, the stray field (stray magnetic field) for being applied to free magnetic layer 23 can be reduced,
To ensure the free rollover characteristics of free magnetic layer.
Further, the barrier layer 22 is magnesium oxide layer or alundum (Al2O3) layer.The present embodiment does not limit this specifically
It is fixed, it can be selected according to actual needs.
You need to add is that when the barrier layer 22 is magnesium oxide layer, it is preferred that the free magnetic layer 23 is bilayer
Structure, including CoFe layer and CoFeB layer；The CoFe layer is between the CoFeB layer and the magnesium oxide layer.Certainly by magnetism
It is arranged to above-mentioned double-layer structure by layer 23, can effectively prevents the boron in CoFeB layer from diffusing into magnesium oxide layer, to keep away
Exempt from body-centered cubic (body-centered cubic) lattice structure of the magnesium oxide layer caused by the diffusion of boron and CoFeB layer
It destroys, and then avoids because the destruction of lattice structure leads to tunnel magneto resistance (Tunnel Magnetoresistance, TMR)
Reduce (note：TMR is bigger, and MTJ reliabilities are better).
It should be noted that as shown in figure 5, the free magnetic layer 23 or simple single layer structure, such as：For list
The ferro-cobalt boron CoFeB of layer.
Further, as shown in figure 5, the magnetic tunnel junction 2 further includes：The seed crystal contacted with first conductive layer 1
Layer 25 and the coating 24 contacted with second conductive layer 3.Namely the magnetic tunnel junction includes seed layer 25, magnetic pinning
Layer 212, magnetic reference layer 211, barrier layer 22, free magnetic layer 23 and coating 24.The design of seed layer and coating is
In view of chip (wafer) grade CIPT tests the resistors match of (Current-in-plane tunneling measurement)
Needs.Tunnel magneto resistance (Tunnel magnetoresistance, TMR) and resistor area can be obtained by CIPT tests
Vector product (Resistance-area product, RA).In a kind of achievable scheme, successively in first conductive layer
Upper deposition seed layer, pinned magnetic layer, magnetic reference layer, barrier layer, free magnetic layer and coating, the coating covering
On the free magnetic layer (i.e. coating is between free magnetic layer and the second conductive layer), magnetic free is effectively prevented
Metal in layer is aoxidized.In another achievable scheme, seed layer, magnetism are deposited on first conductive layer successively
Free layer, barrier layer, magnetic reference layer, pinned magnetic layer and coating, the coating are covered in the pinned magnetic layer
On (i.e. coating is between pinned magnetic layer and the second conductive layer), effectively prevent the metal in pinned magnetic layer by oxygen
Change.
In a kind of achievable scheme, above-mentioned magnetic tunnel junction 2 includes the pinned magnetic layer that antiferromagnetic metal is constituted
212：Platinum manganese PtMn；The magnetic reference layer 211 that feeromagnetic metal is constituted：The ferro-cobalt boron CoFeB that stacks gradually, ferro-cobalt CoFe, ruthenium Ru,
Ferro-cobalt boron CoFeB and ferro-cobalt CoFe (notes：In the present embodiment, magnetic reference layer 211 is five-layer structure, and middle layer ruthenium Ru is non-magnetic
Property metal layer)；Barrier layer 22：Magnesia MgO；The free magnetic layer 23 that feeromagnetic metal is constituted：The ferro-cobalt CoFe and ferro-cobalt of stacking
Boron CoFeB (notes：Free magnetic layer 23 is double-layer structure).
Wherein, each element composition ratio can differ in above-mentioned ferromagnetic metallic material, magnetic reference layer 211 and magnetic free
Each layer thickness ranging from 0~5nm in layer 23.Such as：Co in ferro-cobalt boron CoFeB:Fe:B=40:40:20, ferro-cobalt Co:Fe=
75:25.Barrier layer 22 includes magnesia MgO, and thickness range is 0~2nm.First conductive layer can be the tantalum (Ta) and ruthenium of stacking
(Ru), the second conductive layer may include that chromium (Cr), golden (Au), total thickness are 10~300nm.
In addition, resistive material can by spin coating spin-coating glass, such as：Spin coating Spin-on polymer Accuflo, spin coating
Complete annealing obtains, and the resistive material annealed includes silica, and closer to the interface of resistive material and magnetic tunnel junction
Place, silicon ion is more, and oxonium ion is fewer.The upper surface of MTJ is oval, and size can be nanoscale.Wherein, Spin-on
Include the elements such as silicon, oxygen, carbon, hydrogen in polymer Accuflo.
It should be noted that when in resistive material in the memory device that be prepared in magnetic tunnel junction region shape
At there is conductive filament, then the memory device is wrapped in magnetic tunnel junction (mram cell) four in structure for conductive filament (RRAM units)
Week, the two are in electrical parallel state.Wherein magnetic tunnel junction can be based on perpendicular magnetic anisotropic (Perpendicular
Magnetic Anisotropy, PMA) or face in magnetic anisotropy (In-plane Magnetic Anisotropy), MTJ
Material category, film thickness and shape etc. can be different.The device is double-layer structure, and endothecium structure is by traditional MTJ
It constitutes, sequentially consists of hearth electrode, magnetic tunnel junction (pinned magnetic layer, magnetic reference layer, barrier layer, magnetic free
Layer), top electrode, outer layer be resistive material.The magnetic tunnel junction can include the pinned magnetic layer, ferromagnetic that antiferromagnetic metal is constituted
The free magnetic layer of magnetic reference layer, barrier layer, feeromagnetic metal composition that metal is constituted.Its free magnetic layer and magnetic reference
Layer, includes the one or more including but not limited to mixed-metal materials ferro-cobalt CoFe, ferro-cobalt boron CoFeB or ferronickel NiFe, and
Each element composition ratio can differ in the mixed-metal materials, and free magnetic layer and magnetic reference layer are multilayered structure, and
Each layer thickness ranging from 0~5nm in free magnetic layer and magnetic reference layer；Its barrier layer (i.e. oxide barrier layer) includes oxidation
Magnesium MgO, alundum (Al2O3) Al2O3, hafnium oxide HfO2Or other oxides, thickness range are 0~10nm.The magnetic tunnel-junction
The thickness of the specific thickness of each layer, especially free magnetic layer and oxide barrier layer, in combination with specific practical application and technique
Demand is selected.In free magnetic layer and magnetic reference layer other than feeromagnetic metal, the magnetic reference layer further includes non-magnetic
Property metal material and/or oxide, the free magnetic layer further include nonmagnetic material and/or oxide, for optimizing
Film magnetism characteristic；The nonmagnetic metal is selected from but is not limited to metal material tantalum (Ta), ruthenium (Ru), tungsten (W), iridium (Ir), platinum
(Pt) one kind in and combinations thereof, thickness range are 0~5nm；Its pinned magnetic layer is including but not limited to mixed-metal materials platinum
Manganese PtMn, iridium manganese IrMn, cobalt platinum multilayer film [Co/Pt]nWith cobalt palladium multilayer film [Co/Pd]nIn one or more, thickness range
It is the natural number more than or equal to 1 for 0~50nm, wherein n.
It will be described in detail below with a MTJ with magnetic anisotropy in face：
The film layer structure of magnetic tunnel junction MTJ2 is followed successively by according to the sequence in Fig. 1 from bottom to up：Ta(5)/Ru(15)/
Ta(5)/Ru(15)/Ta(5)/Ru(5)/PtMn(20)/CoFeB(1.5)/CoFe(2.0)/Ru(0.85)/CoFeB(1.5)/
CoFe (1.5)/MgO (0.8)/CoFe (1.5)/CoFeB (1.5)/Ru (2)/Ta (5)/Ru (10), interior bracket is thicknesses of layers,
Unit is nanometer, and it is interface between adjacent two film layer that symbol "/", which is understood to, such as：That the "/" in Ta/Ru indicates is Ta
Interface between layer and Ru layers.
Wherein, the Ru (5) in Ta (5)/Ru (15)/Ta (5)/Ru (15)/Ta (5)/Ru (5) is seed layer (seed
Layer), it should be noted that Ta (5)/Ru (15)/Ta (5) of the bottom can be used as the first conductive layer in seed layer；MTJ2's
Core layer structure includes PtMn (20)/CoFeB (1.5)/CoFe (2.0)/Ru (0.85)/CoFeB (1.5)/CoFe (1.5)/MgO
(0.8)/CoFe (1.5)/CoFeB (1.5), wherein PtMn (20) are pinned magnetic layer；CoFeB(1.5)/CoFe(2.0)/Ru
(0.85)/CoFeB (1.5)/CoFe (1.5) is with comprehensive ferromagnetic layer SyF (Synethetic Ferrimagnetic) structure
Magnetic reference layer structure, the structure composition be ferromagnetic layer/non-ferromagnetic/ferromagnetic layer can reduce compared to single ferromagnetic layer structure
It is applied to the stray field (stray magnetic field) of free magnetic layer 23, to ensure freely overturning for free magnetic layer
Characteristic；MgO (0.8) is barrier layer 22, and CoFe (1.5)/CoFeB (1.5) is free magnetic layer 23；Ru(2)/Ta(5)/Ru(10)
In Ru (2) be coating (capping layer).
The memory device that the utility model embodiment provides, in structure：Conductive filament is wrapped in around magnetic tunnel junction, shape
At the parallel-connection structure of conductive filament and magnetic tunnel junction, the parallel connection of MRAM and RRAM is realized.
It is made annealing treatment after the magnetic tunnel ties spin coating spin-coating glass, you can conductive filament is formed in MTJ surroundings,
Realize the parallel connection of MTJ and MIM.The memory device can carry out logical calculated in MRAM architecture (MTJ), be carried out at RRAM structures (CF)
The combination for calculating and storing is realized in storage in same structure.Additionally by the high low resistance state of RRAM, it can also realize that MTJ's is saturating
Bright store function.
The beneficial effects of the utility model have following aspects：
(1) parallel connection of mram cell and RRAM units is realized in same device.
(2) device combines the advantage of two kinds of different memories of MRAM and RRAM, fast using read or write speed, reads infinitely
The MRAM write carries out logic computing function, and store function is realized using the good RRAM of data storage thermostabilization.
(3) device carries out logical calculated using the parts MRAM, is stored using the parts RRAM, realizes logical calculated
With integrating for store function, its parallel-connection structure can also be used and realize that " transparent storage " function, i.e. conductive filament primarily serve " a choosing
Select " function, i.e., selection is " transparent " state or " nontransparent " state.
(4) RRAM in the prior art is required for the process of a formation conductive filament before starting to work every time, that is, needs to apply
Add larger voltage or electric current, so that forming conductive filament in RRAM.Due to need to apply in the process larger voltage or
Electric current, to cause the loss in power consumption.And memory device provided by the utility model is after the completion of prepared by memory device, it is conductive
Silk has just been formed, therefore without by applying larger voltage or electric current to form conductive filament before each start to work, from
And reduce power consumption.
Another embodiment of the utility model additionally provides a kind of electronic equipment, which includes above-mentioned memory device
And semiconductor substrate；First conductive layer deposition is on the semiconductor substrate.Wherein, memory device, including resistive material
Material 4, the first conductive layer 1, magnetic tunnel junction 2 and the second conductive layer 3 stacked gradually；The resistive material 4 is located at described the
Between one conductive layer 1 and second conductive layer 3；The resistive material 4 is fitted in the edge of the magnetic tunnel junction 2, with
Wrap up the magnetic tunnel junction 2；The magnetic tunnel junction 2 includes：Magnetic fixed bed 21, barrier layer 22 and the magnetic stacked gradually
Free love layer 23；Wherein, the direction of magnetization of the magnetic fixed bed 21 is fixed, and the direction of magnetization of the free magnetic layer 23 can be
It is overturn under the action of externally-applied magnetic field or polarization current；In the resistive material 4 in the region of the magnetic tunnel junction 2
It is formed with conductive channel, the both ends of the conductive channel are connected to the magnetic fixed bed 21 and the free magnetic layer 23
On.
A kind of preparation method of above-mentioned memory device is described in detail below.Fig. 4 carries for another embodiment of the utility model
The flow diagram of the preparation method of the memory device of confession.As shown in figure 4, the preparation method includes：
101, magnetic tunnel junction is prepared on the first conductive layer.
102, in the periphery deposition resistive material of the magnetic tunnel junction, semi-finished product are obtained.
103, the semi-finished product are subjected to planarization process, to remove the resistive material being located above the magnetic tunnel junction
Material.
104, deposit second conductive layer on the semi-finished product after planarization process, obtains the memory device.
In above-mentioned steps 101, physical deposition method can be used and be sequentially depositing in magnetic tunnel junction on the first conductive layer
Each tunic.Usual magnetic tunnel junction includes：Magnetic fixed bed, barrier layer and free magnetic layer.The magnetic tunnel junction
In each tunic sedimentary sequence have it is following two kinds selection, select one：Magnetic fixed bed->Barrier layer->Deposited magnetic free layer；Choosing
Select two：Free magnetic layer->Barrier layer->Magnetic fixed bed.Wherein, symbol "->" indicate in next step.It in the specific implementation, can root
It carries out selecting different sedimentary sequences according to practical application.
The step of being sequentially depositing each tunic in the first conductive layer and magnetic tunnel junction can be used but be not limited to magnetron sputtering
(Sputtering), atomic layer deposition (Atomic layer deposit, atomic layer deposition), pulsed laser deposition (Pulsed
Laser deposition, pulsed laser deposition), molecular beam epitaxy (Molecular beam epitaxy, MBE), electron beam
It is deposited the methods of (E-beam evaporation).
When magnetic fixed bed includes：When pinned magnetic layer and magnetic reference layer, the selection one of sedimentary sequence：Magnetic pinning
Layer->Magnetic reference layer->Barrier layer->Deposited magnetic free layer；Selection two：Free magnetic layer->Barrier layer->Magnetic reference layer-
>Pinned magnetic layer.
It is to pass through argon ion bombardment in high vacuum conditions when using each tunic in magnetron sputtering deposition magnetic tunnel junction
Target material surface carries out deposition process.Using to target include but not limited to ferro-cobalt boron (CoFeB), ferro-cobalt (CoFe), magnesia
(MgO), aluminium oxide (Al2O3) ruthenium (Ru), tantalum (Ta), tungsten (W), cobalt (Co), platinum (Pt), palladium (Pd), ferronickel (NiFe), iridium (Ir),
Iridium manganese (IrMn), platinum manganese (PtMn) etc..In some particular example, the basic air pressure (base before magnetron sputtering process
Pressure) it is 3*10-8Torr is better than 3*10-8Torr。
In view of the film that deposited before can be completely covered for the film in deposition process, deposited afterwards, and each
The edge of layer film will appear the case where free magnetic layer is contacted with magnetic fixed bed, and therefore, it is necessary to pass through photoetching, etching etc.
Technique removes the edge of each tunic in magnetic tunnel junction, thus can be by magnetic tunnel to retain the central area of each tunic
The boundary of each tunic exposes in knot, and the contact avoided between free magnetic layer and magnetic fixed bed leads to component failure etc.
Problem realizes the preparation of magnetic tunnel junction.Preferably, magnetically controlled sputter method can be used and carry out each layer in deposited magnetic tunnel knot
Film.
In above-mentioned steps 102, in the periphery deposition resistive material of the magnetic tunnel junction can be used following methods
One kind is realized：
Method one, the spin coating spin-coating glass above the magnetic tunnel junction；There is the magnetic of the spin-coating glass to spin coating
Property tunnel knot is made annealing treatment to generate the resistive material.Such as：The spin coating in the peripheral spin coating of the magnetic tunnel junction
Glass Spin-on glass, such as：Spin-coating glass can be Spin-on polymer Accuflo.After spin coating, to its into
Row heating is to carry out annealing operation.Used technique is spin-on-glass when spin coating.Annealing temperature 100 DEG C to 300 DEG C it
Between.Annealing temperature can guarantee that the interface in magnetic tunnel junction and resistive material forms controllable conduction between 100~300 DEG C
Silk, the performance for the memory device being prepared are more preferably more stable.Hot plate (hot plate) or oven (oven) can be used to be moved back
Fire.Preferably, annealing temperature is between 110 DEG C to 290 DEG C.It is revolved in the upper surface of the magnetic tunnel junction and its side end face spin coating
It is that disposable completion spin coating is completed to apply glass.
In one embodiment, middle on hot plate or oven to have the spin coating to spin coating using 100 DEG C or 300 DEG C of annealing temperatures
The magnetic tunnel junction of glass is made annealing treatment to generate resistive material, it is demonstrated experimentally that being annealed using 100 DEG C or 300 DEG C
Temperature can form conductive filament in interface.In another embodiment, using 110 DEG C or 290 DEG C annealing in hot plate or oven
Temperature has the magnetic tunnel junction of the spin-coating glass to be made annealing treatment to generate resistive material spin coating, it is demonstrated experimentally that
Using 110 DEG C or 290 DEG C of annealing temperatures, conductive filament can be formed in interface.
Method two.Using vapor deposition method resistive material described in the magnetic tunnel junction disposed thereon, such as：Deposition
Silica (SiOx, wherein the x is number more than or equal to 1) or the resistives material such as silicon nitride (SiN).It can be selected when deposition
But being not limited to PECVD, (Plasma enhanced chemical vapor deposition, Plasma Enhanced Chemical Vapor are heavy
Product), Sputtering (sputtering), ALD (Atomic layer deposit, atomic layer deposition), PLD (Pulsed laser
Deposition, pulsed laser deposition) and low-pressure chemical vapor deposition (Low pressure chemical vapor
Deposition, LPCVD) in it is one or more.Preferably, using plasma enhancing chemical vapor deposition manner directly exists
The periphery deposition resistive material of the magnetic tunnel junction；Or use LPCVD in the peripheral deposited oxide of the magnetic tunnel junction
Silicon, raw material use tetraethoxysilane (TEOS).
It should be noted that before preparing magnetic tunnel junction, magnetically controlled sputter method can be used in semiconductor substrate, insulation
Substrate or other be integrated with depositing first conductive layer on the chip of various devices.
After obtaining semi-finished product in above-mentioned steps 102, since the upper surface of magnetic tunnel junction is completely covered upper resistive
Material, therefore need to the semi-finished product be carried out with planarization process, removal is located at the resistive material above the magnetic tunnel junction.And
And planarization process is used, it also may make the top of magnetic tunnel junction more smooth, to facilitate the second conductive layer of subsequent deposition.
In above-mentioned steps 104, the upper formation of the processing technologys in magnetic tunnel junction such as photoetching can be used, etch and inlay
Two conductive layers.Second conductive layer can be the chromium (Cr) and gold (Au) of stacking.When it is implemented, the mode of uv-exposure can be used first
Photoetching top electrode figure is then sequentially depositing the Au of the Cr and 300nm of 5nm to obtain described using the mode of electron beam evaporation plating
Two conductive layers finally carry out stripping technology (lift-off) and remove photoresist, to obtain top electrode.Top electrode material may include
One kind in Al, Ta, Cr, Cu, Au or Pt and combinations thereof.
By the preparation method of above-mentioned memory device, the memory device prepared while there is impedance operator and magnetoresistive characteristic
Novel non-volatile memory device unit, which can be equivalent to magnetic memory cells on electricity structure and impedance is deposited
The parallel connection of storage unit has high switch ratio, fast read/write characteristics, high thermal stability, and can show multiple non-volatile
Resistance states realize and integrate quick computing function and stable storage function in same device cell.
In a kind of achievable scheme, magnetic tunnel junction is prepared on the first conductive layer, including：It is conductive described first
The multilayer film being sequentially depositing on layer in the magnetic tunnel junction；By photoetching, the etching multilayer film, with formed elliptic cylindrical shape or
Cylindric magnetic tunnel junction.
In the specific implementation, the magnetic tunnel junction with specific shape, the specific shape can be prepared according to actual conditions
Shape includes cylindric, elliptic cylindrical shape or other shapes.It as the above analysis, can in preparation face when the MTJ of magnetic anisotropy
It is designed into elliptic cylindrical shape structure；In the MTJ for preparing perpendicular magnetic anisotropic, cylindrical-shaped structure can be designed into.
Further, by photoetching, the etching multilayer film, to form elliptic cylindrical shape or the columned magnetic tunnel
Knot, including：By photoetching process the first mask plate with oval or circle diagram case is formed in the upper surface of the multilayer film；Pass through
First mask plate etches the multilayer film using dry etch process, to form the cylindroid or cylindric magnetic tunnel
Road knot.Preferably, can be used sense coupling (inductively coupled plasma, ICP), react from
The hybrid technique of son etching (reactive-ion etching, RIE) and ion beam milling (Ion milling) performs etching, and carves
The process of erosion that is to say pattern transfer process.
Further, the multilayer film of the magnetic tunnel junction includes seed layer, pinned magnetic layer, magnetic reference layer, potential barrier
Layer, free magnetic layer and coating.The design of seed layer and coating allows for the CIPT tests of chip (wafer) grade
The needs of the resistors match of (Current-in-plane tunneling measurement).Tunnel can be obtained by CIPT tests
Road magneto-resistor (Tunnel magnetoresistance, TMR) and resistor area vector product (Resistance-area
Product, RA).In a kind of achievable scheme, successively on first conductive layer deposit seed layer, pinned magnetic layer,
Magnetic reference layer, barrier layer, free magnetic layer and coating, the coating, which is covered on the free magnetic layer, (to be covered
Cap rock is between free magnetic layer and the second conductive layer), the metal effectively prevented in free magnetic layer is aoxidized.Another
In the achievable scheme of kind, seed layer, free magnetic layer, barrier layer, magnetic reference are deposited on first conductive layer successively
Layer, pinned magnetic layer and coating, the coating are covered on the pinned magnetic layer that (i.e. coating is located at magnetic nail
Prick between layer and the second conductive layer), the metal effectively prevented in pinned magnetic layer is aoxidized.The coating and seed layer can
It is Ru layers of ruthenium.The design of seed layer and coating can also meet chip (wafer) grade CIPT tests (Current-in-plane
Tunneling measurement) resistors match needs.
It should be noted that after obtaining the magnetic tunnel junction of specific shape by lithography and etching technique, can continue to adopt
Continue etching with photoetching and etching technics and is located at the first conductive layer below the magnetic tunnel junction to obtain hearth electrode.
It should be noted that the hearth electrode with micro-meter scale uses ultraviolet photolithographic technique, nano-scale MTJ junction area to use
Electron beam exposure technique carries out photoetching.
In general, in having deposited magnetic tunnel junction after each tunic, need to carry out vacuum annealing process to each tunic,
So that the direction of magnetization of magnetic reference layer is fixed, and optimize the characteristics such as each magnetospheric crystal structure.Especially for each towards magnetic
The preparation of the MTJ of anisotropy can obtain the fixed magnetic reference layer of the good direction of magnetization by vacuum annealing process.
It preferably, can be by adding externally-applied magnetic field, to determine magnetization side in magnetic reference layer in vacuum annealing process
To the direction of magnetization in magnetic reference layer is consistent with the magnetic direction of externally-applied magnetic field.Such as：Setting magnetic field is 1T to 2T, temperature
Between 300 DEG C to 400 DEG C, vacuum degree 10-6Torr or be better than 10-6Torr.Preparing the MTJ towards magnetic anisotropy
When, can use annealing conditions is 350 DEG C, annealing time 1 hour, and magnetic field is the in-plane magnetic field of 1T.Preparing perpendicular magnetic anisotropic
MTJ when, using super-high magnetic field vacuum annealing equipment, setting magnetic field is 0T to 1T or so, temperature between 200 DEG C to 500 DEG C it
Between carry out be better than 10-8Torr vacuum annealing process.After vacuum annealing, the Conventional nanos such as photoetching, etching and planarization are used
It is prepared by the form that device manufacturing process completes magnetic tunnel junction structure.
It should be noted that hearth electrode and top electrode be selected from but be not limited to metal material tantalum (Ta), ruthenium (Ru), aluminium (Al),
One kind and combinations thereof in copper (Cu), platinum (Pt), copper nitride (CuN), thickness range are 10~200nm.In general, the memory
Part after the completion of preparation overall thickness between 100nm-200nm.
Finally it should be noted that：Above example is only to illustrate the technical solution of the utility model, rather than its limitations；
Although the utility model is described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that：
It still can be with technical scheme described in the above embodiments is modified, or is carried out to which part technical characteristic etc.
With replacement；And these modifications or replacements, various embodiments of the utility model technology that it does not separate the essence of the corresponding technical solution
The spirit and scope of scheme.
Claims (11)
1. a kind of memory device, which is characterized in that including：Resistive material, the first conductive layer stacked gradually, magnetic tunnel junction with
And second conductive layer；
The resistive material is between first conductive layer and second conductive layer；
The resistive material is fitted in the edge of the magnetic tunnel junction, to wrap up the magnetic tunnel junction；
The magnetic tunnel junction includes：Magnetic fixed bed, barrier layer and the free magnetic layer stacked gradually；Wherein, the magnetic
The direction of magnetization of property fixed bed is fixed, and the direction of magnetization of the free magnetic layer can be under the action of externally-applied magnetic field or polarization current
It overturns；
In the resistive material conductive channel, the both ends of the conductive channel are formed in the region of the magnetic tunnel junction
It is connected on the magnetic fixed bed and the free magnetic layer.
2. memory device according to claim 1, which is characterized in that the conductive channel is ion channel.
3. memory device according to claim 1, which is characterized in that the magnetic tunnel junction is in elliptic cylindrical shape or cylindric
Structure；
The conductive channel includes multiple；Multiple conductive channels are formed in the elliptic cylindrical shape or the cylindrical-shaped structure
Around side.
4. memory device according to any one of claim 1-3, which is characterized in that the resistive material includes：Oxidation
It is one or more in silicon, silicon nitride and hafnium oxide.
5. memory device according to claim 4, which is characterized in that when the resistive material is silica, the resistive
The distance at the interface of resistive material and the magnetic tunnel junction described in material middle-range less than 10nm region in silicon ion concentration with
The ratio of oxygen ion concentration is the first ratio；
In region of the distance at the interface of resistive material and the magnetic tunnel junction described in the resistive material middle-range more than 10nm
The ratio of silicon ion concentration and oxygen ion concentration is the second ratio；
First ratio is more than second ratio；
The conductive channel is silicon ion channel.
6. memory device according to any one of claim 1-3, which is characterized in that it is described magnetism fixed bed include：Layer
Folded magnetic reference layer and pinned magnetic layer；
The magnetic reference layer is between the pinned magnetic layer and the barrier layer；
The direction of magnetization in the magnetic reference layer and the pinned magnetic layer is fixed, and the magnetic reference layer and the magnetism
The direction of magnetization in pinning layer is opposite；
Wherein, the magnetic reference layer and the free magnetic layer include ferromagnetic metallic material；The pinned magnetic layer includes anti-
Ferromagnetic metallic material.
7. memory device according to claim 6, which is characterized in that the magnetic reference layer further includes nonmagnetic metal material
Material and/or oxide；The free magnetic layer further includes nonmagnetic material and/or oxide；
The nonmagnetic material includes one or more in tantalum, ruthenium, tungsten, iridium, platinum.
8. memory device according to claim 6, which is characterized in that the magnetic reference layer is comprehensive ferromagnetic layer SyF knots
Structure.
9. memory device according to claim 8, which is characterized in that the barrier layer is magnesium oxide layer；
The free magnetic layer is double-layer structure, including CoFe layer and CoFeB layer；
The CoFe layer is between the CoFeB layer and the magnesium oxide layer.
10. memory device according to any one of claim 1-3, which is characterized in that the magnetic tunnel junction further includes：
Coating with the seed layer of first conductive layer contact and with second conductive layer contact.
11. a kind of electronic equipment, which is characterized in that including claim 1-10 any one of them memory device and semiconductor
Substrate；First conductive layer deposition is on the semiconductor substrate.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108336223A (en) * | 2017-12-08 | 2018-07-27 | 北京航空航天大学青岛研究院 | Memory device, the preparation method of memory device and electronic equipment |
| CN113866691A (en) * | 2021-12-02 | 2021-12-31 | 北京芯可鉴科技有限公司 | Tunneling magnetoresistance sensor and preparation method and use method thereof |
| WO2022142712A1 (en) * | 2020-12-29 | 2022-07-07 | 浙江驰拓科技有限公司 | Magnetic storage unit and magnetic memory |
-
2018
- 2018-03-06 CN CN201820308110.8U patent/CN207925523U/en not_active Withdrawn - After Issue
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108336223A (en) * | 2017-12-08 | 2018-07-27 | 北京航空航天大学青岛研究院 | Memory device, the preparation method of memory device and electronic equipment |
| CN108336223B (en) * | 2017-12-08 | 2024-03-22 | 北京航空航天大学青岛研究院 | Memory device, preparation method of memory device and electronic equipment |
| WO2022142712A1 (en) * | 2020-12-29 | 2022-07-07 | 浙江驰拓科技有限公司 | Magnetic storage unit and magnetic memory |
| CN113866691A (en) * | 2021-12-02 | 2021-12-31 | 北京芯可鉴科技有限公司 | Tunneling magnetoresistance sensor and preparation method and use method thereof |
| CN113866691B (en) * | 2021-12-02 | 2022-09-23 | 北京芯可鉴科技有限公司 | Tunneling magneto-resistance sensor and preparation method and using method thereof |
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