CN207833022U - A kind of general four-way number interference resistant base band circuit - Google Patents
A kind of general four-way number interference resistant base band circuit Download PDFInfo
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- CN207833022U CN207833022U CN201721831261.3U CN201721831261U CN207833022U CN 207833022 U CN207833022 U CN 207833022U CN 201721831261 U CN201721831261 U CN 201721831261U CN 207833022 U CN207833022 U CN 207833022U
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Abstract
The utility model is related to a kind of general four-way number interference resistant base band circuits,DC/DC power-switching circuits respectively with source current detection circuit,Power protecting circuit,A/D analog to digital conversion circuits,D/A D/A converting circuits,Clock distribution circuit,ARM9 processing circuits,FPGA interference resistant base band processing circuits,Clock and reset circuit,Storage circuit is connected with interface circuit,Power protecting circuit is connect with source current detection circuit,Source current detection circuit is connect with ARM9 processing circuits,FPGA interference resistant base bands processing circuit respectively with A/D analog to digital conversion circuits,Clock distribution circuit,D/A D/A converting circuits,Storage circuit,ARM9 processing circuits connect,Clock distribution circuit is connect with A/D analog to digital conversion circuits,ARM9 processing circuits respectively with clock and reset circuit,Storage circuit is connected with interface circuit.Meet the wide pressure application range demand of machine/missile-borne satellite anti-interference antenna.
Description
Technical field
It is to be applied to meet machine/missile-borne the utility model is related to a kind of general four-way number interference resistant base band circuit
The general four-way number interference resistant base band circuit of big-dipper satellite anti-interference antenna different platform demand.
Background technology
Existing big-dipper satellite anti-interference antenna considers small product size and cost, generally anti-dry using four-way number
Baseband circuit is disturbed, since the demand difference of different platform causes circuit design type more, according to current product requirement, in addition to tool
Outside the major functions such as standby A/D, D/A and FPGA interference resistant base band processing, also to have controlled straight-through locking, on-line loaded, power supply
The different function such as current detecting, power protection, due to each products-hardware realization method difference, it is sometimes desirable to increase additional micro- place
Reason device realizes, causes hardware class and the problems such as quantity is more, parts selection type is more.
Number interference resistant base band circuit is primarily present direct current supply voltage range in power-supplying circuit design aspect at present
Small, the requirement of the airborne supplied characters of part GJB181-1986 cannot be met by not doing the design of power protection;It is handed over external user
It is mainly realized using the smaller FPGA circuitry of a piece of resource is additionally added in mutual Software for Design, FPGA hardware description language is realized
Interface protocol switching software, with host computer interface communication software, in terms of sequence of threads load, program portability is poor, realizes multiple
It is miscellaneous;Mainly in-chip FLASH is used to store software program in storage circuit design aspect, capacity is small cannot to meet large program and big
Measure data storage.Unified each product is needed to reduce component type, hardware number to the functional requirement of the anti-interference unit of number thus
Amount and type improve the resource utilization that list ARM9 realizes above-mentioned function, improve circuit stability and reliability.
Invention content
In view of the shortcomings of the prior art, the utility model provides a kind of general four-way number interference resistant base band electricity
Road.
The purpose of this utility model is to realize to meet the wide pressure application range demand of machine/missile-borne satellite anti-interference antenna, Wei Chu
Reason device is realized interface protocol switching software using high-level language, is set with host computer interface communication software and online program loader
Meter, program portability are good, it is easy to accomplish and safeguard;By being realized for high-capacity FLASH chip outside lacing film outside ARM9 and FPGA
The storage of large program and mass data, general four-way number interference resistant base band circuit power circuit design, it is anti-interference
Multi-platform demand is met in terms of hardware and software Demand Design and the processing of mass data real-time, realizes General design.
To achieve the above object, used technical solution is the utility model:A kind of general four-way number is anti-dry
Disturb baseband circuit, it is characterised in that:Including DC/DC power-switching circuits, source current detection circuit, power protecting circuit, A/D
Analog to digital conversion circuit, D/A D/A converting circuits, clock distribution circuit, ARM9 processing circuits, FPGA interference resistant base bands processing electricity
Road, clock and reset circuit, storage circuit, interface circuit;
The DC/DC power-switching circuits respectively with source current detection circuit, power protecting circuit, A/D analog-to-digital conversions
Circuit, D/A D/A converting circuits, clock distribution circuit, ARM9 processing circuits, FPGA interference resistant base bands processing circuit, clock and
Reset circuit, storage circuit are connected with interface circuit, and the power protecting circuit is connect with source current detection circuit, the electricity
Ource electric current detection circuit is connect with ARM9 processing circuits, the FPGA interference resistant base bands processing circuit respectively with A/D analog-to-digital conversions
Circuit, clock distribution circuit, D/A D/A converting circuits, storage circuit, the connection of ARM9 processing circuits, the clock distribution circuit
Connect with A/D analog to digital conversion circuits, the ARM9 processing circuits respectively with clock and reset circuit, storage circuit and interface circuit
Connection;
The circuit by 9V~36V DC voltages of input first by power protecting circuit to power unit carry out overvoltage and
Under-voltage protection, is then converted into two-way+5V voltages by DC/DC power-switching circuits, and a railway digital+5V is that entire number is anti-dry
Baseband circuit power supply is disturbed, another way simulation+5V voltages can be powered as voltage is reserved to satellite anti-interference antenna analog portion,
Number+5V circuits are transformed to four road voltages, respectively+3.3V ,+1.8V ,+1.2V and+1.0V by secondary power supply, wherein+
3.3V is FPGA interference resistant base bands processing circuit and ARM9 processing circuit pin supply voltages;+ 1.8V is mainly A/D analog-to-digital conversions
Circuit and the power supply of FPGA interference resistant base band processing circuits;+ 1.2V and+1.0V is respectively ARM9 processing circuits and the anti-interference bases of FPGA
The core voltage of tape handling circuit is powered, more demanding to voltage accuracy;
Source current detection circuit is detected the DC power supply of input, gives the signal of detection to ARM9 processing circuits
It is handled to judge digital interference resistant base band circuit working state, and inertial navigation is transferred to by serial ports;
The Big Dipper intermediate-freuqncy signal that satellite anti-interference antenna radio frequency part generates four 46.52 ± 10.23MHz of tunnel passes through four road A/
D analog to digital conversion circuits are converted into digital signal and give FPGA interference resistant base band processing circuit anti-interference process, after anti-interference process
Data by D/A D/A converting circuits be converted to simulation Big Dipper intermediate-freuqncy signal;
Storage circuit core includes mainly tri- kinds of storage chips of NANDFLASH, NORFLASH and SDRAM, wherein
NANDFLASH is connected with ARM9 microprocessors, it mainly stores the anti-interference program of FPGA interference resistant base band processing circuits, and FPGA is anti-
Interference baseband processing circuitry powers on will be by ARM9 processing circuit boot program loading procedures to FPGA interference resistant base bands processing
Circuit starts anti-interference work;NORFLASH chips are mainly used for storing ARM9 processing circuit application programs, and application program is main
It is responsible for the sampled data, program on-line loaded, power supply of four tunnel radio-frequency channel of acquisition process FPGA interference resistant base bands processing circuit pair
Current detecting and the control function that the amount of dissipating is detached to interface portion;SDRAM mainly store FPGA interference resistant base bands processing circuit and
The data of ARM9 processing circuits;
Interface circuitry portions mainly include two-way RS232 level serial ports, two-way RS422 level serial ports, controlled discrete magnitude,
The JTAG download interfaces of ARM9 processing circuits jtag interface and FPGA interference resistant base band processing circuits, wherein RS232 serial ports all the way
For debug and program on-line upgrading, all the way RS232 serial ports for report four-way interference resistant base band circuit working state and with
External user data communicates, and RS422 serial ports is used for all the way and inertial navigation interface interacts, and RS422 serial ports is spare all the way;
Controlled discrete magnitude is the I/O interfaces being connected with ARM9 processing circuits, by serial ports receive external command come control from
The amount of dissipating realizes that satellite anti-interference antenna leads directly to blocking function;Two jtag interfaces are mainly used for program on-line debugging.
The utility model is characterized in that:It is defeated that DC/DC direct-current power supply converting circuits realize direct current 9V~36V wide-range voltages
Entering primary power source and is transformed to two-way+5V power supplys, secondary power supply is transformed to+3.3V ,+1.8V ,+1.2V and+1.0V respectively, wherein+
5V power supplys may respectively be the power supply of anti-interference antenna radio frequency part and the anti-interference element circuit of number is powered, and the four of secondary power supply transformation
Kind voltage can be the power supplies such as A/D chips, D/A chips, ARM9 microprocessors and FPGA baseband processor;Source current detection circuit
It can judge the working condition of the anti-interference unit each section of number, ARM9 processing electricity by detecting the size of current of power circuit
Road timely processing reporting unit plate failure code;Power protecting circuit can realize over-pressed 60V protection, reversed -40V voltage protections and
The functions such as adjustable over-and under-voltage protection domain;ARM9 processing circuits mainly realize the controlled straight-through locking of anti-interference antenna to penetrating
The control of frequency power part is read the four road rf digital signals that A/D analog to digital conversion circuits acquire in storage circuit SDRAM and is led to
It crosses upper computer software objective interface to show, handles source current detection information, the anti-interference program boot of FPGA are loaded and in thread
The functions such as sequence upgrading;FPGA interference resistant base band processing circuits are mainly to carry out anti-interference place to the radiofrequency signal that four road A/D are acquired
Reason, treated, and signal is converted to analog if signal by D/A D/A converting circuits;With two-way RS232 serial ports and two-way
RS422 serial ports all has+15V antistatic protection functions.
Description of the drawings
Fig. 1 is that the circuit of utility model connects block diagram;
Fig. 2 is the software flow pattern of utility model.
Specific implementation mode
The utility model is described in further detail below in conjunction with the accompanying drawings.
As shown in Figure 1, a kind of general four-way number interference resistant base band circuit, including DC/DC power-switching circuits, electricity
Ource electric current detection circuit, power protecting circuit, A/D analog to digital conversion circuits, D/A D/A converting circuits, clock distribution circuit, ARM9
Processing circuit, FPGA interference resistant base bands processing circuit, clock and reset circuit, storage circuit, interface circuit.
DC/DC power-switching circuits respectively with source current detection circuit, power protecting circuit, A/D analog to digital conversion circuits,
D/A D/A converting circuits, clock distribution circuit, ARM9 processing circuits, FPGA interference resistant base bands processing circuit, clock and reset electricity
Road, storage circuit are connected with interface circuit, and power protecting circuit is connect with source current detection circuit, source current detection circuit
Connect with ARM9 processing circuits, FPGA interference resistant base bands processing circuit respectively with A/D analog to digital conversion circuits, clock distribution circuit,
D/A D/A converting circuits, storage circuit, the connection of ARM9 processing circuits, clock distribution circuit are connect with A/D analog to digital conversion circuits,
The ARM9 processing circuits are connect with clock and reset circuit, storage circuit and interface circuit respectively.
The circuit by 9V~36V DC voltages of input first by power protecting circuit to power unit carry out overvoltage and
Under-voltage protection, is then converted into two-way+5V voltages by DC/DC power-switching circuits, and a railway digital+5V is that entire number is anti-dry
Baseband circuit power supply is disturbed, another way simulation+5V voltages can be powered as voltage is reserved to satellite anti-interference antenna analog portion,
Number+5V circuits are transformed to four road voltages, respectively+3.3V ,+1.8V ,+1.2V and+1.0V by secondary power supply, wherein+
3.3V is FPGA interference resistant base bands processing circuit and ARM9 processing circuit pin supply voltages;+ 1.8V is mainly A/D analog-to-digital conversions
Circuit and the power supply of FPGA interference resistant base band processing circuits;+ 1.2V and+1.0V is respectively ARM9 processing circuits and the anti-interference bases of FPGA
The core voltage of tape handling circuit is powered, more demanding to voltage accuracy.
Source current detection circuit is detected the DC power supply of input, gives the signal of detection to ARM9 processing circuits
It is handled to judge digital interference resistant base band circuit working state, and inertial navigation is transferred to by serial ports.
The Big Dipper intermediate-freuqncy signal that satellite anti-interference antenna radio frequency part generates four 46.52 ± 10.23MHz of tunnel passes through four road A/
D analog to digital conversion circuits are converted into digital signal and give FPGA interference resistant base band processing circuit anti-interference process, after anti-interference process
Data by D/A D/A converting circuits be converted to simulation Big Dipper intermediate-freuqncy signal.
Storage circuit core includes mainly tri- kinds of storage chips of NANDFLASH, NORFLASH and SDRAM, wherein
NANDFLASH is connected with ARM9 microprocessors, it mainly stores the anti-interference program of FPGA interference resistant base band processing circuits, and FPGA is anti-
Interference baseband processing circuitry powers on will be by ARM9 processing circuit boot program loading procedures to FPGA interference resistant base bands processing
Circuit starts anti-interference work;NORFLASH chips are mainly used for storing ARM9 processing circuit application programs, and application program is main
It is responsible for the sampled data, program on-line loaded, power supply of four tunnel radio-frequency channel of acquisition process FPGA interference resistant base bands processing circuit pair
Current detecting and the control function that the amount of dissipating is detached to interface portion;SDRAM mainly store FPGA interference resistant base bands processing circuit and
The data of ARM9 processing circuits.
Interface circuitry portions mainly include two-way RS232 level serial ports, two-way RS422 level serial ports, controlled discrete magnitude,
The JTAG download interfaces of ARM9 processing circuits jtag interface and FPGA interference resistant base band processing circuits, wherein RS232 serial ports all the way
For debug and program on-line upgrading, all the way RS232 serial ports for report four-way interference resistant base band circuit working state and with
External user data communicates, and RS422 serial ports is used for all the way and inertial navigation interface interacts, and RS422 serial ports is spare all the way.
Controlled discrete magnitude is the I/O interfaces being connected with ARM9 processing circuits, by serial ports receive external command come control from
The amount of dissipating realizes that satellite anti-interference antenna leads directly to blocking function;Two jtag interfaces are mainly used for program on-line debugging.
As shown in Fig. 2, a kind of implementation method of general four-way number interference resistant base band circuit, steps are as follows:Four-way
After the power is turned on, each circuit hardware starts initial work to road number interference resistant base band circuit, and ARM9 processing circuits first pass through boot
Loading procedure reads the ARM9 application programs and FPGA anti-interference process journeys of NORFLASH and NANDFLASH in storage circuit respectively
Sequence object code is simultaneously loaded into ARM9 processing circuits and FPGA interference resistant base band processing circuits, and software program brings into operation;
It is four-way digital medium-frequency signal that four-way analog if signal, which is inputted, by the acquisition of A/D analog to digital conversion circuits,
FPGA interference resistant base band processing circuit Anti-interference Software Baseds on four tunnel intermediate-freuqncy signals carry out respectively channel gain consistency etc. influence because
Plain adaptive equalization processing, Digital Down Convert processing, low-pass filtering, weights generate iteration and update, frequency domain filtering, second quantization
With digital upconversion process, the digital medium-frequency signal after up-conversion is converted to analog if signal by D/A D/A converting circuits,
Realize the digitlization anti-interference process of analog if signal;While carrying out anti-interference process, ARM9 processing circuit applications
Program reads four-way down coversion data in storage circuit SDRAM and carries out analyzing processing respectively, according to related protocol by connecing
RS232 interface is sent to host computer interface and is shown in mouth circuit, real-time display four-way radio-frequency front-end status information;ARM9
Processing circuit acquires source current detection circuit detection information, judges the work of interference resistant base band circuit by the fault threshold of setting
State is realized by RS232 interface, RS422 interfaces and I/O mouthfuls of discrete magnitudes in interface circuit and is existed with external straight-through locking and program
Line loads the interaction of user instruction.
On the one hand the utility model realizes direct current 9V~36V wide range inputs, overvoltage and under-voltage protection and a variety of
Low voltage value power conversion circuit design can meet the wide pressure input application demand of machine/missile-borne satellite anti-interference antenna and part
The airborne supplied character demands of GJB181-1986;On the other hand the circuit of small resource FPGA circuitry is substituted using ARM9 processing circuits
Design realizes interface protocol switching software and host computer in being designed with external user interactive software using high-level language
Interface communications software is retouched in sequence of threads load, source current detection function and controlled straight-through blocking function design compared with FPGA hardware
Predicate has program portability good in terms of saying software realization, the advantages of being easy to implement and safeguard;Again by for ARM9 and
The outer high-capacity FLASH chip of the outer lacing films of FPGA realizes the storage of large program and mass data, realizes the anti-interference programs of FPGA
With ARM9 application program boot loading modes, the need in terms of large-scale Anti-interference Software Based largely interferes real-time property processing are met
It asks.
The accessible the key technical indexes of the utility model is as follows:
Input voltage: | DC9V~36V; | |
Export DC ripple voltages: | <5%; | |
Current sensing abilities: | 0~3A; | |
Power consumption: | ≤8W; | |
62MHz input clocks: | Frequency accuracy:±0.3PPM(Room temperature); | |
Clocking error:(- 50~+50)Hz; | ||
Level: LVTTL; | ||
ADC number of significant digit: | ≥9.5bit; | |
Noise coefficient: | ≤1dB; | |
Input/output IF signal frequency: | 46.52±10.23MHz; | |
Export intermediate-freuqncy signal Out-of-band rejection: | - 3dB bandwidth:20.46MHz; | |
- 40dB bandwidth:30.69MHz; | ||
Electrostatic protection: | IEC61000-4-2 level 4: | |
15kV (atmospherical discharges); | ||
8kV (contact discharge); | ||
MIL STD 883E-Method 3015-7:class3 | ||
25kV HBM (Human Body Model); | ||
Insulation resistance: | ≥20MΩ; | |
Non-failure operation time: | ≥50000h; | |
Environment temperature: | - 45~+60 DEG C; | |
Relative humidity: | 40 DEG C of (95 ± 3) % temperature. |
Claims (1)
1. a kind of general four-way number interference resistant base band circuit, it is characterised in that:Including DC/DC power-switching circuits, electricity
Ource electric current detection circuit, power protecting circuit, A/D analog to digital conversion circuits, D/A D/A converting circuits, clock distribution circuit, ARM9
Processing circuit, FPGA interference resistant base bands processing circuit, clock and reset circuit, storage circuit, interface circuit;
The DC/DC power-switching circuits respectively with source current detection circuit, power protecting circuit, A/D analog to digital conversion circuits,
D/A D/A converting circuits, clock distribution circuit, ARM9 processing circuits, FPGA interference resistant base bands processing circuit, clock and reset electricity
Road, storage circuit are connected with interface circuit, and the power protecting circuit is connect with source current detection circuit, the source current
Detection circuit is connect with ARM9 processing circuits, the FPGA interference resistant base bands processing circuit respectively with A/D analog to digital conversion circuits, when
Clock distributor circuit, D/A D/A converting circuits, storage circuit, the connection of ARM9 processing circuits, the clock distribution circuit and A/D moulds
Number conversion circuit connection, the ARM9 processing circuits are connect with clock and reset circuit, storage circuit and interface circuit respectively;
The circuit first carries out power unit 9V~36V DC voltages of input by power protecting circuit over-pressed and under-voltage
Protection, is then converted into two-way+5V voltages by DC/DC power-switching circuits, and a railway digital+5V is the entire anti-interference base of number
Band circuit is powered, and another way simulation+5V voltages can be powered as voltage is reserved to satellite anti-interference antenna analog portion, number
+ 5V circuits are transformed to four road voltages, respectively+3.3V ,+1.8V ,+1.2V and+1.0V by secondary power supply, wherein+3.3V is
FPGA interference resistant base bands processing circuit and ARM9 processing circuit pin supply voltages;+ 1.8V be mainly A/D analog to digital conversion circuits and
FPGA interference resistant base band processing circuits are powered;+ 1.2V and+1.0V is respectively ARM9 processing circuits and the processing of FPGA interference resistant base bands
The core voltage of circuit is powered, more demanding to voltage accuracy;
Source current detection circuit is detected the DC power supply of input, and giving the signal of detection to ARM9 processing circuits carries out
It handles to judge digital interference resistant base band circuit working state, and inertial navigation is transferred to by serial ports;
The Big Dipper intermediate-freuqncy signal that satellite anti-interference antenna radio frequency part generates four 46.52 ± 10.23MHz of tunnel passes through four road A/D moulds
Number conversion circuit is converted into digital signal and gives FPGA interference resistant base band processing circuit anti-interference process, the number after anti-interference process
Simulation Big Dipper intermediate-freuqncy signal is converted to according to by D/A D/A converting circuits;
Storage circuit core mainly include tri- kinds of storage chips of NANDFLASH, NORFLASH and SDRAM, wherein NANDFLASH with
ARM9 microprocessors are connected, it mainly stores the anti-interference program of FPGA interference resistant base band processing circuits, at FPGA interference resistant base bands
Reason circuit powers on and will start to resist to FPGA interference resistant base band processing circuits by ARM9 processing circuit boot program loading procedures
Interfere work;NORFLASH chips are mainly used for storing ARM9 processing circuit application programs, and application program is mainly responsible at acquisition
Manage four tunnel radio-frequency channel of FPGA interference resistant base bands processing circuits pair the detection of sampled data, program on-line loaded, source current and
The control function for the amount of dissipating is detached to interface portion;SDRAM mainly stores FPGA interference resistant base bands processing circuit and ARM9 processing circuits
Data;
Interface circuitry portions include mainly two-way RS232 level serial ports, two-way RS422 level serial ports, controlled discrete magnitude, at ARM9
The JTAG download interfaces of circuit jtag interface and FPGA interference resistant base band processing circuits are managed, wherein RS232 serial ports is for adjusting all the way
Examination and program on-line upgrading, RS232 serial ports is for reporting four-way interference resistant base band circuit working state and being used with outside all the way
User data communicates, and RS422 serial ports is used for all the way and inertial navigation interface interacts, and RS422 serial ports is spare all the way;
Controlled discrete magnitude is the I/O interfaces being connected with ARM9 processing circuits, receives external command by serial ports to control discrete magnitude
Realize that satellite anti-interference antenna leads directly to blocking function;Two jtag interfaces are mainly used for program on-line debugging.
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CN201721831261.3U CN207833022U (en) | 2017-12-25 | 2017-12-25 | A kind of general four-way number interference resistant base band circuit |
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CN201721831261.3U CN207833022U (en) | 2017-12-25 | 2017-12-25 | A kind of general four-way number interference resistant base band circuit |
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107894598A (en) * | 2017-12-25 | 2018-04-10 | 天津七六四通信导航技术有限公司 | A kind of general four-way numeral interference resistant base band circuit and implementation method |
CN113553280A (en) * | 2021-06-21 | 2021-10-26 | 上海机电工程研究所 | Based on I2C bus integrated electronic platform multi-module time-sharing power-on method and system |
CN117269991A (en) * | 2023-11-22 | 2023-12-22 | 北京李龚导航科技有限公司 | Basic device of satellite navigation anti-interference terminal |
-
2017
- 2017-12-25 CN CN201721831261.3U patent/CN207833022U/en not_active Withdrawn - After Issue
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107894598A (en) * | 2017-12-25 | 2018-04-10 | 天津七六四通信导航技术有限公司 | A kind of general four-way numeral interference resistant base band circuit and implementation method |
CN107894598B (en) * | 2017-12-25 | 2024-01-26 | 天津七六四通信导航技术有限公司 | Universal four-channel digital anti-interference baseband circuit and implementation method |
CN113553280A (en) * | 2021-06-21 | 2021-10-26 | 上海机电工程研究所 | Based on I2C bus integrated electronic platform multi-module time-sharing power-on method and system |
CN117269991A (en) * | 2023-11-22 | 2023-12-22 | 北京李龚导航科技有限公司 | Basic device of satellite navigation anti-interference terminal |
CN117269991B (en) * | 2023-11-22 | 2024-04-05 | 北京李龚导航科技有限公司 | Basic device of satellite navigation anti-interference terminal |
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