CN108037393B

CN108037393B - System and method for monitoring key state of power electronic equipment in strong electromagnetic environment

Info

Publication number: CN108037393B
Application number: CN201711370865.7A
Authority: CN
Inventors: 屈碧环
Original assignee: Wuhan Tianfuhai Technology Development Co ltd
Current assignee: Wuhan Tianfuhai Technology Development Co ltd
Priority date: 2017-12-14
Filing date: 2017-12-14
Publication date: 2021-03-09
Anticipated expiration: 2037-12-14
Also published as: CN108037393A

Abstract

The invention provides a system and a method for monitoring a key state of power electronic equipment in a strong electromagnetic environment, wherein the system comprises a first user interface module, an eight-path signal acquisition module, a main control module, a storage module, a timestamp module, a temperature and humidity acquisition module, a two-path RS-485 isolation module and a second user interface module; the first user interface module is used for acquiring eight paths of analog signals reflecting key states of the power electronic device; the main control module comprises a multi-way switch unit and an ARM main control unit, and the ARM main control unit is simultaneously communicated with the storage module, the timestamp module and the temperature and humidity acquisition module; ARM main control unit obtains real-time stamp through the time stamp module to keep the data that will have time stamp to the storage module in, monitor ARM main control unit's humiture through humiture collection module, again via double-circuit RS-485 isolation module and second user interface module, externally carry out data transmission.

Description

System and method for monitoring key state of power electronic equipment in strong electromagnetic environment

Technical Field

The invention belongs to the crossing field of an embedded technology and a power electronic technology, and particularly relates to a system and a method for monitoring a key state of power electronic equipment in a strong electromagnetic environment.

Background

At present, power electronic equipment is developing towards high voltage, high current, integration and intellectualization, and especially engineering application and popularization of high-capacity power electronic devices represented by SCR (phase control thyristor), IGBT (insulated gate bipolar transistor), IGCT (integrated gate commutated thyristor) and the like are aimed at solving the current situation of labor intensity and technology intensity in the technical field of power electronics at present, exerting the application potential of the high-capacity power electronic devices to the maximum extent, and successfully solving the technical problem that a high-capacity power conversion device works reliably, safely and healthily in engineering. A typical representative of this is an electromagnetic transmitter, which consists of 4 subsystems:

(1) an energy storage subsystem: storing energy from an onboard power source;

(2) the energy conversion subsystem: converting the stored energy into high frequency pulses, controllable energy output to drive the linear induction motor;

(3) linear induction motor: an actuation device as a launch motor;

(4) a console: the ejection parameters are set by the operator and the entire system is monitored.

The electromagnetic transmitting device has the advantages of small volume, low requirement on an auxiliary system on a ship, high efficiency, light weight and low operation and maintenance cost, and is one of the core technologies of the future aircraft carrier.

However, in order to realize energy conversion during operation of large-capacity power electronic equipment typified by an electromagnetic transmitter, it is necessary to use an operation mode such as on or off of a large-capacity power electronic device, and interference with the electronic equipment is inevitably generated during switching operation of the large-capacity power electronic device. The reason for this is that:

(1) when a large-capacity power electronic device is switched on or switched off, the current and voltage of a load are changed, and a magnetic field is changed, high-frequency interference signals are easily generated;

(2) the linear motor is used as an inductive load, high-frequency oscillation is generated in a circuit when power supply is switched, the peak voltage of the oscillation can reach about tens of kV or even hundreds of kV, particularly, an ignition coil with poor insulation performance and a cylinder-separating high-voltage wire can generate high voltage and a strong magnetic field, and the excited oscillation can be emitted in an electromagnetic wave form through a lead and the like, so that electromagnetic interference is generated on other electronic equipment;

(3) due to different working systems of the subsystems, the subsystems can interfere with each other in different ways.

Electromagnetic interference will cause great harm to power electronic devices, and is highlighted in the following aspects:

(1) the strong electromagnetic interference may damage sensitive electronic systems/devices in the apparatus due to overload. For example, the reverse breakdown voltage between the emitter and the base of a common silicon transistor is 2-5V, which is very easy to damage, and the reverse breakdown voltage of the common silicon transistor decreases with the increase of temperature. The spike voltage caused by electromagnetic interference can increase the impurity concentration at some point in the emitter and collector junctions, resulting in transistor breakdown or internal short circuits. Transistors operating in high rf electromagnetic fields absorb enough energy to cause junction temperatures to exceed allowable temperatures and cause damage.

(2) Strong electromagnetic radiation fields that can cause the uncontrolled and premature activation of sensitive weapon detonators installed in power electronic equipment systems; for guided missiles, deviation from flight trajectory and increased distance error can result; for an aircraft, operating system instability, inaccurate heading, altitude display errors, radar antenna tracking position shifts, and the like may result.

Therefore, strong electromagnetic interference can have great influence on the correct pick-up and reliable transmission of the key state signals with weak amplitude in the microprocessor control system of the power electronic device, such as a brake system, an anti-collision protection system. Therefore, a critical state signal monitoring system of the power electronic device, which can be adapted to the strong electromagnetic interference environment, is urgently needed to be developed, and for acquiring the health state (such as operating voltage, operating current, environment temperature and humidity) of the power electronic device in real time, the health state needs to correspond to the operating time, namely, the acquired health state needs to be provided with a timestamp, so that a centralized control center can analyze each state information conveniently, and the critical state signal monitoring system is very important for ensuring the healthy, reliable and safe operation of the power electronic device.

Disclosure of Invention

Aiming at the defects of the prior art, the invention provides a system and a method for monitoring the key state of power electronic equipment in a strong electromagnetic environment, aiming at acquiring the self health state in real time, normally working in a strong electromagnetic field environment and strictly, correctly and reasonably processing strong current and weak current so as to improve the conversion efficiency and reliability of a power electronic device.

The invention provides a system for monitoring the key state of power electronic equipment in a strong electromagnetic environment, which comprises: the system comprises a first user interface module, an eight-path signal acquisition module, a main control module, a storage module, a timestamp module, a temperature and humidity acquisition module, a two-path RS-485 isolation module and a second user interface module; the first user interface module is used for acquiring eight paths of analog signals reflecting key states of the power electronic device and transmitting the acquired eight paths of analog signals to the eight paths of signal acquisition modules for conversion processing; eight way signal acquisition modules include: the device comprises a current acquisition channel unit for acquiring three-phase current analog signals, a voltage acquisition channel unit for acquiring three-phase voltage analog signals and a temperature acquisition channel unit for acquiring two paths of temperature analog signals; the main control module comprises: the multi-way switch unit is used for selecting any one of eight analog signals to be transmitted to the ARM main control unit according to needs in the data transmission process; the ARM main control unit is simultaneously communicated with the storage module, the timestamp module and the temperature and humidity acquisition module; ARM main control unit obtains real-time stamp through the time stamp module to data with time stamp attached are preserved extremely in the storage module, monitor ARM main control unit's humiture through humiture acquisition module, via double-circuit RS-485 isolation module and second user interface module, externally carry out data transmission again.

Furthermore, two serial ports in the ARM main control unit are communicated with the second user interface module through the two RS-485 isolation module.

The invention also provides a method for monitoring the key state of the power electronic equipment in the strong electromagnetic environment, which comprises the following steps:

(1) a main circulation step:

(1.1) firstly, hardware initialization is carried out;

(1.2) after the hardware initialization is finished, software initialization is carried out;

(1.3) recording the starting time of the main cycle after the software initialization is finished;

(1.4) after recording the starting point moment of the main cycle, performing an RS-485 communication link;

(1.5) carrying out a sampling data storage link after completing an RS-485 communication link;

(1.6) reading the current moment link after the sampling data storage link is finished;

(1.7) after the current moment link is read, judging whether the main cycle reaches 10ms, if the main cycle does not reach 10ms, returning to read the current moment link, and if the main cycle reaches 10ms, returning to record the moment link of the starting point of the main cycle;

(2) timing sampling:

(2.1) firstly, carrying out a sampling link;

(2.2) performing a median filtering step after sampling is finished;

(2.3) after the median filtering is finished, calculating eight analog quantity root mean square values;

(2.4) performing an inertial filtering link after calculating the root mean square values of the eight analog quantities;

and (2.5) reading the temperature and humidity link after the inertial filtering is finished.

Further, the hardware initialization step specifically includes:

s100: firstly, initializing a storage module unit;

s101: after the initialization of the memory module unit is completed, the on-chip sampling initialization of the CPU is carried out;

s102: starting the initialization of the RS-485 serial port after the sampling initialization on the CPU is finished;

s103: initializing a temperature and humidity sensor after the initialization of the RS-485 serial port is completed;

s104: initializing a timer after finishing initializing the temperature and humidity sensor;

s105: and initializing the clock chip after the initialization of the timer is finished.

Further, the software initialization step specifically includes:

s200: firstly, initializing a parameter default value;

s201: reading the parameters of the access storage module unit after the initialization of the default values of the parameters is completed;

s202: after reading the parameters of the access storage module unit, initializing a serial port data area;

s203: initializing a sampling data area after the initialization of the serial data area is completed;

s204: and after the initialization of the sampling data area is completed, carrying out analog quantity initialization.

The method has the advantages of flexible and convenient parameter setting, and quick, stable and seamless switching, ensures the reliability and rapidness of acquiring the key state information, and can be suitable for working occasions with complex electromagnetic environment, long transmission distance and high communication accuracy. Because the dual-redundancy communication system based on the two-way RS-485 isolation module is adopted, the dual-redundancy communication system has higher anti-jamming capability and reliability, and can effectively receive and transmit the acquired state information. The monitoring device is used in occasions with high requirements on state data reliability, such as a ship integrated power energy management system, a distributed transformer substation, a power electronic conversion device, an industrial field monitoring system and the like.

Drawings

FIG. 1 is a schematic diagram of a system and method for monitoring critical states of power electronic equipment in a strong electromagnetic environment according to an embodiment of the present invention.

FIG. 2 is a schematic circuit diagram of a current collection channel unit of the system and method for monitoring critical states of power electronic equipment in a strong electromagnetic environment.

FIG. 3 is a schematic circuit diagram of a voltage acquisition channel unit of the system and method for monitoring critical states of power electronic equipment in a strong electromagnetic environment.

FIG. 4 is a schematic circuit diagram of a temperature acquisition channel unit of the system and method for monitoring critical states of power electronic equipment in a strong electromagnetic environment.

FIG. 5 is a circuit diagram of a main control module of the system and method for monitoring key states of power electronic equipment in a strong electromagnetic environment.

FIG. 6 is a circuit diagram of a memory module of the system and method for monitoring critical states of power electronic equipment in a strong electromagnetic environment.

FIG. 7 is a schematic circuit diagram illustrating a timestamp module of the present invention for a system and method for monitoring critical states of power electronic equipment in a high electromagnetic environment.

Fig. 8 is a schematic circuit diagram of a temperature and humidity acquisition module of a system and method for monitoring a critical state of power electronic equipment in a strong electromagnetic environment.

FIG. 9 is a schematic circuit diagram of a two-way RS-485 isolation module for a system and method for monitoring critical states of power electronics equipment in a strong electromagnetic environment.

FIG. 10 is an initialization process of the system and method for monitoring critical states of power electronic equipment in a strong electromagnetic environment.

FIG. 11 is a main loop flow of a system and method for monitoring critical states of power electronic equipment in a strong electromagnetic environment.

FIG. 12 is a timing sampling process of a system and method for monitoring critical states of power electronic equipment in a strong electromagnetic environment.

The system comprises a first user interface module 1, an eight-path signal acquisition module 2, a main control module 3, a storage module 4, a timestamp module 5, a temperature and humidity acquisition module 6, a two-path RS-485 isolation module 7, a second user interface module 8, a current acquisition channel unit 2-1, a voltage acquisition channel unit 2-2, a temperature acquisition channel unit 2-3, a multi-way switch unit 3-1 and an ARM main control unit 3-2.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

The invention aims to provide a system for monitoring the key state of power electronic equipment in a strong electromagnetic environment, which can acquire the self health state in real time and can normally work in the strong electromagnetic field environment, and the strong electricity and the weak electricity are strictly, correctly and reasonably processed to improve the conversion efficiency and the reliability of a power electronic device.

In order to achieve the purpose, the invention adopts the technical scheme that: the system for monitoring the key state of power electronic equipment in a strong electromagnetic environment comprises: the system comprises eight parts, namely a first user interface module, eight signal acquisition modules (comprising three module units, namely a current acquisition channel unit, a voltage acquisition channel unit and a temperature acquisition channel unit), a main control module, a storage module, a timestamp module, a temperature and humidity acquisition module, a two-way RS-485 isolation module and a second user interface module. Their function will now be explained as follows:

(1) the first user interface module is used for acquiring key state signals of the tested power electronic equipment, such as three current signals, three voltage signals and two temperature signals.

(2) Eight way signal acquisition modules: the system is used for acquiring eight analog signals in key state signals of tested power electronic equipment and comprises a current acquisition channel unit, a voltage acquisition channel unit and a temperature acquisition channel unit, namely

(2.1) a current collection channel unit: the device is used for acquiring three paths of current signals in key state signals of the tested power electronic equipment, processing the three paths of current signals by the multi-path switch and transmitting the three paths of current signals to the main control unit for processing.

(2.2) a voltage acquisition channel unit: the device is used for acquiring three voltage signals in the key state signals of the tested power electronic equipment, processing the three voltage signals by the multi-way switch and transmitting the processed three voltage signals to the main control unit for processing.

(2.3) temperature acquisition channel unit: the temperature acquisition device is used for acquiring two paths of temperature signals in the key state signals of the tested power electronic equipment, and transmitting the temperature signals to the main control unit for processing after the temperature signals are processed by the multi-path switch.

(3) The main control module: and receiving eight paths of signals which are picked up by the first user interface module and reflect the key state of the tested power electronic equipment, and communicating with the storage module, the timestamp module, the temperature and humidity acquisition module and the second user interface module.

(4) A storage module: and storing eight signals of the key state of the tested power electronic equipment.

(5) A time stamping module: and stamping time stamps on the eight paths of signals of the key state of the tested power electronic equipment to be stored.

(6) Temperature and humidity acquisition module: and acquiring temperature and humidity signals of the main control module in real time.

(7) Two-way RS-485 keeps apart the module: and transmitting the eight signals which are acquired in real time and reflect the key state of the tested power electronic equipment and the temperature and humidity signals of the main control module to the second user interface module.

(8) A second user interface module: and receiving the state signal output by the two-way RS-485 isolation module, and further transmitting the state signal to a centralized control center.

In the system for monitoring the key state of the power electronic equipment in the strong electromagnetic environment, the main control module can utilize an ARM, a DSP, an FPGA or a single chip microcomputer as a main controller. The main controller selects ARM as CPU, and the ARM selects STM32F 417.

In the system for monitoring the key state of the power electronic equipment in the strong electromagnetic environment, the storage module adopts a serial EEPROM (electrically erasable programmable read-only memory) M24M01-RMN6P and 1Mbit produced by ST company, adopts an I2C interface, has the time delay of less than 900ns, adopts the supply voltage in a wider range of 1.8V-5.5V, uses an 8-pin SOIC-8 patch package, and is packaged with all I chips²The C bus interface mode is compatible.

In the system for monitoring the key state of the power electronic equipment in the strong electromagnetic environment, the time stamp module is a DS1307Z + T & R real-time clock (RTC) chip produced by Maxim company, and the series of real-time clock products comprise a nonvolatile RAM memory for data storage, a built-in 56B RAM and an I2C bus and 8-pin SOIC-8 package. The clock/calendar function of the chip provides second, minute, hour, day, date, month and year information, and the chip clock typically operates in 12 or 24 hour format with an AM/PM indicator. Additional functions include a watchdog timer, an alarm and a trickle charge device (for an external backup battery). In addition, it provides devices including integrated crystal clock oscillators and the like.

In the system for monitoring the key state of the power electronic equipment in the strong electromagnetic environment, the temperature and humidity acquisition module can be an SHT10 single-chip temperature and humidity sensor produced by Sensirion corporation, which is a temperature and humidity composite sensor containing calibrated digital signal output. It applies the industrial COMS process micromachining technology of patent

Ensures that the product has extremely high reliability and excellent long-term stability. The sensor comprises a capacitance type polymer humidity measuring element and an energy gap type temperature measuring element, and is seamlessly connected with a 14-bit A/D converter and a serial interface circuit on the same chip. Therefore, the product has the advantages of excellent quality, ultra-fast response, strong anti-interference capability, high cost performance and the like.

In the system for monitoring the key state of the power electronic equipment in the strong electromagnetic environment, the two-way RS-485 isolation module can be an RSM485IDHT module produced by Guangzhou Yongyuan electronics GmbH, is a two-way RS-485 isolation module, integrates an isolation power supply, electrical isolation, an RS-485 interface chip and a bus protection device, is conveniently embedded into user equipment, and enables a product to have the function of connecting an RS-485 network. The series of modules adopt an encapsulation technology process, have good isolation characteristics, and have isolation voltage up to 2500 VDC.

In summary, the invention has flexible and convenient parameter setting, can realize fast, stable and seamless switching, ensures the reliability and rapidness of key state information acquisition, and can be suitable for working occasions with complex electromagnetic environment, long transmission distance and high communication accuracy. Because the dual-redundancy communication system based on the two-way RS-485 isolation module is adopted, the dual-redundancy communication system has higher anti-jamming capability and reliability, and can effectively receive and transmit the acquired state information. The monitoring device is used in occasions with high requirements on state data reliability, such as a ship integrated power energy management system, a distributed transformer substation, a power electronic conversion device, an industrial field monitoring system and the like.

Embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

In order to improve the accuracy, reliability and safety of obtaining key state information in a complex electromagnetic environment, the following special technologies are used:

(1) the Hall current sensor and the Hall piezoelectric sensor which are manufactured based on the Hall effect are adopted to acquire the current and voltage states of the tested power electronic device in real time, non-contact detection is realized, and the defects that the current divider cannot be electrically isolated and the insertion loss (the larger the current is, the larger the insertion loss is, the larger the volume of the current divider is) and the like are overcome. Compared with the traditional current-voltage transformer, although the working current-voltage transformer has multiple working current-voltage levels and higher precision under the specified sinusoidal working frequency, the frequency band which can be suitable for the current-voltage transformer is very narrow, and direct current cannot be tested. In addition, the current-voltage transformer has exciting current when working, so that the current-voltage transformer is an inductive device, and the response time of the current-voltage transformer can only be tens of milliseconds. The well-known secondary side of a current transformer will create a high voltage hazard once it is open circuited. In the detection using a microcomputer, multi-path acquisition of signals is required, and a method capable of isolating and acquiring signals is sought. The Hall current and voltage sensor inherits the advantage that the primary side and the secondary side of the mutual inductor can be reliably insulated, overcomes the defects that a transmission transmitter is high in price and large in size and needs to be provided with the mutual inductor, and provides an analog-to-digital conversion opportunity for automatic management systems such as microcomputer detection and the like. When in use, the output signal of the Hall sensor can be directly input into a high-impedance analog meter head or a digital panel meter, or can be processed for the second time, the analog signal is sent to an automation device, and the digital signal is sent to a computer interface. In a high-voltage power electronic device system with the voltage of more than 3kV, the Hall current and voltage sensors can be matched with a traditional high-voltage transformer to replace a traditional electric quantity transmitter, so that convenience is provided for analog-to-digital conversion. Owing to the advantages of the Hall current-voltage sensor, the sensor can be widely applied to frequency conversion speed regulation devices, inverter devices, UPS power supplies, inverter welding machines, electrolytic plating, numerical control machines, microcomputer monitoring systems, power grid monitoring systems and various fields needing isolation detection of current and voltage.

(2) By utilizing a digital isolation technology and adopting a double-path RS-485 isolation module, the original characteristic of the RS-485 is not changed, the automatic reversing function can be realized without a control pin because the automatic reversing module comprises a sending pin and a receiving pin. The module has the following significant advantages:

isolation and ESD bus protection functions; the same network allows up to 32 nodes to be connected; single +5V or +3.3V power supply; the output pin of the isolated power supply is provided; a maximum baud rate of 115200 bps; electromagnetic radiation EME is extremely low; the electromagnetic anti-interference EMS is extremely high.

The embodiment adopts the ARM which has high performance and low cost and is widely applied to the embedded system as the CPU (as mentioned above, other CPUs such as DSP, FPGA and other single-chip microcomputers can be used as the CPU for this purpose). An I2C interface in the ARM is selected to perform information interaction of the storage module, the timestamp module and the temperature and humidity acquisition module, the ARM and the peripheral test module unit are integrated, and convenience and reliability of the communication system are fully improved.

Fig. 1 is a schematic diagram of an embodiment of a system and method for monitoring critical states of power electronic equipment in a strong electromagnetic environment. The device of the invention comprises: the system comprises a first user interface module 1, an eight-path signal acquisition module 2, a main control module 3, a storage module 4, a timestamp module 5, a temperature and humidity acquisition module 6, a two-path RS-485 isolation module 7 and a second user interface module 8.

As shown in fig. 1, the first user interface module 1 obtains eight analog signals reflecting key states of the power electronic device, transmits the eight analog signals to the eight signal acquisition modules 2 for conversion, then processes the eight analog signals through the main control module 3, and finally transmits external data through the two-way RS-485 isolation module 7 to the second user interface module 8.

As shown in fig. 1, the eight-path signal acquisition module 2 is used for acquiring eight analog signals in key state signals of the tested power electronic equipment, and is composed of three module units, namely a current acquisition channel unit 2-1, a voltage acquisition channel unit 2-2 and a temperature acquisition channel unit 2-3. External analog quantity input is collected through the current collection channel unit 2-1, the voltage collection channel unit 2-2 and the temperature collection channel unit 2-3 and is transmitted to the main control module 3 for processing.

As shown in fig. 1, the main control module 3 is configured to process the analog signals transmitted by the eight signal acquisition modules 2, and is composed of two units, namely a multi-way switch unit 3-1 and an ARM main control unit 3-2. The multi-way switch unit 3-1 adopts the data selector of 1 from 8, in the course of eight-way data transmission, can select any one way in the eight-way signal acquisition module 2 as required, convey to ARM main control unit 3-2.

As shown in fig. 1, the ARM main control unit 3-2 communicates with the storage module 4, the timestamp module 5 and the temperature and humidity acquisition module 6 via an I2C interface, and two serial ports in the ARM main control unit 3-2 communicate with the two RS-485 isolation module 7. ARM main control unit 3-2 obtains real-time stamp through time stamp module 5 to the data storage that will attach time stamp to storage module 4 preserves, monitors the humiture of ARM owner chip through humiture collection module 6, carries out data transmission outside through double-circuit RS-485 isolation module 7 at last, conveys to second user interface module 8.

As shown in FIG. 2, the current collection channel unit 2-1 is composed of three parts, namely, an A-phase current collection channel circuit 2-1-1, a B-phase current collection channel circuit 2-1-2 and a C-phase current collection channel circuit 2-1-3.

As shown in FIG. 2, the A-phase current collecting channel circuit 2-1-1 is connected via a connection terminal T₁And T₂Connected to the first user interface module 1, chip A₁No. 2 pin via terminal T₁Connected to the first user interface module 1, chip A₁No. 3 pin resistor R₂One terminal of (1), resistance R₂Via the other end of the terminal T₂Connected to the first user interface module 1. Chip A₁No. 1 pin and resistor R₃Is connected to one end of a resistor R₃Another end of (1) and chip A₁To pin 8. Chip A₁The 2 nd pin is connected to the ground GND 1. Chip A₁No. 3 pin connection capacitor C₂One terminal of (C), a capacitor₂And the other end thereof is grounded to the ground GND 1. Chip A₁No. 3 pin resistor R₂One terminal of (1), resistance R₂Another terminal of (2) and a bidirectional diode D₁Are connected to one end of a bidirectional diode D₁And the other end thereof is grounded to the ground GND 1. Chip A₁No. 3 pin resistor R₂One terminal of (1), resistance R₂Another terminal of (1) and a capacitor C₁Is connected to one terminal of a capacitor C₁And the other end thereof is grounded to the ground GND 1. Chip A₁No. 3 pin resistor R₂One terminal of (1), resistance R₂Another terminal of (1) and a resistor R₁Is connected to one end of a resistor R₁And the other end thereof is grounded to the ground GND 1. Chip A₁Pin 4 of the power supply U_s1-. Chip A₁Pin 4 of the capacitor C₃Negative electrode of (1), capacitor C₃And a positive ground line GND 1. Chip A₁Pin 4 of the capacitor C₄One terminal of (C), a capacitor₄And the other end thereof is grounded to the ground GND 1. Chip A₁Pin 5 to ground GND 1. Chip A₁Pin 6 of (1)₄To one end of (a). Resistance R₄The other end of the chip A is connected with the chip A_2APin 3. Chip A₁Pin 7 of the power supply U_s1+. Chip A₁Pin 7 of the capacitor C₆Positive electrode of (2), capacitor C₆And a negative ground line GND 1. Chip A₁Pin 7 of the capacitor C₅One terminal of (C), a capacitor₅And the other end thereof is grounded to the ground GND 1. Chip A_2APin 3 of the capacitor C₈One terminal of (C), a capacitor₈And the other end thereof is grounded to the ground GND 1. Chip A_2APin 3 of the capacitor C₇One terminal of (C), a capacitor₇The other end of the chip A is connected with the chip A_2APin 1. Chip A_2APin 2 of (1)₅One terminal of (1), resistance R₅The other end of the chip A is connected with the chip A_2APin 1.Chip A_2APin 8 of the power supply U_S1+Chip A_2AThe 8 th pin of the capacitor C₁₀One terminal of (C), a capacitor₁₀And the other end thereof is grounded to the ground GND 1. Chip A_2APin 4 of the power supply U_S1-. Chip A_2APin 4 of the capacitor C₉One terminal of (C), a capacitor₉And the other end thereof is grounded to the ground GND 1. Chip A_2APin 1 of (1) connecting resistor R₆One terminal of (1), resistance R₆The other end of the chip A is connected with the chip A_2BPin 6. Chip A_2BNo. 6 pin and resistor R₉Is connected to one end of a resistor R₉Another end of (1) and chip A_2BTo pin 7.

As shown in fig. 2, chip a₃No. 2 pin and power supply U_S1+Connected, chip A₃No. 3 pin and chip A₃Pin 2 connected to chip A₃ Pin 2 of the capacitor C₁₄Positive electrode of (2), capacitor C₁₄And a negative ground line GND 1. Chip A₃Pin 2 of the capacitor C₁₃One terminal of (C), a capacitor₁₃And the other end thereof is grounded to the ground GND 1. Chip A₄Pin 4 is connected to ground line GND 1. Chip A₃ Pin 6 and chip A_4APin 3 of (A) is connected to chip A_4A Pin 3 of the capacitor C₁₆Positive electrode of (2), capacitor C₁₆And a negative ground line GND 1. Chip A_4APin 3 of the capacitor C₁₅One terminal of (C), a capacitor₁₅And the other end thereof is grounded to the ground GND 1. Chip A_4APin 8 of the power supply U_S1+. Chip A_4APin 4 to ground GND 1. Chip A_4A Pin 2 and chip A_4ATo pin 1. Chip A_4A Pin 1 and chip A_4BTo pin 5. Chip A_4B Pin 6 and chip A_4BTo pin 7. Chip A_4BPin 7 of the capacitor C₁₇One terminal of (C), a capacitor₁₇And the other end thereof is grounded to the ground GND 1. Chip A_4BPin 7 of (1)₇One terminal of (1), resistance R₇The other end of the chip A is connected with the chip A_2BAnd (5) th leg. Chip A_4BPin 7 of the capacitor C₁₁One terminal of (C), a capacitor₁₁And the other end thereof is grounded to the ground GND 1. Chip A_2BTo (1) a5-pin resistor R₈One terminal of (1), resistance R₈And the other end thereof is grounded to the ground GND 1. Chip A_2BPin 7 of the bidirectional diode D₂One terminal of (2), a bidirectional diode D₂And the other end thereof is grounded to the ground GND 1. Chip A_2BPin 7 of (1)₁₀One terminal of (1), resistance R₁₀Another terminal of the capacitor C₁₂One terminal of (C), a capacitor₁₂And the other end thereof is grounded to the ground GND 1. Resistance R₁₀Is connected with the 1 st pin of a potentiometer RV1, the 2 nd pin of a potentiometer RV1 is connected with a ground GND1, and the 3 rd pin of a potentiometer RV1 is connected with a resistor R₁₁One terminal of (1), resistance R₁₁The other end of the chip A is connected with the chip A₅And (2) the second leg. Chip A₅Pin 1 of the power supply U_S1+. Chip A₅The 1 st pin of the capacitor C₁₈One terminal of (C), a capacitor₁₈And the other end thereof is grounded to the ground GND 1. Chip A₅Pin 3 of the chip A₅Pin 4 of (1), chip A₅Pin 4 to ground GND 1. Chip A₅Pin 8 of the power supply U_S2+. Chip A₅The 8 th pin of the capacitor C₁₉One terminal of (C), a capacitor₁₉And the other end thereof is grounded to the ground GND 2. Chip A₅Pin 5 to ground GND 2. Chip A₅Pin 7 of (1)₁₂One terminal of (1), resistance R₁₂The other end of the chip A is connected with the chip A_6APin 3. Chip A_6APin 3 of (1)₁₄One terminal of (1), resistance R₁₄And the other end thereof is grounded to the ground GND 2. Chip A₅Pin 6 of (1)₁₃One terminal of (1), resistance R₁₃The other end of the chip A is connected with the chip A_6AAnd (2) the second leg. Chip A_6APin 4 to ground GND 2. Chip A_6APin 8 of the power supply U_S2+. Chip A_6AThe 8 th pin of the capacitor C₂₀One terminal of (C), a capacitor₂₀And the other end thereof is grounded to the ground GND 2. Chip A_6APin 2 of (1)₁₅One terminal of (1), resistance R₁₅The other end of the resistor is connected with a pin 1 of a potentiometer RV2, a pin 2 of a potentiometer RV2 is connected with a pin 3 of a potentiometer RV2, and a pin 3 of a potentiometer RV2 is connected with a chip A_6ATo pin 1. Chip A_6APin 1 of (1) connecting resistor R₁₆One terminal of (1), resistance R₁₆Another end of (1)Chip A_6BAnd (5) th leg. Chip A_6BPin 5 of the capacitor C₂₁One terminal of (C), a capacitor₂₁And the other end thereof is grounded to the ground GND 2. Chip A_6BPin 6 of (1)₁₇One terminal of (1), resistance R₁₇The other end of the chip A is connected with the chip A_6BAnd (7) th leg. Chip A_6BPin 7 of (1)₁₈One terminal of (1), resistance R₁₈Another terminal of the capacitor C₂₂One terminal of (C), a capacitor₂₂And the other end thereof is grounded to the ground GND 2. Bidirectional diode D₃One end of which is connected with a capacitor C₂₂One terminal of (2), a bidirectional diode D₃And the other end thereof is grounded to the ground GND 2. Chip A_6BPin 7 of (1)₁₈One terminal of (1), resistance R₁₈Via the other end of the terminal T₂₁Is connected with a multi-way switch unit 3-1.

As shown in FIG. 2, the B-phase current collecting channel circuit 2-1-2 is connected via a connection terminal T₃～T₄Connected with the first user interface module 1, and a B-phase current acquisition channel circuit 2-1-2 is connected with the first user interface module through a wiring terminal T₂₂Is connected with a multi-way switch unit 3-1.

As shown in FIG. 2, the C-phase current collecting channel circuit 2-1-3 is connected via a connection terminal T₅～T₆Connected with the first user interface module 1, and the C-phase current acquisition channel circuit 2-1-3 is connected with the first user interface module through a wiring terminal T₂₃Is connected with a multi-way switch unit 3-1.

As shown in FIG. 3, the voltage acquisition channel unit 2-2 is composed of an A-phase voltage acquisition channel circuit 2-2-1, a B-phase voltage acquisition channel circuit 2-2-2 and a C-phase voltage acquisition channel circuit 2-2-3.

As shown in FIG. 3, the A-phase voltage acquisition channel circuit 2-2-1 is connected via a terminal T₇～T₈Connected to the first user interface module 1. Chip A₇No. 4 pin resistor R₂₀One terminal of (1), resistance R₂₀Via the other end of the terminal T₇Connected to the first user interface module 1, chip A₇No. 1 pin resistor R₂₁One terminal of (1), resistance R₂₁Via the other end of the terminal T₈Connected to the first user interface module 1. Chip A₇The 1 st pin of the capacitor C₂₅ToTerminal, capacitance C₂₅And the other end thereof is connected to the ground GND 1. Chip A₇The 1 st pin of the capacitor C₂₄One terminal of (C), a capacitor₂₄Another end of (1) and chip A₇To pin 4. Chip A₇No. 1 pin resistor R₂₁One terminal of (1), resistance R₂₁The other end of the resistor is connected with a resistor R simultaneously₁₉And a bidirectional diode D₄One terminal of (1), resistance R₁₉Another terminal of (2) and a bidirectional diode D₄The other end of the resistor is connected with a resistor R simultaneously₂₀One terminal of (1), resistance R₂₀The other end of the chip A is connected with the chip A₇Pin 4. Chip A₇Pin 2 of (1)₂₂One terminal of (1), resistance R₂₂The other end of the chip A is connected with the chip A₇Pin 3. Chip A₇Pin 4 of the capacitor C₂₃One terminal of (C), a capacitor₂₃And the other end thereof is connected to the ground GND 1. Chip A₇Pin 16 of the power supply U_S1+Chip A₇Pin 16 of the capacitor C₂₆One terminal of (C), a capacitor₂₆And the other end thereof is grounded to the ground GND 1. Chip A₇The 17 th pin of the transformer is connected with the ground line GND 1. Chip A₇Pin 13 of (2) is connected with a power supply U_S1-. Chip A₇Pin 13 of (1) connecting capacitor C₂₇One terminal of (C), a capacitor₂₇And the other end thereof is grounded to the ground GND 1. Chip A₇Pin 6 to ground GND 1. Chip A₇Pin 15 and resistor R₂₃Is connected to one end of a resistor R₂₃And the other end thereof is grounded to the ground GND 1. Chip A₇Pin 15 and bidirectional diode D₅Are connected to one end of a bidirectional diode D₅And one end thereof is grounded to the ground GND 1. Chip A₇Pin 15 and resistor R₂₄Is connected to one end of a resistor R₂₄The other end of the resistor is connected with a resistor R₂₅One terminal of (1), resistance R₂₅Another end of (1) and chip A_8ATo pin 3. Chip A_8A Pin 3 and capacitor C₂₉Is connected to one terminal of a capacitor C₂₉And the other end thereof is connected to the ground GND 1. Chip A_8A Pin 2 and capacitor C₂₈Is connected to one terminal of a capacitor C₂₈Another terminal of (1) and a resistor R₂₄Are connected at one end. Chip A_8APin 4 of the power supply U_S1-. Chip A_8ATo (1) a4-pin connection capacitor C₃₁One terminal of (C), a capacitor₃₁And the other end thereof is grounded to the ground GND 1. Chip A_8A Pin 2 and chip A_8ATo pin 1. Chip A_8APin 1 of (1) connecting resistor R₂₆One terminal of (1), resistance R₂₆Another end of (1) and chip A_8BTo pin 6. Chip A_8BPin 6 of (1)₂₉One terminal of (1), resistance R₂₉Another end of (1) and chip A_8BTo pin 7.

As shown in fig. 3, chip a₁₁No. 2 pin and power supply U_S1+Connected, chip A₁₁No. 3 pin and chip A₁₁Pin 2 connected to chip A₁₁ Pin 2 of the capacitor C₃₉Positive electrode of (2), capacitor C₃₉And a negative ground line GND 1. Chip A₁₁Pin 2 of the capacitor C₃₈One terminal of (C), a capacitor₃₈And the other end thereof is grounded to the ground GND 1. Chip A₁₁Pin 4 to ground GND 1. Chip A₁₁ Pin 6 and chip A_12APin 3 of (A) is connected to chip A_12A Pin 3 of the capacitor C₄₁Positive electrode of (2), capacitor C₄₁And a negative ground line GND 1. Chip A_12APin 3 of the capacitor C₄₀One terminal of (C), a capacitor₄₀And the other end thereof is grounded to the ground GND 1. Chip A_12APin 8 of the power supply U_S1+. Chip A_12APin 4 to ground GND 1. Chip A_12A Pin 2 and chip A_12ATo pin 1. Chip A_12A Pin 1 and chip A_12BTo pin 5. Chip A_12B Pin 6 and chip A_12BTo pin 7. Chip A_12BPin 7 of the capacitor C₄₂One terminal of (C), a capacitor₄₂And the other end thereof is grounded to the ground GND 1. Chip A_12BPin 7 of (1)₂₇One terminal of (1), resistance R₂₇The other end of the chip A is connected with the chip A_8BAnd (5) th leg. Chip A_12BPin 7 of the capacitor C₃₂One terminal of (C), a capacitor₃₂And the other end thereof is grounded to the ground GND 1. Chip A_8BPin 5 of (1)₂₈One terminal of (1), resistance R₂₈And the other end thereof is grounded to the ground GND 1. Chip A_8BPin 7 of the bidirectional diode D₆One terminal of (2), a bidirectional diode D₆And the other end thereof is grounded to the ground GND 1. Chip A_8BPin 7 of (1)₃₀One terminal of (1), resistance R₃₀Another terminal of the capacitor C₃₃One terminal of (C), a capacitor₃₃And the other end thereof is grounded to the ground GND 1. Resistance R₃₀Is connected with the 1 st pin of a potentiometer RV3, the 2 nd pin of a potentiometer RV3 is connected with a ground wire GND1, the 3 rd pin of the potentiometer RV3 is connected with the 1 st pin of the potentiometer RV3, and the 3 rd pin of the potentiometer RV3 is connected with a resistor R₃₁One terminal of (1), resistance R₃₁The other end of the chip A is connected with the chip A₉And (2) the second leg. Chip A₉Pin 1 of the power supply U_S1+. Chip A₉The 1 st pin of the capacitor C₃₄One terminal of (C), a capacitor₃₄And the other end thereof is grounded to the ground GND 1. Chip A₉Pin 3 of the chip A₉Pin 4 of (1), chip A₉Pin 4 to ground GND 1. Chip A₉Pin 8 of the power supply U_S2+. Chip A₉The 8 th pin of the capacitor C₃₅One terminal of (C), a capacitor₃₅And the other end thereof is grounded to the ground GND 2. Chip A₉Pin 5 to ground GND 2. Chip A₉Pin 7 of (1)₃₂One terminal of (1), resistance R₃₂The other end of the chip A is connected with the chip A_10APin 3. Chip A_10APin 3 of (1)₃₄One terminal of (1), resistance R₃₄And the other end thereof is grounded to the ground GND 2. Chip A₉Pin 6 of (1)₃₃One terminal of (1), resistance R₃₃The other end of the chip A is connected with the chip A_10AAnd (2) the second leg. Chip A_10APin 4 to ground GND 2. Chip A_10APin 8 of the power supply U_S2+. Chip A_10AThe 8 th pin of the capacitor C₃₆One terminal of (C), a capacitor₃₆And the other end thereof is grounded to the ground GND 2. Chip A_10APin 2 of (1)₃₅One terminal of (1), resistance R₃₅The other end of the resistor is connected with a pin 1 of a potentiometer RV4, a pin 2 of a potentiometer RV4 is connected with a pin 3 of a potentiometer RV4, and a pin 3 of a potentiometer RV4 is connected with a chip A_10ATo pin 1. Chip A_10APin 1 of (1) connecting resistor R₃₆One terminal of (1), resistance R₃₆The other end of the chip A is connected with the chip A_10BPin 5 of (1), chip A_10BPin 5 of the capacitor C₃₇One terminal of (C), a capacitor₃₇And the other end thereof is grounded to the ground GND 2. Chip A_10BPin 6 of the chip A_10BAnd (7) th leg. Chip A_10BPin 7 of the bidirectional diode D₇One terminal of (2), a bidirectional diode D₇And the other end thereof is grounded to the ground GND 2. Bidirectional diode D₇Via the other end of the terminal T₂₄Is connected with a multi-way switch unit 3-1.

As shown in FIG. 3, the B-phase voltage acquisition channel circuit 2-2-2 is connected via a terminal T₉～T₁₀Connected with the first user interface module 1, and a B-phase voltage acquisition channel circuit 2-2-2 via a wiring terminal T₂₅Is connected with a multi-way switch unit 3-1.

As shown in FIG. 3, the C-phase voltage acquisition channel circuit 2-2-3 is connected via a terminal T₁₁～T₁₂Connected with the first user interface module 1, and a C phase voltage acquisition channel circuit 2-2-3 via a wiring terminal T₂₆Is connected with a multi-way switch unit 3-1.

As shown in FIG. 4, the temperature collecting channel unit 2-3 is composed of two parts, namely, an A temperature collecting channel 2-3-1 and a B temperature collecting channel 2-3-2.

As shown in FIG. 4, the A-way temperature acquisition channel 2-3-1 is connected with the terminal T₁₃～T₁₆Connected to the first user interface module 1. Chip A₁₄No. 2 pin and power supply U_S1+Connected, chip A₁₄No. 3 pin and chip A₁₄Pin 2 connected to chip A₁₄ Pin 2 of the capacitor C₄₃Positive electrode of (2), capacitor C₄₃And a negative ground line GND 1. Chip A₁₄Pin 2 of the capacitor C₄₄One terminal of (C), a capacitor₄₄And the other end thereof is grounded to the ground GND 1. Chip A₁₄Pin 4 to ground GND 1. Chip A₁₄ Pin 7 and chip A₁₄Is connected to pin 8 of chip A₁₄Pin 8 of the ground line GND 1. Chip A₁₄ Pin 6 and chip A_15ATo pin 3. Chip A_15APin 3 of the capacitor C₄₅Positive electrode of (2), capacitor C₄₅And a negative ground line GND 1. Chip A_15APin 3 of the capacitor C₄₆One terminal of (C), a capacitor₄₆And the other end of the ground line GND1. Chip A_15A Pin 1 and chip A_15ATo pin 2. Chip A_15APin 8 of the power supply U_S1+. Chip A_15APin 4 to ground GND 1. Chip A_15A Pin 1 and chip A_15BTo pin 5. Chip A_15B Pin 7 and chip A_15BTo pin 6. Chip A_15BPin 7 of the capacitor C₄₇To one end of (a). Capacitor C₄₇And the other end thereof is connected to the ground GND 1. Chip A_15BPin 7 of (1)₄₁One terminal of (1), resistance R₄₁The other end of the chip A is connected with the chip A_13APin 3. Chip A_13APin 2 of (1)₃₈One terminal of (1), resistance R₃₈The other end of the chip A is connected with the chip A_13APin 1. Chip A_13APin 2 of (1)₄₀One terminal of (1), resistance R₄₀And the other end thereof is grounded to the ground GND 1. Chip A_13APin 4 of GND1, chip A_13APin 8 of the power supply U_S1+. Chip A_13APin 1 of (1) connecting resistor R₃₇One terminal of (1), resistance R₃₇The other end of the chip A is connected with the chip A_13BAnd (5) th leg. Chip A_13B Pin 6 and chip A_13BTo pin 7. Chip A_13BPin 7 of (1)₃₉One terminal of (1), resistance R₃₉The other end of the chip A is connected with the chip A_13APin 3. Chip A_13BVia the 5 th pin of the terminal T₁₃Connected to the first user interface module 1.

As shown in fig. 3. Chip A₁₆No. 2 pin resistor R₄₂One terminal of (1), resistance R₄₂Via the other end of the terminal T₁₄Connected to the first user interface module 1, chip A₁₆No. 3 pin resistor R₄₃One terminal of (1), resistance R₄₃Via the other end of the terminal T₁₅Connected to the first user interface module 1, chip A₁₆No. 3 pin connection capacitor C₅₁Is connected with one end of a connecting terminal T₁₆Is connected to the ground GND 1. Chip A₁₆Pin 2 of the capacitor C₄₉One terminal of (C), a capacitor₄₉And the other end thereof is connected to the ground GND 1. Chip A₁₆Pin 3 of the capacitor C₅₁One terminal of (C), a capacitor₅₁And the other end thereof is connected to the ground GND 1. Chip A₁₆No. 2 pin resistor R₄₂One terminal of (1), resistance R₄₂The other end of the capacitor is connected with a capacitor C₄₈And a bidirectional diode D₈One terminal of (C), a capacitor₄₈Another terminal of (2) and a bidirectional diode D₈The other end of the resistor is connected with a resistor R simultaneously₄₃One terminal of (1), resistance R₄₃The other end of the chip A is connected with the chip A₁₆Pin 3. Chip A₁₆Pin 4 is connected to ground GND 1. Chip A₁₆And the 5 th pin of the switch is connected to the ground GND 1. Chip A₁₆Pin 7 of the capacitor C₅₂Positive electrode of (2), capacitor C₅₂And a negative ground line GND 1. Chip A₁₆Pin 7 of the capacitor C₅₃One terminal of (C), a capacitor₅₃And the other end thereof is grounded to the ground GND 1. Chip A₁₆Pin 7 of the power supply U_S1+. Chip A₁₆Pin 6 of the bidirectional diode D₉One terminal of (2), a bidirectional diode D₉And the other end thereof is grounded to the ground GND 1. Chip A₁₆Pin 6 of (1)₄₅One terminal of (1), resistance R₄₅Another terminal of the capacitor C₅₄One terminal of (C), a capacitor₅₄And the other end thereof is grounded to the ground GND 1. Resistance R₄₅Is connected with the 1 st pin of a potentiometer RV5, the 2 nd pin of a potentiometer RV5 is connected with a ground GND1, and the 3 rd pin of a potentiometer RV5 is connected with a resistor R₄₆One terminal of (1), resistance R₄₆The other end of the chip A is connected with the chip A₁₇And (2) the second leg. Chip A₁₇Pin 1 of the power supply U_S1+. Chip A₁₇The 1 st pin of the capacitor C₅₅One terminal of (C), a capacitor₅₅And the other end thereof is grounded to the ground GND 1. Chip A₁₇Pin 3 of the chip A₁₇Pin 4 of (1), chip A₁₇Pin 4 to ground GND 1. Chip A₁₇Pin 8 of the power supply U_S2+. Chip A₁₇The 8 th pin of the capacitor C₅₆One terminal of (C), a capacitor₅₆And the other end thereof is grounded to the ground GND 2. Chip A₁₇Pin 5 to ground GND 2. Chip A₁₇Pin 7 of (1)₄₇One terminal of (1), resistance R₄₇The other end of the chip A is connected with the chip A_18APin 3. Chip A_18APin 3 of (1)₄₉At one end of the first and second arms,resistance R₄₉And the other end thereof is grounded to the ground GND 2. Chip A₁₇Pin 6 of (1)₄₈One terminal of (1), resistance R₄₈The other end of the chip A is connected with the chip A_18AAnd (2) the second leg. Chip A_18APin 4 to ground GND 2. Chip A_18APin 8 of the power supply U_S2+. Chip A_18AThe 8 th pin of the capacitor C₅₇One terminal of (C), a capacitor₅₇And the other end thereof is grounded to the ground GND 2. Chip A_18APin 2 of (1)₅₀One terminal of (1), resistance R₅₀The other end of the resistor is connected with a pin 1 of a potentiometer RV6, a pin 2 of a potentiometer RV6 is connected with a pin 3 of a potentiometer RV6, and a pin 3 of a potentiometer RV6 is connected with a chip A_18ATo pin 1. Chip A_18APin 1 of (1) connecting resistor R₅₁One terminal of (1), resistance R₅₁The other end of the chip A is connected with the chip A_18BPin 5 of (1), chip A_18BPin 5 of the capacitor C₅₈One terminal of (C), a capacitor₅₈And the other end thereof is grounded to the ground GND 2. Chip A_18BPin 6 of (1)₅₂One terminal of (1), resistance R₅₂The other end of the chip A is connected with the chip A_18BAnd (7) th leg. Chip A_18BPin 7 of (1)₅₃One terminal of (1), resistance R₅₃The other end of the capacitor is connected with a capacitor C₅₉And a bidirectional diode D₁₀One terminal of (C), a capacitor₅₉Another terminal of (2) and a bidirectional diode D₁₀While the other end is also connected to ground GND 2. . Chip A_18BPin 7 of (1)₅₃One terminal of (1), resistance R₅₃Via the other end of the terminal T₂₇Is connected with a multi-way switch unit 3-1.

As shown in FIG. 4, the B-channel temperature acquisition channel 2-3-2 is connected with the terminal T₁₇～T₂₀Connected to the first user interface module 1. The B path temperature acquisition channel 2-3-2 is connected with a wiring terminal T₂₈Is connected with a multi-way switch unit 3-1.

As shown in FIG. 5, the main control module 3 includes two parts, a multi-way switch unit 3-1 and an ARM main control unit 3-2. The multiple switch unit 3-1 passes through the terminal T₂₁～T₂₈Is connected with an eight-path signal acquisition module 2, wherein the eight-path signal acquisition module 2 comprises a current acquisition channel unit 2-1 and a voltage acquisition unitA channel collecting unit 2-2 and a temperature collecting channel unit 2-3.

As shown in fig. 5, a chip a of the multi-way switch unit 3-1₁₉ Pin 1 and resistor R₅₇Is connected to one end of a resistor R₅₇The other end of the connecting wire and a connecting terminal T₃₁Are connected. Chip A of multi-way switch unit 3-1₁₉ Pin 1 and resistor R₅₇Is connected to one end of a resistor R₅₇Another terminal of (1) and a capacitor C₆₅Is connected to one terminal of a capacitor C₆₅And the other end thereof is connected to the ground GND 2. Chip A of multi-way switch unit 3-1₁₉ Pin 1 and resistor R₅₇Is connected to one end of a resistor R₅₇Another terminal of (2) and a bidirectional diode D₁₃Are connected to one end of a bidirectional diode D₁₃And the other end thereof is connected to the ground GND 2. Chip A of multi-way switch unit 3-1₁₉ Pin 2 and resistor R₅₆Is connected to one end of a resistor R₅₆Another end of (1) and a power supply U_S4+Are connected. Chip A of multi-way switch unit 3-1₁₉ Pin 3 and power source U_S3-Are connected. Chip A of multi-way switch unit 3-1₁₉ Pin 4 and current collecting channel unit 2-1 connecting terminal T₂₁Are connected. Chip A of multi-way switch unit 3-1₁₉ Pin 5 and terminal T of current collecting channel unit 2-1₂₂Are connected. Chip A of multi-way switch unit 3-1₁₉ Pin 6 and terminal T of current collecting channel unit 2-1₂₃Are connected. Chip A of multi-way switch unit 3-1₁₉ Pin 7 and terminal T of voltage acquisition channel unit 2-2₂₄Are connected. Chip A of multi-way switch unit 3-1₁₉ Pin 8 of (1) and resistor R₆₀Is connected to one end of a resistor R₆₀Another terminal of (1) and a resistor R₆₁Is connected to one end of a resistor R₆₁And the other end of the multiplexer unit 3-1 and the chip A₂₀To pin 1. Chip A of multi-way switch unit 3-1₁₉Pin 9 and terminal T of temperature acquisition channel unit 2-3₂₈Are connected. Chip A of multi-way switch unit 3-1₁₉ Pin 10 and terminal T of temperature acquisition channel unit 2-3₂₇Are connected. Chip A of multi-way switch unit 3-1₁₉The 11 th pin of the transformer and the voltage acquisition connectorTerminal T of track unit 2-2₂₆Are connected. Chip A of multi-way switch unit 3-1₁₉ Pin 12 and terminal T of voltage acquisition channel unit 2-2₂₅Are connected. Chip A of multi-way switch unit 3-1₁₉ Pin 13 and power source U_S3+Are connected. Chip A of multi-way switch unit 3-1₁₉ Pin 13 and resistor R₅₄Is connected to one end of a resistor R₅₄Another end of (1) and a power supply U_S4+Are connected. Chip A of multi-way switch unit 3-1₁₉ Pin 13 and resistor R₅₄Is connected to one end of a resistor R₅₄Another terminal of (1) and a resistor R₅₅Is connected to one end of a resistor R₅₅And the other end thereof is connected to the ground GND 2. Chip A of multi-way switch unit 3-1₁₉Is connected to ground GND 2. Chip A of multi-way switch unit 3-1₁₉ Pin 15 and resistor R₅₉Is connected to one end of a resistor R₅₉The other end of the connecting wire and a connecting terminal T₃₃Are connected. Chip A of multi-way switch unit 3-1₁₉ Pin 15 and resistor R₅₉Is connected to one end of a resistor R₅₉Another terminal of (1) and a capacitor C₆₃Is connected to one terminal of a capacitor C₆₃And the other end thereof is connected to the ground GND 2. Chip A of multi-way switch unit 3-1₁₉ Pin 15 and resistor R₅₉Is connected to one end of a resistor R₅₉Another terminal of (2) and a bidirectional diode D₁₁Are connected to one end of a bidirectional diode D₁₁And the other end thereof is connected to the ground GND 2. Chip A of multi-way switch unit 3-1₁₉ Pin 16 and resistor R₅₈Is connected to one end of a resistor R₅₈The other end of the connecting wire and a connecting terminal T₃₂Are connected. Chip A of multi-way switch unit 3-1₁₉ Pin 16 and resistor R₅₈Is connected to one end of a resistor R₅₈Another terminal of (1) and a capacitor C₆₄Is connected to one terminal of a capacitor C₆₄And the other end thereof is connected to the ground GND 2. Chip A of multi-way switch unit 3-1₁₉ Pin 16 and resistor R₅₈Is connected to one end of a resistor R₅₈Another terminal of (2) and a bidirectional diode D₁₂Are connected to one end of a bidirectional diode D₁₂And the other end thereof is connected to the ground GND 2.

As shown in fig. 5, the multi-way switch sheetChip A of element 3-1₁₉ Pin 8 of (1) and resistor R₆₀Is connected to one end of a resistor R₆₀Another terminal of (1) and a resistor R₆₁Is connected to one end of a resistor R₆₁And the other end of the multiplexer unit 3-1 and the chip A₂₀To pin 1. Chip A of multi-way switch unit 3-1₂₀ Pin 1 and resistor R₆₁Is connected to one end of a resistor R₆₁Another terminal of (1) and a capacitor C₆₀Is connected to one terminal of a capacitor C₆₀And the other end thereof is connected to the ground GND 2. Chip A of multi-way switch unit 3-1₂₀ Pin 2 is connected to ground GND 2. Chip A of multi-way switch unit 3-1₂₀Is connected to the 4 th leg. Chip A of multi-way switch unit 3-1₂₀ Pin 5 and capacitor C₆₂Is connected to one terminal of a capacitor C₆₂And the other end thereof is connected to the ground GND 2. Chip A of multi-way switch unit 3-1₂₀ Pin 6 and capacitor C₆₁Is connected to one terminal of a capacitor C₆₁And the other end thereof is connected to the ground GND 2. Chip A of multi-way switch unit 3-1₂₀ Pin 31 and power source U_S5+Are connected. Chip A of multi-way switch unit 3-1₂₀Is connected to ground GND 3. Chip A of multi-way switch unit 3-1₂₀And the 37 th leg of the second leg is connected with the 32 th leg. Chip A of multi-way switch unit 3-1₂₀ Pin 38 and resistor R₆₂Is connected to one end of a resistor R₆₂Another terminal of (1) and a resistor R₆₄Is connected to one end of a resistor R₆₄Another end of (1) and chip A₂₁To pin 3. Chip A of multi-way switch unit 3-1₂₁ Pin 2 and resistor R₆₃Is connected to one end of a resistor R₆₃And the other end thereof is connected to the ground GND 3. Chip A of multi-way switch unit 3-1₂₁ Pin 3 and resistor R₆₄Is connected to one end of a resistor R₆₄Another terminal of (1) and a capacitor C₆₇Is connected to one terminal of a capacitor C₆₇Another end of (1) and chip A₂₁To pin 6. Chip A of multi-way switch unit 3-1₂₁ Pin 3 and capacitor C₆₈Is connected to one terminal of a capacitor C₆₈And the other end thereof is connected to the ground GND 3. Chip A of multi-way switch unit 3-1₂₁ Pin 4 and power source U_S5-Are connected. Multi-way switch unitChip A of 3-1₂₁ Pin 6 and resistor R₆₅Is connected to one end of a resistor R₆₅Another end of (1) and chip A₂₁To pin 2. Chip A of multi-way switch unit 3-1₂₁ Pin 7 and power source U_S5+Are connected. Chip A of multi-way switch unit 3-1₂₁Pin 9 and power source U_S5-Are connected. Chip A of multi-way switch unit 3-1₂₁ Pin 6 and resistor R₆₆Is connected to one end of a resistor R₆₆The other end of the connecting wire and a connecting terminal T₂₉Are connected. Chip A of circuit switch 3-1₂₁ Pin 6 and resistor R₆₆Is connected to one end of a resistor R₆₆Another terminal of (1) and a capacitor C₆₉Is connected to one terminal of a capacitor C₆₉The other end of the connecting wire is connected with a connecting terminal T simultaneously₃₀And ground GND 3.

As shown in FIG. 5, the ARM main control unit 3-2 is connected with the terminal T₂₉～T₃₃Is connected with a multi-way switch unit 3-1. Chip A in ARM main control unit 3-2₂₂The 34 th pin and the multi-way switch unit 3-1 via a connection terminal T₂₉Are connected. Chip A in ARM main control unit 3-2₂₂The 120 th pin and the multi-way switch unit 3-1 via a connection terminal T₃₀Are connected. Chip A in ARM main control unit 3-2₂₂ Pin 63 and the multiple-way switch unit 3-1 via a connection terminal T₃₁Are connected. Chip A in ARM main control unit 3-2₂₂The 64 th pin and the multi-way switch unit 3-1 via a connection terminal T₃₂Are connected. Chip A in ARM main control unit 3-2₂₂The 65 th pin and the multi-way switch unit 3-1 via a connecting terminal T₃₃Are connected.

As shown in FIG. 5, chip A in ARM Main control Unit 3-2₂₂ Pin 105, pin 109, pin 110, pin 113 and pin 25₁. Chip A₂₂Pin 138 of (1)₆₇One terminal of (1), resistance R₆₇And the other end thereof is grounded to the ground GND 3. Chip A₂₂Pin 6 of the power supply U_S6+. Chip A₂₂Pin 6 of the capacitor C₇₃One terminal of (C), a capacitor₇₃And the other end thereof is grounded to the ground GND 3. Chip A₂₂33 rd pin connection inductor L₁One terminal of (1), inductance L₁Another end of the power supply U is connected with a power supply U_S6+. Chip A₂₂33 th pin of capacitor C₇₂Is connected with the positive electrode of the capacitor C₇₂And a negative ground line GND 3. Chip A₂₂Pin 33 and capacitor C₇₁Is connected to one terminal of a capacitor C₇₁And the other end thereof is grounded to the ground GND 3. Chip A₂₂And the 31 st pin of the transformer is connected with the ground line GND 3. Chip A ₂₂121 th pin of the power supply U_S6+. Chip A₂₂121 th pin of (1) is connected with a capacitor C₇₀One terminal of (C), a capacitor₇₀And the other end thereof is grounded to the ground GND 3. Chip A₂₂Pin 23 of the capacitor C₈₁One terminal of (C), a capacitor₈₁And the other end thereof is grounded to the ground GND 3. Chip A₂₂Pin 24 of (1)₆₈One terminal of (1), resistance R₆₈The other end of the capacitor is connected with a capacitor C₈₀One end of (1) and a crystal oscillator Y₂One terminal of (C), a capacitor₈₀The other end of the first and second switches is connected to a ground line GND3 and a crystal oscillator Y₂The other end of the chip A is connected with the chip A₂₂Pin 23, crystal oscillator Y₂To the housing ground GND 3. Chip A ₂₂106 th pin of capacitor C₇₈One terminal of (C), a capacitor₇₈And the other end thereof is grounded to the ground GND 3. Chip A ₂₂71 th pin of capacitor C₇₉One terminal of (C), a capacitor₇₉And the other end thereof is grounded to the ground GND 3. Chip A ₂₂143 th pin of (1) is connected with the capacitor C₇₆One terminal of (C), a capacitor₇₆And the other end thereof is grounded to the ground GND 3. Chip A ₂₂143 th pin of inductor L₂One terminal of (1), inductance L₂The other end of the switch is simultaneously connected with a power supply U_S6+And a capacitor C₇₇One terminal of (C), a capacitor₇₇And the other end thereof is grounded to the ground GND 3. Chip A₂₂The 8 th pin of the capacitor C₇₅One terminal of (C), a capacitor₇₅And the other end thereof is grounded to the ground GND 3. Chip A₂₂The 9 th pin of the capacitor is connected with the capacitor C simultaneously₇₄One end of (1) and a crystal oscillator Y₁One terminal of (C), a capacitor₇₄The other end of the first and second switches is connected to a ground line GND3 and a crystal oscillator Y₁The other end of the chip A is connected with the chip A₂₂And (8) th leg. Chip A₂₂Pin 120 is connected to ground GND 3.

As shown in FIG. 5, the ARM main control unit 3-2 is connected with the terminal T₃₄～T₃₅Connected to a memory module 4, of which an ARM main control unit 3-2Chip A₂₂Through the 90 th pin of the terminal T₃₄Chip A connected with memory module 4 and ARM main control unit 3-2₂₂Through the 88 th pin of the terminal T₃₅Connected to the memory module 4.

As shown in FIG. 5, the ARM main control unit 3-2 is connected with the terminal T₃₆～T₃₇Connected with a time stamp module 5, wherein the chip A of the ARM main control unit 3-2₂₂Through the 85 th pin of the terminal T₃₆Chip A connected with time stamp module 5 and ARM main control unit 3-2₂₂Through the 86 th pin of the terminal T₃₇Connected to the time stamping module 5.

As shown in FIG. 5, the ARM main control unit 3-2 is connected with the terminal T₃₈～T₃₉Is connected with a temperature and humidity acquisition module 6, wherein, the chip A of the ARM main control unit 3-2₂₂Through the 80 th pin of the terminal T₃₈A chip A connected with the temperature and humidity acquisition module 6 and provided with an ARM main control unit 3-2₂₂Pin 82 via terminal T₃₉Is connected with the temperature and humidity acquisition module 6.

As shown in FIG. 5, the ARM main control unit 3-2 is connected with the terminal T₄₀～T₄₃Connected with a double-path RS-485 isolation module 7, wherein the chip A of the ARM main control unit 3-2₂₂129 th pin of the terminal block T₄₀A chip A of the ARM main control unit 3-2 connected with the two-way RS-485 isolation module 7₂₂Via the terminal T₄₁Is connected with a two-way RS-485 isolation module 7. Chip A of ARM main control unit 3-2₂₂119 th pin via a terminal T₄₂A chip A of the ARM main control unit 3-2 connected with the two-way RS-485 isolation module 7₂₂Through the 122 th pin of the terminal T₄₃Is connected with a two-way RS-485 isolation module 7.

As shown in FIG. 5, the two-way RS-485 isolation module 7 is connected via a terminal T₄₄～T₄₉Connected to the second user interface module 8.

As shown in FIG. 6, chip A of memory module 4₂₃ Pin 6 and terminal T₃₄Connected, chip A of memory module 4₂₃ Pin 5 and terminal T₃₅Connected, memory modules4 chip A₂₃Pin 1 of the memory module 4 is connected to ground GND3₂₃Pin 4 of the memory module 4 is connected to the ground line GND3, chip a of the memory module 4₂₃With resistor R at the same time₆₉And a capacitor C₈₂Is connected to one end of a resistor R₆₉The other end of the power supply U_S6+Connected to a capacitor C₈₂And the other end thereof is connected to the ground GND 3. Chip a of memory module 4₂₃With the resistor R at the same time as the No. 6 pin₇₀And a capacitor C₈₃Is connected to one end of a resistor R₇₀The other end of the power supply U_S6+Connected to a capacitor C₈₃And the other end thereof is connected to the ground GND 3. Chip a of memory module 4₂₃ Pin 7 and resistor R₇₁Is connected to one end of a resistor R₇₁Another end of (1) and a power supply U_S6+Are connected. Chip a of memory module 4₂₃And the 8 th pin of the switch is connected to the ground GND 3.

As shown in fig. 7, chip a of the time stamp module 5₂₄ Pin 6 and terminal T₃₆Connected, chip a of time stamp module 5₂₄ Pin 5 and terminal T₃₇Are connected. Chip a of time stamp module 5₂₄ Pin 1 and crystal oscillator Y₃Is connected with the 2 nd pin of the crystal oscillator Y₃Pin 1 and chip A₂₄Is connected with the 2 nd pin of the crystal oscillator Y₃Pin 3 ground GND 3. Chip a of time stamp module 5₂₄ Pin 3 and bidirectional diode D₁₅Are connected to one end of a bidirectional diode D₁₅The other end of the power supply U is connected with the power supply U at the same time_S6+And a bidirectional diode D₁₆Are connected to one end of a bidirectional diode D₁₆And the other end thereof is connected to the ground GND 3. Chip a of time stamp module 5₂₄ Pin 3 and resistor R₇₅Is connected to one end of a resistor R₇₅Another terminal of (3) and a power supply BT₁Is connected with the positive pole of the power supply BT₁Is connected to the ground GND 3. Chip a of time stamp module 5₂₄ Pin 4 is connected to ground GND 3. Chip a of time stamp module 5₂₄With resistor R at the same time₇₂And a capacitor C₈₄Is connected to one end of a resistor R₇₂Another end of (1) and a power supply U_S7+Connected to a capacitor C₈₄The other end of the first and the ground line GND3 are connected. Chip a of time stamp module 5₂₄With the resistor R at the same time as the No. 6 pin₇₃And a capacitor C₈₅Is connected to one end of a resistor R₇₃The other end of the power supply U_S7+Connected to a capacitor C₈₅And the other end thereof is connected to the ground GND 3. Chip a of time stamp module 5₂₄ Pin 7 and diode D₁₄Is connected to the cathode of a diode D₁₄Anode and resistor R₇₄Is connected to one end of a resistor R₇₄Another end of (1) and a power supply U_S7+Are connected. Chip a of time stamp module 5₂₄ Pin 8 of the capacitor C₈₆Positive electrode and capacitor C₈₇Is connected to one terminal of a capacitor C₈₆Negative electrode of (2) and capacitor C₈₇And the other end thereof is also connected to the ground GND 3. Chip a of time stamp module 5₂₄ Pin 8 and power source U_S7+Are connected.

As shown in fig. 8, the chip a of the temperature and humidity acquisition module 6₂₅ Pin 2 and terminal T₃₈Connected chip A of temperature and humidity acquisition module 6₂₅ Pin 3 and terminal T₃₉Are connected. Chip A of temperature and humidity acquisition module 6₂₄ Pin 1 to ground GND 3. Chip A of temperature and humidity acquisition module 6₂₅ Pin 2 and resistor R₇₆Is connected to one end of a resistor R₇₆Another end of (1) and a power supply U_S6+Are connected. Chip A of temperature and humidity acquisition module 6₂₅ Pin 3 and terminal T₃₉Are connected. Chip A of temperature and humidity acquisition module 6₂₄ Pin 4 and power source U_S6+Are connected. Chip A of temperature and humidity acquisition module 6₂₅ Pin 4 and capacitor C₈₈Is connected to one terminal of a capacitor C₈₈And the other end thereof is connected to the ground GND 3.

As shown in FIG. 9, the chip A of the two-way RS-485 isolation module 7₂₆ Pin 1 and power source U_S7+Are connected. Chip A of two-way RS-485 isolation module 7₂₆ Pin 2 to ground GND 3. Chip A of two-way RS-485 isolation module 7₂₆ Pin 3 and terminal T₄₀Are connected. Chip A of two-way RS-485 isolation module 7₂₆ Pin 4 and terminal T₄₁Are connected. Chip A of two-way RS-485 isolation module 7₂₆To (1) a5 pin and connecting terminal T₄₂Are connected. Chip A of two-way RS-485 isolation module 7₂₆ Pin 6 and terminal T₄₃Are connected. Chip A of two-way RS-485 isolation module 7₂₆ Pin 7 of the common mode inductor LX2, and pin 3 of the common mode inductor LX2 is connected to pin 2 of the gas discharge tube GDT 2. Chip A of two-way RS-485 isolation module 7₂₆ Pin 8 of the common-mode inductor LX2 is connected to pin 3 of the gas discharge tube GDT2, and pin 1 of the gas discharge tube GDT2 is connected to the ground line PE. Chip A of two-way RS-485 isolation module 7₂₆ Pin 7 and bidirectional diode D₂₂Are connected to one end of a bidirectional diode D₂₂Another end of (1) and chip A₂₆To pin 8. Chip A of two-way RS-485 isolation module 7₂₆ Pin 7 and bidirectional diode D₂₀Are connected to one end of a bidirectional diode D₂₀And the other end thereof is connected to the ground GND 4. Chip A of two-way RS-485 isolation module 7₂₆ Pin 8 of and a bidirectional diode D₂₁Are connected to one end of a bidirectional diode D₂₁And the other end thereof is connected to the ground GND 4. Chip A of two-way RS-485 isolation module 7₂₆And the 9 th pin of the ground is connected to the ground GND 4. Chip A of two-way RS-485 isolation module 7₂₆Pin 9 simultaneously with capacitor C₉₀And a resistor R₇₈Is connected to one terminal of a capacitor C₉₀Another terminal of (1) and a resistor R₇₈While the other end is connected to the ground line PE. Chip A of two-way RS-485 isolation module 7₂₆ Pin 10 of the common mode inductor LX1, and pin 3 of the common mode inductor LX1 is connected to pin 2 of the gas discharge tube GDT 1. Chip A of two-way RS-485 isolation module 7₂₆ Pin 11 of the common-mode inductor LX1 is connected to pin 1 of the common-mode inductor LX1, pin 2 of the common-mode inductor LX1 is connected to pin 3 of the gas discharge tube GDT1, and pin 1 of the gas discharge tube GDT1 is connected to the ground line PE. Chip A of two-way RS-485 isolation module 7₂₆ Pin 10 and bidirectional diode D₁₉Are connected to one end of a bidirectional diode D₁₉Another end of (1) and chip A₂₆To pin 11. Chip A of two-way RS-485 isolation module 7₂₆ Pin 10 and bidirectional diode D₁₇Are connected to one end of a bidirectional diode D₁₇And the other end thereof is connected to the ground GND 4. Chip A of two-way RS-485 isolation module 7₂₆ Pin 11 and bidirectional diode D₁₈Are connected to one end of a bidirectional diode D₁₈And the other end thereof is connected to the ground GND 4. The 12 th pin of the chip of the two-way RS-485 isolation module 7 is connected with the ground line GND 4. Chip A of two-way RS-485 isolation module 7₂₆At the same time as the capacitor C₈₉And a resistor R₇₇Is connected to one terminal of a capacitor C₈₉Another terminal of (1) and a resistor R₇₇While the other end is connected to the ground line PE.

As shown in FIG. 9, the 2 nd pin of the common mode inductor LX1 of the two-way RS-485 isolation module 7 is connected via the terminal T₄₄Connected to pin 6 of the second user interface module 8, pin 3 of the common-mode inductor LX1 is connected via a terminal T₄₅Connected to the 5 th pin of the second user interface module 8, the ground GND4 is connected via the terminal T₄₆Connected to the 4 th leg of the second user interface module 8, the 2 nd leg of the common-mode inductor LX2 is connected via a terminal T₄₇Connected to pin 3 of the second user interface module 8, pin 3 of the common-mode inductor LX2 is connected via a terminal T₄₇Connected to the 2 nd pin of the second user interface module 8, the ground GND4 is connected via the terminal T₄₈To pin 1 of the second user interface module 8.

step 1, hardware initialization process;

step 2, software initialization process;

step 3, main circulation flow;

and 4, timing a sampling process.

Fig. 10 shows an initialization procedure of the present invention, which includes a hardware initialization procedure and a software initialization procedure, as shown in fig. (a), the hardware initialization procedure includes:

step 1.1, firstly, initializing a storage module, and configuring a CPU pin connected with a storage element;

step 1.2, after the initialization of the storage module is completed, the sampling initialization on the CPU is carried out;

step 1.3, after the CPU on-chip sampling initialization is finished, starting the initialization of an RS-485 serial port;

step 1.4, initializing a temperature and humidity sensor after completing the initialization of the RS-485 serial port;

step 1.5, initializing a timer after completing initialization of the temperature and humidity sensor;

step 1.6, after the initialization of the timer is finished, initializing a clock chip; and (5) returning after the flow of the step 1.1 to the step 1.6 is completed.

As shown in fig. 10 (b), the software initialization process includes the following steps:

step 2.1, initializing default values of parameters;

step 2.2, after the initialization of the default values of the parameters is finished, reading the parameters of the access storage module;

step 2.3, after the parameters of the access storage module are read, initializing a serial port data area;

step 2.4, initializing a sampling data area after the initialization of the serial data area is completed;

step 2.5, after the initialization of the sampling data area is completed, carrying out analog quantity initialization; and returning after the flow of the step 2.1 to the step 2.5 is completed.

Fig. 11 shows a main loop flow of the present invention, which includes the following steps:

step 3.1, firstly, hardware initialization is carried out;

step 3.2, after the hardware initialization is finished, software initialization is carried out, and an analog quantity data area initialization and a storage mark initialization are carried out;

3.3, after the software initialization is completed, recording the starting time of the main cycle, namely taking the count value of the timer as the starting time of the current main cycle;

step 3.4, after recording the starting time of the main cycle, performing an RS-485 communication link, and receiving and sending data according to RS-485;

3.5, after finishing the RS-485 communication link, performing a sampling data storage link, and starting data storage after reaching a preset storage period;

step 3.6, after the sampling data storage link is finished, reading a current moment link, and reading the count value of the timer to serve as the current moment;

and 3.7, after the current time reading link is finished, comparing the current time reading link with the initial time of the main cycle, judging whether the main cycle reaches a preset main cycle period, namely judging whether the main cycle reaches 10ms, if the main cycle does not reach 10ms, returning to read the current time link, and if the main cycle reaches 10ms, returning to record the initial time link of the main cycle.

Fig. 12 shows a timing sampling process of the present invention, which includes the following steps:

step 4.1, firstly, sampling the eight signals, starting AD on a chip of the ARM for conversion, waiting for the conversion to be completed, and reading AD conversion results of the eight signals;

4.2, after sampling is completed, performing a median filtering link, namely a three-point median filtering algorithm;

4.3, after the median filtering is finished, a step of calculating the root mean square value of the eight analog quantities, namely a root mean square algorithm is carried out;

4.4, after the root mean square values of the eight paths of analog quantities are calculated, an inertial filtering link, namely a deviation integral algorithm, is carried out;

step 4.5, after the inertial filtering is finished, a temperature and humidity reading link is carried out; and returning after the flow from the step 4.1 to the step 4.5 is completed.

The first user interface module 1 shown in fig. 1 may alternatively be an IDC20 connector as a connector to an external hall current voltage sensor and temperature sensor. The current and voltage sensor in the invention adopts a Hall current and voltage sensor, and the temperature sensor adopts PT 100. Since they are not important for the explanation of the present invention, they are omitted.

Chip A in ARM main control unit 3-2 shown in FIG. 1, FIG. 5 and FIG. 9₂₂The ARM chip of STM32F417 series was chosen to be ST (Italian semiconductor) derived to be based on

Cortex^TMthe-M4 is an inner core and adopts 90 nanometersNVM process of rice and ART (Adaptive Real-Time Memory Accelerator)^TM) The high-performance microcontroller can reach 168 MHz. As the novel DSP and FPU instructions are integrated, the high-speed performance of 168MHz enables the digital signal controller to be applied, the rapid product development reaches a new level, and the execution speed and the code efficiency of a control algorithm can be improved.

The second user interface module 8, as shown in fig. 1 and 9, may alternatively be an IDC10 connector as a connector with the two-way RS-485 isolation module 7. Since it is not important to explain the present invention, it is omitted.

An amplifier chip A in a current collecting channel unit 2-1 as shown in FIG. 2₁The selector of the invention uses operational amplifiers, such as AD620 and AD 623. Amplifier chip A₂、A₄And A₆The invention adopts low-noise precision operational amplifier, and can select two-way low-noise precision operational amplifier, such as TLC2202, LT1124, NE5532DR, NE5532A, NJM2068V, TLE2142A, OP-270, OPA2111 and the like. Reference voltage chip A₃The invention selects a precise, micro-power consumption, low-voltage difference and low-voltage reference voltage source REF 191. Isolated chip A₅In the invention, a high-performance linear isolation amplifier HCPL-7800 produced by Avago is selected.

Amplifier chip A in Voltage acquisition channel Unit 2-2 as shown in FIG. 3₇The selector of the invention uses operational amplifiers, such as AD620 and AD 623. Amplifier chip A₈、A₁₀And A₁₂The invention adopts low-noise precision operational amplifier, and can select two-way low-noise precision operational amplifier, such as TLC2202, LT1124, NE5532DR, NE5532A, NJM2068V, TLE2142A, OP-270, OPA2111 and the like. Isolated chip A₉In the invention, a high-performance linear isolation amplifier HCPL-7800 produced by Avago is selected. Reference voltage chip A₁₁The invention selects a precise, micro-power consumption, low-voltage difference and low-voltage reference voltage source REF 191.

Amplifier chip A in temperature-collecting channel units 2-3 as shown in FIG. 4₁₃、A₁₅And A₁₈The invention adopts low-noise precise operational amplifier, and can select double-path low-noise precise operational amplifierSuch as TLC2202, LT1124, NE5532DR, NE5532A, NJM2068V, TLE2142A, OP-270, and OPA 2111. Reference voltage chip A₁₄The invention selects a precise, micro-power consumption, low-voltage difference and low-voltage reference voltage source REF 191. Amplifier chip A₁₆The selector of the invention uses operational amplifiers, such as AD620 and AD 623. Isolated chip A₁₇In the invention, a high-performance linear isolation amplifier HCPL-7800 produced by Avago is selected.

Programming interface J in ARM master control unit 3-2 as shown in figure 5₁The link of the JTAG (Joint test action Group) programmer is an international standard test protocol. The standard JTAG interface is 4-wire: a test clock input line (TCK), a test mode select input line (TMS), a test data input line (TDI), and a test data output line (TDO). The test RESET input line (RESET) is optional. JTAG programmer connector, IDC10 connector can be selected, and chip A in ARM main control unit 3-2₂₂(ARM chip) is connected with an external programmer to complete chip A₁The internal test and the simulation and debugging of the conversion system are carried out.

Chip A in memory module 4 as shown in FIG. 6₂₃The invention selects the serial EEPROM memory M24M01-RMN6P, 1Mbit produced by ST company, and adopts a 12C interface.

Chip A in the time stamping module 5 shown in FIG. 7₂₄The invention selects DS1307Z + T produced by Maxim company&R Real Time Clock (RTC) chip, the family of real time clock products, including non-volatile RAM memory for data storage, built-in 56B RAM, using I2C bus.

As shown in fig. 8, the chip a in the temperature and humidity acquisition module 6₂₅The invention adopts an SHT10 single-chip temperature and humidity sensor manufactured by Sensorion company, which adopts an I2C bus.

Chip A in the two-way RS-485 isolation module 7 shown in FIG. 9₂₆The invention selects an RSM485IDHT module produced by Guangzhou Yongyuan electronic products Co., Ltd, which is a two-way RS-485 isolation module.

It should be understood that parts of the specification not set forth in detail are well within the prior art.

It will be understood by those skilled in the art that the foregoing is only a preferred embodiment of the present invention, and is not intended to limit the invention, and that any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the scope of the present invention.

Claims

1. A system for monitoring critical states of power electronic equipment in a strong electromagnetic environment, comprising: the system comprises a first user interface module (1), an eight-path signal acquisition module (2), a main control module (3), a storage module (4), a timestamp module (5), a temperature and humidity acquisition module (6), a two-path RS-485 isolation module (7) and a second user interface module (8);

the first user interface module (1) is used for acquiring eight analog signals reflecting the key state of the power electronic device and transmitting the acquired eight analog signals to the eight signal acquisition module (2) for conversion processing;

the eight-channel signal acquisition module (2) comprises: the device comprises a current acquisition channel unit (2-1) for acquiring three-phase current analog signals, a voltage acquisition channel unit (2-2) for acquiring three-phase voltage analog signals and a temperature acquisition channel unit (2-3) for acquiring two paths of temperature analog signals;

the main control module (3) comprises: the device comprises a multi-way switch unit (3-1) and an ARM main control unit (3-2), wherein the multi-way switch unit (3-1) is used for selecting any one of eight analog signals to be transmitted to the ARM main control unit (3-2) according to needs in the data transmission process; the ARM main control unit (3-2) is communicated with the storage module (4), the timestamp module (5) and the temperature and humidity acquisition module (6) at the same time; the ARM main control unit (3-2) acquires a real-time timestamp through a timestamp module (5), stores data with the timestamp into the storage module (4), monitors the temperature and humidity of the ARM main control unit (3-2) through a temperature and humidity acquisition module (6), and transmits data to the outside through the two-way RS-485 isolation module (7) and the second user interface module (8);

the specific steps of the system for acquiring the key state of the power electronic equipment comprise:

(1) a main circulation step:

(1.1) firstly, hardware initialization is carried out;

(2) timing sampling:

(2.1) firstly, carrying out a sampling link;

(2.2) performing a median filtering step after sampling is finished;

2. The system of claim 1, wherein the two-way serial port in the ARM main control unit (3-2) communicates with the second user interface module (8) via a two-way RS-485 isolation module (7).

3. The system according to claim 1 or 2, wherein the hardware initialization step is specifically:

s100: firstly, initializing a storage module;

s101: after the initialization of the storage module is completed, carrying out sampling initialization on a CPU (central processing unit) chip;

4. The system according to claim 1 or 2, characterized in that the software initialization step is specifically:

s200: firstly, initializing a parameter default value;

s201: reading the parameters of the access storage module after the initialization of the default values of the parameters is completed;

s202: after reading the parameters of the access storage module, initializing a serial port data area;