CN207409478U - The interconnection structure and semiconductor devices of metal interconnecting - Google Patents
The interconnection structure and semiconductor devices of metal interconnecting Download PDFInfo
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- CN207409478U CN207409478U CN201721487820.3U CN201721487820U CN207409478U CN 207409478 U CN207409478 U CN 207409478U CN 201721487820 U CN201721487820 U CN 201721487820U CN 207409478 U CN207409478 U CN 207409478U
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Abstract
The utility model provides the interconnection structure and semiconductor devices of a kind of metal interconnecting.Using supporting cap rock, realize that multilayer interconnection layer can stack gradually on substrate and form interconnection structure, and in multiple conducting parts in each interconnection layer, there is no filled media material between adjacent conducting part, but mutually separated using the air possessed compared with low-k, the problem of so as to efficiently reduce the parasitic capacitance in interconnection structure, further improve interconnection structure RC retardation ratio.
Description
Technical field
The utility model is related to technical field of semiconductors, the interconnection structure of more particularly to a kind of metal interconnecting and a kind of half
Conductor device.
Background technology
As semiconductor industry enters high-performance and multi-functional integrated circuit new era, semiconductor element in integrated circuit
Density can increase therewith so that the spacing between semiconductor element size can reduce therewith, and then semiconductor element can be made
In for conducting the also corresponding reduction of the distance between conducting part of electric signal, this will result directly in arbitrary two adjacent conduction
Generated parasitic capacitance increases between portion.Especially, with the continuous reduction of semiconductor dimensions, produced between adjacent conducting part
Raw parasitic capacitance and the interference brought by parasitic capacitance are more and more apparent, for example, due to the presence of parasitic capacitance can cause by
Capacitive coupling rises in the interconnection structure for the metal interconnecting that conducting part is formed, so as to increase power consumption and improve resistance-electricity
Hold (RC) time constant.
To solve the above problems, industry starts the material using low-k (Low-K) as filling out between conducting part
Material is filled, but the requirement of the dielectric constant in the interconnection structure of metal interconnecting to packing material cannot be met, thus
Semiconductor integrated circuit performance is limited to a certain extent.
As it can be seen that the dielectric constant between conducting part how is further reduced, to reduce in the interconnection structure of metal interconnecting
Parasitic capacitance, it is most important for the performance that further promotes semiconductor device circuit.
Utility model content
The purpose of this utility model is to provide a kind of interconnection structure of metal interconnecting, to solve existing interconnection structure
The dielectric constant of packing material between middle conducting part is higher, and there are problems that larger parasitic capacitance.
In order to solve the above technical problems, the utility model provides a kind of interconnection structure for carrying on the back metal interconnecting, including：
One substrate；
Multilayer interconnection layer stacks gradually over the substrate, and the interconnection layer includes multiple conducting parts, wherein, it is adjacent
The conducting part defines a air gap jointly, and the air gap makes described between the adjacent conducting part
Conducting part has the non-conductive side wall in the air gap；And
At least one layer support cap rock, is formed between the adjacent interconnection layer, and the support cap rock is attached at below
The interconnection layer in the conducting part top and and cover the institute between the adjacent conducting part below
The top and the support cap rock for stating the air gap support the conducting part in the interconnection layer above it.
Optionally, the conducting part includes a conductive layer and a coating film, and the coating film covers the top of the conductive layer
Portion and side wall and the bottom of the air gap between the conducting part, and it is located at the conduction in the coating film
Layer one side is partially exposed in the air gap.
Optionally, the coating film is formed with the suspending part laterally thickened in the top perimeter of the conductive layer, to reduce
The opening size covered above the air gap by the support cap rock.
Optionally, the conducting part further includes an adhesion layer, and the adhesion layer is located at the conductive layer and the coating film
Between and cover top and the side wall of the conductive layer, the coating film covers the surface of the adhesion layer.
Optionally, the adhesion layer includes a silicon oxynitride layer.
Optionally, the conductive layer includes a metal layer and the metal positioned at the top and bottom of the metal layer expands respectively
Dissipate barrier layer.
Optionally, the width in direction is blocked equal to less than the conducting part in same circuit in the air gap in a circuit
Block the width in direction.
Optionally, in each interconnection layer, the difference of the height and position between the top surface of multiple conducting parts
Less than or equal to the thickness value of the support cap rock.
Based on the interconnection structure of above-described metal interconnecting, the utility model additionally provides a kind of semiconductor devices,
The semiconductor devices includes the interconnection structure of metal interconnecting as described above.
In the interconnection structure of metal interconnecting provided by the utility model, the interconnection above it is supported using cap rock is supported
Layer, so that multilayer interconnection layer can stack gradually on substrate, also, adjacent conducting part can be defined jointly between air
Gap, so that the non-conductive side wall of conducting part is exposed in the air gap, this means that there is no fill between adjacent conducting part
Dielectric material, but air is utilized to realize mutually and is separated.Since the dielectric constant (1.0) of air is normal less than the dielectric of dielectric material
Number (is typically larger than 2.3), therefore the interconnection structure of metal interconnecting provided by the utility model possesses relatively low effective K accordingly
Value so as to effectively reduce the parasitic capacitance of the interconnection structure, alleviates the interference as caused by parasitic capacitance significantly, such as
The problem of RC retardation ratio in interconnection structure can be improved.
Description of the drawings
Fig. 1 is the structure diagram of the interconnection structure of the metal interconnecting in the utility model embodiment one.
Fig. 2 is the flow signal of the forming method of the interconnection structure of the metal interconnecting in the utility model embodiment two
Figure.
Fig. 3 a~Fig. 3 g are the forming method of the interconnection structure of the metal interconnecting in the utility model embodiment two at it
Structure diagram in preparation process.
Wherein, reference numeral is as follows：
10- substrates；
20- interconnection layers；
20a- connecting layer material layers；
200- conducting parts；
210- conductive layers；
210a- conductive material layers；
211- metal layers；
211a- metal material layers；
212- metal diffusion barrier layers；
212a- diffusion barrier metal material layers；
220- coating films；
220a- suspending parts；
230- adhesion layers；
201- the air gaps；
201a- sacrificial layers；
30- supports cap rock.
Specific embodiment
As stated in the Background Art, in existing interconnection structure between each conducting part by filled media material to realize
It is mutually isolated.However as the reduction of device size, between the adjacent conducting part in each interconnection layer and each interconnection layer
Distance also reduce therewith so that the parasitic capacitance in interconnection structure gradually increases, and then cause the RC retardation ratio of interconnection structure
Problem is more serious.
For this purpose, the utility model provides a kind of interconnection structure of metal interconnecting, including：
One substrate；
Multilayer interconnection layer stacks gradually over the substrate, and the interconnection layer includes multiple conducting parts, wherein, it is adjacent
The conducting part defines a air gap jointly, and the air gap makes described between the adjacent conducting part
Conducting part has the non-conductive side wall in the air gap；And
At least one layer support cap rock, is formed between the adjacent interconnection layer, and the support cap rock is attached at below
The interconnection layer in the conducting part top and cover the air between the adjacent conducting part below
The top in gap, the support cap rock support the conducting part in the interconnection layer above it.
That is, in the interconnection structure of metal interconnecting provided by the utility model, using support cap rock support level thereon side
Interconnection layer, can be stacked gradually on substrate so as to fulfill multilayer interconnection layer.Also, in interconnection layer between adjacent conducting part
There is no filled media material, so as to effectively reduce the parasitic capacitance between adjacent conducting part, be effectively improved interconnection structure
Performance.Especially, with the continuous reduction of device size, by reducing the parasitic capacitance in interconnection structure, so as to effective
The problem of improving the interference as caused by parasitic capacitance, such as RC retardation ratio in interconnection structure can be alleviated significantly.
Below in conjunction with the drawings and specific embodiments to the utility model proposes metal interconnecting interconnection structure and its shape
It is described in further detail into method, semiconductor devices.According to following explanation, the advantages of the utility model and feature will be more clear
Chu.It should be noted that attached drawing is using very simplified form and uses non-accurate ratio, only to conveniently, lucidly
Aid in illustrating the purpose of the utility model embodiment.
Embodiment one
Fig. 1 is the structure diagram of the interconnection structure of the metal interconnecting in the utility model embodiment one.Such as Fig. 1 institutes
Show, the interconnection structure of the metal interconnecting includes：
One substrate 10；And
Multilayer interconnection layer 20 stacks gradually over the substrate 10, and the interconnection layer 20 includes multiple conducting parts 200,
In, the adjacent conducting part 200 defines a air gap 201 jointly, and the air gap 201 is located at the adjacent biography
Between leading portion 200, and make the conducting part 200 that there is the non-conductive side wall in the air gap 201.
As described above, the conducting part 200 in interconnection layer 20 has the non-conductive side in the air gap 201
Wall, i.e., the side wall of described conducting part 200 is in the air gap 201, and the air gap 201 is by adjacent conduction
Portion 200 is defining, which means that there is no filled media material between adjacent conducting part 200, but utilizes air real
It is existing mutually isolated.Wherein, the dielectric constant of air is usually 1.0, compared with dielectric material (dielectric constant is more than 2.3), air
Dielectric constant it is lower, the problem of so as to reduce effective K values in interconnection structure, be effectively improved interconnection structure RC retardation ratio.
It should be noted that only show 3 layers of interconnection layer in Fig. 1, it should be appreciated that specifically applying schematic diagram
In, the interconnection structure of metal interconnecting can only have 2 layers or 3 layers or more of interconnection layer, not limit herein.In addition, interconnection
The figure of conducting part in layer can also arrange according to actual state, therefore, might not between the conducting part in different interconnection layers
Alignment setting etc. is needed, is only to enumerate explanation herein.
With continued reference to shown in Fig. 1, the interconnection structure of the metal interconnecting further includes at least one layer of support cap rock 30, is formed
Between the adjacent interconnection layer 20, the support cap rock 30 is attached at the conduction in the interconnection layer 20 below
The top in portion 200, and the top of the air gap 201 between the adjacent conducting part 200 below is covered,
This means that the support cap rock 30 is not filled by between the adjacent conducting part 200 and the support cap rock 30 supports
The conducting part 200 in the interconnection layer 20 above it.Wherein, the support cap rock 30 includes a silicon nitride layer.
The substrate 10 can be sequentially stacked on by the way that cap rock 30 is supported to realize the multilayer interconnection layer 20 in interconnection structure
On.It is understood that the support cap rock 30 can be supported multiple conducting parts 200 of the interconnection layer 20 above it, and
Multiple conducting parts 200 in the interconnection layer 20 can be supported the support cap rock 30 above it, so cycle, more to realize
Layer interconnection layer 20 and support cap rock 30 are staggeredly stacked over the substrate 10 successively.
Further, the width D 2 in direction is blocked less than or equal to the conducting part 200 in the air gap 201 in a circuit
The width D 1 in direction is blocked in same circuit.In this way, the support cap rock 30 is on the one hand advantageously reduced to the air gap
201 it is unfavorable recessed, on the other hand also can ensure that the branch of multiple conducting parts 200 in interconnection layer to the support cap rock 30 above it
Support intensity." circuit blocks the width in direction " described herein it is to be understood that along perpendicular to substrate surface direction certain
The width of various components on one section.
Specifically, when only there are two interconnection layers 20 in interconnection structure, then only need that one layer of support cap rock 30 is set to exist
Between two interconnection layers 20.3 layers of interconnection layer 20 are only illustrated in the attached drawing 1 of the present embodiment, therefore are provided with 2 layers of support accordingly
Cap rock 30.It is understood that in the interconnection layer 20 for being capped with support cap rock 30, the support cap rock 30 further defines
The top boundary of the air gap 201, i.e. the adjacent conducting part 200 has been defined between the air in the interconnection layer 20
The portion sides border of gap 201, the support cap rock 30 have defined the top boundary of the air gap 201.
In addition, in the present embodiment, due to being the air gap 201 between the conducting part 200 in interconnection layer 20, can be with
Think, when the support cap rock 30 covers interconnection layer 20 below, only the top with the conducting part of lower interconnection layer 20 200 connects
It touches；And the support cap rock 30 only supports the conducting part in upper strata interconnection layer 20 when supporting the interconnection layer 20 above it
200。
Further, in each interconnection layer 20, the height and position between the top surface of multiple conducting parts 200
Difference be less than or equal to it is described support cap rock 30 thickness value.Thus, when the thickness of the support cap rock 30 is uniform, i.e.,
The support cap rock 30 be can ensure that when covering interconnection layer 20 below, top surface (that is, the Supporting cover of the support cap rock 30
Layer deviates from the surface of lower interconnection layer one side) it is a relatively flat surface, so that the interconnection above support cap rock 30
Layer 20 is formed on a flat surface.In the present embodiment, the top surface of multiple conducting parts 200 in same interconnection layer
(for example, the height difference of top surface is no more than the 10% of the height value of conducting part) is mutually flush, so that the support cap rock
30 possess flat top surface accordingly.
With continued reference to shown in Fig. 1, the conducting part 200 includes a conductive layer 210 and a coating film 220, the coating film
The top of the 220 covering conductive layers 210 and side wall, and it is located at the portion of 210 side wall of conductive layer in the coating film 220
Divide in the air gap 201.In the present embodiment, the coating film 220 is located at the part of 210 side wall of conductive layer
Constitute the non-conductive side wall of the conducting part 200.
That is, using conductive layer 210 in described conducting part 200, the transmission of its electric signal is realized and by conductive layer
210 periphery covers the coating film 220, and train of signal occurs with other conductive devices so as to which conductive layer 210 be avoided to expose
The problem of disturbing, and the integrality of conductive layer 210 can be also protected by the coating film 220, conductive layer 210 is avoided to be damaged
And influence its electric conductivity.
In preferred scheme, the coating film 220 the top perimeter of the conductive layer 210 be formed with laterally thicken it is outstanding
Empty portion 220a, to reduce the opening size that 201 top of the air gap is covered by the support cap rock 30.As shown in Figure 1, institute
Suspending part 220a laterally (parallel to direction of the substrate surface) extensions of coating film 220 are stated, so that being formed in adjacent conduction
The open-topped size of the air gap 201 between portion 200 reduces, thus, you can further utilize the suspending part
220a carries out Auxiliary support to the support cap rock 30 above it, to increase multiple conducting parts 200 in interconnection layer 20 to its top
Support cap rock 30 support strength, alleviate and even avoid the problem that support cap rock 30 deforms, such as the branch can be reduced
Support cap rock 30 is recessed to the risk in the air gap 201.
Further, the conducting part 200 further includes an adhesion layer 230, and the adhesion layer 230 is located at the conductive layer
Top and the side wall of the conductive layer 210 are covered between 210 and the coating film 220, and the coating film 220 is made to cover institute
State the surface of adhesion layer 230.By forming adhesion layer 230 between conductive layer 210 and coating film 220, to improve coating film 220
Adhesiveness on 210 side wall of conductive layer, the problem of preventing coating film 220 from falling off.Meanwhile also using the adhesion layer
230 further protect conductive layer 210.Wherein, the conductive layer 210 for example can be used metal material and be formed, described
Coating film 220 can be for example silicon nitride layer, and the adhesion layer 230 for example can be silicon oxynitride layer.It is described in the present embodiment
Conductive layer 210 includes a metal layer 211 and respectively positioned at the metal diffusion barrier layer of the top and bottom of the metal layer 211
212.The material of the metal layer 211 is such as can be tungsten (W) or aluminium (Al)；Wherein, the metal diffusion barrier layer 212
Material can be metal nitride, such as can be tungsten nitride (WN) or aluminium nitride (AlN) etc..
Embodiment two
It in the present embodiment, is explained by the forming method of the interconnection structure to metal interconnecting, with further body
The advantageous effect of the interconnection structure of metal interconnecting in existing the utility model.
Fig. 2 is the flow signal of the forming method of the interconnection structure of the metal interconnecting in the utility model embodiment two
Figure；As shown in Fig. 2, the forming method of the interconnection structure of the metal interconnecting includes：
Step S110 provides a substrate；
Step S120 stacks gradually multilayer interconnection material layer and at least one layer of support cap rock over the substrate, the branch
Support cap rock is interspersed between the adjacent connecting layer material layer, wherein, the connecting layer material layer includes multiple conducting parts and sacrifice
Layer, the sacrificial layer are filled between the adjacent conducting part, and the support cap rock is attached at the interconnection material below
The conducting part and the sacrificial layer and the support cap rock in the bed of material support the connecting layer material layer above it；With
And
Step S130 removes the sacrificial layer, to expose the non-conductive side wall of the conducting part and be formed between an air
Gap is between the adjacent conducting part, and the non-conductive side wall of the conducting part is in the air gap, each layer of institute
The multiple conducting parts stated in connecting layer material layer constitute one layer of interconnection layer.
That is, when preparing interconnection structure, by filling sacrificial layer between adjacent conducting part, so that subsequently being formed
Support cap rock will not be filled between adjacent conducting part, thus, after the sacrificial layer is removed, you can adjacent
A air gap is formed between conducting part.Also, also it can utilize the sacrificial layer Auxiliary support thereon simultaneously in preparation process
The connecting layer material layer of side.
Fig. 3 a~Fig. 3 g are the forming method of the interconnection structure of the metal interconnecting in the utility model embodiment two at it
Structure diagram in preparation process.Below in conjunction with attached drawing 3a~3g to the interconnection structure of the metal interconnecting in the present embodiment
Forming method is described in detail.
In step s 110, with specific reference to shown in Fig. 3 a, providing a substrate 10.Wherein, the substrate 10 can be to be formed
There is the substrate of semiconductor element, the semiconductor element can be further electrically connected with the interconnection structure subsequently formed.
In the step s 120, with specific reference to shown in Fig. 3 a~3f, multilayer interconnection material layer 20a and at least one layer are stacked gradually
Cap rock 30 is supported on the substrate 10, the support cap rock 30 is interspersed between the adjacent connecting layer material layer 20a,
In, the connecting layer material layer 20a includes multiple conducting parts 200 and sacrificial layer 201a, the sacrificial layer 201a are filled in adjacent
Between the conducting part 200, the support cap rock 30 covers the conducting part in the connecting layer material layer 20a below
The 200 and sacrificial layer 201a and the support cap rock 30 support the connecting layer material layer 20a above it.
Wherein, the connecting layer material layer 20a is used to form the interconnection layer of interconnection structure, therefore, multilayer interconnection material layer 20a
It may make up the interconnection layer that multilayer stacks gradually accordingly.Specifically, in connecting layer material layer 20a described in the multilayer stacked gradually, position
It is formed in the connecting layer material layer 20a of the bottom on the substrate 10, remaining connecting layer material layer 20a and the branch
Support cap rock 30 is staggeredly stacked on the connecting layer material layer 20a of the bottom.It is understood that the substrate 10 and institute
It states support cap rock 30 and forms a support substrate for being used to support the connecting layer material layer 20a.Specifically, the connecting layer material layer
Multiple conducting parts 200 and sacrificial layer 201a in 20a are both formed in support substrate, and the sacrificial layer 201a is further filled in
Between the adjacent conducting part 200.
Further, all connecting layer material layer 20a can be formed using identical method, i.e. identical shape can be used
The connecting layer material layer of the bottom is formed into method and is formed in Supporting cover on substrate and by remaining connecting layer material layer 20a
On layer 30.The forming method of the connecting layer material layer 20a of the bottom is explained in lower mask body.
In the first step for forming connecting layer material layer, with reference to shown in figure 3a~Fig. 3 e, form multiple conducting parts 200 and propping up
On support group bottom, for the connecting layer material layer of the bottom is formed, multiple conducting parts 200 are formed over the substrate 10.
In the present embodiment, the conducting part 200 includes a conductive layer 210 and a coating film 220, and the coating film 220 covers
Cover the side of the conductive layer 210 and top and the bottom of the sacrificial layer 201a between the conducting part 200.Into one
Step, the conductive layer 210 includes a metal layer 211 and the metal of the top and bottom for being located at the metal layer 211 is spread
Barrier layer 212.
Specifically, the forming method of the conducting part 200 can refer to following steps and be formed.
First, with reference to shown in figure 3a, a conductive material layer 210a is formed on the substrate 10.Specifically, using heavy
Product technique forms the conductive material layer 210a.
In the present embodiment, conductive material layer 210a includes a metal material layer 211a and is located at metal material layer 211a respectively
Top and bottom diffusion barrier metal material layer 212a.I.e. described diffusion barrier metal material layer 212a is formed in the lining
On bottom 10, the metal material layer 211a is formed on the diffusion barrier metal material layer 212a, and in the metal material
The top of layer 211a covers a diffusion barrier metal material layer 212a again.Wherein, the material example of the metal material layer 211a
Such as can be tungsten (W) or aluminium (Al), the material of the diffusion barrier metal material layer 212a can be metal nitride, such as
Can be tungsten nitride (WN) or aluminium nitride (AlN) etc..
Then, with reference to shown in figure 3b, patterning process is performed to the conductive material layer 210a, to form multiple conductive layers
210 on the substrate 10.Wherein, the figure of the conductive layer 210 can be adjusted design according to actual state, not do herein
Limitation.
Specifically, photoetching process, which can be used, defines the figure of the conductive layer 210, and it is sequentially etched using etching technics
Diffusion barrier metal material layer, metal material layer and the diffusion barrier metal of the bottom material layer at top, to be respectively formed a gold medal
Belong to layer 211 and the metal diffusion barrier layer 212 that is located at respectively at the top and bottom of the metal layer 211 and, the metal layer
211 and metal diffusion barrier layer 212 together constitute the conductive layer 210.
Then, with reference to shown in figure 3c, before coating film 220 is formed, further include to form an adhesion layer 230 in the lining
On bottom 10, the adhesion layer 230 is covered on the top and side wall of the conductive layer 210.In the present embodiment, the adhesion layer 230
Further extend over the substrate 10.By forming the adhesion layer 230 on the side wall of conductive layer 210 and top, so as to
Adhesion property (or the it is to be understood that coating film of the coating film 220 subsequently formed on conductive layer 210 can be improved
220 possess preferable adhesion property on the adhesion layer 230, also possess between the adhesion layer 230 and the conductive layer 210
Preferable adhesion property), the coating film so as to avoid the problem that formed is fallen off.
Wherein, the adhesion layer 230 for example can be silicon oxynitride layer (SiON).It is formed using silicon oxynitride layer described viscous
On the one hand attached layer 230 can make possess preferable adhesiveness between coating film 220 and the adhesion layer 230；On the other hand, exist
In subsequent etching technics, the silicon oxynitride layer also has stronger etch resistance energy, so as to possess silicon oxynitride layer
Better integrality.
Optionally, the forming method of the silicon oxynitride layer is, for example,：First, one silica layer is formed in the conductive layer
On 210 top and side wall, and it can further cover the table of part of the substrate 10 between adjacent conductive layer 210
Face；Then, annealing process is performed to the silicon oxide layer using nitrogenous gas, so that the silicon oxide layer is changed into silicon oxynitride
Layer, wherein, the nitrogenous gas is, for example, nitric oxide gas (N2O).
Then, with continued reference to the coating film 220 shown in Fig. 3 c, is formed on the surface of the adhesion layer 230, with covering
The adhesion layer 230.The coating film 220 covers top and the side wall of the conductive layer 210 accordingly.Wherein, the coating
The material of film 220 for example can be silicon nitride (SiN).
In preferred scheme, the coating film 220 the top perimeter of the conductive layer 210 be formed with laterally thicken it is outstanding
Empty portion 220a, to reduce the opening size that 201 top of the air gap is covered by the support cap rock 30.It is specifically, described
Coating film 220 can utilize plasma activated chemical vapour deposition technique (PECVD) formation, and can be by controlling the work in depositing operation
Skill parameter, to form the coating film 220 with suspending part 220a.
So far, that is, multiple conducting parts 200 are formd on the substrate 10, the conducting part 200 include conductive layer 210,
Adhesion layer 230 and coating film 220.
In the second step for forming connecting layer material layer, supported with specific reference to a sacrificial layer 201a shown in Fig. 3 d, is formed
In substrate, for the connecting layer material layer of the bottom is formed, the sacrificial layer 201a is formed on the substrate 10, and institute
Sacrificial layer 201a is stated to be filled between the adjacent conducting part 200.In the present embodiment, adhesion layer 230 and coating film 220 into one
The surface of step covering substrate, therefore, the sacrificial layer 201a is correspondingly formed at the coating film between adjacent conducting part 200
On 220.
Further, the sacrificial layer 201a blocks the width in direction in a circuit and exists less than or equal to the conducting part 200
Same circuit blocks the width in direction.Thus, when subsequently removing the sacrificial layer 201a to form the air gap, then institute
The width that the air gap of formation blocks direction in a circuit is respectively smaller than blocked equal to the conducting part 200 in same circuit
The width in direction.In this way, the opening size of formed the air gap can be avoided excessive, it is positioned above so as to advantageously reduce
Support cap rock to the unfavorable recessed of the air gap.
It is understood that the gap between adjacent conducting part 200 is filled using sacrificial layer 201, after avoiding
Continue formed support cap rock 30 to be filled in the gap between adjacent conducting part 200；It also, can also be in the system of interconnection structure
During standby, for carrying out Auxiliary support to the connecting layer material layer above it.
Further, the sacrificial layer 201a does not cover the top of the conducting part 200, and the sacrificial layer 201a
Top surface is not higher than the top surface of the conducting part 200.In the present embodiment, top surface and the conduction of the sacrificial layer 201a
The top surface in portion 200 flushes.
Further, multiple conducting parts 200 in each connecting layer material layer, the height and position between top surface
Difference be less than or equal to it is described support cap rock 30 thickness value.That is, multiple conducting shells in same connecting layer material layer 20a
200 top position it is identical or close to identical (for example, the height difference of top position is no more than the height value of conducting part
10%), at this point, flatening process can be combined, the top surface of formed sacrificial layer 201a and the top table of the conducting part 200 are made
Face flushes.Thus, you can during subsequently to prepare the connecting layer material layer of top, provide a flat surface, such as Fig. 3 e institutes
Show, the support cap rock 30 is formed on surface flat sacrificial layer 201a and conducting part 200.
Specifically, the forming method of the sacrificial layer 201a is, for example,：First choice forms a sacrificial material layer in the substrate
On 10, the sacrificial material layer fills the gap between the adjacent conducting part 200, and covers the top of the conducting part 200
Portion；Then, planarization process is carried out to the sacrificial material layer using flatening process.Wherein, the flatening process is for example
For chemical mechanical milling tech or technique is etched back to, when using chemical mechanical milling tech, i.e., is to grind with the conducting part 200
Stop-layer is ground, process of lapping is made to stop at the top of the conducting part 200；When using technique is etched back to, then with the conduction
Portion 200 is etching stop layer, makes during being etched back to etching stopping in the top of the conducting part 200.
So far, that is, the connecting layer material layer 20a collectively formed by the sacrificial layer 201a and the conducting part 200 is formd.
It is formed as it appears from the above, identical method can be used in all connecting layer material layer 20a, i.e. when on support cap rock 30
When preparing connecting layer material layer, then the conducting part and sacrificial layer are correspondingly formed on support cap rock 30.
Emphasis, according to the forming step of connecting layer material layer 20a and support cap rock 30, performs at least once with reference to shown in figure 3f
The forming step cyclic process, so as to form connecting layer material layer 20a that multilayer stacks gradually over the substrate 10.This implementation
In example, only it is explained exemplified by forming 3 layers of connecting layer material layer 20a.
In step s 130, with specific reference to shown in Fig. 3 g, the sacrificial layer is removed, to expose the conducting part 200
Side wall simultaneously forms a air gap 201 between the adjacent conducting part 200, and the side wall of the conducting part 200 is exposed to institute
It states in the air gap 201, it is to be understood that the region of the corresponding sacrificial layer forms the air gap 201.And
Multiple conducting parts 200 in each layer connecting layer material layer constitute one layer of interconnection layer 20, therefore, multilayer interconnection material
Layer constitutes multilayer interconnection layer 20, and interconnection layer 20 described in multilayer and the support cap rock 30 are alternately stacked at the substrate successively
On 10.
Wherein, the sacrificial layer is removed using etching technics.During etching, etching agent can be along parallel to lining
The direction of bottom surface and horizontal proliferation to the lower section of the support cap rock 30, and then can the laterally etched sacrificial layer, with removal
Sacrificial layer is so as to exposing the non-conductive side wall of conducting part 200.
Further, when preparing the non-conductive side wall, sacrificial layer and support cap rock 300 of the conducting part 200, can pass through
Select corresponding material so that between the non-conductive side wall and sacrificial layer of the conducting part 200 formed and support cap rock 300
Between sacrificial layer, larger etching selection ratio is provided in the etching process of removal sacrificial layer, so as in removal institute completely
While stating sacrificial layer, it can be ensured that the integrality of the conducting part 200 and the support cap rock 30.Specifically, the present embodiment
In, the non-conductive side wall of conducting part 200 is made of coating film 220, and therefore, correspondingly the sacrificial layer is, for example, silicon oxide layer,
The coating film 220 and the support cap rock 30 are, for example, silicon nitride layer.
In addition, in the present embodiment, adhesion layer 230 is also formed between coating film 220 and conductive layer 210, makes coating film
220 can preferably be attached on conductive layer 210, so as under the attack of etching agent, still can ensure that the complete of coating film 220
Property.Certainly, even if when using etching agent removal sacrificial layer, part coating film 230 is fallen off, yet in conductive layer
Adhesion layer 230 is also formed on 210, so as under the protection of the adhesion layer 230, still can ensure that conductive layer 210 will not be by
To influence.Also, material (for example, silicon oxynitride) shape with stronger etch resistance energy also can be used in the adhesion layer 230
Into to further ensure that the integrality of adhesion layer 230.
Based on the interconnection structure of above-described metal interconnecting, the utility model additionally provides a kind of semiconductor devices,
The semiconductor devices includes the interconnection structure of metal interconnecting as described above.For example, the semiconductor devices is memory,
The memory includes a memory cell array and a peripheral circuit, and the peripheral circuit may include the metal interconnecting
Interconnection structure, for drawing corresponding signal.It is corresponding favourable since the parasitic capacitance in the interconnection structure is reduced
In the overall performance for improving the memory.
In conclusion in the interconnection structure of metal interconnecting provided by the utility model, do not have between adjacent conducting part
Filled media material, but air is utilized to realize mutually and is separated.It is mutual with traditional metal interconnecting filled with dielectric material
Connection structure is compared, and the interconnection structure in the utility model is due to the air of low-k, so as to effectively reduce interconnection structure
Effective K values, be reduced the parasitic capacitance of interconnection structure, and then can reduce by parasitic capacitance adverse effect,
Such as the problem of being conducive to improve the RC retardation ratio of the interconnection structure of metal interconnecting.
Each embodiment is described by the way of progressive in this specification, the highlights of each of the examples are with other
The difference of embodiment, just to refer each other for identical similar portion between each embodiment.
Foregoing description is only the description to the utility model preferred embodiment, not to any limit of the scope of the utility model
Calmly, any change, the modification that the those of ordinary skill in the utility model field does according to the disclosure above content, belonging to right will
Seek the protection domain of book.
Claims (9)
1. a kind of interconnection structure of metal interconnecting, which is characterized in that including：
One substrate；
Multilayer interconnection layer stacks gradually over the substrate, and the interconnection layer includes multiple conducting parts, wherein, adjacent is described
Conducting part defines a air gap jointly, and the air gap makes the conduction between the adjacent conducting part
Portion has the non-conductive side wall in the air gap；And
At least one layer support cap rock, is formed between the adjacent interconnection layer, and the support cap rock is attached at institute below
It states the top of the conducting part in interconnection layer and covers below between the air between the adjacent conducting part
The top of gap, the support cap rock support the conducting part in the interconnection layer above it.
2. the interconnection structure of metal interconnecting as described in claim 1, which is characterized in that the conducting part includes a conductive layer
With a coating film, the coating film covers the top of the conductive layer and side wall and the air between the conducting part
The bottom in gap, and the coating film middle position is partially exposed in the side wall of the conductive layer in the air gap.
3. the interconnection structure of metal interconnecting as claimed in claim 2, which is characterized in that the coating film is in the conductive layer
Top perimeter be formed with the suspending part laterally thickened, being opened with reducing above the air gap by what the support cap rock covered
Mouth size.
4. the interconnection structure of metal interconnecting as claimed in claim 2, which is characterized in that the conducting part further includes an adherency
Layer, the adhesion layer covers top and the side wall of the conductive layer between the conductive layer and the coating film, described
Coating film covers the surface of the adhesion layer.
5. the interconnection structure of metal interconnecting as claimed in claim 4, which is characterized in that the adhesion layer includes silicon oxynitride
Layer.
6. the interconnection structure of metal interconnecting as claimed in claim 2, which is characterized in that the conductive layer includes a metal layer
Respectively positioned at the metal diffusion barrier layer of the top and bottom of the metal layer.
7. the interconnection structure of metal interconnecting as described in claim 1, which is characterized in that the air gap is cut in a circuit
The width in disconnected direction blocks the width in direction equal to less than the conducting part in same circuit.
8. the interconnection structure of the metal interconnecting as any one of claim 1 to 7, which is characterized in that each described
In interconnection layer, the difference of the height and position between the top surface of multiple conducting parts is less than or equal to the thickness of the support cap rock
Value.
9. a kind of semiconductor devices, which is characterized in that including the mutual of the metal interconnecting any one of claim 1 to 7
Link structure.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107680953A (en) * | 2017-11-09 | 2018-02-09 | 睿力集成电路有限公司 | Interconnection structure of metal interconnecting and forming method thereof, semiconductor devices |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107680953A (en) * | 2017-11-09 | 2018-02-09 | 睿力集成电路有限公司 | Interconnection structure of metal interconnecting and forming method thereof, semiconductor devices |
| WO2019091421A1 (en) * | 2017-11-09 | 2019-05-16 | Changxin Memory Technologies, Inc. | Interconnection structure of metal lines, method of fabricating the same and semiconductor device |
| US11183421B2 (en) | 2017-11-09 | 2021-11-23 | Changxin Memory Technologies, Inc. | Interconnection structure of metal lines, method of fabricating the same and semiconductor device |
| CN107680953B (en) * | 2017-11-09 | 2023-12-08 | 长鑫存储技术有限公司 | Interconnection structure of metal interconnection line, forming method of interconnection structure and semiconductor device |
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