CN207384695U - Device with fire-fighting control switch conversion monitoring and writing function - Google Patents

Device with fire-fighting control switch conversion monitoring and writing function Download PDF

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Publication number
CN207384695U
CN207384695U CN201721024737.2U CN201721024737U CN207384695U CN 207384695 U CN207384695 U CN 207384695U CN 201721024737 U CN201721024737 U CN 201721024737U CN 207384695 U CN207384695 U CN 207384695U
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pins
circuit
power
resistance
capacitance
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CN201721024737.2U
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盖永兴
朱传统
韩百生
崔玉华
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Shandong Tongyuan Electric Co Ltd
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Shandong Tongyuan Electric Co Ltd
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Abstract

Device with fire-fighting control switch conversion monitoring and writing function, including processor circuit, the two lines bus communicating circuit being connected with processor circuit, monitoring switch input circuit, the sound light alarming circuit of field failure alarm, the internal electric source conversion circuit of required power supply is provided for device, GPRS transmission circuit, data storage circuitry, read 485 communicating circuits of data in scene, the system clock circuit and IP address coding circuit of correct time record are provided for system, the two lines bus communicating circuit is connected with external fire control system signal communication, monitoring switch input circuit is connected with fire control system hand/automatic switch On-off signal signal, GPRS transmission circuit passes through satellite data transmission and fire-fighting general headquarters information exchange.Monitoring and the device of writing function are converted with fire-fighting control hand/automatic switch the utility model proposes a kind of, the control model of fire fighting device is monitored in real time, records the number and time of fire fighting device hand/automatic conversion automatically.

Description

Device with fire-fighting control switch conversion monitoring and writing function
Technical field
The utility model is related to fire control systems, and in particular to one kind has fire-fighting control hand/automatic switch conversion prison Survey the device with writing function.
Background technology
According to《Fire protection control room general technology standard》With management of fire safety system, in quasi-operating status, forbid water The power distribution cabinet of fire extinguishing system, smoke control system and electronic fire separation facility is placed in manual state of a control.But some units and Power distribution cabinet because of various reasons, and is placed in manual state of a control by the operating personnel of some control rooms for a long time, is simply dealing with correlation Department is just transformed into automatic control state when checking, the automatic effects of automatic system are not achieved.
The content of the invention
There is fire-fighting control hand/automatic switch conversion monitoring and record in view of the above-mentioned problems, the utility model provides one kind The device of function.
To solve the above problems, the technical solution that the utility model is taken is:With fire-fighting control switch conversion monitoring and The device of writing function, the two lines bus communicating circuit being connected including processor circuit (U8), with processor circuit (U8), monitoring are opened Input circuit, the sound light alarming circuit of field failure alarm are closed, field failure is reported by light emitting diode and buzzer Internal electric source conversion circuit alert, that required power supply is provided for device, is the system power supply circuit of device and signal isolation power supply electricity Power supply, GPRS transmission circuit (U4), data storage circuitry, scene read 485 communicating circuits of data, are needed for road offer two-way System provides the system clock circuit of correct time record and the IP address coding circuit of live IP address layout is provided for device, The two lines bus communicating circuit is connected with external fire control system signal communication, keeps the exchange of data, and monitoring switch is defeated Enter circuit with fire control system hand/automatic switch On-off signal signal to be connected, GPRS transmission circuit (U4) passes through satellite Data transmission and fire-fighting general headquarters information exchange.
The processor circuit (U8) includes what is be connected with electrification reset and detail programming circuitPin and PWM6 pins, the XTAL pins being connected with processor clock circuit and EXTAL pins are connected with GPRS transmission circuit (U4) PWM4 pins, PWM5 pins, IOC0 pins-IOC5 pins, PS2 pins and PS3 pins, are connected with data storage circuitry IOC6 pins and IOC7 pins, the PM0 pins being connected with 485 communicating circuits, PM1 pins and PWM3 pins, with system clock electricity The ECLK pins and PS6 pins of road connection, the AN0 pins-AN3 pins being connected with IP address coding circuit, AN8 pins- AN11 pins, the AN5 pins-AN7 pins being connected with sound light alarming circuit, the AN4 being connected with monitoring switch input circuit draw Foot, the PS0 pins and PS1 pins being connected with two lines bus communicating circuit or two lines bus signal isolation circuit, VDDXRA pins and VDDA pins are connected to VCC power ends, VSSX pins, VSS pins and VSSA pin power grounds, TEST pins, PWM7 pins, BKGD pins, PWM0-PWM2 pins, PS4 pins and PS5 pins are hanging;
The electrification reset and detail programming circuit include BDM debuggers (JP1), BDM debuggers (JP1) BKGD pins It is connected to processor circuit (U8) PWM6 pins and VCC power ends is connected to by the 24th resistance (R24), VDD pins connect VCC power ends are connected to, BDM debuggers (JP1) RESET pins are connected to VCC power ends by the 26th resistance (R26), RESET pins are grounded by the 25th resistance (R25) and the 17th capacitance (C17) series-connection power supplies, the 25th resistance (R25) Processor circuit (U8) is connected to the 17th capacitance (C17) common portPin, NC pins and GND pin power supply connect Ground, VFP pins are hanging;
The processor clock circuit includes crystal oscillator (XT1), and crystal oscillator (XT1) both ends are respectively connected to Processor circuit (U8) XTAL pins and EXTAL pins, and crystal oscillator (XT1) both ends by the 18th capacitance (C18) and 19th capacitance (C19) power ground;
The power filtering capacitor includes the 20th capacitance and second being connected in parallel between VCC power ends and power ground Ten capacitances.
The two lines bus communicating circuit is connected by two lines bus signal isolation circuit with processor circuit (U8);
Two lines bus communicating circuit includes bus master communication interface chip (U1) and nonpolarity two-way circuit, and described is electrodeless Property two-way circuit include series connection the second diode (D2) and the 3rd diode (D3), connect the 4th diode (D4) and the 5th Diode (D5), and the second diode (D2) cathode is connected with the 4th diode (D4) cathode, the second diode (D2) anode connects The 3rd diode (D3) cathode is connected to, the 4th diode (D4) anode is connected to the 5th diode (D5) cathode, the 3rd diode (D3) anode is connected with the 5th diode (D5) anode;
Described bus master communication interface chip (U1) the SIN pins are connected to the second diode (D2) cathode, the four or two The common port of pole pipe (D4) cathode and the 6th diode (D6) anode, the second diode (D2) anode and the 3rd diode (D3) are cloudy The common port of pole is connected to two lines bus signal first input end (BUS1), the 4th diode (D4) anode and the 5th diode (D5) The common port of cathode is connected to the second input terminal of two lines bus signal (BUS2), and two lines bus signal first input end (BUS1) is total with two The first zener diode (D1) and the first capacitance (C1), the second capacitance (C2) are parallel between the second input terminal of line signal (BUS2) Series arm, and the first capacitance (C1) and the second capacitance (C2) common port signal ground, the first zener diode enter for bus The forceful electric power protection of mouth, the first capacitance and the second capacitance do bus filter processing, bus master for the first zener diode of cooperation Communication interface chip (U1) VCC pin is connected to the 6th diode (D6) cathode, the 3rd capacitance (C3) by first resistor (R1) And the 4th capacitance (C4) be connected in parallel to bus master communication interface chip (U1) between VCC pin and GND pin, the 3rd capacitance (C3) Cathode and GND pin signal ground, VOUT pins and SEL pins are connected to 5V power supplys and are connect by the 5th capacitance (C5) signal Ground, RXD pins are connected to processor circuit (U8) PS0 pins by two lines bus signal isolation circuit or the 6th resistance, if desired for Signal isolation then by two lines bus signal isolation circuit, passes through two if isolating in undesired signal by the 6th resistance, TXD pins Bus signals isolation circuit or the 7th resistance are connected to processor circuit (U8) PS1 pins, then pass through two if desired for signal isolation Bus signals isolation circuit, by the 7th resistance if isolating in undesired signal, NC pins are hanging;
Two lines bus signal isolation circuit includes the first photo-coupler (U2) and the second photo-coupler (U3), wherein the first optocoupler Clutch (U2) AN pins are connected to 5V power supplys and the second photo-coupler (U3) VCC pin and EN pins, the first photo-coupler (U2) CATH pins are connected to bus master communication interface chip (U1) RXD pins, the first photo-coupler by second resistance (R2) (U2) VCC pin and EN pins are connected to VCC power ends and the second photo-coupler (U3) AN pins, the first photo-coupler (U2) OUT pins are connected to processor circuit (U8) PS0 pins and are connected to the first photo-coupler (U2) VCC by the 4th resistance (R4) Pin and EN pins, the first photo-coupler (U2) GND pin power ground and are connected to the first optocoupler by the 7th capacitance (C7) Clutch (U2) VCC pin and EN pins, NC pins and NC1 pins are hanging, and two lines bus signal is inputted by SIN pins, through bus master TTL signal is exported by RXD pins after communication interface chip of standing demodulation, processor circuit is transmitted to after the first photo-coupler;
Second photo-coupler (U3) OUT pins are connected to bus master communication interface chip (U1) TXD pins and by Three resistance (R3) are connected to the second photo-coupler (U3) VCC pin and EN pins, and the second photo-coupler (U3) GND pin signal connects Ground and 5V power supplys are connected to by the 6th capacitance (C6), the second photo-coupler (U3) CATH pins are connected by the 5th resistance (R5) To processor circuit (U8) PS1 pins, NC pins and NC1 pins are hanging, and the TTL signal of processor circuit output is through the second optocoupler After clutch, by TXD pin input bus master station communication interface chips, in bus uplink into modulated signal.
The monitoring switch input circuit includes the 3rd photo-coupler (U5), and the 3rd photo-coupler (U5) CATH pins lead to It crosses the 20th resistance (R20) and is connected to the first nonpolarity switch terminals of fire control system hand/automatic switch (Z1), AN pins connect It is connected to VDD power ends, the second nonpolarity switch terminals of fire control system hand/automatic switch (Z2) and signal ground, VCC pin VCC power ends are connected to EN pins, OUT pins are connected to processor circuit (U8) AN4 pins and by the 21st resistance (R21) it is connected to the 3rd photo-coupler (U5) VCC pin and EN pins, GND pin power ground and passes through the 12nd capacitance (C12) VCC pin and EN pins are connected to, NC pins and NC1 pins are hanging, and Z1 and Z2 are used to input hand/automatic switch Nonpolarity switching signal is transmitted to processor circuit after the 3rd photo-coupler signal isolation;
3rd photo-coupler plays the role of level conversion and signal isolation, if undesired signal is isolated, the monitoring Switch input circuit can be connected to by the 22nd resistance between VDD power ends and VCC power ends, the connection of the 23rd resistance Between signal ground and power ground, by switching signal isolation features short circuit, it is made to only serve the effect of level conversion, power supply VDD is obtained by DC-DC power source circuit module.
The sound light alarming circuit includes buzzer alarm circuit and indicator light circuit, and buzzer alarm circuit includes bee Ring device (M1), and buzzer (M1) IN+ pins are connected to VCC power ends, and IN1 pins are connected to the second triode (Q2) collector, Second triode (Q2) emitter power ground, the second triode (Q2) base stage are connected to processing by the 16th resistance (R16) Device circuit (U8) AN5 pins, the 17th resistance (R17) and the 31st capacitance (C31) are connected in parallel to the second triode (Q2) Between base stage and power ground;
Indicator light circuit includes the first light emitting diode (D7) and the second light emitting diode (D8), respectively as working power Indicator light and alarm lamp, the first light emitting diode (D7) anode and the second light emitting diode (D8) anode are connected to VCC electricity Source, the first light emitting diode (D7) cathode are connected to processor circuit (U8) AN7 pins by the 18th resistance (R18), the Two light emitting diodes (D8) cathode is connected to processor circuit (U8) AN6 pins by the 19th resistance (R19).
The internal electric source conversion circuit includes system power supply circuit and signal isolation power circuit, wherein system power supply Circuit includes integrated stable voltage circuit (U6), and integrated stable voltage circuit (U6) IN pins are connected to 12V power supplys, the 9th zener diode (D9) cathode, the 13rd capacitance (C13) anode and the 14th capacitance (C14) one end are connected to IN pins, the 9th zener diode (D9) anode, the 13rd capacitance (C13) cathode and the 14th capacitance (C14) other end power ground, OUT pins pass through the first electricity (L1) output is felt to VCC power ends, FB pins are connected to VCC power ends, GND pin and ON/OFF pin power grounds, and the tenth Zener diode (D10) cathode is connected to OUT pins, the 15th capacitance (C15) anode and the connection of the 16th capacitance (C16) one end To VCC power ends, the tenth zener diode (D10) anode, the 15th capacitance (C15) cathode and the 16th capacitance (C16) are another Power ground is held, the 12V power supplys that power interface inputs are converted to the 5V power supplys needed for circuit system by system power supply circuit;
Signal isolation power circuit includes DC-DC power source circuit (U7), and DC-DC power source circuit (U7) VIN+ pins are connected to VCC power ends, VOUT+ pins are connected to VDD power ends, VIN- pin power grounds, VOUT- leg signals ground connection, DC-DC electricity Source circuit generates another group of electrically completely isolated 5V power supply by the 5V power supplys of system, the isolation electricity as nonpolarity input Source uses.
GPRS transmission circuit (U4) the LINK1 pins and LINK2 pins are respectively connected to processor circuit (U8) IOC0 pins and IOC1 pins, GPRS transmission circuit (U4) LINK3 pins and LINK4 pins respectively by the 8th resistance (R8) and 9th resistance (R9) is connected to processor circuit (U8) IOC2 pins and IOC3 pins, GPRS transmission circuit (U4) UTXD1 pins Processor circuit (U8) PS2 pins and PS3 pins, GPRS transmission circuit (U4) WORK pins are respectively connected to URXD1 pins Processor circuit (U8) PWM4 pins are connected to, GPRS transmission circuit (U4) POWKEY pins are connected to the first field-effect tube (Q1) Drain electrode, grid are connected to processor circuit (U8) PWM5 pins by the tenth resistance (R10), and GPRS transmission circuit (U4) GND draws Foot is connected to the first field-effect tube (Q1) source electrode and power ground, GPRS transmission circuit (U4) RESET pins and RELOAD pins Reset circuit and data recovery circuit are respectively connected to, GPRS transmission circuit (U4) RE485_EN pins pass through the 11st resistance (R11) processor circuit (U8) IOC5 pins are connected to, GPRS transmission circuit (U4) LINK pins are connected to processor circuit (U8) IOC4 pins, GPRS transmission circuit (U4) VCAP pins are connected to the 8th capacitance (C8) anode, and DC5-18V pins are connected to VCC power ends and the 9th capacitance (C9) anode, the 8th capacitance (C8) cathode and the 9th capacitance (C9) negative power supply ground connection, NC1 draw Foot, NC2 pins, RCV_N pins, RCV_P pins, MIC_N pins and MIC_P pins are hanging;
The reset circuit includes the first button (SW1), and the first button (SW1) one end is connected to GPRS transmission circuit (U4) RESET pins, be connected to by the 12nd resistance (R12) VCC power ends and by the tenth capacitance (C10) power ground, First button (SW1) other end passes through the 13rd resistance (R13) power ground;
The data recovery circuit includes the second button (SW2), and the second button (SW2) one end is connected to GPRS transmission electricity Road (U4) RELOAD pins are connected to VCC power ends by the 14th resistance (R14) and by the 11st capacitance (C11) power supply Ground connection, the second button (SW2) other end pass through the 15th resistance (R15) power ground.
The data storage circuitry includes programmable read only memory (U9), and programmable read only memory (U9) A0 draws Foot-A2 pins by the 27th resistance (R27) power ground, WP pins by the 28th resistance (R28) power ground, VCC pin is connected to VCC power ends and by the 22nd capacitance (C22) power ground, and SCL pins are connected to processor circuit (U8) IOC6 pins and VCC power ends are connected to by the 29th resistance (R29), SDA pins are connected to processor circuit (U8) IOC7 pins and VCC power ends, GND pin power ground are connected to by the 30th resistance (R30), device can be remembered automatically The retention time of state after each transition status of record hand/automatic switch, conversion time and conversion, data deposit EEPOM data Holding circuit is conveniently transferred, and time data memory is long.The power off time of record and integrating device, power-on time, power failure simultaneously The data such as number, and store for a long time, in case needed for reading.The data of storage read except through communication serial mode scene, also Can data transmission be carried out by two lines bus and GPRS.
485 communicating circuits read each item data for scene, including 485 communication chips (U11) and D type interfaces (J3), 485 communication chips (U11) RO pins are connected to processor circuit (U8) PM0 pins and by the 34th resistance (R34) Be connected to the 14th light emitting diode (D14) cathode, the 14th light emitting diode (D14) anode is connected to VCC power ends, DI draws Foot is connected to processor circuit (U8) PM1 pins and is connected to the 13rd light emitting diode by the 33rd resistance (R33) (D13) cathode, the 13rd light emitting diode (D13) anode are connected to VCC power ends, the 33rd resistance (R33) and the 30th Four resistance (R34) are current-limiting resistance, when the 13rd light emitting diode (D13) and the 14th light emitting diode (D14) are communication Lamplight pointing represents the reading state of data,Pin and DE pins are connected to processor circuit (U8) PWM3 pins, A pins D types interface (J3) TDA-/Y pins and RDB+/B pins are respectively connected to B pins, VCC pin is connected to VCC power ends and leads to Cross the 24th capacitance (C24) power ground, the 24th capacitance (C24) is filter capacitor, GND pin power ground, and D types connect Mouth (J3) other pins are hanging.
The system clock circuit provides correct time record for system, and is configured with battery, and battery passes through circuit Have the function of to automatically access, battery is not powered under normal power-up state, and battery automatically accesses during power-off, keeps outage clock Normal operation, system clock circuit include clock chip (U10), and time adjustment can be write by programming mode, can also be led to Serial port modification is crossed, clock chip (U10) X1 pins and X2 pins are respectively connected to clock crystal oscillator (Y2) both ends, and Y2 is The clock crystal oscillator of 32.768KHz provides accurate clock signal for chip, and SCL pins are connected to processor circuit (U8) PS6 and draw Foot and VCC power ends are connected to by the 31st resistance (R31), SDA pins be connected to processor circuit (U8) ECLK pins and VCC power ends are connected to by the 32nd resistance (R32), VCC pin is respectively connected to the 11st diode (D11) and the tenth Two diodes (D12) cathode, the 11st diode (D11) anode are connected to battery (P1) positive ends, battery (P1) negative polarity Power ground is held, P1 is the power circuit of clock chip, and power supply is clock by the 12nd diode (D12) during normal power-up Chip power supply, since power supply VCC voltages (5V) are higher than battery (P1) voltage (3V), battery (P1) is not powered;When device powers off Battery (P1) is powered for clock chip, and the retention time is uninterrupted, and the 12nd diode (D12) anode is connected to VCC power ends, and VCC pin is by the 23rd capacitance (C23) power ground, and the 23rd capacitance (C23) is filter capacitor, GND pin power supply Ground connection,Pin andPin is hanging.
The IP address coding circuit includes toggle switch (SW3), and toggle switch (SW3) pin is respectively connected to handle Device circuit (U8) AN0 pins-AN3 pins, AN8 pins-AN11 pins provide one group of coded address for device, are 0-255, Scene is facilitated to carry out IP address layout to device.
The second input terminal of two lines bus signal first input end and two lines bus signal, fire control system hand/automatic switch First nonpolarity switch terminals and the second nonpolarity switch terminals are connected by input interface with monitoring device, and input interface is as consumption The two lines bus signal of control system and the nonpolarity switching signal input interface of hand/automatic switch;External power supply passes through power supply Interface provides electric energy, input interface of the power interface as 12V DC power supply for monitoring device.
Monitoring and the device of writing function are converted with fire-fighting control hand/automatic switch the utility model proposes a kind of, Signal is read on hand/automatic switch inside switch board, it will be certainly except through traditional switching signal and two lines bus means The signal of dynamic state of a control is sent to fire protection control room, and can be by GPRS remote transmission devices by its signal teletransmission to public security fire-fighting portion Door or fire remote-monitoring center monitor in real time, monitor the control model of fire fighting device in real time, unit is supervised to set automatic fire control It applies in auto state, so that it is guaranteed that fire control system plays its practical function.Meanwhile the device can record fire-fighting automatically The number of facility hand/automatic conversion and time read corresponding data except through serial port, can also pass through two lines bus Corresponding data are passed into switch board and fire-fighting general headquarters master console with GPRS teletransmissions mode, and can be recorded and integrating device Power off time, power-on time, frequency of power cut when data, it is necessary to when teletransmission to switch board and fire-fighting general headquarters master console, also may be used In inspection, scene is read.
Description of the drawings
Fig. 1 is functional block diagram;
Fig. 2 is processor circuit;
Fig. 3 is electrification reset and detail programming circuit;
Fig. 4 is processor clock circuit;
Fig. 5 is two lines bus communicating circuit;
Fig. 6 is two lines bus signal isolation circuit;
Fig. 7 is monitoring switch input circuit;
Fig. 8 is buzzer alarm circuit;
Fig. 9 is indicator light circuit;
Figure 10 is system power supply circuit;
Figure 11 is signal isolation power circuit;
Figure 12 is GPRS transmission circuit;
Figure 13 is data storage circuitry;
Figure 14 is 485 communicating circuits;
Figure 15 is system clock circuit;
Figure 16 is IP address coding circuit;
Figure 17 is input interface;
Figure 18 is power interface.
Specific embodiment
As shown in Figure 1, the device with fire-fighting control switch conversion monitoring and writing function, including processor circuit (U8), two lines bus communicating circuit, monitoring switch input circuit, the acousto-optic of field failure alarm being connected with processor circuit (U8) Warning circuit, alarmed by light emitting diode and buzzer field failure, for device provide needed for power supply inside electricity Power-switching circuit provides power supply needed for two-way, GPRS transmission electricity for the system power supply circuit and signal isolation power circuit of device When road (U4), data storage circuitry, scene read 485 communicating circuits of data, the system of correct time record are provided for system Clock circuit and the IP address coding circuit that live IP address layout is provided for device, the two lines bus communicating circuit disappear with external Anti- control system signal communication linking, keeps the exchanges of data, and monitoring switch input circuit and fire control system hand/from turn Parallel operation On-off signal signal is connected, and GPRS transmission circuit (U4) passes through satellite data transmission and fire-fighting general headquarters information exchange.
As shown in Fig. 2, the processor circuit U8 selects the microprocessor S9S12G64CALL_ of FREESCALE series 48, pin 48 encapsulates LQFP48, the power supply of 5V power supplys, 3 tunnel road serial communication interfaces, 24 road I/O input/output ports, processor electricity Road (U8) includes what is be connected with electrification reset and detail programming circuitPin and PWM6 pins and processor clock circuit The XTAL pins of connection and EXTAL pins, the PWM4 pins being connected with GPRS transmission circuit (U4), PWM5 pins, IOC0 draw Foot-IOC5 pins, PS2 pins and PS3 pins, the IOC6 pins and IOC7 pins being connected with data storage circuitry are logical with 485 PM0 pins, PM1 pins and the PWM3 pins of news circuit connection, the ECLK pins and PS6 pins being connected with system clock circuit, AN0 pins-AN3 pins, the AN8 pins-AN11 pins being connected with IP address coding circuit, are connected with sound light alarming circuit AN5 pins-AN7 pins, the AN4 pins being connected with monitoring switch input circuit, with two lines bus communicating circuit or two lines bus signal The PS0 pins and PS1 pins of isolation circuit connection, VDDXRA pins and VDDA pins are connected to VCC power ends, VSSX pins, VSS pins and VSSA pin power grounds, TEST pins, PWM7 pins, BKGD pins, PWM0-PWM2 pins, PS4 pins and PS5 pins are hanging;
As shown in figure 3, the electrification reset and detail programming circuit include BDM debuggers (JP1), BDM debuggers (JP1) BKGD pins are connected to processor circuit (U8) PWM6 pins and are connected to VCC power supplys by the 24th resistance (R24) End, VDD pins are connected to VCC power ends, and BDM debuggers (JP1) RESET pins are connected to by the 26th resistance (R26) VCC power ends, RESET pins are grounded by the 25th resistance (R25) and the 17th capacitance (C17) series-connection power supplies, and the 20th Five resistance (R25) and the 17th capacitance (C17) common port are connected to processor circuit (U8)Pin, NC pins and GND Pin power ground, VFP pins are hanging;
As shown in figure 4, the processor clock circuit includes crystal oscillator (XT1), crystal oscillator (XT1) both ends Processor circuit (U8) XTAL pins and EXTAL pins are respectively connected to, and crystal oscillator (XT1) both ends pass through the 18th electricity Hold (C18) and the 19th capacitance (C19) power ground;
The power filtering capacitor includes the 20th capacitance and second being connected in parallel between VCC power ends and power ground Ten capacitances.
The two lines bus communicating circuit is connected by two lines bus signal isolation circuit with processor circuit (U8);
As shown in figure 5, two lines bus communicating circuit includes bus master communication interface chip (U1) and nonpolarity two-way circuit, The nonpolarity two-way circuit includes the second diode (D2) of series connection and the 3rd diode (D3), the 4th diode of series connection (D4) and the 5th diode (D5), and the second diode (D2) cathode is connected with the 4th diode (D4) cathode, the second diode (D2) anode is connected to the 3rd diode (D3) cathode, and the 4th diode (D4) anode is connected to the 5th diode (D5) cathode, 3rd diode (D3) anode is connected with the 5th diode (D5) anode;
Described bus master communication interface chip (U1) the SIN pins are connected to the second diode (D2) cathode, the four or two The common port of pole pipe (D4) cathode and the 6th diode (D6) anode, the second diode (D2) anode and the 3rd diode (D3) are cloudy The common port of pole is connected to two lines bus signal first input end (BUS1), the 4th diode (D4) anode and the 5th diode (D5) The common port of cathode is connected to the second input terminal of two lines bus signal (BUS2), and two lines bus signal first input end (BUS1) is total with two The first zener diode (D1) and the first capacitance (C1), the second capacitance (C2) are parallel between the second input terminal of line signal (BUS2) Series arm, and the first capacitance (C1) and the second capacitance (C2) common port signal ground, the first zener diode enter for bus The forceful electric power protection of mouth, the first capacitance and the second capacitance do bus filter processing, bus master for the first zener diode of cooperation Communication interface chip (U1) VCC pin is connected to the 6th diode (D6) cathode, the 3rd capacitance (C3) by first resistor (R1) And the 4th capacitance (C4) be connected in parallel to bus master communication interface chip (U1) between VCC pin and GND pin, the 3rd capacitance (C3) Cathode and GND pin signal ground, VOUT pins and SEL pins are connected to 5V power supplys and are connect by the 5th capacitance (C5) signal Ground, RXD pins are connected to processor circuit (U8) PS0 pins by two lines bus signal isolation circuit or the 6th resistance, if desired for Signal isolation then by two lines bus signal isolation circuit, passes through two if isolating in undesired signal by the 6th resistance, TXD pins Bus signals isolation circuit or the 7th resistance are connected to processor circuit (U8) PS1 pins, then pass through two if desired for signal isolation Bus signals isolation circuit, by the 7th resistance if isolating in undesired signal, NC pins are hanging;
As shown in fig. 6, two lines bus signal isolation circuit includes the first photo-coupler (U2) and the second photo-coupler (U3), In the first photo-coupler (U2) AN pins be connected to 5V power supplys and the second photo-coupler (U3) VCC pin and EN pins, the first light Coupler (U2) CATH pins are connected to bus master communication interface chip (U1) RXD pins by second resistance (R2), and first Photo-coupler (U2) VCC pin and EN pins are connected to VCC power ends and the second photo-coupler (U3) AN pins, the first optical coupling Device (U2) OUT pins are connected to processor circuit (U8) PS0 pins and are connected to the first photo-coupler by the 4th resistance (R4) (U2) VCC pin and EN pins, the first photo-coupler (U2) GND pin power ground and are connected to by the 7th capacitance (C7) One photo-coupler (U2) VCC pin and EN pins, NC pins and NC1 pins are hanging, and two lines bus signal is inputted by SIN pins, warp TTL signal is exported by RXD pins after the demodulation of bus master communication interface chip, processor electricity is transmitted to after the first photo-coupler Road;
Second photo-coupler (U3) OUT pins are connected to bus master communication interface chip (U1) TXD pins and by Three resistance (R3) are connected to the second photo-coupler (U3) VCC pin and EN pins, and the second photo-coupler (U3) GND pin signal connects Ground and 5V power supplys are connected to by the 6th capacitance (C6), the second photo-coupler (U3) CATH pins are connected by the 5th resistance (R5) To processor circuit (U8) PS1 pins, NC pins and NC1 pins are hanging, and the TTL signal of processor circuit output is through the second optocoupler After clutch, by TXD pin input bus master station communication interface chips, in bus uplink into modulated signal.
As shown in fig. 7, the monitoring switch input circuit includes the 3rd photo-coupler (U5), the 3rd photo-coupler (U5) CATH pins are connected to the first nonpolarity switch terminals of fire control system hand/automatic switch by the 20th resistance (R20) (Z1), AN pins are connected to VDD power ends, the second nonpolarity switch terminals of fire control system hand/automatic switch (Z2) and letter Number ground connection, VCC pin and EN pins are connected to VCC power ends, and OUT pins are connected to processor circuit (U8) AN4 pins and logical It crosses the 21st resistance (R21) and is connected to the 3rd photo-coupler (U5) VCC pin and EN pins, GND pin power ground and logical Cross the 12nd capacitance (C12) and be connected to VCC pin and EN pins, NC pins and NC1 pins are hanging, Z1 and Z2 for input hand/ The nonpolarity switching signal of automatic switch, processor circuit is transmitted to after the 3rd photo-coupler signal isolation;
3rd photo-coupler plays the role of level conversion and signal isolation, if undesired signal is isolated, the monitoring Switch input circuit can be connected to by the 22nd resistance between VDD power ends and VCC power ends, the connection of the 23rd resistance Between signal ground and power ground, by switching signal isolation features short circuit, it is made to only serve the effect of level conversion, power supply VDD is obtained by DC-DC power source circuit module.
As shown in figure 8, the sound light alarming circuit includes buzzer alarm circuit and indicator light circuit, buzzer warning Circuit includes buzzer (M1), and buzzer (M1) IN+ pins are connected to VCC power ends, and IN1 pins are connected to the second triode (Q2) collector, the second triode (Q2) emitter power ground, the second triode (Q2) base stage pass through the 16th resistance (R16) Processor circuit (U8) AN5 pins are connected to, the 17th resistance (R17) and the 31st capacitance (C31) are connected in parallel to second Triode (Q2) is between base stage and power ground;
As shown in figure 9, indicator light circuit includes the first light emitting diode (D7) and the second light emitting diode (D8), make respectively For working power indicator light and alarm lamp, the first light emitting diode (D7) anode and the second light emitting diode (D8) anode connect VCC power ends are connected to, the first light emitting diode (D7) cathode is connected to processor circuit (U8) by the 18th resistance (R18) AN7 pins, the second light emitting diode (D8) cathode are connected to processor circuit (U8) AN6 pins by the 19th resistance (R19).
As shown in Figure 10, the internal electric source conversion circuit includes system power supply circuit and signal isolation power circuit, Wherein system power supply circuit includes integrated stable voltage circuit (U6), and integrated stable voltage circuit (U6) IN pins are connected to 12V power supplys, and the 9th Zener diode (D9) cathode, the 13rd capacitance (C13) anode and the 14th capacitance (C14) one end are connected to IN pins, and the 9th Zener diode (D9) anode, the 13rd capacitance (C13) cathode and the 14th capacitance (C14) other end power ground, OUT pins It is exported by the first inductance (L1) to VCC power ends, FB pins are connected to VCC power ends, GND pin and ON/OFF pin power supplys Ground connection, the tenth zener diode (D10) cathode are connected to OUT pins, the 15th capacitance (C15) anode and the 16th capacitance (C16) one end is connected to VCC power ends, the tenth zener diode (D10) anode, the 15th capacitance (C15) cathode and the 16th Capacitance (C16) other end power ground, system power supply circuit are converted to the 12V power supplys that power interface inputs needed for circuit system 5V power supplys;
As shown in figure 11, signal isolation power circuit includes DC-DC power source circuit (U7), DC-DC power source circuit (U7) VIN + pin is connected to VCC power ends, and VOUT+ pins are connected to VDD power ends, VIN- pin power grounds, VOUT- leg signals Ground connection, DC-DC power source circuit generates another group of electrically completely isolated 5V power supply by the 5V power supplys of system, as nonpolarity The isolated power supply of input uses.
As shown in figure 12, GPRS transmission circuit (U4) the LINK1 pins and LINK2 pins are respectively connected to processor Circuit (U8) IOC0 pins and IOC1 pins, GPRS transmission circuit (U4) LINK3 pins and LINK4 pins pass through the 8th electricity respectively Resistance (R8) and the 9th resistance (R9) are connected to processor circuit (U8) IOC2 pins and IOC3 pins, GPRS transmission circuit (U4) UTXD1 pins and URXD1 pins are respectively connected to processor circuit (U8) PS2 pins and PS3 pins, GPRS transmission circuit (U4) WORK pins are connected to processor circuit (U8) PWM4 pins, and GPRS transmission circuit (U4) POWKEY pins are connected to first effect (Q1) drain electrode should be managed, grid is connected to processor circuit (U8) PWM5 pins, GPRS transmission circuit by the tenth resistance (R10) (U4) GND pin is connected to the first field-effect tube (Q1) source electrode and power ground, GPRS transmission circuit (U4) RESET pins and RELOAD pins are respectively connected to reset circuit and data recovery circuit, and GPRS transmission circuit (U4) RE485_EN pins pass through 11 resistance (R11) are connected to processor circuit (U8) IOC5 pins, and GPRS transmission circuit (U4) LINK pins are connected to processing Device circuit (U8) IOC4 pins, GPRS transmission circuit (U4) VCAP pins are connected to the 8th capacitance (C8) anode, DC5-18V pins VCC power ends and the 9th capacitance (C9) anode, the 8th capacitance (C8) cathode and the 9th capacitance (C9) negative power supply ground connection are connected to, NC1 pins, NC2 pins, RCV_N pins, RCV_P pins, MIC_N pins and MIC_P pins are hanging;
The reset circuit includes the first button (SW1), and the first button (SW1) one end is connected to GPRS transmission circuit (U4) RESET pins, be connected to by the 12nd resistance (R12) VCC power ends and by the tenth capacitance (C10) power ground, First button (SW1) other end passes through the 13rd resistance (R13) power ground;
The data recovery circuit includes the second button (SW2), and the second button (SW2) one end is connected to GPRS transmission electricity Road (U4) RELOAD pins are connected to VCC power ends by the 14th resistance (R14) and by the 11st capacitance (C11) power supply Ground connection, the second button (SW2) other end pass through the 15th resistance (R15) power ground.
As shown in figure 13, the data storage circuitry includes programmable read only memory (U9), may be programmed read-only storage Device (U9) A0 pins-A2 pins pass through the 28th resistance (R28) by the 27th resistance (R27) power ground, WP pins Power ground, VCC pin are connected to VCC power ends and by the 22nd capacitance (C22) power grounds, and SCL pins are connected to Processor circuit (U8) IOC6 pins and VCC power ends are connected to by the 29th resistance (R29), SDA pins are connected to place It manages device circuit (U8) IOC7 pins and VCC power ends, GND pin power ground, device is connected to by the 30th resistance (R30) Can record automatically each transition status of hand/automatic switch, conversion time and conversion after state retention time, data deposit EEPOM data holding circuits, are conveniently transferred, and time data memory is long.Simultaneously record and integrating device power off time, power on The data such as time, frequency of power cut, and store for a long time, in case needed for reading.The data of storage show except through communication serial mode Field is read, and can also pass through two lines bus and GPRS carries out data transmission.
As shown in figure 14,485 communicating circuits read each item data for scene, including 485 communication chips (U11) With D types interface (J3), 485 communication chips (U11) RO pins are connected to processor circuit (U8) PM0 pins and by the 34 Resistance (R34) is connected to the 14th light emitting diode (D14) cathode, the 14th light emitting diode (D14) anode is connected to VCC electricity Source, DI pins are connected to processor circuit (U8) PM1 pins and are connected to the 13rd by the 33rd resistance (R33) and shine Diode (D13) cathode, the 13rd light emitting diode (D13) anode are connected to VCC power ends, the 33rd resistance (R33) and 34th resistance (R34) is current-limiting resistance, and the 13rd light emitting diode (D13) and the 14th light emitting diode (D14) are logical Lamplight pointing during news represents the reading state of data,Pin and DE pins are connected to processor circuit (U8) PWM3 and draw Foot, A pins and B pins are respectively connected to D types interface (J3) TDA-/Y pins and RDB+/B pins, and VCC pin is connected to VCC electricity Source and by the 24th capacitance (C24) power ground, the 24th capacitance (C24) is filter capacitor, and GND pin power supply connects Ground, D types interface (J3) other pins are hanging.
As shown in figure 15, the system clock circuit provides correct time record for system, and is configured with battery, electricity Pond has the function of to automatically access by circuit, and battery is not powered under normal power-up state, and battery automatically accesses during power-off, keeps stopping Clock normal operation during electricity, system clock circuit include clock chip (U10), and time adjustment can be write by programming mode Enter, can also be changed by serial port, clock chip (U10) X1 pins and X2 pins are respectively connected to clock crystal oscillator (Y2) both ends, Y2 are the clock crystal oscillator of 32.768KHz, provide accurate clock signal for chip, SCL pins are connected to processor Circuit (U8) PS6 pins and VCC power ends are connected to by the 31st resistance (R31), SDA pins are connected to processor circuit (U8) ECLK pins and VCC power ends are connected to by the 32nd resistance (R32), VCC pin is respectively connected to the 11st Pole pipe (D11) and the 12nd diode (D12) cathode, the 11st diode (D11) anode be connected to battery (P1) positive ends, Battery (P1) negative polarity end power ground, P1 are the power circuit of clock chip, and power supply passes through the 12nd during normal power-up Pole pipe (D12) is powered for clock chip, and since power supply VCC voltages (5V) are higher than battery (P1) voltage (3V), battery (P1) does not supply Electricity;Battery (P1) is clock chip power supply when device powers off, and the retention time continues, and the 12nd diode (D12) anode connects VCC power ends are connected to, and VCC pin, by the 23rd capacitance (C23) power ground, the 23rd capacitance (C23) is filtering Capacitance, GND pin power ground,Pin andPin is hanging.
As shown in figure 16, the IP address coding circuit includes toggle switch (SW3), toggle switch (SW3) pin point Processor circuit (U8) AN0 pins-AN3 pins, AN8 pins-AN11 pins are not connected to, for device one group of coding is provided Location is 0-255, and scene is facilitated to carry out IP address layout to device.
As shown in Figure 17, Figure 18, two lines bus signal first input end BUS1 and the second input terminal of two lines bus signal BUS2, disappear Anti- control system hand/automatic switch nonpolarity switch terminals Z2 of the first nonpolarity switch terminals Z1 and second by input interface J1 with Monitoring device connects, and input interface J1 is opened as the two lines bus signal and the nonpolarity of hand/automatic switch of control of consumption system OFF signal input interface;External power supply provides electric energy by power interface J2 for monitoring device, and power interface J2 is as 12V DC The input interface of power supply.
In the switch that the fire separations such as fire resisting shutter of normal automatic sprinkler system and coordinated signals facility is set When being placed in auto state, the nonpolarity switching signal of the first nonpolarity nonpolarity switch terminals Z2 of switch terminals Z1 and second passes through the 3rd After the isolation conversion of photo-coupler U5 photosignals, processor circuit U8 is input to through input interface J1, by input signal After level is judged, confirm that the position of the switch at this time is the normal condition in auto state, therefore processor circuit U8 is not The functions such as sound-light alarm and data remote are started to scene.
When the fire separations facility such as fire resisting shutter of automatic sprinkler system and coordinated signals is arranged on by operating personnel When switching device during manual state of a control or at this time breaks down, the first nonpolarity switch terminals Z1 of hand/automatic switch and The nonpolarity switching signal of second nonpolarity switch terminals Z2 is transmitted to processing by input interface J1 through monitoring switch input circuit Device circuit U 8, processor circuit U8, will by GPRS transmission circuit U 4 in the case where judging that switch is not in normal requirement The teletransmission simultaneously of the data such as the state of monitoring signals and the IP address of the present apparatus monitors each in real time to the master console of fire-fighting general headquarters The control model of fire fighting device, and pass through sound light alarming circuit and alarm field failure, it is ensured that fire control system plays Its practical function.
Except signal transmission, can be matched somebody with somebody with number of the recording control apparatus when carrying out hand/auto state and converting and time Being equipped with the clock chip of battery can continue in the retention time under power down mode, therefore can with accurate recording hand/automatic switch After conversion time and conversion during the holding of state.The time data recorded is read except through external communication serial mode scene It takes, can be also transmitted by two lines bus and GPRS teletransmission modes, by the main control of data remote to switch board and fire-fighting general headquarters Platform.
Device power-off after re-power, by reading clock chip, can with the power off time of recording device, power-on time, The data such as frequency of power cut can also read at scene data remote to control centre in inspection.

Claims (10)

1. the device with fire-fighting control switch conversion monitoring and writing function, it is characterised in that:Including processor circuit (U8), Two lines bus communicating circuit, monitoring switch input circuit, the sound-light alarm of field failure alarm being connected with processor circuit (U8) Circuit, the internal electric source conversion circuit that required power supply is provided for device, GPRS transmission circuit (U4), data storage circuitry, scene It reads 485 communicating circuits of data, the system clock circuit and IP address coding circuit of correct time record, institute is provided for system The two lines bus communicating circuit stated is connected with external fire control system signal communication, and monitoring switch input circuit is with fire-fighting control Hand/automatic switch On-off signal signal of uniting is connected, and GPRS transmission circuit (U4) passes through satellite data transmission and fire-fighting general headquarters Information exchange.
2. the device according to claim 1 with fire-fighting control switch conversion monitoring and writing function, it is characterised in that: The processor circuit (U8) includes what is be connected with electrification reset and detail programming circuitPin and PWM6 pins, with The XTAL pins and EXTAL pins of processor clock circuit connection, PWM4 pins, the PWM5 being connected with GPRS transmission circuit (U4) Pin, IOC0 pins-IOC5 pins, PS2 pins and PS3 pins, the IOC6 pins and IOC7 being connected with data storage circuitry draw Foot, the PM0 pins being connected with 485 communicating circuits, PM1 pins and PWM3 pins, the ECLK pins being connected with system clock circuit With PS6 pins, the AN0 pins-AN3 pins being connected with IP address coding circuit, AN8 pins-AN11 pins, with sound-light alarm Circuit connection AN5 pins-AN7 pins, the AN4 pins being connected with monitoring switch input circuit, with two lines bus communicating circuit or The PS0 pins and PS1 pins, VDDXRA pins and VDDA pins of two lines bus signal isolation circuit connection are connected to VCC power ends, VSSX pins, VSS pins and VSSA pin power grounds, TEST pins, PWM7 pins, BKGD pins, PWM0-PWM2 pins, PS4 pins and PS5 pins are hanging;
The electrification reset and detail programming circuit include BDM debuggers (JP1), the connection of BDM debuggers (JP1) BKGD pins VCC power ends are connected to processor circuit (U8) PWM6 pins and by the 24th resistance (R24), VDD pins are connected to VCC power ends, BDM debuggers (JP1) RESET pins are connected to VCC power ends by the 26th resistance (R26), and RESET draws Foot is grounded by the 25th resistance (R25) and the 17th capacitance (C17) series-connection power supplies, the 25th resistance (R25) and the tenth Seven capacitances (C17) common port is connected to processor circuit (U8)Pin, NC pins and GND pin power ground, VFP draw Foot is hanging;
The processor clock circuit includes crystal oscillator (XT1), and crystal oscillator (XT1) both ends are respectively connected to handle Device circuit (U8) XTAL pins and EXTAL pins, and crystal oscillator (XT1) both ends pass through the 18th capacitance (C18) and the tenth Nine capacitances (C19) power ground;
The power filtering capacitor includes the 20th capacitance being connected in parallel between VCC power ends and power ground and the 20th electricity Hold.
3. the device according to claim 2 with fire-fighting control switch conversion monitoring and writing function, it is characterised in that: The two lines bus communicating circuit is connected by two lines bus signal isolation circuit with processor circuit (U8);
Two lines bus communicating circuit includes bus master communication interface chip (U1) and nonpolarity two-way circuit, and described is nonpolarity double Include the second diode (D2) and the 3rd diode (D3), the 4th diode (D4) of series connection and the five or two pole of series connection to circuit It manages (D5), and the second diode (D2) cathode is connected with the 4th diode (D4) cathode, the second diode (D2) anode is connected to 3rd diode (D3) cathode, the 4th diode (D4) anode are connected to the 5th diode (D5) cathode, the 3rd diode (D3) Anode is connected with the 5th diode (D5) anode;
Described bus master communication interface chip (U1) the SIN pins are connected to the second diode (D2) cathode, the 4th diode (D4) common port of cathode and the 6th diode (D6) anode, the second diode (D2) anode and the 3rd diode (D3) cathode Common port is connected to two lines bus signal first input end (BUS1), and the 4th diode (D4) anode and the 5th diode (D5) are cloudy The common port of pole is connected to the second input terminal of two lines bus signal (BUS2), two lines bus signal first input end (BUS1) and two lines bus The first zener diode (D1) and the first capacitance (C1), the second capacitance (C2) string are parallel between the second input terminal of signal (BUS2) Join branch, and the first capacitance (C1) and the second capacitance (C2) common port signal ground, bus master communication interface chip (U1) VCC Pin is connected to the 6th diode (D6) cathode by first resistor (R1), and the 3rd capacitance (C3) and the 4th capacitance (C4) are connected in parallel to Between VCC pin and GND pin, the 3rd capacitance (C3) cathode and GND pin signal connect bus master communication interface chip (U1) Ground, VOUT pins and SEL pins are connected to 5V power supplys and by the 5th capacitance (C5) signal grounds, and RXD pins pass through two lines bus Signal isolation circuit or the 6th resistance are connected to processor circuit (U8) PS0 pins, and TXD pins pass through two lines bus signal isolation electricity Road or the 7th resistance are connected to processor circuit (U8) PS1 pins, and NC pins are hanging;
Two lines bus signal isolation circuit includes the first photo-coupler (U2) and the second photo-coupler (U3), wherein the first photo-coupler (U2) AN pins are connected to 5V power supplys and the second photo-coupler (U3) VCC pin and EN pins, the first photo-coupler (U2) CATH Pin is connected to bus master communication interface chip (U1) RXD pins, the first photo-coupler (U2) VCC by second resistance (R2) Pin and EN pins are connected to VCC power ends and the second photo-coupler (U3) AN pins, and the first photo-coupler (U2) OUT pins connect It is connected to processor circuit (U8) PS0 pins and the first photo-coupler (U2) VCC pin and EN is connected to by the 4th resistance (R4) Pin, the first photo-coupler (U2) GND pin power ground and is connected to the first photo-coupler (U2) by the 7th capacitance (C7) VCC pin and EN pins, NC pins and NC1 pins are hanging;
Second photo-coupler (U3) OUT pins are connected to bus master communication interface chip (U1) TXD pins and by the 3rd electricity Resistance (R3) is connected to the second photo-coupler (U3) VCC pin and EN pins, the second photo-coupler (U3) GND pin signal ground and 5V power supplys are connected to by the 6th capacitance (C6), the second photo-coupler (U3) CATH pins are connected to by the 5th resistance (R5) Processor circuit (U8) PS1 pins, NC pins and NC1 pins are hanging.
4. the device according to claim 2 with fire-fighting control switch conversion monitoring and writing function, it is characterised in that: The monitoring switch input circuit includes the 3rd photo-coupler (U5), and the 3rd photo-coupler (U5) CATH pins pass through the 20th Resistance (R20) is connected to the first nonpolarity switch terminals of fire control system hand/automatic switch (Z1), and AN pins are connected to VDD Power end, the second nonpolarity switch terminals of fire control system hand/automatic switch (Z2) and signal ground, VCC pin and EN draw Foot is connected to VCC power ends, and OUT pins are connected to processor circuit (U8) AN4 pins and are connected by the 21st resistance (R21) It is connected to the 3rd photo-coupler (U5) VCC pin and EN pins, GND pin power ground and passes through the 12nd capacitance (C12) and connect To VCC pin and EN pins, NC pins and NC1 pins are hanging;
The monitoring switch input circuit can be connected to by the 22nd resistance between VDD power ends and VCC power ends, the 23 resistance are connected between signal ground and power ground, by switching signal isolation features short circuit.
5. the device according to claim 2 with fire-fighting control switch conversion monitoring and writing function, it is characterised in that: The sound light alarming circuit includes buzzer alarm circuit and indicator light circuit, and buzzer alarm circuit includes buzzer (M1), buzzer (M1) IN+ pins are connected to VCC power ends, and IN1 pins are connected to the second triode (Q2) collector, and second Triode (Q2) emitter power ground, the second triode (Q2) base stage are connected to processor electricity by the 16th resistance (R16) Road (U8) AN5 pins, the 17th resistance (R17) and the 31st capacitance (C31) are connected in parallel to the second triode (Q2) base stage Between power ground;
Indicator light circuit includes the first light emitting diode (D7) and the second light emitting diode (D8), the first light emitting diode (D7) sun Pole is connected to VCC power ends with the second light emitting diode (D8) anode, and the first light emitting diode (D7) cathode passes through the 18th electricity Resistance (R18) is connected to processor circuit (U8) AN7 pins, and the second light emitting diode (D8) cathode passes through the 19th resistance (R19) It is connected to processor circuit (U8) AN6 pins.
6. the device according to claim 2 with fire-fighting control switch conversion monitoring and writing function, it is characterised in that: The internal electric source conversion circuit includes system power supply circuit and signal isolation power circuit, and wherein system power supply circuit includes Integrated stable voltage circuit (U6), integrated stable voltage circuit (U6) IN pins are connected to 12V power supplys, the 9th zener diode (D9) cathode, 13rd capacitance (C13) anode and the 14th capacitance (C14) one end are connected to IN pins, the 9th zener diode (D9) anode, 13rd capacitance (C13) cathode and the 14th capacitance (C14) other end power ground, OUT pins are defeated by the first inductance (L1) Go out to VCC power ends, FB pins are connected to VCC power ends, GND pin and ON/OFF pin power grounds, two pole of the tenth voltage stabilizing Pipe (D10) cathode is connected to OUT pins, and the 15th capacitance (C15) anode and the 16th capacitance (C16) one end are connected to VCC electricity Source, the tenth zener diode (D10) anode, the 15th capacitance (C15) cathode and the 16th capacitance (C16) other end power supply connect Ground;
Signal isolation power circuit includes DC-DC power source circuit (U7), and DC-DC power source circuit (U7) VIN+ pins are connected to VCC Power end, VOUT+ pins are connected to VDD power ends, VIN- pin power grounds, VOUT- leg signals ground connection.
7. the device according to claim 2 with fire-fighting control switch conversion monitoring and writing function, it is characterised in that: GPRS transmission circuit (U4) the LINK1 pins and LINK2 pins be respectively connected to processor circuit (U8) IOC0 pins and IOC1 pins, GPRS transmission circuit (U4) LINK3 pins and LINK4 pins pass through the 8th resistance (R8) and the 9th resistance respectively (R9) processor circuit (U8) IOC2 pins and IOC3 pins are connected to, GPRS transmission circuit (U4) UTXD1 pins and URXD1 draw Foot is respectively connected to processor circuit (U8) PS2 pins and PS3 pins, and GPRS transmission circuit (U4) WORK pins are connected to processing Device circuit (U8) PWM4 pins, GPRS transmission circuit (U4) POWKEY pins are connected to the first field-effect tube (Q1) drain electrode, grid Processor circuit (U8) PWM5 pins are connected to by the tenth resistance (R10), GPRS transmission circuit (U4) GND pin is connected to One field-effect tube (Q1) source electrode and power ground, GPRS transmission circuit (U4) RESET pins and RELOAD pins are respectively connected to Reset circuit and data recovery circuit, GPRS transmission circuit (U4) RE485_EN pins are connected to by the 11st resistance (R11) Processor circuit (U8) IOC5 pins, GPRS transmission circuit (U4) LINK pins are connected to processor circuit (U8) IOC4 pins, GPRS transmission circuit (U4) VCAP pins are connected to the 8th capacitance (C8) anode, and DC5-18V pins are connected to VCC power ends and Nine capacitances (C9) anode, the 8th capacitance (C8) cathode and the 9th capacitance (C9) negative power supply ground connection, NC1 pins, NC2 pins, RCV_N pins, RCV_P pins, MIC_N pins and MIC_P pins are hanging;
The reset circuit includes the first button (SW1), and the first button (SW1) one end is connected to GPRS transmission circuit (U4) RESET pins are connected to VCC power ends by the 12nd resistance (R12) and by the tenth capacitance (C10) power ground, and first Button (SW1) other end passes through the 13rd resistance (R13) power ground;
The data recovery circuit includes the second button (SW2), and the second button (SW2) one end is connected to GPRS transmission circuit (U4) RELOAD pins, VCC power ends are connected to by the 14th resistance (R14) and are connect by the 11st capacitance (C11) power supply Ground, the second button (SW2) other end pass through the 15th resistance (R15) power ground.
8. the device according to claim 2 with fire-fighting control switch conversion monitoring and writing function, it is characterised in that: The data storage circuitry includes programmable read only memory (U9), programmable read only memory (U9) A0 pins-A2 pins By the 27th resistance (R27) power ground, WP pins pass through the 28th resistance (R28) power ground, VCC pin connection To VCC power ends and by the 22nd capacitance (C22) power ground, SCL pins are connected to processor circuit (U8) IOC6 and draw Foot and VCC power ends are connected to by the 29th resistance (R29), SDA pins are connected to processor circuit (U8) IOC7 pins And VCC power ends, GND pin power ground are connected to by the 30th resistance (R30).
9. the device according to claim 2 with fire-fighting control switch conversion monitoring and writing function, it is characterised in that: 485 communicating circuits include 485 communication chips (U11) and D types interface (J3), the connection of 485 communication chips (U11) RO pins The 14th light emitting diode (D14) the moon is connected to processor circuit (U8) PM0 pins and by the 34th resistance (R34) Pole, the 14th light emitting diode (D14) anode are connected to VCC power ends, and DI pins are connected to processor circuit (U8) PM1 pins And the 13rd light emitting diode (D13) cathode, the 13rd light emitting diode (D13) are connected to by the 33rd resistance (R33) Anode is connected to VCC power ends,Pin and DE pins are connected to processor circuit (U8) PWM3 pins, A pins and B pins D types interface (J3) TDA-/Y pins and RDB+/B pins are respectively connected to, VCC pin is connected to VCC power ends and by second 14 capacitances (C24) power ground, GND pin power ground, D types interface (J3) other pins are hanging.
10. the device according to claim 2 with fire-fighting control switch conversion monitoring and writing function, feature exist In:The system clock circuit includes clock chip (U10), and clock chip (U10) X1 pins and X2 pins are respectively connected to Clock crystal oscillator (Y2) both ends, SCL pins are connected to processor circuit (U8) PS6 pins and are connected by the 31st resistance (R31) VCC power ends are connected to, SDA pins are connected to processor circuit (U8) ECLK pins and are connected to by the 32nd resistance (R32) VCC power ends, VCC pin are respectively connected to the 11st diode (D11) and the 12nd diode (D12) cathode, and the 11st Pole pipe (D11) anode is connected to battery (P1) positive ends, battery (P1) negative polarity end power ground, the 12nd diode (D12) anode is connected to VCC power ends, and VCC pin, by the 23rd capacitance (C23) power ground, GND pin power supply connects Ground,Pin andPin is hanging.
CN201721024737.2U 2017-08-16 2017-08-16 Device with fire-fighting control switch conversion monitoring and writing function Active CN207384695U (en)

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CN201721024737.2U Active CN207384695U (en) 2017-08-16 2017-08-16 Device with fire-fighting control switch conversion monitoring and writing function

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