CN108710318B - Computer system monitoring circuit - Google Patents

Computer system monitoring circuit Download PDF

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Publication number
CN108710318B
CN108710318B CN201810322769.3A CN201810322769A CN108710318B CN 108710318 B CN108710318 B CN 108710318B CN 201810322769 A CN201810322769 A CN 201810322769A CN 108710318 B CN108710318 B CN 108710318B
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power supply
fpga
circuit
arm processor
computer system
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CN108710318A (en
Inventor
鲜于琳
查坤
张锐
曾文兵
冯小利
卢联杰
周苏茂
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Hubei Sanjiang Aerospace Wanfeng Technology Development Co Ltd
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Hubei Sanjiang Aerospace Wanfeng Technology Development Co Ltd
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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00—Programme-control systems
    • G05B19/02—Programme-control systems electric
    • G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
    • G05B19/0423—Input/output
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00—Program-control systems
    • G05B2219/20—Pc systems
    • G05B2219/21—Pc I-O input output
    • G05B2219/21119—Circuit for signal adaption, voltage level shift, filter noise

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Automation & Control Theory (AREA)
  • Debugging And Monitoring (AREA)
  • Power Sources (AREA)

Abstract

The invention discloses a computer system monitoring circuit, which comprises an ARM processor, an FPGA, a memory and a voltage and temperature measuring circuit, wherein the ARM processor is connected with the FPGA; the ARM processor and the voltage and temperature measuring circuit are in communication connection with the FPGA; the memory is respectively connected with the ARM processor and the FPGA; the ARM processor is used for acquiring the voltage value of the mainboard battery, the running conditions of the mainboard and external equipment thereof and recording equipment fault information; the FPGA is used for collecting the working time, the starting times, the temperature information of the mainboard and the voltage values of chips of the mainboard and recording the abnormal information of the power supply; the ARM processor generates a fault indication signal according to the equipment fault information or the power supply abnormal information; the device is used for generating corresponding alarm information according to the equipment fault information or the power supply abnormal information and sending the alarm information to the processor platform through the FPGA; the invention can realize real-time monitoring and recording of the running state information of the mainboard and the peripheral equipment of the computer system, and provides reference data for debugging, improving and perfecting the newly developed computer system.

Description

Computer system monitoring circuit
Technical Field
The invention belongs to the technical field of computer hardware design, and particularly relates to a monitoring circuit applied to a computer system of a Loongson processor platform.
Background
For a long time, the computing equipment in China largely adopts foreign software and hardware products, and core technologies such as a high-performance processor, an operating system and the like are completely closed, so that the technology is restricted by people and potential safety hazards exist. Especially in the defense military, the development and use of domestic processors has become an urgent and necessary requirement to avoid being restricted by imported processors in wartime. With the rapid development and gradual improvement of chips of domestic processors, processors have been imported from the performance of the chips, and the chips are increasingly widely applied to the field of defense and industrial production, for example, the Loongson processor developed by Loongson company draws attention from some scientific research institutes due to the completely independent intellectual property and excellent performance of the Loongson processor, and develops various general and special computers based on the Loongson processor.
Although loongson provides an example computer solution for reference, loongson processors have limited peripheral chips and Linux kernel-based domestic operating systems that can be adapted to them due to their low release time, so that newly designed loongson processor-based computer systems present certain risks in both hardware and software. Therefore, it is necessary to monitor and record the working condition of the newly developed Loongson processor platform computer system in real time, and provide a technical basis for enhancing the stability of the computer system and improving the matching between the operating system and the hardware platform.
Disclosure of Invention
In view of at least one of the drawbacks and needs of the prior art, the present invention provides a computer system monitoring circuit for monitoring and recording the temperature of a motherboard, the voltage of the motherboard, system events, system failures, and peripheral device information of a computer system, and providing reference data for debugging and improving the computer system.
To achieve the above object, according to one aspect of the present invention, there is provided a computer system monitoring circuit, including an ARM processor, an FPGA, a memory, and a voltage and temperature measuring circuit; the ARM processor and the voltage and temperature measuring circuit are in communication connection with the FPGA; the memory is respectively connected with the ARM processor and the FPGA;
the ARM processor is connected with a power circuit on the CPCI mainboard and used for acquiring the voltage value of the mainboard battery; the intelligent equipment is connected with a sensor of external equipment or I2C intelligent equipment through an IPMB bus so as to collect the running conditions of the mainboard and the external equipment and record equipment fault information;
the FPGA is used for collecting the working time and the starting-up times of the mainboard; the temperature acquisition circuit is used for acquiring temperature information of the mainboard and voltage values of chips of the mainboard through the voltage and temperature measurement circuit and recording power supply abnormal information; the ARM processor generates a fault indication signal according to the equipment fault information or the power supply abnormal information; the device is used for generating corresponding alarm information according to the equipment fault information or the power supply abnormal information and sending the alarm information to the processor platform through the FPGA;
the memory is used for storing various parameter information collected by the ARM processor and the FPGA.
Preferably, the computer system monitoring circuit further includes an LED circuit connected to the FPGA through the I/O interface, and the LED circuit is configured to control the indicator light to be turned on according to the fault indication signal transmitted by the FPGA to indicate fault information.
Preferably, the computer system monitoring circuit is powered by a 3.3V power supply independent of the processor platform.
Preferably, the computer system monitoring circuit further includes a bus buffer and a level shift circuit;
one end of the bus buffer is connected with the ARM processor through a TWI interface, the other end of the bus buffer is connected with the first end of the level conversion circuit, and the second end of the level conversion circuit is connected with an external sensor and an I through an IPMB bus2C, connecting intelligent equipment; the level shifter is used to shift the 3.3V level of the IPMB bus inside the monitor to the 5V level of the external IPMB bus.
Preferably, in the monitoring circuit of the computer system, the ARM processor further includes a UART interface and a JTAG interface, and the external serial device communicates with the ARM processor through the UART interface; and the upper computer programs and debugs the ARM processor through the JTAG interface.
Preferably, the FPGA of the monitoring circuit of the computer system is further configured to send a boot signal or a reset signal to the processor platform under the control of the ARM processor, so as to implement soft boot and soft reset of the processor platform.
Preferably, the level shift circuit of the computer system monitoring circuit includes MOS transistors Q2 and Q3, diodes D1, D2, D3, D4 and D5, and resistors R4, R5, R6 and R7;
the source electrode of the MOS tube Q2 is connected with the clock bus of the IPMB bus inside the monitoring circuit, and the drain electrode is connected with the clock bus of the IPMB bus outside the monitoring circuit; the source electrode of the MOS transistor Q3 is connected with the data bus of the IPMB bus inside the monitoring circuit, the drain electrode of the MOS transistor Q3 is connected with the data bus of the IPMB bus outside the monitoring circuit, and the grid electrodes of the MOS transistor Q2 and the NMOS transistor Q3 are connected with a 3.3V power supply; the resistor R4 is connected with the grid and the source of the MOS transistor Q3 in parallel, and the resistor R5 is connected with the grid and the source of the MOS transistor Q2 in parallel; the anode of the diode D1 is connected with the drain of the MOS tube Q2, the cathode is connected with a 5V power supply, and the resistor R6 is arranged between the diode D1 and the MOS tube Q2; the anode of the diode D5 is connected with the drain of the MOS tube Q3, the cathode is connected with a 5V power supply, and the resistor R7 is arranged between the diode D1 and the MOS tube Q3; diodes D2 and D3 are connected between drains of the MOS transistor Q2 and the MOS transistor Q3, the anode of the diode D2 is connected with the drain of the MOS transistor Q2, the cathode of the diode D3 is connected with the cathode of the diode D3, the anode of the diode D3 is connected with the drain of the MOS transistor Q3, the connection point of the diodes D2 and D3 is connected with the cathode of the diode D4, and the anode of the diode D4 is grounded.
Preferably, the voltage and temperature measuring circuit of the computer system monitoring circuit comprises a thermal sensitive transistor Q1, capacitors C1 and C2, resistors R1, R2 and R3, and a power supply monitoring chip U1;
a collector and a base of the thermal transistor Q1 are connected and then connected to a first voltage input pin of the power supply monitoring chip U1, and an emitter of the thermal transistor Q1 is connected to a second voltage input pin of the power supply monitoring chip U1; the first voltage input pin is used as the anode of the voltage monitoring channel, and the second voltage input pin forms the cathode of the voltage monitoring channel; the capacitor C2 is connected with the base electrode and the emitter electrode of the thermal transistor Q1 in parallel; one ends of the resistors R1, R2 and R3 are connected with an address pin of the power supply monitoring chip U1, the other ends of the resistors R1 and R2 are connected with a 3.3V power supply, and the other end of the resistor R3 is connected with a protective ground; one end of the capacitor C1 is connected with a 3.3V power supply, and the other end is connected with a protective ground.
Preferably, the computer system monitoring circuit has an ARM processor using an atam 4S16C processor chip manufactured by ATEML corporation, and an FPGA using an LCMX02-1200 chip manufactured by latice corporation.
Preferably, the power supply monitoring chip U1 of the computer system monitoring circuit is an LTC2991CMS chip of LT corporation; the thermal transistor Q1 senses the original using MMBT 3904.
In general, compared with the prior art, the above technical solution contemplated by the present invention can achieve the following beneficial effects:
(1) the computer system monitoring circuit provided by the invention realizes real-time monitoring and recording of information such as the mainboard battery voltage, each chip voltage, the mainboard temperature, the system working time, the startup times, the running condition of peripheral equipment and the like of the computer system by combining the ARM processor and the FPGA, and provides reference data for debugging, improving and perfecting the newly-researched computer system; in addition, the function of the monitoring circuit can be conveniently expanded by changing programs of the ARM processor and the FPGA.
(2) According to the computer system monitoring circuit provided by the invention, the ARM processor is used for providing hardware support for information acquisition and transmission, the FPGA makes up for the defect of few IO pins of the ARM processor, the functions of the monitoring circuit are expanded, and the computer system monitoring circuit has the advantages of low and stable operation power consumption, high signal acquisition speed, rich functional interface resources and the like; the FPGA is hung on the LPC bus of the Loongson 2H, so that the communication between the processor platform and the monitoring circuit can be realized, the FPGA can also be used as a function expansion device of the processor platform, and the utilization rate of the FPGA is improved.
Drawings
FIG. 1 is a block diagram of the overall connection of a monitoring circuit and a Loongson processor computer system provided by an embodiment of the invention;
FIG. 2 is a logic block diagram of a monitoring circuit provided by an embodiment of the invention;
FIG. 3 is a circuit diagram of an IPMB bus level shifter circuit according to an embodiment of the present invention;
fig. 4 is a circuit diagram of a voltage and temperature measurement circuit according to an embodiment of the invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention. In addition, the technical features involved in the embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.
FIG. 1 is a block diagram of the overall connection between a computer system monitoring circuit and a Loongson processor platform computer system according to an embodiment of the present invention; as shown in fig. 1, the Loongson processor platform computer system comprises a Loongson computer CPCI mainboard and a plurality of CPCI function board cards connected with the Loongson computer CPCI mainboard through a CPCI bus; the CPCI mainboard of the Loongson computer comprises a Loongson processor platform consisting of a double-Loongson 3A1500 chip and a Loongson 2H bridge piece, and a power supply circuit for supplying power to the Loongson processor platform;
the monitoring circuit is connected with the Loongson processor platform through an LPC interface and connected with a sensor and an I of an external device through an IPMB bus2And C, the intelligent equipment is connected, and the monitoring circuit is connected with the power supply circuit to detect the voltage of the mainboard battery.
FIG. 2 is a logic block diagram of a computer system monitoring circuit according to an embodiment of the present invention; as shown in fig. 2, the monitoring circuit provided by the present invention includes an ARM processor, an FPGA, a FLASH, and a voltage and temperature measuring circuit;
the ARM processor is connected with the FPGA through a data bus, an address bus, a GPIO bus and an SPI bus; voltage and temperature measuring circuit pass through I2The C bus is connected with the FPGA; FLASH is connected with the ARM processor and the FPGA through the SPI bus; the FPGA is connected with a Loongson 2H bridge chip in the Loongson processor platform through an LPC interface;
the ARM processor is used as a main control unit, is connected with a power circuit on the CPCI mainboard and is used for acquiring the voltage value of the mainboard battery, and the function is realized through an AD module integrated in the ARM processor; the ARM processor is connected with the Loongson 2H bridge chip through the FPGA and the LPC interface to realize data exchange with a processor platform, and the FPGA plays a role in bus protocol conversion; in the embodiment, the ARM processor adopts an ataml 4S16C processor chip of the ATEML company.
The voltage and temperature measuring circuit is used for monitoring the voltage value of each chip of the mainboard, such as 5V power supply voltage of the mainboard, 1.15V voltage of a processor core, 3.3V voltage of external I/O and the like; meanwhile, the temperature measuring device is also used for measuring the temperature of the mainboard; the FPGA acquires temperature information of the mainboard and voltage values of the chips through the voltage and temperature measuring circuit, records undervoltage and overvoltage information and sends the undervoltage and overvoltage information to the ARM processor, and the FPGA adopts an LCMX02-1200 chip of LATTICE company.
Further, the monitoring circuit also comprises a bus buffer and a level conversion circuit;
the ARM processor is connected with a sensor of the external equipment through the IPMB bus to acquire the running condition information of the external equipment and record fault information, for example, the ARM processor can monitor and acquire the temperature, the rotating speed, the voltage and the fault information of a fan through the IPMB bus; each of I2C, intelligent equipment such as EEPROM and the like also communicate with the ARM processor through the IPMB bus;
the monitoring circuit uses a 3.3V power supply independent of the processor platform, and the sensors and I of the external equipment2When the C intelligent equipment is in communication, a 3.3V power supply needs to be converted into a 5V power supply, the ARM processor is connected with a bus buffer through a TWI interface, the bus buffer is connected with a level conversion circuit, and the level conversion circuit is connected with an external sensor and an I through an IPMB bus2C intelligent equipment is connected, so that the ARM sensor, the external sensor and the I are realized2C, communication connection of the intelligent equipment; the bus buffer is made of LTC4307IMS8 chip from LT company.
Furthermore, the monitoring circuit also comprises an LED circuit connected with the FPGA through an I/O interface, and the LED circuit is used for controlling an indicator light to indicate power supply information and equipment fault information;
when the processor platform has a fault, for example, the voltage of the main board has overvoltage or undervoltage, and the fan has a fault, the ARM processor generates a fault indication signal according to the fault information and sends the fault indication signal to the FPGA, and the FPGA controls the LED circuit to light an indicator lamp according to the fault indication signal, so that the indication of information such as a power supply, a fault and the like is realized; on the other hand, the ARM processor generates corresponding alarm information according to the fault information, sends the alarm information to the processor platform through the FPGA, and displays the alarm information in the monitoring program on the processor platform.
The ARM sensor stores collected parameter information in a FLASH which is not lost when power is off, and a computer system can check data stored in the FLASH through upper-layer software; for FALSH, a W25Q64FVSIG chip from winbond was used.
Furthermore, the ARM processor also comprises a UART interface and a JTAG interface; the ARM processor is connected with external serial port equipment through a UART interface, for example, a computer with an RS-232 serial port, a modem and the like, and the external serial port equipment is communicated with the ARM processor through the UART interface;
when the monitoring circuit is connected with the MODEM through the UART interface and is accessed into the Ethernet, a remote computer can realize remote soft start or soft reset of the processor platform through a network, the FPGA sends out a start (PWRBTN) signal or a reset (SYSRST) signal to the processor platform under the control of the ARM processor, and the soft start and soft reset of the Loongson processor platform are realized;
the ARM processor is connected with the upper computer through a JTAG interface, and the upper computer programs and debugs the ARM processor through the JTAG interface.
The monitoring circuit is a control system independent of the processor platform, a 3.3V power supply independent of the processor platform is used, and after the processor platform is powered off and stops running, the monitoring circuit can run continuously as long as the power supply of the monitoring circuit is not disconnected, and at the moment, the external serial port equipment can still access the monitoring circuit; the invention adopts the ARM processor to be combined with the FPGA to realize the monitoring of the computer system of the Loongson processor platform, and can conveniently expand the functions of the monitoring circuit by changing programs of the ARM processor and the FPGA.
FIG. 3 is a circuit diagram of a level shift circuit according to an embodiment of the present invention; the level shifter circuit is used to shift the 3.3V level of the IPMB bus inside the monitor circuit to the 5V level of the external IPMB bus, and as shown in fig. 3, the level shifter circuit includes NMOS transistors Q2, Q3, diodes D1, D2, D3, D4, D5, and resistors R4, R5, R6, R7;
the source electrode of the NMOS tube Q2 is connected with a clock bus (IPMB ALCK) of an IPMB bus inside the monitoring circuit, and the drain electrode is connected with a clock bus (IPMB SCL) of an IPMB bus outside the monitoring circuit; the source electrode of the NMOS tube Q3 is connected with a data bus (IPMB ADAT) of an IPMB bus inside the monitoring circuit, and the drain electrode is connected with a data bus (IPMB SDA) of an IPMB bus outside the monitoring circuit; the gates of the NMOS transistor Q2 and the NMOS transistor Q3 are connected with a 3.3V power supply; the resistor R4 is connected with the grid and the source of the NMOS transistor Q3 in parallel, and the resistor R5 is connected with the grid and the source of the NMOS transistor Q2 in parallel; the anode of the diode D1 is connected with the drain of the NMOS tube Q2, the cathode is connected with a 5V power supply, and the resistor R6 is arranged between the diode D1 and the NMOS tube Q2; the anode of the diode D5 is connected with the drain of the NMOS tube Q3, the cathode is connected with a 5V power supply, and the resistor R7 is arranged between the diode D1 and the NMOS tube Q3; diodes D2 and D3 are connected between the drains of the NMOS transistor Q2 and the NMOS transistor Q3, the anode of the diode D2 is connected with the drain of the NMOS transistor Q2, the cathode of the diode D3 is connected with the cathode of the diode D3, the anode of the diode D3 is connected with the drain of the NMOS transistor Q3, the connection point of the diodes D2 and D3 is connected with the cathode of the diode D4, and the anode of the diode D4 is grounded.
Taking IPMB ALCK as an example for explanation, 3.3V voltage is applied to the grid of the NMOS tube Q2, Q2 is conducted, and the signal of the IPMB ALCK is output to the IPMB SCL; when the IPMB ALCK is at a high level, the IPMB SCL is at a high level of 5V because 5V voltage is applied to the IPMB SCL, and when the IPMB ALCK is at a low level, the IPMB SCL is also at a low level; due to the one-way conductivity of the NMOS tube, the state of the IPMB SCL does not influence the state of the IPMB ALCK, and therefore the level conversion from 3.3V to 5V is completed; the resistors R4, R5, R6 and R7 mainly play a role in limiting current, and the diodes D2, D3 and D4 are used for circuit protection.
FIG. 4 is a circuit diagram of a voltage and temperature measurement circuit provided by an embodiment of the present invention; the temperature measuring circuit comprises a thermal sensitive triode Q1, capacitors C1 and C2, resistors R1, R2 and R3 and a power supply monitoring chip U1;
a collector and a base of the thermal triode Q1 are connected and then connected to a pin 7 of the power supply monitoring chip U1, namely a positive electrode of the voltage monitoring channel, and an emitter is connected to a pin 8 of the power supply monitoring chip, namely a negative electrode of the voltage monitoring channel; the capacitor C2 is connected with the base electrode and the emitter electrode of the thermal transistor Q1 in parallel; one end of the resistor R1 is connected with an address pin 15 of the power supply monitoring chip U1, the other end of the resistor R2 is connected with an address pin 13 of the power supply monitoring chip U1, and the other end of the resistor R2 is connected with a 3.3V power supply; one end of the resistor R3 is connected with the address pin 14 of the power supply monitoring chip U1, and the other end is connected with the protective ground; one end of the capacitor C1 is connected with a 3.3V power supply, and the other end is connected with a protective ground; the capacitors C1 and C2 play a role in filtering in the circuit; setting power supply monitoring chip I through address pins 13-152C address in the bus.
Pins V1-V2 of a power supply monitoring chip U1 are connected with a 5V mainboard power supply and used for detecting the power supply voltage of the mainboard, and a pin V3 is connected with a 1.15V processor core power supply and used for detecting the core voltage of the processor; the V4 pin is connected to an external I/O for sensing an external I/O voltage.
The voltage between the collector and the emitter of the thermal transistor Q1 changes along with the change of the temperature, and the power supply monitoring chip U1 can calculate the corresponding temperature according to the change of the voltage, so that the measurement of the temperature of the mainboard is realized; the power supply monitoring chip adopts an LTC2991CMS chip of LT company; the thermal transistor Q1 senses the original using MMBT 3904.
The computer system monitoring circuit provided by the invention realizes real-time monitoring and recording of information such as the mainboard battery voltage, each chip voltage, the mainboard temperature, the system working time, the startup times, the running state information of peripheral equipment and the like of the computer system by combining the ARM processor and the FPGA, and provides reference data for debugging, improving and perfecting a newly developed computer system; in addition, the function of the monitoring circuit can be conveniently expanded by changing programs of the ARM processor and the FPGA.
It will be understood by those skilled in the art that the foregoing is only a preferred embodiment of the present invention, and is not intended to limit the invention, and that any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the scope of the present invention.

Claims (8)

1. A computer system monitoring circuit is characterized by comprising an ARM processor, an FPGA, a memory and a voltage and temperature measuring circuit; the ARM processor and the voltage and temperature measuring circuit are in communication connection with the FPGA; the memory is respectively connected with the ARM processor and the FPGA;
the ARM processor is connected with a power circuit on the CPCI mainboard and used for acquiring the voltage value of the CPCI mainboard battery; and sensors and I for communicating with external devices through IPMB bus2C, the intelligent equipment is connected to acquire the running conditions of the CPCI mainboard and the external equipment thereof and record equipment fault information;
the FPGA is used for acquiring the working time and the starting times of the CPCI mainboard; the CPCI mainboard temperature information and the voltage value of each chip of the CPCI mainboard are collected through the voltage and temperature measuring circuit, and power supply abnormal information is recorded; the ARM processor generates a fault indication signal according to the equipment fault information or the power supply abnormal information; the device fault information or the power supply abnormal information is used for generating corresponding alarm information according to the device fault information or the power supply abnormal information and sending the alarm information to a processor platform through the FPGA;
the memory is used for storing various parameter information collected by the ARM processor and the FPGA.
2. The computer system monitoring circuit of claim 1, further comprising an LED circuit coupled to the FPGA via the I/O interface, the LED circuit configured to control an indicator light to illuminate to indicate fault information based on the fault indication signal transmitted by the FPGA.
3. The computer system monitoring circuit of claim 1 or 2, wherein the monitoring circuit is powered by a 3.3V power supply that is independent of a processor platform.
4. The computer system monitoring circuit of claim 3, further comprising a bus buffer and a level translation circuit;
one end of the bus buffer is connected with the ARM processor through a TWI interface, the other end of the bus buffer is connected with the first end of the level conversion circuit, and the second end of the level conversion circuit is connected with an external sensor and an I through an IPMB bus2C, connecting intelligent equipment;
the level shifter is configured to shift the 3.3V level of the IPMB bus inside the monitor circuit to the 5V level of the external IPMB bus.
5. The computer system monitoring circuit of claim 1 or 4, wherein the ARM processor further comprises a UART interface and a JTAG interface, the external serial device communicating with the ARM processor through the UART interface; and the upper computer programs and debugs the ARM processor through the JTAG interface.
6. The computer system monitoring circuit of claim 1, wherein the FPGA is further configured to send a power-on signal or a reset signal to the processor platform under the control of the ARM processor to implement soft power-on and soft reset of the processor platform.
7. The computer system monitoring circuit of claim 1, wherein the voltage and temperature measurement circuit comprises a thermal transistor Q1, capacitors C1, C2, resistors R1, R2, R3, and a power monitoring chip U1;
a collector and a base of the thermal triode Q1 are connected and then connected to a first voltage input pin of a power supply monitoring chip U1, and an emitter of the thermal triode Q1 is connected to a second voltage input pin of the power supply monitoring chip U1; the first voltage input pin and the second voltage input pin form the anode and the cathode of a voltage monitoring channel; the capacitor C2 is connected with the base electrode and the emitter electrode of the thermal transistor Q1 in parallel; one ends of the resistors R1, R2 and R3 are connected with an address pin of the power supply monitoring chip U1, the other ends of the resistors R1 and R2 are connected with a 3.3V power supply, and the other end of the resistor R3 is connected with a protective ground; one end of the capacitor C1 is connected with a 3.3V power supply, and the other end is connected with a protective ground.
8. The computer system monitoring circuit of claim 4, wherein the level shifter circuit comprises MOS transistors Q2, Q3, diodes D1, D2, D3, D4, D5, resistors R4, R5, R6, R7;
the source electrode of the MOS tube Q2 is connected with the clock bus of the IPMB bus inside the monitoring circuit, and the drain electrode is connected with the clock bus of the IPMB bus outside the monitoring circuit; the source electrode of the MOS transistor Q3 is connected with the data bus of the IPMB bus inside the monitoring circuit, the drain electrode of the MOS transistor Q3 is connected with the data bus of the IPMB bus outside the monitoring circuit, and the grid electrodes of the MOS transistor Q2 and the MOS transistor Q3 are connected with a 3.3V power supply; the resistor R4 is connected with the grid electrode and the source electrode of the MOS tube Q3 in parallel, and the resistor R5 is connected with the grid electrode and the source electrode of the MOS tube Q2 in parallel; the anode of the diode D1 is connected with the drain of the MOS tube Q2, the cathode of the diode D1 is connected with a 5V power supply, and the resistor R6 is arranged between the diode D1 and the MOS tube Q2; the anode of the diode D5 is connected with the drain of the MOS tube Q3, the cathode of the diode D5 is connected with a 5V power supply, and the resistor R7 is arranged between the diode D1 and the MOS tube Q3; diodes D2 and D3 are connected between drains of the MOS transistor Q2 and the MOS transistor Q3, the anode of the diode D2 is connected with the drain of the MOS transistor Q2, the cathode of the diode D3 is connected with the cathode of the diode D3, the anode of the diode D3 is connected with the drain of the MOS transistor Q3, the connection point of the diodes D2 and D3 is connected with the cathode of the diode D4, and the anode of the diode D4 is grounded.
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CN110058978A (en) * 2019-03-22 2019-07-26 山东超越数控电子股份有限公司 A kind of error log recording device for computer
CN111510510A (en) * 2020-04-16 2020-08-07 广东盈嘉科技工程发展股份有限公司 Method and system compatible with multiple communication interfaces
CN112596552A (en) * 2020-12-29 2021-04-02 湖南博匠信息科技有限公司 Calculation board health management method and system based on Loongson processor

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1591351A (en) * 2003-09-01 2005-03-09 联宇光通科技股份有限公司 Computer system monitor
CN203397351U (en) * 2013-07-31 2014-01-15 山东超越数控电子有限公司 Computer part monitoring module
CN204440398U (en) * 2015-02-25 2015-07-01 浪潮集团有限公司 A kind of for preventing the protection circuit of the overheated and overvoltage of Godson CPU
CN204790846U (en) * 2015-07-03 2015-11-18 常州信息职业技术学院 Computer monitoring system
CN206460446U (en) * 2016-11-30 2017-09-01 中国船舶重工集团公司第七一六研究所 A kind of supervising device for ruggedized computer mainboard

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1591351A (en) * 2003-09-01 2005-03-09 联宇光通科技股份有限公司 Computer system monitor
CN203397351U (en) * 2013-07-31 2014-01-15 山东超越数控电子有限公司 Computer part monitoring module
CN204440398U (en) * 2015-02-25 2015-07-01 浪潮集团有限公司 A kind of for preventing the protection circuit of the overheated and overvoltage of Godson CPU
CN204790846U (en) * 2015-07-03 2015-11-18 常州信息职业技术学院 Computer monitoring system
CN206460446U (en) * 2016-11-30 2017-09-01 中国船舶重工集团公司第七一六研究所 A kind of supervising device for ruggedized computer mainboard

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