CN105975382A - Hardware configuration change alarming method - Google Patents
Hardware configuration change alarming method Download PDFInfo
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- CN105975382A CN105975382A CN201610322400.3A CN201610322400A CN105975382A CN 105975382 A CN105975382 A CN 105975382A CN 201610322400 A CN201610322400 A CN 201610322400A CN 105975382 A CN105975382 A CN 105975382A
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- configuration
- bios
- variation
- circuit
- bmc
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/32—Monitoring with visual or acoustical indication of the functioning of the machine
- G06F11/324—Display of status information
- G06F11/327—Alarm or error message display
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
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Abstract
The invention relates to the field of computers, in particular to a hardware configuration change alarming method. The method comprises the steps that system hardware changes are detected in a shutdown state, including a power-supply-adopted shutdown state and a power-supply-free shutdown state; after the system hardware changes occur, hardware trigger is interrupted, a BIOS SMI program acquires platform configuration information, a BMC completes storage and differentiation display of the configuration information, and the three parts are matched to complete timely and accurate recording of the platform configuration information on a platform body. After the system hardware changes occur, the BIOS can flexibly and diversely set operating paths according to the demands and can set them to be operation-free or display warning information and then continue to operate or continue to operate after a system is paused to wait for safety confirmation made by an administrator; the BMC stores storage information in an EEPROM, the information can be still saved and cannot disappear after power outage, a BMC display interface provides a unified information platform for developers, testers and customers, the communication efficiency is improved, two times of configurations are displayed in a differentiated mode, and the customers can be reminded of hardware change points.
Description
Technical field
The present invention relates to computer realm, particularly relate to the alarm method of a kind of hardware configuration variation.
Background technology
Server master board, in R&D process, will need by the CPU, interior of various models through substantial amounts of compatibility test
Deposit, different add-on card etc. forms the plateform system of various configurations, then carries out the tests such as long stability, pressure, surveys
Examination personnel to carry out record to platform configuration information, test problem once occurs, reviews to facilitate, and supply research staff is carried out point
Analysis.
Server also can be tested before terminal client formally comes into operation in a large number, also can artificially increase after coming into operation
Or minimizing expansion card, these server configuration information change situation and are also required to be recorded, and once server occurs that shakiness is pledged love
Condition, facilitates the quick problem analysis of system manager.
But, in current test process, tester table and board configuration information record are separate, and this results in joins
Confidence breath is easily lost or obscures between different platform.Other staff's test or user change the hard of platform during using
Part configuration is possible without being recorded, different personnel's acquisitions to board configuration information, the most unified information interface, but
Repeatedly link up confirmation etc., these factors add communication cost undoubtedly, increase the difficulty reviewed and the information of acquisition
Accuracy, reduces the effectiveness of test.
Once expanded configuration causes system unstable, and system manager investigates mistake will reduce a lot of efficiency.In server
The expansion card that face has existed, once damages and cannot use, it is also desirable to notifies system manager by technological means in time, or moves
Remove or change, it is to avoid bad card causes the instability of system.The record of this hardware configuration information, may can't be paid attention to by people,
It is not recorded, or the incomplete recording face due to professional standards reason, during system malfunctions, it is impossible to analysis personnel
Effective information data is quickly provided.These all can reduce work efficiency.
So needing a kind of mainboard or method that will change after hardware configuration changes and report related personnel, thus
Improve the work efficiency of computer maintenance personnel.
Summary of the invention
It is an object of the invention to provide the alarm method of a kind of hardware configuration variation, it is intended to solve active computer mainboard
Configuration cannot the problem of Active report after changing.
The present invention is achieved in that the alarm method that hardware configuration changes, it is characterised in that comprise the following steps:
A. detecting step: whether the configuration electric circuit inspection mainboard configuration of described detecting step system changes, if not grasping
Make；If then sending the signal of telecommunication to BIOS；Described configuration circuit is arranged on mainboard and mainboard configuration is changed and is converted into
The signal of telecommunication；BIOS (Basic Input Output System) refers to basic input output system, is mainly used in computer and opens
The initialization of various hardware devices and detection during machine
B. read step: described read step system BIOS reads mainboard configuration after receiving the signal of telecommunication that described configuration circuit transmits
Information；
C. storing step: the motherboard configuration information of reading is sent to BMC and is stored in described by BIOS described in described storing step system
In the EEPROM of BMC；BMC(Baseboard Management Controller) refer to baseboard management controller.The most built-in
On mainboard, support the IPMI specification of industry standard.The function that BMC provides includes: local and remote diagnosis, control station prop up
Hold, configuration management, hardware management and failture evacuation.
D. comparison step: BMC described in described comparison step system reads nearest two groups of motherboard configuration informations in described EEPROM
And the configuration information changed is identified.EEPROM is a kind of non-volatile memory medium, is that the major storage of BMC is situated between
Matter.
The further technical scheme of the present invention is: described configuration electric circuit inspection to CPU socket and the letter in place of PCIE slot
Number level change after send the signal of telecommunication to BIOS.
The further technical scheme of the present invention is: described configuration circuit also includes standby power, described standby power and institute
State and be connected by resistance R1 between CPU socket and PCIE slot；Described CPU socket and PCIE slot are by resistance R2 ground connection；Institute
State R2 more than resistance is R1 resistance 5 times.
The further technical scheme of the present invention is: described configuration circuit also includes real-time clock power supply, described real-time clock
It is connected by resistance R1 between power supply with described CPU socket and PCIE slot.Real-time clock power supply is called for short RTC power supply, its voltage
For 3.3V, identical with standby power voltage, it is simultaneously connected with two guarantee of power reliability of whole system, generally leads to
Crossing standby power is system power supply, has a power failure or occurs to be powered by RTC power supply during other special circumstances.
The further technical scheme of the present invention is: described configuration circuit includes being connected with described CPU socket and PCIE slot
Monostable Schmidt circuit.Monostable Schmidt circuit is the electricity that monostable circuit and Schmidt circuit combine acquisition
Road.Monostable circuit (monostable circuit) is a kind of basic pulse with stable state and two kinds of duties of transient state
Element circuit.When not having external signal to trigger, circuit is in stable state.Under external signal triggers, circuit is turned to from stable state temporarily
State, and through after a period of time, circuit can automatically return to stable state.The length of transient state time depends on the ginseng of circuit itself
Number, and unrelated with the length triggering the signal function time.Schmidt circuit uses and has arrived Schmidt trigger, schmidt trigger
Device also has two steady statues, but unlike general trigger, Schmidt trigger uses current potential triggering mode, its state
Maintained by input signal current potential；Successively decreasing for negative sense and be incremented by the input signal of two kinds of different change direction with forward, Schmidt touches
Send out device and have different threshold voltages.
The further technical scheme of the present invention is: described monostable Schmidt circuit is connected with PCH depositor.PCH
(Platform Controller Hub) is the integrated south bridge of Intel Company.
The further technical scheme of the present invention is: described step A include following step by step:
A1. the level keeping described monostable Schmidt circuit is height；
The level of the signal in place of the most described CPU socket and PCIE slot changes and is inverted described monostable Schmidt circuit
One low level of temporary output, then recovers high level；
Quilt after mode bit INTRD_DET receives the low level that described monostable Schmidt circuit sends in the most described PCH depositor
It is set to 1 state.
The further technical scheme of the present invention is: described step B include following step by step:
The most described BIOS detects mode bit INTRD_DET in described PCH depositor；
If mode bit INTRD_DET is 0 in the most described PCH depositor, do not operate, if state in described PCH depositor
Position INTRD_DET is 1 and enters step B3；
The most described BIOS enters SMI interrupt program, and BIOS described in described SMI interrupt program system reads motherboard configuration information.
The further technical scheme of the present invention is: further comprising the steps of B4 after described step B3: described BIOS suspends system
System demonstration manager confirm interface.
The further technical scheme of the present invention is: motherboard configuration information described in step C sends institute to by IPMI interface
State BMC.IPMI (Intelligent Platform Management Interface) is the contracting of IPMI
Writing, it is the hardware management interface specification of a kind of open standard, defines the certain party that embedded management subsystem communicates
Method.IPMI information is positioned on the nextport hardware component NextPort of IPMI specification by baseboard management controller BMC() exchange.Use low
Level hardware intelligent management and do not use operating system to be managed, user IPMI can be utilized to monitor the physical health of server is special
Levy, such as temperature, voltage, fan operating state, power supply status etc..And what is more important IPMI is the free mark of an opening
Standard, user is without paying extra-pay for using this standard.Having two major advantages in that first, this configuration allows to carry out
Carry outer server admin；Secondly, operating system need not the task of bearing transport system state data.
The invention has the beneficial effects as follows: this method achieves detecting system hardware variation in the power-offstate, can be by flat
Platform configuration information promptly and accurately records on platform body.After hardware information variation, BIOS can versatile and flexible set according to demand
Put courses of action, may be configured as without operation, or warning is further continued for running, or Break-Up System member to be managed confirms
It is further continued for after safety running.BMC storage information enters EEPROM, and after power-off, information still can preserve and not disappear, BMC display interface
Providing unified information platform for research staff, tester, client, improve communication efficiency, twice configuration varianceization shows
Show, client hardware can be reminded to change point.
Accompanying drawing explanation
Fig. 1 is the configuration circuit needed in the alarm method of the hardware configuration variation that the embodiment of the present invention provides.
Fig. 2 is step B and the flow chart of step C in the alarm method that the hardware configuration that the embodiment of the present invention provides changes.
Fig. 3 is the flow chart of step D in the alarm method that the hardware configuration that the embodiment of the present invention provides changes.
Detailed description of the invention
Embodiment is just like shown in Fig. 1 .2.3..
In order to realize this programme, hardware module, BIOS module and BMC module is needed jointly to coordinate, hardware module
After detecting platform hardware change, with the form interrupted, notifying BIOS module, BIOS module obtains current system configuration to be believed
Breath, passes to BMC module by IPMI interface by current configuration information, and the configuration information of system is stored by BMC module
Inside EEPROM, and in BMC interface display out, check for user.Wherein hardware module is primarily referred to as being arranged on mainboard
Configuration circuit.It should be noted that the method to set up of configuration circuit is not unique, all circuit being capable of this method thinking
All within scope.
Fig. 1 is the configuration circuit needed in the alarm method of the hardware configuration variation that the embodiment of the present invention provides.As figure can
Seeing, configuring circuit in the present embodiment is to connect out by the signal in place of all CPU sockets and PCIE expresscard slot, with R1 electricity
Resistance is connected with 3.3V RTC (real-time clock) power supply and 3.3V Sus (standby) power supply, carries out pull-up and arranges.It is simultaneously connected with RTC electricity
The benefit of source and standby power is, when system is not turned off AC power supplies, AC power supplies powers to circuit, when AC disconnects, by
RTC power supply is powered to power supply, so can give RTC battery power saving.Being connected to the ground with R2 resistance, R2 is significantly larger than R1, so again
When not having CPU and PCIE device, signal in place acquiescence is high level.Signal in place is all connected to monostable Schmidt electricity
Lu Shang, through processing, output signal is connected to above the INTRUDER# signal of PCH.Slotting when having CPU or PCIE device to put into
During groove, signal in place can be become low level by high level；When having CPU or PCIE device removes, signal in place is by low level
Become high level.The effect of monostable smit circuit, is all signals in place input when being high level or low level, and it is defeated
Go out high level；When there being certain signal in place to be become low level by high level or become high level by low level, it is temporary
Export a low level, revert to high level the most again.INTRUDER# is powered by RTC power supply, and when input low level, PCH posts
Mode bit INTRD_DET in storage can be set, for BIOS.
Fig. 2 is step B and the flow chart of step C in the alarm method that the hardware configuration that the embodiment of the present invention provides changes.
After BIOS program runs, first the INTRD_SEL in depositor TCO2_CNT is configured, is arranged to work as state
Position INTRD_DET is set to when 1 produce SMI interrupt, and then whether detection mode bit INTRD_DET is set by BIOS program,
If INTRD_DET is arranged to 0, illustrating that system platform does not has the change of CPU, PCIE device, BIOS proceeds other
Operation；If INTRD_DET is arranged to 1, illustrating that system platform has occurred and that the operation that CPU, PCIE device change, this will touch
Sending out SMI interrupt program, in interrupt routine, BIOS will read CPU information, read DIMM information, reading PCIE device information, reading
Taking hard disk information, then by IPMI interface, full detail is passed to BMC module, after having transmitted, BIOS can select nothing
Operation, it is also possible to select viewing hardware variation warning message over the display, it is also possible to selecting Break-Up System, member to be managed confirms
Continuing executing with after safety, last BIOS exits SMI program and returns other operations.
Fig. 3 is the flow chart of step D in the alarm method that the hardware configuration that the embodiment of the present invention provides changes.
Whether BMC ceaselessly can have BIOS transmitting and receiving data order to come by poll, connects if start process does not receive
Receiving data command, and BMC do not restarts, BMC does not carry out any operation, restarts if BMC has, then BMC will be from
EEPROM reads nearest two group platform configuration informations, they is shown, compares for reference；If start process receives
BIOS transmission receives the order of data, then the platform configuration information received is saved in EEPROM by BMC, reads the most again
Nearest two group platform configuration informations are shown by EEPROM.Showing this block, the up-to-date place once configuring variation, permissible
Do special marking out, facilitate user to consult in time.
This method detecting system hardware in the power-offstate changes, and includes power supply (S5) and does not has power supply (G3) two kinds pass
Machine state.After hardware configuration variation, hardware triggered interrupts, BIOS SMI program obtain platform configuration information, BMC complete to join
Storage and the differentiation of confidence breath show, three has coordinated and promptly and accurately recorded on platform body by platform configuration information.
After hardware information variation, BIOS versatile and flexible can arrange courses of action according to demand, may be configured as without operation, or display
Warning message be further continued for run, or Break-Up System member to be managed confirm safety after be further continued for run.BMC storage information enters
EEPROM, after power-off, information still can preserve and not disappear, and BMC display interface is that research staff, tester, client provide system
The information platform of one, improves communication efficiency, twice configuration varianceization display, client hardware can be reminded to change point.
The foregoing is only presently preferred embodiments of the present invention, not in order to limit the present invention, all essences in the present invention
Any amendment, equivalent and the improvement etc. made within god and principle, should be included within the scope of the present invention.
Claims (10)
1. the alarm method of a hardware configuration variation, it is characterised in that comprise the following steps:
A. detecting step: whether the configuration electric circuit inspection mainboard configuration of described detecting step system changes, if not grasping
Make；If then sending the signal of telecommunication to BIOS；Described configuration circuit is arranged on mainboard and mainboard configuration is changed and is converted into
The signal of telecommunication；
B. read step: described read step system BIOS reads mainboard configuration after receiving the signal of telecommunication that described configuration circuit transmits
Information；
C. storing step: the motherboard configuration information of reading is sent to BMC and is stored in described by BIOS described in described storing step system
In the EEPROM of BMC；
D. comparison step: BMC described in described comparison step system reads nearest two groups of motherboard configuration informations general in described EEPROM
The configuration information changed is identified.
The alarm method of hardware configuration the most according to claim 1 variation, it is characterised in that: described configuration electric circuit inspection arrives
The level of the signal in place of CPU socket and PCIE slot sends the signal of telecommunication to BIOS after changing.
The alarm method of hardware configuration the most according to claim 2 variation, it is characterised in that: described configuration circuit also includes
Standby power, is connected by resistance R1 between described standby power with described CPU socket and PCIE slot；Described CPU socket and
PCIE slot passes through resistance R2 ground connection；The resistance of described R2 is more than 5 times of R1 resistance.
The alarm method of hardware configuration the most according to claim 3 variation, it is characterised in that: described configuration circuit also includes
Real-time clock power supply, described real-time clock power supply is connected by resistance R1 with between described CPU socket and PCIE slot.
Hardware configuration the most according to claim 4 variation alarm method, it is characterised in that: described configuration circuit include with
The monostable Schmidt circuit that described CPU socket is connected with PCIE slot.
The alarm method of hardware configuration the most according to claim 5 variation, it is characterised in that: described monostable Schmidt electricity
Road is connected with PCH depositor.
The alarm method of hardware configuration the most according to claim 6 variation, it is characterised in that: described step A includes following
Step by step:
A1. the level keeping described monostable Schmidt circuit is height；
The level of the signal in place of the most described CPU socket and PCIE slot changes and is inverted described monostable Schmidt circuit
One low level of temporary output, then recovers high level；
Quilt after mode bit INTRD_DET receives the low level that described monostable Schmidt circuit sends in the most described PCH depositor
It is set to 1 state.
The alarm method of hardware configuration the most according to claim 7 variation, it is characterised in that: described step B includes following
Step by step:
The most described BIOS detects mode bit INTRD_DET in described PCH depositor；
If mode bit INTRD_DET is 0 in the most described PCH depositor, do not operate, if state in described PCH depositor
Position INTRD_DET is 1 and enters step B3；
The most described BIOS enters SMI interrupt program, and BIOS described in described SMI interrupt program system reads motherboard configuration information.
The alarm method of hardware configuration the most according to claim 8 variation, it is characterised in that: also include after described step B3
Following steps B4: described BIOS Break-Up System demonstration manager confirm interface.
The alarm method of hardware configuration the most according to claim 9 variation, it is characterised in that: described in step C, mainboard is joined
Confidence breath sends described BMC to by IPMI interface.
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| CN201610322400.3A CN105975382B (en) | 2016-05-13 | 2016-05-13 | A kind of alarm method that hardware configuration changes |
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| CN201610322400.3A CN105975382B (en) | 2016-05-13 | 2016-05-13 | A kind of alarm method that hardware configuration changes |
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| CN109086081A (en) * | 2018-06-29 | 2018-12-25 | 深圳市同泰怡信息技术有限公司 | Method, system and the medium that a kind of instantly prompting SATA and NVMe equipment change in place |
| CN111782287A (en) * | 2020-06-30 | 2020-10-16 | 联想(北京)有限公司 | Information prompting method and device and electronic equipment |
| CN111858428A (en) * | 2020-06-24 | 2020-10-30 | 山东云海国创云计算装备产业创新中心有限公司 | Server and communication management circuit of BIOS thereof |
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| CN111782287B (en) * | 2020-06-30 | 2023-03-21 | 联想(北京)有限公司 | Information prompting method and device and electronic equipment |
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