CN207380603U - A kind of crystal oscillator common circuit for being used to implement clock synchronization - Google Patents
A kind of crystal oscillator common circuit for being used to implement clock synchronization Download PDFInfo
- Publication number
- CN207380603U CN207380603U CN201721029090.2U CN201721029090U CN207380603U CN 207380603 U CN207380603 U CN 207380603U CN 201721029090 U CN201721029090 U CN 201721029090U CN 207380603 U CN207380603 U CN 207380603U
- Authority
- CN
- China
- Prior art keywords
- crystal oscillator
- chip
- clock
- common circuit
- resistance
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Landscapes
- Oscillators With Electromechanical Resonators (AREA)
Abstract
The utility model discloses a kind of crystal oscillator common circuits for being used to implement clock synchronization, it includes a master chip, it is at least one from chip and crystal oscillator, the first end of the crystal oscillator passes through the second capacity earth, the second end of the crystal oscillator passes through the first capacity earth, the first end of the crystal oscillator is connected to the first clock pins of master chip by first resistor, the second end of the crystal oscillator is connected to the second clock pin of master chip, the first end of the crystal oscillator passes through the second resistance that is sequentially connected in series, inductance and the 3rd capacitance and be connected to the first clock pins from chip, the second clock pin from chip is grounded.The utility model can ensure that the clock frequency of each chip is consistent, while can save space, reduce cost.
Description
Technical field
The utility model is related to clock circuit more particularly to a kind of crystal oscillator common circuits for being used to implement clock synchronization.
Background technology
In the prior art, for some control systems, it is usually directed to the application side of multiple control chip cooperations
Formula, in the system with multiple chips, to ensure the accuracy and reliability of each chip chamber information transmission, the work of each chip
Frequency should be synchronous, and current solution is, the crystal oscillator of identical frequency is equipped with for each chip, during chip being made to obtain system
Clock, but since each crystal oscillator is in itself there are error, thus it is likely to result in application process asynchronous, cause each chip not
It can guarantee clock synchronization, meanwhile, the processing cost and Material Cost of the prior art are higher.
Utility model content
The technical problems to be solved in the utility model is that in view of the deficiencies of the prior art, each core can be ensured by providing one kind
The clock frequency of piece is consistent, while saves space, the crystal oscillator common circuit for reducing cost.
In order to solve the above technical problems, the utility model adopts the following technical solution.
A kind of crystal oscillator common circuit for being used to implement clock synchronization, include a master chip, it is at least one from chip and
Crystal oscillator, for the first end of the crystal oscillator by the second capacity earth, the second end of the crystal oscillator passes through the first capacity earth, the crystalline substance
The first end shaken is connected to the first clock pins of master chip by first resistor, and the second end of the crystal oscillator is connected to main core
The second clock pin of piece, the first end of the crystal oscillator are connected by the second resistance, inductance and the 3rd capacitance that are sequentially connected in series
It is described electric from being connected with the 4th between the first clock pins of chip and second clock pin in the first clock pins from chip
Resistance.
Preferably, it is described from the quantity of chip be multiple.
Preferably, it is connected with 3rd resistor between the first end and second end of the crystal oscillator.
Preferably, the 3rd resistor and the resistance value of the 4th resistance are 1M Ω.
Preferably, the resistance value of the second resistance is 75 Ω, and the inductance value of the inductance is 470nH, the 3rd electricity
The capacitance of appearance is 100pF.
It is used to implement disclosed in the utility model in the crystal oscillator common circuit of clock synchronization, when the circuit powers on, institute
The frequency signal for stating crystal oscillator generation can clock pins of the simultaneous transmission to master chip and from chip so that the master chip and from core
The clock of piece is synchronous, and then ensure that the clock frequency of each chip is consistent, meanwhile, the utility model reduces crystal oscillator quantity, has
Effect saves space, and reduces circuit cost.
Description of the drawings
Fig. 1 is the schematic diagram of the utility model crystal oscillator common circuit.
Specific embodiment
The utility model is described in more detail with reference to the accompanying drawings and examples.
The utility model discloses a kind of crystal oscillator common circuits for being used to implement clock synchronization, refer to Fig. 1, include
One master chip U1, at least one first end from chip U2 and crystal oscillator Y1, the crystal oscillator Y1 are grounded by the second capacitance C52, institute
The second end for stating crystal oscillator Y1 is grounded by the first capacitance C58, and the first end of the crystal oscillator Y1 is connected to by first resistor R29
The first clock pins of master chip U1, the second end of the crystal oscillator Y1 are connected to the second clock pin of master chip U1, the crystalline substance
The first end of Y1 of shaking is connected to by the second resistance R110, inductance L48 and the 3rd capacitance C104 that are sequentially connected in series from chip U2
The first clock pins, it is described to be connected with the 4th resistance R35 between the first clock pins of chip U2 and second clock pin.
In above-mentioned crystal oscillator common circuit, when the circuit powers on, the frequency signal that the crystal oscillator Y1 is generated can pass simultaneously
Transport to master chip U1 and the clock pins from chip U2 so that the master chip U1 is synchronous with the clock from chip U2, Jin Erbao
It is consistent to have demonstrate,proved the clock frequency of each chip, meanwhile, the utility model reduces crystal oscillator quantity, effectively saves space, and reduces
Circuit cost.
In practical application, the quantity from chip U2 is multiple.
As a kind of preferred embodiment, in order to play the role of impedance matching, the first end and second end of the crystal oscillator Y1 it
Between be connected with 3rd resistor R34.
On the parameter setting of each device, in the present embodiment, the resistance value of the 3rd resistor R34 and the 4th resistance R35
It is 1M Ω.
Further, the resistance value of the second resistance R110 is 75 Ω, and the inductance value of the inductance L48 is 470nH, institute
The capacitance for stating the 3rd capacitance C104 is 100pF.
In order to which the technical solution of the utility model is better described, the invention also discloses one kind to be used to implement clock
Synchronous crystal oscillator method for sharing, refer to Fig. 1, and this method is based on circuit realization, and the circuit includes a master chip U1, extremely
A few first end from chip U2 and crystal oscillator Y1, the crystal oscillator Y1 is grounded by the second capacitance C52, and the second of the crystal oscillator Y1
End is grounded by the first capacitance C58, and the first end of the crystal oscillator Y1 is connected to the of master chip U1 by first resistor R29
One clock pins, the second end of the crystal oscillator Y1 are connected to the second clock pin of master chip U1, the first end of the crystal oscillator Y1
Drawn by the second resistance R110, inductance L48 and the 3rd capacitance C104 that are sequentially connected in series and the first clock being connected to from chip U2
Foot, it is described to be connected with the 4th resistance R35 between the first clock pins of chip U2 and second clock pin；
The described method includes：When the circuit powers on, frequency signal simultaneous transmission that the crystal oscillator Y1 is generated to main core
Piece U1 and the clock pins from chip U2, to make the master chip U1 synchronous with the clock from chip U2.
The crystal oscillator common circuit of clock synchronization is used to implement disclosed in the utility model, has high level of synchronization to clock circuit
It is required that, it is ensured that the clock of peripheral chip and master chip is completely the same.Meanwhile the utility model peripheral chip it is standby or
In the case of power-off, master chip clock circuit is not influenced.In addition, the utility model can effectively save Material Cost and be processed into
This.
The above is the utility model preferred embodiment, is not intended to limit the utility model, all in this practicality
Modification, equivalent substitution or improvement made in new technical scope etc., should be included in the model that the utility model is protected
In enclosing.
Claims (5)
1. a kind of crystal oscillator common circuit for being used to implement clock synchronization, which is characterized in that include a master chip (U1), at least one
It is a from chip (U2) and crystal oscillator (Y1), the first end of the crystal oscillator (Y1) passes through the second capacitance (C52) and is grounded, the crystal oscillator (Y1)
Second end be grounded by the first capacitance (C58), the first end of the crystal oscillator (Y1) is connected to master by first resistor (R29)
First clock pins of chip (U1), the second end of the crystal oscillator (Y1) are connected to the second clock pin of master chip (U1), institute
The first end for stating crystal oscillator (Y1) is connected by the second resistance (R110), inductance (L48) and the 3rd capacitance (C104) that are sequentially connected in series
The first clock pins from chip (U2) are connected to, it is described to connect between the first clock pins of chip (U2) and second clock pin
It is connected to the 4th resistance (R35).
2. the crystal oscillator common circuit as described in claim 1 for being used to implement clock synchronization, which is characterized in that described from chip
(U2) quantity is multiple.
3. the crystal oscillator common circuit as described in claim 1 for being used to implement clock synchronization, which is characterized in that the crystal oscillator (Y1)
First end and second end between be connected with 3rd resistor (R34).
4. the crystal oscillator common circuit as claimed in claim 3 for being used to implement clock synchronization, which is characterized in that the 3rd resistor
(R34) and the resistance value of the 4th resistance (R35) is 1M Ω.
5. the crystal oscillator common circuit as described in claim 1 for being used to implement clock synchronization, which is characterized in that the second resistance
(R110) resistance value is 75 Ω, and the inductance value of the inductance (L48) is 470nH, the capacitance of the 3rd capacitance (C104)
For 100pF.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201721029090.2U CN207380603U (en) | 2017-08-16 | 2017-08-16 | A kind of crystal oscillator common circuit for being used to implement clock synchronization |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201721029090.2U CN207380603U (en) | 2017-08-16 | 2017-08-16 | A kind of crystal oscillator common circuit for being used to implement clock synchronization |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN207380603U true CN207380603U (en) | 2018-05-18 |
Family
ID=62341955
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201721029090.2U Active CN207380603U (en) | 2017-08-16 | 2017-08-16 | A kind of crystal oscillator common circuit for being used to implement clock synchronization |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN207380603U (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108919242A (en) * | 2018-06-13 | 2018-11-30 | 四川合众精准科技有限公司 | A kind of precise distance measurement system of the UWB module of shared crystal oscillator |
| CN110471490A (en) * | 2019-07-12 | 2019-11-19 | 晶晨半导体(上海)股份有限公司 | A kind of no source crystal oscillator common circuit |
| CN111030677A (en) * | 2019-12-23 | 2020-04-17 | 康佳集团股份有限公司 | Multiplexing processing circuit, crystal oscillator multiplexing circuit and television |
-
2017
- 2017-08-16 CN CN201721029090.2U patent/CN207380603U/en active Active
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108919242A (en) * | 2018-06-13 | 2018-11-30 | 四川合众精准科技有限公司 | A kind of precise distance measurement system of the UWB module of shared crystal oscillator |
| CN110471490A (en) * | 2019-07-12 | 2019-11-19 | 晶晨半导体(上海)股份有限公司 | A kind of no source crystal oscillator common circuit |
| CN110471490B (en) * | 2019-07-12 | 2023-07-28 | 晶晨半导体(上海)股份有限公司 | Passive crystal oscillator sharing circuit |
| CN111030677A (en) * | 2019-12-23 | 2020-04-17 | 康佳集团股份有限公司 | Multiplexing processing circuit, crystal oscillator multiplexing circuit and television |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN207380603U (en) | A kind of crystal oscillator common circuit for being used to implement clock synchronization | |
| CN104063061A (en) | Computer started up through keyboard | |
| WO2021008363A1 (en) | Passive crystal oscillator sharing circuit | |
| CN207677708U (en) | There is source crystal oscillator filter circuit module | |
| CN206451166U (en) | A kind of synchronous acquisition circuit based on multi-channel high-speed ADC | |
| CN204189163U (en) | A kind of based on I2C bus from machine feed circuit and device | |
| CN102262431A (en) | Computer system | |
| CN103616934A (en) | FPGA core circuit board structure | |
| CN202976859U (en) | SD card (Secure Digital) detection circuit in PLC (Programmable Logic Controller) | |
| CN106788370B (en) | Electronic device | |
| CN204362237U (en) | ISDB-T digital television module and the main frame that Digital Television can be play | |
| CN107834995A (en) | Multifunctional ultrasonic imaging system | |
| CN109684762B (en) | Chip and setting circuit of pin thereof | |
| CN203434612U (en) | CI card seat circuit capable of resisting impact current | |
| CN207625530U (en) | A kind of circuits for being compatible with different startup tfi modules | |
| CN207939643U (en) | Device for shuangping san | |
| CN204347832U (en) | A kind of computing machine usb communication interface data transmission amplifier | |
| CN205179531U (en) | A model structure for reducing audio frequency driver chip noise | |
| JP2004139953A (en) | Printed-circuit board and card slot of printed-circuit board | |
| CN210431686U (en) | Video drive board card with shared network | |
| CN206282273U (en) | Signaling conversion circuit and user terminal | |
| US20130054865A1 (en) | Mouse | |
| TWI360752B (en) | Dual-memory power supply circuit | |
| CN203799666U (en) | Voltage division circuit based on DDR2 memory | |
| CN203398777U (en) | Clock interface circuit with electrostatic protection function |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant |