CN207265896U - A kind of voltage stabilizing inverter source - Google Patents
A kind of voltage stabilizing inverter source Download PDFInfo
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- CN207265896U CN207265896U CN201721201203.2U CN201721201203U CN207265896U CN 207265896 U CN207265896 U CN 207265896U CN 201721201203 U CN201721201203 U CN 201721201203U CN 207265896 U CN207265896 U CN 207265896U
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- width modulating
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Abstract
The utility model discloses a kind of voltage stabilizing inverter source, including modulation circuit, amplifying circuit, drive circuit and transformer, modulation circuit is used to DC voltage being changed into alternating voltage, amplifying circuit is used to alternating voltage being amplified, drive circuit is used to produce driving pulse, transformer is used to adjust output voltage, and the input terminal connection DC power supply of modulation circuit, output terminal pure amplification circuit, a drive circuit are connected with transformer.The utility model can be adjusted the voltage waveform of output, so that the voltage waveform of output reaches stable, improve the stability of output voltage, proof load normal work.
Description
Technical field
It the utility model is related to inverter field, more particularly to a kind of voltage stabilizing inverter source.
Background technology
Inverter, is exactly changed into direct current using thyristor circuit the power supply of alternating current.Existing inverter
Output voltage waveforms are seriously unstable, and containing compared with multiple-harmonic, influence the normal work loaded.
Utility model content
The purpose of this utility model is to provide a kind of voltage stabilizing inverter source, and output waveform can be adjusted, and ensures
The stability of output voltage.
To achieve the above object, the utility model adopts the following technical solution：
A kind of voltage stabilizing inverter source, including modulation circuit, amplifying circuit, drive circuit and transformer, the modulation circuit
Using pulse width modulating chip, the first reverse input end of pulse width modulating chip is successively through the second capacitance and the first capacitance and pulsewidth tune
Second reverse input end of coremaking piece is connected, the compensation of the common port and pulse width modulating chip of first capacitance and the second capacitance
Component connection is connected, and the first reverse input end of pulse width modulating chip is also successively through second resistance and first resistor and pulsewidth tune
Second inverting input of coremaking piece is connected, the reference voltage of the common port and pulse width modulating chip of first resistor and second resistance
Output terminal is connected with way of output setting end, and the second inverting input of the pulse width modulating chip also connects electricity through 3rd resistor
Source anode, the control signal input of the pulse width modulating chip are exported through the reference voltage of the 3rd capacitance and pulse width modulating chip
End is connected, the second normal phase input end of the control signal input of pulse width modulating chip also through the 4th resistance and pulse width modulating chip
It is connected, the second normal phase input end of the pulse width modulating chip is also exported through the reference voltage of the 4th capacitance and pulse width modulating chip
End is connected, one end ground connection of the 4th capacitance, the first reversed-phase output, the second reversed-phase output and the electricity of the pulse width modulating chip
Source is parallel with through the first inductance connection positive pole, the positive pole through the 5th capacity earth, the 5th capacitance both ends respectively
6th capacitance, power cathode connect through the 5th resistance eutral grounding, the 7th capacitance of oscillating capacitance connecting pin of the pulse width modulating chip
Ground, the 6th resistance eutral grounding of concussion resistance connecting pin of pulse width modulating chip, the first normal phase input end warp of pulse width modulating chip
7th resistance eutral grounding, the first in-phase output end and the second in-phase output end of the pulse width modulating chip connect amplification electricity respectively
Road；
The amplifying circuit includes the first triode and the second triode, and the base stage of first triode is successively through the 9th
Resistance and the tenth resistance are connected with the base stage of the second triode, and the base stage of the first triode is also same with the second of pulse width modulating chip
Phase output terminal is connected, and the emitter of the first triode is connected through the first diode with the base stage of the first triode, the first triode
Emitter be also connected with one end of transformer primary side, the collector of the first triode is connected with the emitter of the second triode,
The base stage of second triode is connected with the first in-phase input end of pulse width modulating chip, and the collector of the second triode is through
Two diodes are connected with the base stage of the second triode, the collector of the emitter of the first triode and the second triode respectively with drive
Dynamic circuit is connected, common port and the common port of the first triode and the second triode difference of the 9th resistance and the tenth resistance
It is connected with the other end of transformer primary side；
The drive circuit includes first switch pipe and second switch pipe, the grid of first switch pipe through the 11st resistance with
The drain electrode of first switch pipe is connected, and the drain electrode of first switch pipe is connected with the emitter of the first triode, the leakage of first switch pipe
Pole is also connected with one end of transformer primary side, and the source electrode of first switch pipe is connected with the drain electrode of second switch pipe, and described second opens
The grid for closing pipe is connected through the 12nd resistance with the collector of the second triode, the source electrode of second switch pipe and transformer primary side
The other end is connected, and the drain electrode of the source electrode and second switch pipe of the first switch pipe is connected with the other end of transformer primary side；
The tap of the transformer primary side is connected through the first inductance with positive pole, the electricity of secondary one end the 8th of transformer
Resistance is connected with the 7th resistance, and the 7th resistance is slide rheostat, and the 8th resistance is connected with the sliding end of the 7th resistance, described
The other end ground connection of transformer secondary.
Preferably, the drive circuit further includes the 3rd switching tube and the 4th switching tube, and the grid of the 3rd switching tube is through
13 resistance are connected with the drain electrode of the 3rd switching tube, and the drain electrode of the 3rd switching tube is connected with the drain electrode of first switch pipe, and the 3rd opens
The drain electrode for closing pipe is also connected with one end of transformer primary side, and the source electrode of the 3rd switching tube is connected with the drain electrode of the 4th switching tube, institute
The grid for stating the 4th switching tube is connected through the 14th resistance with the collector of the second triode, the source electrode and transformation of the 4th switching tube
The other end of device primary side is connected, and the drain electrode of the source electrode and the 4th switching tube of the 3rd switching tube is another with transformer primary side respectively
One end is connected.
Preferably, one end of the transformer secondary is successively through the 15th resistance and the 16th resistance eutral grounding, and the described tenth
The common port of five resistance and the 16th resistance is connected through the 3rd diode with the 8th resistance, the public affairs of the 3rd diode and the 8th resistance
End is grounded through the 8th diode altogether.
Preferably, the source electrode of the second switch pipe is connected through harmonic suppression circuit with transformer, the harmonics restraint electricity
Road includes the first amplifier, the second amplifier, the 3rd amplifier and the 3rd triode, the positive input of first amplifier
It is connected through the 17th resistance with the source electrode of second switch pipe, the positive input of the first amplifier is put through the 18th resistance with first
The output terminal of big device is connected, and the positive input of the positive input of first amplifier also with the second amplifier is connected, the
The reverse input end of one amplifier is connected with the reverse input end of the second amplifier, and the reverse input end of the second amplifier passes through successively
19th resistance and the 9th capacitance are connected with the source electrode of second switch pipe, and the reverse input end of the second amplifier is also through the 20th electricity
Resistance is connected with the output terminal of the second amplifier, the output terminal of first amplifier through the 4th diode and the 3rd amplifier just
It is connected to input terminal, also quiet 21st resistance of positive input of the 3rd amplifier is connected with the output terminal of the 3rd amplifier,
The reverse input end of 3rd amplifier is connected through the tenth capacitance with the output terminal of the second amplifier, the output terminal of the second amplifier with
The base stage of 3rd triode is connected, and the emitter of the 3rd triode is through the 22nd resistance eutral grounding, the collector of the 3rd triode
It is connected with the output terminal of the 3rd amplifier, the output terminal of the 3rd amplifier is connected with the other end of transformer primary side.
Preferably, the 3rd capacitance, the 4th capacitance and the 6th capacitance are polar capacitor.
Preferably, the first switch pipe, second switch pipe, the 3rd switching tube and the 4th switching tube use N-channel
MOSFET。
Preferably, the pulse width modulating chip uses TL494 integrated chips.
Direct current is changed into alternating current by the utility model by pulse width modulating chip, and pulse width modulating chip can ensure defeated
Go out the stability of voltage, output waveform can be adjusted by amplifying circuit, drive circuit and transformer, so that output
Voltage waveform reach stable, improve the stability of output voltage；The utility model is additionally provided with harmonic suppression circuit, can incite somebody to action
The noise signal of generation is suppressed, so that the noise in reducing the power supply that the utility model produces, proof load normal work.
Brief description of the drawings
Fig. 1 is the circuit diagram of the utility model；
Fig. 2 is the circuit diagram of harmonic suppression circuit described in the utility model.
Embodiment
The technical solution of the utility model is clearly and completely described below in conjunction with attached drawing, it is clear that described reality
The section Example that example is only the utility model is applied, instead of all the embodiments.Based on the embodiment in the utility model,
Other all embodiments that those of ordinary skill in the art are obtained on the premise of creative work is not made, belong to this
The protection domain of utility model.
As shown in Figures 1 and 2, a kind of voltage stabilizing inverter source of the present invention, including modulation circuit, amplifying circuit, drive
Dynamic circuit and transformer, modulation circuit are used to DC voltage being changed into alternating voltage, amplifying circuit be used for by alternating voltage into
Row amplification, drive circuit are used to produce driving pulse, and transformer is used to adjust output voltage.
Modulation circuit uses pulse width modulating chip U1, and in the present embodiment, pulse width modulating chip U1 integrates core using TL494
Piece, the first reverse input end-IN1 of pulse width modulating chip U1（2 pins）Successively through the second capacitance C2 and the first capacitance C1 and arteries and veins
The second reverse input end-IN2 of wide modulation chip U1（15 pins）Be connected, the common port of the first capacitance C1 and the second capacitance C2 with
The compensating element, connecting pin PWM of pulse width modulating chip U1（3 pins）It is connected, the first reverse input end of pulse width modulating chip U1-
IN1（2 pins）Also successively the second inverting input-IN2 through second resistance R2 and first resistor R1 Yu pulse width modulating chip U1
（15 pins）It is connected, the common port of first resistor R1 and second resistance R2 and the reference voltage output end of pulse width modulating chip U1
Vref（14 pins）End OUT is set with the way of output（13 pins）It is connected, the second inverting input of pulse width modulating chip U1-
IN2（15 pins）Also through 3rd resistor R3 connection power cathodes, the control signal input CONT of pulse width modulating chip U1（4 draw
Foot）Reference voltage output end Vref through the 3rd capacitance C3 Yu pulse width modulating chip U1（14 pins）It is connected, pulse-width signal
The control signal input CONT of U1（4 pins）Also the second normal phase input end through the 4th resistance R4 and pulse width modulating chip U1+
IN2（16 pins）It is connected, the second normal phase input end+IN2 of pulse width modulating chip U1（15 pins）Also through the 4th capacitance C4 and arteries and veins
The reference voltage output end Vref of width modulation chip U1（14 pins）It is connected, one end ground connection of the 4th capacitance C4；Pulsewidth modulation core
The first reversed-phase output C1 of piece U1（8 pins）, the second reversed-phase output C2（11 pins）And power end VCC（12 pins）Respectively
Through the first inductance L1 connection positive poles, positive pole is also grounded through the 5th capacitance C5, and the 5th capacitance C5 both ends are parallel with the 6th
Capacitance C6, power cathode are grounded through the 5th resistance R5；The oscillating capacitance connecting pin CT of pulse width modulating chip U1（5 pins）Through the 7th
Capacitance C7 is grounded, the concussion resistance connecting pin RT of pulse width modulating chip U1（6 pins）It is grounded through the 6th resistance R6, pulsewidth modulation core
The first normal phase input end+IN1 of piece U1（1 pin）It is grounded through the 7th resistance R7, the first of pulse width modulating chip U1 exports with phase
Hold E1（9 pins）With the second in-phase output end E2（10 pins）Amplifying circuit is connected respectively.
Amplifying circuit includes the base stage of the first triode T1 and the second triode T2, the first triode T1 successively through the 9th electricity
Resistance R9 and the tenth resistance R10 is connected with the base stage of the second triode T2, the base stage of the first triode T1 also with pulse width modulating chip
The second in-phase output end E2 of U1（10 pins）It is connected, the emitter of the first triode T1 is through the first diode D1 and the one or three pole
The base stage of pipe T1 is connected, and the one end of the emitter of the first triode T1 also with transformer B primary sides is connected, the collection of the first triode T1
Electrode is connected with the emitter of the second triode T2, and the base stage of the second triode T2 is with the first of pulse width modulating chip U1 with mutually defeated
Outlet E1（9 pins）It is connected, the collector of the second triode T2 is connected through the second diode D2 with the base stage of the second triode T2,
The collector of the emitter of first triode T1 and the second triode T2 are connected with drive circuit respectively, the 9th resistance R9 and the tenth
The common port of resistance R10 and the common port of the first triode T1 and the second triode T2 are respectively through harmonic suppression circuit and transformer
The other end of B primary sides is connected.
Drive circuit includes first switch pipe VT1, second switch pipe VT2, the 3rd switching tube VT3 and the 4th switching tube VT4,
The grid of first switch pipe VT1 is connected through the 11st resistance R11 with the drain electrode of first switch pipe T1, the leakage of first switch pipe VT1
Pole is connected with the emitter of the first triode T1, and the drain electrode of first switch pipe VT1 is also connected with one end of transformer B primary sides, and first
The source electrode of switching tube VT1 is connected with the drain electrode of second switch pipe VT2, the grid of second switch pipe VT2 through the 12nd resistance R12 with
The collector of second triode T2 is connected, and the source electrode of second switch pipe VT2 is connected with harmonic suppression circuit, first switch pipe VT1
Source electrode and the drain electrode of second switch pipe VT2 be connected with harmonic suppression circuit, the grid of the 3rd switching tube VT3 is through the 13rd electricity
Resistance R13 is connected with the drain electrode of the 3rd switching tube VT3, and the drain electrode of the 3rd switching tube VT3 is connected with the drain electrode of second switch pipe VT2,
The one end of the drain electrode of 3rd switching tube VT3 also with transformer B primary sides is connected, the source electrode and the 4th switching tube of the 3rd switching tube VT3
The drain electrode of VT4 is connected, and the grid of the 4th switching tube VT4 is connected through the 14th resistance R14 with the collector of the second triode T2, the
The source electrode of four switching tube VT4 is connected with harmonic suppression circuit, the drain electrode of the source electrode and the 4th switching tube VT4 of the 3rd switching tube VT3
It is connected respectively with harmonic suppression circuit.
The tap of transformer B primary sides is connected through the first inductance L1 with positive pole, and one end of transformer B secondary is successively through
The common port of 15 resistance R15 and the 16th resistance R16 ground connection, the 15th resistance R15 and the 16th resistance R16 are through the three or two pole
Pipe D3 and the 8th resistance R8 are connected with the 7th resistance R7, and the 7th resistance R7 is slide rheostat, the 8th resistance R8 and the 7th resistance
The sliding end of R7 is connected, and the common port of the 3rd diode D3 and the 8th resistance R8 are grounded through the 8th capacitance C8, transformer B secondary
The other end is grounded.
Harmonic suppression circuit includes the first amplifier P1, the second amplifier P2, the 3rd amplifier P3 and the 3rd triode T3,
The positive input of first amplifier P1 is connected through the 17th resistance R17 with the source electrode of second switch pipe VT2, the first amplifier P1
Positive input be connected through the 18th resistance R18 with the output terminal of the first amplifier P1, the positive input of the first amplifier P1
The positive input also with the second amplifier P2 is held to be connected, the reverse input end of the first amplifier P1 is anti-with the second amplifier P2's
It is connected to input terminal, the reverse input end of the second amplifier P2 is opened through the 19th resistance R19 and the 9th capacitance C9 with second successively
The source electrode for closing pipe VT2 is connected, and the reverse input end of the second amplifier P2 is also through the defeated of the 20th resistance R20 and the second amplifier P2
Outlet is connected, and the output terminal of the first amplifier P1 is connected through the 4th diode D4 with the positive input of the 3rd amplifier P3, the
The positive input of three amplifier P3 is also connected through the 21st resistance R21 with the output terminal of the 3rd amplifier P3, the 3rd amplification
The reverse input end of device P3 is connected through the tenth capacitance C10 with the output terminal of the second amplifier P2, the output terminal of the second amplifier P2
It is connected with the base stage of the 3rd triode T3, the emitter of the 3rd triode T3 is grounded through the 22nd resistance R22, the 3rd triode
The collector of T3 is connected with the output terminal of the 3rd amplifier P3, and the output terminal of the 3rd amplifier P3 is another with transformer B primary sides
End is connected.
In the present embodiment, the 3rd capacitance C3, the 4th capacitance C4 and the 6th capacitance C6 are polar capacitor, first switch pipe
VT1, second switch pipe VT2, the 3rd switching tube VT3 and the 4th switching tube VT4 use N-channel MOS FET.
The utility model can be adjusted the voltage waveform of output, so that the voltage waveform of output reaches stable,
Improve the stability of output voltage, proof load normal work.
Claims (7)
- A kind of 1. voltage stabilizing inverter source, it is characterised in that：It is described including modulation circuit, amplifying circuit, drive circuit and transformer Modulation circuit uses pulse width modulating chip, and the first reverse input end of pulse width modulating chip is successively through the second capacitance and the first capacitance It is connected with the second reverse input end of pulse width modulating chip, common port and the pulsewidth modulation core of first capacitance and the second capacitance The compensating element, connecting pin of piece is connected, and the first reverse input end of pulse width modulating chip is also successively through second resistance and first resistor It is connected with the second inverting input of pulse width modulating chip, the common port and pulse width modulating chip of first resistor and second resistance Reference voltage output end is connected with way of output setting end, and the second inverting input of the pulse width modulating chip is also through the 3rd electricity Resistance connection power cathode, benchmark of the control signal input through the 3rd capacitance and pulse width modulating chip of the pulse width modulating chip Voltage output end is connected, the control signal input of pulse width modulating chip also through the 4th resistance and pulse width modulating chip second just Phase input terminal is connected, the benchmark of the second normal phase input end of the pulse width modulating chip also through the 4th capacitance and pulse width modulating chip Voltage output end is connected, one end of the 4th capacitance ground connection, the first reversed-phase output of the pulse width modulating chip, second anti-phase defeated Outlet and power end are respectively through the first inductance connection positive pole, and the positive pole is through the 5th capacity earth, the 5th capacitance two End is parallel with the 6th capacitance, and power cathode is through the 5th resistance eutral grounding, the oscillating capacitance connecting pin of the pulse width modulating chip the Seven capacity earths, the 6th resistance eutral grounding of concussion resistance connecting pin of pulse width modulating chip, the first positive of pulse width modulating chip Input terminal connects respectively through the 7th resistance eutral grounding, the first in-phase output end and the second in-phase output end of the pulse width modulating chip Amplifying circuit；The amplifying circuit includes the first triode and the second triode, and the base stage of first triode is successively through the 9th resistance It is connected with the tenth resistance with the base stage of the second triode, the base stage of the first triode is also same mutually defeated with the second of pulse width modulating chip Outlet is connected, and the emitter of the first triode is connected through the first diode with the base stage of the first triode, the hair of the first triode Emitter-base bandgap grading is also connected with one end of transformer primary side, and the collector of the first triode is connected with the emitter of the second triode, described The base stage of second triode is connected with the first in-phase input end of pulse width modulating chip, and the collector of the second triode is through the two or two Pole pipe is connected with the base stage of the second triode, and the collector of the emitter of the first triode and the second triode is electric with driving respectively Road is connected, the common port and the common port of the first triode and the second triode of the 9th resistance and the tenth resistance respectively with change The other end of depressor primary side is connected；The drive circuit includes first switch pipe and second switch pipe, and the grid of first switch pipe is through the 11st resistance and first The drain electrode of switching tube is connected, and the drain electrode of first switch pipe is connected with the emitter of the first triode, and the drain electrode of first switch pipe is also It is connected with one end of transformer primary side, the source electrode of first switch pipe is connected with the drain electrode of second switch pipe, the second switch pipe Grid be connected through the 12nd resistance with the collector of the second triode, the source electrode of second switch pipe and transformer primary side it is another End is connected, and the drain electrode of the source electrode and second switch pipe of the first switch pipe is connected with the other end of transformer primary side；The tap of the transformer primary side is connected through the first inductance with positive pole, the 8th resistance of secondary one end of transformer with 7th resistance is connected, and the 7th resistance is slide rheostat, and the 8th resistance is connected with the sliding end of the 7th resistance, the transformation The other end ground connection of device secondary.
- A kind of 2. voltage stabilizing inverter source as claimed in claim 1, it is characterised in that：The drive circuit further includes the 3rd switch Pipe and the 4th switching tube, the grid of the 3rd switching tube are connected through the 13rd resistance with the drain electrode of the 3rd switching tube, the 3rd switching tube Drain electrode be connected with the drain electrode of first switch pipe, the drain electrode of the 3rd switching tube is also connected with one end of transformer primary side, and the 3rd opens The source electrode for closing pipe is connected with the drain electrode of the 4th switching tube, and the grid of the 4th switching tube is through the 14th resistance and the second triode Collector be connected, the source electrode of the 4th switching tube is connected with the other end of transformer primary side, the source electrode of the 3rd switching tube and The drain electrode of 4th switching tube is connected with the other end of transformer primary side respectively.
- A kind of 3. voltage stabilizing inverter source as claimed in claim 2, it is characterised in that：One end of the transformer secondary passes through successively 15th resistance and the 16th resistance eutral grounding, the common port of the 15th resistance and the 16th resistance is through the 3rd diode and Eight resistance are connected, and the common port of the 3rd diode and the 8th resistance is grounded through the 8th diode.
- A kind of 4. voltage stabilizing inverter source as described in claim 1 or 3, it is characterised in that：The source electrode warp of the second switch pipe Harmonic suppression circuit is connected with transformer, and the harmonic suppression circuit includes the first amplifier, the second amplifier, the 3rd amplifier And the 3rd triode, the positive input of first amplifier are connected through the 17th resistance with the source electrode of second switch pipe, The positive input of one amplifier is connected through the 18th resistance with the output terminal of the first amplifier, the forward direction of first amplifier Positive input of the input terminal also with the second amplifier is connected, and the reverse input end of the first amplifier is reverse with the second amplifier Input terminal is connected, the reverse input end of the second amplifier source electrode through the 19th resistance and the 9th capacitance and second switch pipe successively It is connected, the reverse input end of the second amplifier is also connected through the 20th resistance with the output terminal of the second amplifier, and described first puts The output terminal of big device is connected through the 4th diode with the positive input of the 3rd amplifier, and the positive input of the 3rd amplifier is also Quiet 21st resistance is connected with the output terminal of the 3rd amplifier, and the reverse input end of the 3rd amplifier is through the tenth capacitance and second The output terminal of amplifier is connected, and the output terminal of the second amplifier is connected with the base stage of the 3rd triode, the transmitting of the 3rd triode The 22nd resistance eutral grounding of pole, the collector of the 3rd triode are connected with the output terminal of the 3rd amplifier, the 3rd amplification The output terminal of device is connected with the other end of transformer primary side.
- A kind of 5. voltage stabilizing inverter source as claimed in claim 4, it is characterised in that：3rd capacitance, the 4th capacitance and Six capacitances are polar capacitor.
- A kind of 6. voltage stabilizing inverter source as claimed in claim 5, it is characterised in that：The first switch pipe, second switch pipe, 3rd switching tube and the 4th switching tube use N-channel MOS FET.
- A kind of 7. voltage stabilizing inverter source as claimed in claim 6, it is characterised in that：The pulse width modulating chip uses TL494 Integrated chip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201721201203.2U CN207265896U (en) | 2017-09-19 | 2017-09-19 | A kind of voltage stabilizing inverter source |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201721201203.2U CN207265896U (en) | 2017-09-19 | 2017-09-19 | A kind of voltage stabilizing inverter source |
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| Publication Number | Publication Date |
|---|---|
| CN207265896U true CN207265896U (en) | 2018-04-20 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201721201203.2U Active CN207265896U (en) | 2017-09-19 | 2017-09-19 | A kind of voltage stabilizing inverter source |
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| CN (1) | CN207265896U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113054730A (en) * | 2021-03-26 | 2021-06-29 | 许昌学院 | Power frequency wind power generation energy storage inverter circuit |
| CN114977971A (en) * | 2022-05-30 | 2022-08-30 | 哈尔滨工业大学 | Linear driver circuit of motor |
-
2017
- 2017-09-19 CN CN201721201203.2U patent/CN207265896U/en active Active
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113054730A (en) * | 2021-03-26 | 2021-06-29 | 许昌学院 | Power frequency wind power generation energy storage inverter circuit |
| CN113054730B (en) * | 2021-03-26 | 2024-03-26 | 许昌学院 | Power frequency wind power generation energy storage inverter circuit |
| CN114977971A (en) * | 2022-05-30 | 2022-08-30 | 哈尔滨工业大学 | Linear driver circuit of motor |
| CN114977971B (en) * | 2022-05-30 | 2023-05-30 | 哈尔滨工业大学 | Motor linear driver circuit |
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