CN207099056U - A kind of multi-channel data acquisition front end biasing circuit - Google Patents
A kind of multi-channel data acquisition front end biasing circuit Download PDFInfo
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- CN207099056U CN207099056U CN201720983917.7U CN201720983917U CN207099056U CN 207099056 U CN207099056 U CN 207099056U CN 201720983917 U CN201720983917 U CN 201720983917U CN 207099056 U CN207099056 U CN 207099056U
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Abstract
A kind of multi-channel data acquisition front end biasing circuit, belongs to data acquisition circuit, it is intended to solves the problems, such as that prior art is big to high cost, the volume of multi-channel data acquisition, precision is low.The utility model includes 2MRoad input circuit, 2MIndividual operational amplifier, an analog switch and an isolated amplifier, described 2MRoad input circuit each includes inductance L1, inductance L2, electric capacity C1 and resistance R1, resistance R2 respectively；2MThe tie point of resistance R2 and resistance R1 in the input circuit of road are respectively with 2MIndividual operational amplifier positive input connection, 2MThe output end of individual operational amplifier connects the 2 of analog switch respectivelyMIndividual input end of analog signal；Output signal after analog switch gates is isolated by isolated amplifier, then accesses A/D chip input；The utility model cost is low, small volume, signal measurement stability are good, and collection signal is more accurate, can complete the collection of multiplexer channel data.
Description
Technical field
The utility model belongs to data acquisition circuit, more particularly, to a kind of multi-channel data acquisition front end biased electrical
Road, available for testing for electrical equipment.
Background technology
Often need to be acquired the data of multichannel in circuit design process, gathered signal voltage generally be present
Amplitude exceedes the situation of A/D chip voltage range, it is necessary to by institute's gathered data voltage bias to A/D chip range ability, therefore
Whether multi-channel data acquisition front end biasing circuit is accurate most important for data acquisition.In Circuit Design of Multi-channel Data
The general A/D chip using multichannel input, but in the case where A/D chip input needs to isolate, isolating chip will be caused
Using being doubled and redoubled, it is unfavorable for low cost and miniaturization；Another way is that multi-channel data is cut using analog switch
Change, but biasing circuit ratio chooses improper and impedance mismatch and can all influence acquisition precision.Therefore, both the above mode is equal
It can not take into account to low cost, miniaturization and the requirement of measurement accuracy.
The content of the invention
The utility model provides a kind of multi-channel data acquisition front end biasing circuit, it is intended to solves prior art to multichannel
The problem of high cost, the volume of data acquisition are big, precision is low.
A kind of multi-channel data acquisition front end biasing circuit provided by the utility model, including 2MRoad input circuit, 2MIt is individual
Operational amplifier, an analog switch and an isolated amplifier, 2≤M≤5, it is characterised in that：
Described 2MThe element of road input circuit is identical with structure, each includes inductance L1, inductance L2, electric capacity respectively
C1 and resistance R1, resistance R2；After inductance L1 and inductance L2 parallel connections, as signal input part is gathered all the way, the other end leads to for one end
Electric capacity C1 ground connection is crossed, while is grounded by the resistance R2 and resistance R1 of series connection；
Described 2MThe composition structure of individual operational amplifier is identical, and 2MThe connection of resistance R2 and resistance R1 in the input circuit of road
Point is respectively with 2MThe positive input connection of individual operational amplifier, 2MThe output end of individual operational amplifier connects analog switch respectively
2MIndividual input end of analog signal；Output signal after analog switch gates is isolated by isolated amplifier, then is accessed
A/D chip input；
The resistance R1 and resistance R2 meet relation：Wherein, V1For the signal voltage maximum gathered
Amplitude, V2The voltage max of range is gathered for A/D chip.
In the utility model, inductance L1, the inductance L2 and electric capacity C1 of input circuit form filter circuit, resistance R1, R2 structure
Into bias bleeder circuit, operational amplifier N2 plays impedance matching and voltage follow effect, and analog switch N6 is to more after partial pressure
Road signal is gated, and isolated amplifier N5 plays signal isolation effect.
Each road collection signal is filtered by inductance L1, L2 and electric capacity C1；Then AD ranges are biased to by resistance R1, R2
In the range of voltage；N6 is inputted after operational amplifier N2 voltage follows again, the output signal after analog switch N6 gatings
Isolated by isolated amplifier N5, access A/D chip input.
The utility model cost is low, small volume, signal measurement stability are good, can complete the collection of multiplexer channel data,
It by actual measurement, can ensure by the collected signal after biasing and AD input end signals error in 5 2MV, ensure collection letter
It is number more accurate.
Brief description of the drawings
Fig. 1 is the circuit diagram of the utility model embodiment；
Fig. 2 is equivalent circuit diagrams of the Fig. 1 when not using impedance matching circuit；
Fig. 3 is Fig. 1 equivalent circuit diagram.
Character is described as follows in figure：
YLCL1+ is collected signal 1 tunnel therein；
YLCL1~YLCL8 is by 8 tunnel collected signals after LC filtering and resistance biasing；
308A0~308A2,308EN are respectively channel selecting control and the Enable Pin of analog switch；
GND is earth terminal；
+ 5V5, -5V5 are respectively the positive and negative end of isolated preceding-terminal power supply；
+ 5VAD, -5VAD, AGND are respectively to isolate the positive and negative end of rear end power supply and earth terminal.
Embodiment
Below in conjunction with drawings and Examples, the utility model is further described.It is it should be appreciated that described herein
Specific embodiment only to explain the utility model, is not used to limit the utility model.
As shown in figure 1, embodiment of the present utility model, including No. 8 input circuits, 8 operational amplifiers, a simulation are opened
Close and an isolated amplifier；
The element of No. 8 input circuit is identical with structure, each includes inductance L1, inductance L2, electric capacity respectively
C1 and resistance R1, resistance R2；After inductance L1 and inductance L2 parallel connections, as signal input part is gathered all the way, the other end leads to for one end
Electric capacity C1 ground connection is crossed, while is grounded by the resistance R2 and resistance R1 of series connection；
The composition structure of 8 operational amplifier N2 is identical, the connection of resistance R2 and resistance R1 in No. 8 input circuits
Positive input of the point respectively with 8 operational amplifier N2 is connected, and 2M operational amplifier N2 output end connects simulation respectively
Switch N6 2M input end of analog signal；Through analog switch N6 gating after output signal by isolated amplifier N5 carry out every
From, then access A/D chip input；
The resistance R1 and resistance R2 meet relation：Wherein, V1For 5V, V2For 3V.
In the present embodiment, operational amplifier N2 uses OPA277UA chips, and the chip can be in ± 2V to ± 18V wide model
Power work is enclosed, and there is Low-offset voltage and drift, Low-bias Current, high cmrr, high power power suppression
Performance；Analog switch N6 uses 2MAX308ESE+ chips, and the chip is to be inputted with 8 passages, low-power consumption, support single supply or
Dual power supply works, and dual power supply can work in ± 4.5V to ± 20V wide-range power；Isolated amplifier N5 uses ISO124U
Chip, the chip can work in ± 4.5V to ± 18V wide-range power, and static working current is in 5.5 2MA；
In Fig. 1, wherein input signal Y LCL1+ all the way, amplitude range is 0V~5V；Entered by inductance L1, L2 and electric capacity C1
Row filtering；Then the voltage in AD range abilities is biased to by resistance R1, R2；It is defeated after operational amplifier N2 voltage follows again
Enter analog switch N6, the output signal after analog switch N6 gatings is isolated by isolated amplifier N5, accesses A/D chip
Input.AD acquisition ranges are 0V~3V in the present embodiment, and YLCL1+ output amplitude scope is 0V~5V, therefore biased electrical
Resistance intrinsic standoff ratio must is fulfilled forBy being calculatedBut meet that the combination of this ratio has
A lot, because A/D chip all has error in itself, in order that error is minimized, it is therefore desirable to choose a kind of optimal biased electrical
Hinder intrinsic standoff ratio.The worst error of A/D chip is 50 2MV in the present embodiment, ignores collection signal in circuit in transmitting procedure
Pressure drop, the intrinsic standoff ratio of different voltages selection 1/5,2/5,3/5 is calculated respectively, concrete condition is shown in Table 1.
Influence of the intrinsic standoff ratio of table 1 to acquisition precision
As known from Table 1, after the determination of biasing resistor intrinsic standoff ratio, the worst error of whole collection value has determined.Intrinsic standoff ratio
Bigger worst error is smaller.Therefore when selecting bias bleeder ratio, should be chosen by maximum intrinsic standoff ratio, the present embodiment
The biasing resistor intrinsic standoff ratio 3/5 of middle selection.
After biasing resistor intrinsic standoff ratio determines, biasing resistor resistance is next just to determine.If as shown in Fig. 2 remove in Fig. 1
Operational amplifier N2, now there may be the biasing resistor resistance of selection and collection value caused by rear class impedance mismatch and reason
There is deviation by value.Assuming that the analog switch N6 and isolated amplifier N5 of biasing resistor rear end equivalent input impedance are Rx, then
Can be shown in Fig. 2 by Fig. 1 circuit equivalents.
Circuit now is Rx and to be connected again with R2 after R1 parallel connections, and calculating biasing circuit intrinsic standoff ratio isBecause Rx is unknown, may cause if resistance R1 and the R2 resistance chosen is improperIt is very big, will
Intrinsic standoff ratio is promoted to be less thanSo as to cause and deviation occurs in theoretical value.It can increase between biasing resistor and analog switch
Add one-level operational amplifier N2 as voltage follower, due to its input impedance Ri convergence ∞, and the spy of output impedance convergence 0
Property, therefore can be shown in Fig. 3 by Fig. 1 circuit equivalents.
Biasing circuit intrinsic standoff ratio now isAnd Ri convergence ∞, thereforeThereforeRo ≈ 0 simultaneously, therefore the voltage after biasing on rear class Rx is not lost, and ensures
AD collection input virtual voltages are consistent with theoretical value, so as to ensure that acquisition precision.Saved by increasing one-level operational amplifier
The trouble of selection biasing resistor resistance is gone.
As it will be easily appreciated by one skilled in the art that preferred embodiment of the present utility model is the foregoing is only, not
To limit the utility model, any modification of all made within spirit of the present utility model and principle, equivalent substitution and change
Enter, should be included within the scope of protection of the utility model.
Claims (1)
1. a kind of multi-channel data acquisition front end biasing circuit, including 2MRoad input circuit, 2MIndividual operational amplifier, a simulation
Switch and an isolated amplifier, 2≤M≤5, it is characterised in that：
Described 2MThe element of road input circuit is identical with structure, each respectively include inductance L1, inductance L2, electric capacity C1 with
And resistance R1, resistance R2；After inductance L1 and inductance L2 parallel connections, as signal input part is gathered all the way, the other end passes through electricity for one end
Hold C1 ground connection, while be grounded by the resistance R2 and resistance R1 of series connection；
Described 2MThe composition structure of individual operational amplifier (N2) is identical, and 2MThe connection of resistance R2 and resistance R1 in the input circuit of road
Point is respectively with 2MThe positive input connection of individual operational amplifier (N2), 2MThe output end of individual operational amplifier (N2) connects respectively
The 2 of analog switch (N6)MIndividual input end of analog signal；Output signal after analog switch (N6) gating passes through isolated amplifier
(N5) isolated, then access A/D chip input；
The resistance R1 and resistance R2 meet relation：Wherein, V1For the signal voltage maximum amplitude gathered,
V2The voltage max of range is gathered for A/D chip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720983917.7U CN207099056U (en) | 2017-08-08 | 2017-08-08 | A kind of multi-channel data acquisition front end biasing circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720983917.7U CN207099056U (en) | 2017-08-08 | 2017-08-08 | A kind of multi-channel data acquisition front end biasing circuit |
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| Publication Number | Publication Date |
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| CN207099056U true CN207099056U (en) | 2018-03-13 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110032114A (en) * | 2019-04-24 | 2019-07-19 | 江苏泰坤环保科技有限公司 | A kind of high-precision analog signal acquisition processing circuit |
-
2017
- 2017-08-08 CN CN201720983917.7U patent/CN207099056U/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110032114A (en) * | 2019-04-24 | 2019-07-19 | 江苏泰坤环保科技有限公司 | A kind of high-precision analog signal acquisition processing circuit |
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