CN206877985U - Semiconductor encapsulation device and semiconductor lead frame - Google Patents
Semiconductor encapsulation device and semiconductor lead frame Download PDFInfo
- Publication number
- CN206877985U CN206877985U CN201720777826.8U CN201720777826U CN206877985U CN 206877985 U CN206877985 U CN 206877985U CN 201720777826 U CN201720777826 U CN 201720777826U CN 206877985 U CN206877985 U CN 206877985U
- Authority
- CN
- China
- Prior art keywords
- pin
- semiconductor
- raised
- muscle
- groove
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Abstract
The utility model discloses a kind of semiconductor encapsulation device and semiconductor lead frame, and the semiconductor encapsulation device includes:Package casing;Semiconductor devices, it is coated in the package casing;Pin, for being electrically connected with the semiconductor devices, and it is exposed outside the package casing;The pin has by the two raised square-wave-shaped structures formed with a groove respectively close to the both sides of the package casing, length direction of the described raised and described groove along the pin is arranged alternately successively, when the pin is welded with PCB printed circuit boards, scolding tin will be converged in the groove.Semiconductor lead frame of the present utility model is used to form the semiconductor encapsulation device.Semiconductor encapsulation device and semiconductor lead frame of the present utility model can improve the welding performance and reliability of pin and PCB printed circuit boards.
Description
Technical field
The encapsulation field of semiconductor is the utility model is related to, more particularly to a kind of semiconductor encapsulation device and semiconductor leads
Framework.
Background technology
Semiconductor encapsulation device is that have individual chips according to what product type and functional requirement were processed to obtain by wafer
Device.At present, semiconductor encapsulation device, for example, triode packaging system, it is wide that the size of its pin is generally 1.35mm, 0.5mm
It is thick.When the semiconductor encapsulation device is arranged on PCB printed circuit boards, the area of the PCB printed circuit boards of occupancy is generally
1.35mm*0.5mm*3 (wherein 3 be number of pin), for inline package, PCB printed circuit boards will be semiconductor package
Each pin of assembling device opens a perforate, and pin is bigger, and bore size is also bigger, takes PCB printed circuit boards
Size is also bigger, and the quantity for the semiconductor devices for causing to weld on PCB printed circuit boards is reduced.On the other hand, because PCB prints electricity
Perforate on the plate of road is slightly larger than pin, and when pin is soldered into PCB printed circuit boards, the scolding tin easily caused on pin passes through
Perforate flows downward, and causes that the welding performance of pin and PCB printed circuit boards is poor, welds insecure problem.
Utility model content
In order to solve the pin of semiconductor encapsulation device present in prior art and PCB printed circuit board welding performances
Difference, the insecure problem of welding, the utility model provide a kind of semiconductor encapsulation device.
The utility model separately provides a kind of semiconductor lead frame, and above-mentioned semiconductor can be formed after the lead frame rib cutting
The mount structure of packaging system.
The utility model separately provides a kind of semiconductor lead frame, and the lead frame is the lead frame after rib cutting,
The lead frame has the mount structure of above-mentioned semiconductor encapsulation device.
The utility model provides a kind of semiconductor encapsulation device, including:
Package casing;
Semiconductor devices, it is coated in the package casing;
Pin, for being electrically connected with the semiconductor devices, the pin is exposed outside the package casing;
The pin has by the two raised square-wave-shaped knots formed with a groove respectively close to the both sides of the package casing
Structure, length direction of the described raised and described groove along the pin are arranged alternately successively, the pin and PCB printed circuit boards
When being welded, scolding tin will be converged in the groove.
Optionally, after the pin inserts PCB printed circuit boards, it is raised that the PCB printed circuit boards are stuck in described two
Between so that one of projection is located at the PCB printed circuit boards upper surface, and another projection is positioned at PCB printing electricity
The lower surface of road plate.
Optionally, the width dimensions of the pin are 0.7mm-0.9mm, and the raised height is 0.075mm-0.1mm.
Optionally, the outer surface of the pin is coated with tin layers.
Optionally, the coverage of the tin layers is that the package casing is extended close to since the groove of the pin
Pin part.
The utility model separately provides a kind of semiconductor lead frame, including:
An at least radiating area;
An at least slide glass area, for mounting semiconductor, the slide glass area connects the radiating area;
An at least pin framework, the pin framework include corner framework, multiple pins in the corner framework
And the first of each pin of connection connects muscle, second company's muscle, described first connects muscle is located at close to the slide glass area, second company muscle
Described first connects side of the muscle away from the slide glass area;
After first company muscle is cut off, the first raised, second company muscle is formed at the rib cutting of each pin both sides respectively
After being cut off, formed respectively second raised at the rib cutting of each pin both sides, the described first raised and described second projection is along described
The length direction of pin is arranged at intervals, and a groove is formed between first raised and described second projection, and first is raised, institute
State the second raised and described groove and form square-wave-shaped structure.
Optionally, the described first pin width connected between muscle and second company muscle is 0.7mm ~ 0.9mm.
The utility model separately provides a kind of semiconductor lead frame, including:
Radiating area;
Slide glass area, for mounting semiconductor, the slide glass area connects the radiating area;
Pin, for the semiconductor devices being electrically connected in the slide glass area, the pin close to the slide glass area two
Side has by the two raised square-wave-shaped structures formed with a groove, length of the described raised and described groove along the pin respectively
Direction is arranged alternately successively, and when the pin is welded with PCB printed circuit boards, scolding tin will be converged in the groove.
The technical scheme that embodiment of the present utility model provides can include the following benefits:
Semiconductor encapsulation device of the present utility model by forming by a two raised and groove types respectively in the both sides of pin
Into square-wave-shaped structure so that when pin and PCB printed circuit plate welds, scolding tin by two it is raised pin in a groove, so as to
Scolding tin is fully contacted with pin, PCB printed circuit boards, and then the welding for strengthening pin and PCB printed circuit boards is strong
Degree, lift the welding performance and reliability of pin and pcb board.
Semiconductor lead frame of the present utility model pass through set first connect muscle and second connect muscle so that first connect muscle and
After second company's muscle is cut, first raised, the second raised and groove can be formed at the rib cutting of pin both sides, thereby, by this
Semiconductor encapsulation device made of semiconductor lead frame passes through the first projection and second when with PCB printed circuit plate welds
It is raised to pin scolding tin in a groove, so that scolding tin can be contacted fully with pin, PCB printed circuit boards, and then strengthen
The weld strength of pin and PCB printed circuit boards, lift the welding performance and reliability of pin and pcb board.
Semiconductor lead frame of the present utility model is by forming two raised and grooves in the both sides of pin, thereby, by this
Semiconductor encapsulation device made of semiconductor lead frame locks scolding tin when with PCB printed circuit plate welds, by two projections
Firmly in a groove, so that scolding tin can be contacted fully with pin, PCB printed circuit boards, and then pin and PCB printings are strengthened
The weld strength of circuit board, lift the welding performance and reliability of pin and pcb board.
It should be appreciated that the general description and following detailed description of the above are only exemplary, this can not be limited
Utility model.
Brief description of the drawings
Accompanying drawing herein is merged in specification and forms the part of this specification, show meet it is of the present utility model
Embodiment, and in specification together for explaining principle of the present utility model.
Fig. 1 is the structural representation of the utility model semiconductor encapsulation device.
Fig. 2 is the partial enlarged drawing in Tu1Zhong A areas.
Fig. 3 is the structural representation of the utility model semiconductor lead frame.
Fig. 4 is semiconductor lead frame rib cutting method flow diagram of the present utility model.
Embodiment
In order to further illustrate principle and structure of the present utility model, it is preferable to carry out in conjunction with accompanying drawing to of the present utility model
Example is described in detail.
As shown in figure 1, it is the structural representation of the utility model semiconductor encapsulation device.The packaging system 10 includes envelope
Casing 11, the semiconductor devices being coated in package casing 11(It is not shown)With the exposed pin 12 outside package casing 11.
In Fig. 1, the semiconductor encapsulation device can be the packaging system of transistor, for example, triode packaging system, should
The packaging system of transistor has three pins, can be connected respectively the grid, source electrode and drain electrode of triode.But it is not limited
In this, the semiconductor encapsulation device can also be applied to the encapsulation of other semiconductor devices, for example, diode, integrated chip etc..Pipe
The quantity of pin can change according to the model of encapsulation semiconductor devices.
In the present embodiment, mainly illustrated by taking the semiconductor encapsulation device of three pins as an example.
As shown in figure 1, exposing three pins 12 outside package casing 11, the both sides of each pin 12 form square-wave-shaped respectively
Structure.With reference to shown in Fig. 2, it is the partial enlarged drawing in Tu1Zhong A areas.The both sides of each pin 12 respectively have two projections 121,
122 and form groove 123 between two projections 121,122, the length side of two projections 121,122 and groove 123 along pin 12
To being arranged alternately successively, square-wave-shaped structure is formed.
When pin 12 is inserted into PCB printed circuit boards(Printed Circuit Board)When, PCB printed circuit boards
Between two projections 121,122, one of projection 121 is located at PCB printed circuit boards upper surface, and another projection 122 is located at
The lower surface of PCB printed circuit boards, i.e. PCB printed circuit boards are located at the centre of groove 123.In subsequent welding process, weldering
Tin is flowed into groove 123 from the outer face of projection 121, and the scolding tin flowed into groove 123 is blocked in groove 123 by projection 122
In, prevent scolding tin to be lost in, scolding tin is fully contacted with circuit board, pin 12, and then strengthen pin 12 and PCB printed circuits
The weld strength of plate, lift the welding performance and reliability of pin 12 and pcb board.
To reduce the area that pin 12 occupies on PCB printed circuit boards, the width of pin 12 is cut down, subtracts its width L1
It is small to arrive 0.7mm-0.9mm.The raised height of the both sides of pin 12 is 0.075mm-0.1mm, and therefore, pin is in projection 121(It is or convex
Play 122)The width L2 at place is two raised height and pin width sum, for example, being the mm+0.7 of 0.075 mm+0.075
mm =0.85mm。
More excellent, to avoid the exposed ground of pin 12(For example, copper material)Directly welded with PCB printed circuit boards, in pipe
The outer surface of pin 12 coats one layer of tin layers that can be merged with scolding tin.
More preferably, the tin layers are formed during the rib cutting of the lead frame carried out when producing the semiconductor encapsulation device
(It is described in detail below), i.e. the coverage of the tin layers is to extend close to package casing since the groove 123 of pin 12
11 pin part(L3 parts as shown in Figure 1).The coverage of the tin layers can effectively avoid pin 12 and PCB from printing electricity
Situation of the copper material directly with scolding tin welding during the plate weld of road, and then avoid and cause because of the poor compatibility between copper material and scolding tin
The problem of welding performance difference.
The utility model separately provides a kind of semiconductor lead frame, as shown in figure 3, it is the utility model semiconductor leads
The structural representation of framework.The semiconductor lead frame 20 includes an at least radiating area 21, at least one for installing semiconductor device
The pin framework 23 of part slide glass area 22 and at least one, slide glass area 22 connect radiating area 21, and it is remote that pin framework 23 is located at slide glass area 22
The side of radiating area 21.In figure 3, two radiating areas 21, Liang Ge slide glasses area 22 and a pin framework 23 are only shown(Two loads
Section 22 shares a pin framework 23, and the number of pins needed for Liang Ge slide glasses area 22 is laid with pin framework 23).It is but and unlimited
In this, the lead frame 20 may include multiple radiating areas 21, multiple slide glass areas 22 and multiple pin frameworks 23, herein not to radiating
The quantity in area 21, slide glass area 22 and pin framework 23 is limited.In the present embodiment, mainly using the lead frame of transistor as
Example illustrates, for example, by taking the lead frame of triode as an example.The semiconductor leads with three pins are illustrated that in Fig. 3
Framework, it will be understood that the semiconductor that lead frame of the present utility model can also be applied to more than two pins or three pins draws
Wire frame, the quantity of pin can be changed according to the difference of semiconductor devices model.
As shown in figure 3, pin framework 23 includes corner framework 231, multiple pins 232 in corner framework 231 with
And the first of each pin 232 of connection connects muscle 233, second and connect muscle 234, first company's muscle 233 is close to slide glass area 22, the second company muscle
234 connect side of the muscle 233 away from slide glass area 22 positioned at first.
In addition, first to connect the pin width that muscle 233 and second connects between muscle 234 be 0.7mm ~ 0.9mm, except being provided with first
Even muscle 233 and second connects outside the pin part of muscle 234, and the width of pin 232 is also 0.7mm ~ 0.9mm.
After first, which connects muscle 233, is cut off, the first projection is formed at the rib cutting of the both sides of each pin 232 respectively, this first
Projection is the projection 121 shown in Fig. 2;After second, which connects muscle 234, is cut off, formed respectively at the rib cutting of each both sides of pin 232
Second is raised, the second raised projection 122 for shown in Fig. 2;First raised and the second raised length direction along pin 232
Be arranged at intervals, and first it is raised form a groove between the second projection, the groove can be the groove 123 shown in Fig. 2, first
Raised, the second projection and groove form square-wave-shaped structure as shown in Figure 2.That is, first company's muscle 233 and second connects muscle 234 and cut
Afterwards, the pin of lead frame 20 forms the mount structure of above-mentioned semiconductor encapsulation device 10.
Therefore, above-mentioned semiconductor encapsulation device 10 can be formed by the lead frame 20 in the present embodiment, i.e. in lead frame
After the completion of the rib cutting of frame 20, the chip of semiconductor devices is sticked in slide glass area 22, recycles ultra-fine plain conductor or electric conductivity
The bond pad of chip is connected to corresponding pin by resin, the encapsulation for being then made of resin slide glass area 22 and radiating area 21
Shell is packaged, and can form above-mentioned semiconductor encapsulation device 10.
Further, the utility model separately provides a kind of semiconductor lead frame, and the lead frame is the lead frame after rib cutting
Frame, the i.e. lead frame are used for the encapsulation of individual chips, and it includes radiating area, the slide glass area for mounting semiconductor chip
At least two pins.Slide glass area is electrically connected with radiating area.Each pin has raised by two respectively close to the both sides in slide glass area
The square-wave-shaped structure formed with a groove, those the raised and length directions of the groove along pin are arranged alternately successively so that should
When pin is welded with PCB printed circuit boards, scolding tin can be converged in the groove.
Semiconductor lead frame in the present embodiment can be used for forming above-mentioned semiconductor encapsulation device 10, specific to be formed
Process is as follows:
The chip of semiconductor devices first is sticked in slide glass area, recycles ultra-fine plain conductor or electroconductive resin by crystalline substance
The bond pad of piece connects with corresponding pin, is then packaged in slide glass area and radiating area with package casing, in this way,
Form above-mentioned semiconductor encapsulation device 10.
The utility model separately provides a kind of semiconductor lead frame rib cutting method, as shown in figure 4, it is of the present utility model
Semiconductor lead frame rib cutting method flow diagram.Semiconductor lead frame in the present embodiment is the lead shown in above-mentioned Fig. 3
Framework 20, the lead frame include radiating area, slide glass area and pin framework, and pin framework includes corner framework, positioned at corner frame
First company's muscle of multiple pins and each pin of connection in frame, second connect muscle.Method of the present utility model is as follows:
Step S1, first time rib cutting:Cut-out first connects muscle, after first company's muscle is cut, distinguishes at the rib cutting of each pin both sides
It is raised to form first.
Before rib cutting step starts in first time, plated film is carried out to whole lead frame, makes the appearance of whole lead frame
Face forms the electrodeposited coating with protective effect.The electrodeposited coating can be alloy plated layer, titanium electrodeposited coating or other electrodeposition of metals.
After the completion of first time rib cutting, pin framework all exposes ground(For example, copper material).
Step S2, plating:Electroplate to form a tin layers in the outer surface of pin framework;
After the completion of first time rib cutting, one tin layers of plating formation on the pin framework for expose ground, in favor of follow-up pipe
The welding of pin and PCB printed circuit boards.
After the completion of to be electroplated, the tin layers are toasted.
Step S3, second of rib cutting:Cut-out second connects muscle, after cutting second company's muscle, distinguishes at the rib cutting of each pin both sides
The second projection is formed, a groove is formed between the first projection and the second projection, the coverage of the tin layers is from the recessed of pin
Start at groove to close to the pin part in slide glass area.
During second of rib cutting, the position that rib cutting starts connects at muscle for second, and rib cutting direction is to be connected from second at muscle to remote
From the cutting in the direction in slide glass area, therefore, the tin layers more than second company's muscle are not cut off, i.e. from the groove of pin
Place starts to remain with tin layers to the pin part close to slide glass area.On the other hand, also just because of since groove to close
The pin part in slide glass area remains with tin layers so that when pin and PCB printed circuit boards are welded, can effectively avoid pin
Exposed ground(For example, copper material)Directly welded with scolding tin, and then avoid causing weldability because of copper material and scolding tin poor compatibility
Can be poor the problem of.And the tin layers of the present utility model being retained on pin can be merged effectively with scolding tin, and then improve welding
Performance.
Semiconductor encapsulation device of the present utility model by forming by a two raised and groove types respectively in the both sides of pin
Into square-wave-shaped structure so that when pin and PCB printed circuit plate welds, scolding tin by two it is raised pin in a groove, so as to
Scolding tin is fully contacted with pin, PCB printed circuit boards, and then the welding for strengthening pin and PCB printed circuit boards is strong
Degree, lift the welding performance and reliability of pin and pcb board.
Semiconductor lead frame of the present utility model pass through set first connect muscle and second connect muscle so that first connect muscle and
After second company's muscle is cut, first raised, the second raised and groove can be formed at the rib cutting of pin both sides, thereby, by this
Semiconductor encapsulation device made of semiconductor lead frame passes through the first projection and second when with PCB printed circuit plate welds
It is raised to pin scolding tin in a groove, so that scolding tin can be contacted fully with pin, PCB printed circuit boards, and then strengthen
The weld strength of pin and PCB printed circuit boards, lift the welding performance and reliability of pin and pcb board.
Semiconductor lead frame of the present utility model is by forming two raised and grooves in the both sides of pin, thereby, by this
Semiconductor encapsulation device made of semiconductor lead frame locks scolding tin when with PCB printed circuit plate welds, by two projections
Firmly in a groove, so that scolding tin can be contacted fully with pin, PCB printed circuit boards, and then pin and PCB printings are strengthened
The weld strength of circuit board, lift the welding performance and reliability of pin and pcb board.
The side that semiconductor lead frame rib cutting method of the present utility model passes through first time rib cutting, plating and second of rib cutting
Method step, make to form first raised, the second raised and groove at the rib cutting of pin both sides, thereby, by the semiconductor after the rib cutting
Semiconductor encapsulation device made of lead frame, will by the first projection and the second projection when with PCB printed circuit plate welds
Scolding tin pins in a groove so that scolding tin can be contacted fully with pin, PCB printed circuit boards, and then strengthen pin and
The weld strength of PCB printed circuit boards, lift the welding performance and reliability of pin and pcb board.Also, second of rib cutting can
Make to retain tin layers to close to the pin part in slide glass area since groove, so as to imitate the ground for avoiding pin exposed(Example
Such as, copper material)The problem of directly being welded with scolding tin, and then avoiding causing welding performance difference because of copper material and scolding tin poor compatibility.
Preferable possible embodiments of the present utility model are these are only, not limit the scope of protection of the utility model, all fortune
Changed with the equivalent structure made by the utility model specification and accompanying drawing content, be all contained in the scope of protection of the utility model
It is interior.
Claims (8)
- A kind of 1. semiconductor encapsulation device, it is characterised in that including:Package casing;Semiconductor devices, it is coated in the package casing;Pin, for being electrically connected with the semiconductor devices, the pin is exposed outside the package casing;The pin has by the two raised square-wave-shaped structures formed with a groove, institute respectively close to the both sides of the package casing State length direction of the raised and described groove along the pin to be arranged alternately successively, the pin is carried out with PCB printed circuit boards During welding, scolding tin will be converged in the groove.
- 2. semiconductor encapsulation device according to claim 1, it is characterised in that insert PCB printed circuits in the pin After plate, the PCB printed circuit boards are stuck between two projection so that one of projection is located at the PCB printed circuits Plate upper surface, another projection are located at the lower surface of the PCB printed circuit boards.
- 3. semiconductor encapsulation device according to claim 1, it is characterised in that the width dimensions of the pin are 0.7mm- 0.9mm, the raised height are 0.075mm-0.1mm.
- 4. semiconductor encapsulation device according to claim 1, it is characterised in that the outer surface of the pin is coated with tin Layer.
- 5. semiconductor encapsulation device according to claim 4, it is characterised in that the coverage of the tin layers is from described The groove of pin starts to extend close to the pin part of the package casing.
- A kind of 6. semiconductor lead frame, it is characterised in that including:An at least radiating area;An at least slide glass area, for mounting semiconductor, the slide glass area connects the radiating area;An at least pin framework, the pin framework include corner framework, multiple pins in the corner framework and Connect the first of each pin and connect muscle, second company's muscle, described first connects muscle close to the slide glass area, and described second connects muscle positioned at described First connects side of the muscle away from the slide glass area;After first company muscle is cut off, the first projection is formed at the rib cutting of each pin both sides respectively, second company muscle is cut Have no progeny, formed respectively second raised at the rib cutting of each pin both sides, the described first raised and described second projection is along the pin Length direction be arranged at intervals, and a groove is formed between first raised and described second projection, first raised, described the Two raised and described grooves form square-wave-shaped structure.
- 7. the framework of semiconductor devices according to claim 6, it is characterised in that described first, which connects muscle and described second, connects Pin width between muscle is 0.7mm ~ 0.9mm.
- A kind of 8. semiconductor lead frame, it is characterised in that including:Radiating area;Slide glass area, for mounting semiconductor, the slide glass area connects the radiating area;Pin, for the semiconductor devices being electrically connected in the slide glass area, the pin is close to the both sides in the slide glass area point Ju You not be by the two raised square-wave-shaped structures formed with a groove, length direction of the described raised and described groove along the pin It is arranged alternately successively, when the pin is welded with PCB printed circuit boards, scolding tin will be converged in the groove.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201720777826.8U CN206877985U (en) | 2017-06-30 | 2017-06-30 | Semiconductor encapsulation device and semiconductor lead frame |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201720777826.8U CN206877985U (en) | 2017-06-30 | 2017-06-30 | Semiconductor encapsulation device and semiconductor lead frame |
Publications (1)
Publication Number | Publication Date |
---|---|
CN206877985U true CN206877985U (en) | 2018-01-12 |
Family
ID=61332168
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201720777826.8U Active CN206877985U (en) | 2017-06-30 | 2017-06-30 | Semiconductor encapsulation device and semiconductor lead frame |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN206877985U (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107275308A (en) * | 2017-06-30 | 2017-10-20 | 深圳赛意法微电子有限公司 | Semiconductor encapsulation device, semiconductor lead frame and its rib cutting method |
CN108807326A (en) * | 2018-05-02 | 2018-11-13 | 泰州友润电子科技股份有限公司 | A kind of improved overloading type 3PF lead frames |
CN109904081A (en) * | 2019-01-18 | 2019-06-18 | 深圳赛意法微电子有限公司 | The packaging method of semiconductor product based on IDF lead frame |
-
2017
- 2017-06-30 CN CN201720777826.8U patent/CN206877985U/en active Active
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107275308A (en) * | 2017-06-30 | 2017-10-20 | 深圳赛意法微电子有限公司 | Semiconductor encapsulation device, semiconductor lead frame and its rib cutting method |
CN108807326A (en) * | 2018-05-02 | 2018-11-13 | 泰州友润电子科技股份有限公司 | A kind of improved overloading type 3PF lead frames |
CN109904081A (en) * | 2019-01-18 | 2019-06-18 | 深圳赛意法微电子有限公司 | The packaging method of semiconductor product based on IDF lead frame |
CN109904081B (en) * | 2019-01-18 | 2020-11-20 | 深圳赛意法微电子有限公司 | Packaging method of semiconductor product based on IDF lead frame |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN101976651B (en) | Stack semiconductor package manufacturing method | |
CN101834166B (en) | Leadless integrated circuit package having standoff contacts and die attach pad | |
CN101843181B (en) | Part built-in wiring board, and manufacturing method for the part built-in wiring board | |
CN102067310B (en) | Stacking of wafer-level chip scale packages having edge contacts and manufacture method thereof | |
CN105762145B (en) | Semiconductor devices | |
JP3447961B2 (en) | Semiconductor device manufacturing method and semiconductor manufacturing apparatus | |
CN206877985U (en) | Semiconductor encapsulation device and semiconductor lead frame | |
JPH11274352A (en) | Substrate for semiconductor package and the semiconductor package, and method for manufacturing them | |
US20090140419A1 (en) | Extended plating trace in flip chip solder mask window | |
CN106057745A (en) | Semiconductor assembly with built-in stiffener and integrated dual routing circuitries and method of making the same | |
CN102842557A (en) | Stack frame and method to fabricate thereof | |
WO2007070467A2 (en) | Substrate having minimum kerf width | |
CN207338306U (en) | The encapsulated semiconductor device structure and sub-component of component is conductively connected with linkage | |
CN105304580B (en) | Semiconductor device and its manufacture method | |
CN106816416A (en) | Embedded hybrid package structure of semiconductor and preparation method thereof | |
CN107134441A (en) | Chip insertion packaging body with welding electrical contacts | |
CN106206500A (en) | Semiconductor packages | |
US8637972B2 (en) | Two-sided substrate lead connection for minimizing kerf width on a semiconductor substrate panel | |
CN100481420C (en) | Stack type chip packaging structure, chip packaging body and manufacturing method thereof | |
CN107275308A (en) | Semiconductor encapsulation device, semiconductor lead frame and its rib cutting method | |
CN109661124A (en) | A kind of IC support plate novel surface processing method | |
CN101937901B (en) | Wire substrate as well as manufacturing method and packaging structure thereof | |
CN106158796A (en) | Chip packaging structure and manufacturing method thereof | |
CN105448871B (en) | Power semiconductor and preparation method | |
CN107230640A (en) | Have radiating seat and the heat-dissipating gain-type semiconductor subassembly and its preparation method of double build-up circuitries |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
GR01 | Patent grant | ||
GR01 | Patent grant |