CN206832359U - A kind of gate quenching circuit of wide electric current input range - Google Patents
A kind of gate quenching circuit of wide electric current input range Download PDFInfo
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- CN206832359U CN206832359U CN201720748074.2U CN201720748074U CN206832359U CN 206832359 U CN206832359 U CN 206832359U CN 201720748074 U CN201720748074 U CN 201720748074U CN 206832359 U CN206832359 U CN 206832359U
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Abstract
The utility model discloses a kind of gate quenching circuit of wide electric current input range, including charging valve metal-oxide-semiconductor M2, quenching tube metal-oxide-semiconductor M1, by metal-oxide-semiconductor M3, M4, M5, M6, M7 and current source I0And 10I0The voltage comparator of composition and the control shaping circuit being made up of metal-oxide-semiconductor M8, M9, M10, M11, M12 and M13.The utility model is the gate quenching circuit based on dual threshold comparator, can adapt to the trigger current signal of Larger Dynamic scope；Antijamming capability can be increased and reduce relative charge time.
Description
Technical field
A kind of quenching circuit is the utility model is related to, belongs to field of circuit technology.
Background technology
Laser radar is a kind of active probing technique that can accurately and quickly obtain ground or air three-dimensional spatial information,
Can be used for carrying out ranging angle measurement etc., thus its in military and civilian field to being widely applied.
Imaging laser radar is divided into multiple-working mode.Scanning imagery such as using single-element detector is with using array detection
The Non-scanning mode imaging of device.Use the scanning imagery operating distance of single-element detector can be with far, but imaging rate can be by certain
Limitation；Non-scanning mode imaging laser radar using traditional large area array detector is to be based on linear APD (Avalanche Photo
Diode) principle, it can be imaged with very high speed, but need high power laser to irradiate target, so operating distance is not
Can be too remote.
When the reverse bias voltage at APD both ends is less than its avalanche breakdown voltage, APD output current and incident intensity is into just
Than that is, APD is operated in linear model；(reverse-biased is crossed when bias voltage is more than avalanche breakdown voltage), a photoproduction current-carrying
Son can trigger electrode large gain self-sustaining avalanche current, i.e. APD is operated in Geiger mode angular position digitizer.It is this fast by single photo-generated carrier
Detectable avalanche current caused by speed triggering so that APD can realize effective detection of single photon.Therefore, based on large area array Geiger
(GM) not only image taking speed is fast for APD laser radar, can constantly catch dynamic object, and can act on it is very remote away from
From, realize overlength distance be imaged.The high sensitivity APD being operated under Geiger mode angular position digitizer is referred to as single-photon avalanche diode (Single
Photo Avalanche Diode,SPAD)。
The APD detectors of large area array need supporting large area array laser radar reading circuit, and domestic laser radar is read at present
Go out circuit still based on discrete device, thus it is small, and resolution ratio and imaging rate are relatively low.Battle array APD scales reach face to face
During 64X64 pixel cell even more highs, laser radar reading circuit can only use single chip integrated method to realize.It is measured
CMOS technology realizes large area array laser radar readout circuit chip, can reduce the volume of control system, mitigate weight, reduces work(
Consumption, antijamming capability, increase reliability are improved, the high-precision time point is obtained while realizing and the high frame rate of target is captured
Resolution.
When SPAD was in it is reverse-biased when, due to the triggering of photon, SPAD can be produced from follow current.If do not take any
Braking measure, avalanche process will continue until device permanent damage.So generally after avalanche multiplication effect generation
The quick voltage for reducing SPAD both ends is needed to suppress snowslide.
The effect of SPAD quenching circuits is exactly the data signal for being quickly detected avalanche current and extracting a standard, together
When reduce below SPAD reversed bias voltage to avalanche voltage, and then avalanche current is quenched.The performance of quenching circuit directly affects spy
The entirety of examining system.
Utility model content
Limited by existing SPAD material properties and domestic manufacturing process, the electric current that single photon triggers nearly mA levels is difficult reality
It is existing；Face battle array SPAD nonuniformity is considered simultaneously, and some photon trigger currents are less than 0.1mA, thus tradition gates quenching circuit
It is difficult to or is responded within the limited time.Technical problem to be solved in the utility model is to provide a kind of wide electric current input range
Gate quenching circuit.The utility model is in order to solve existing technical problem, there is provided a kind of door based on dual threshold comparator
Quenching circuit is controlled, to adapt to the trigger current signal of Larger Dynamic scope.Wherein, gate mode be passively quenched with traditional resistance,
Control mode actively is quenched with mixing to compare, it can be such that SPAD was only worked within the of short duration time under reverse-biased pattern, because
And SPAD service life and reliability are improved, and effectively reduce device dark count rate.
In order to solve the above technical problems, the utility model provides a kind of gate quenching circuit of wide electric current input range, its
Be characterized in, including charging valve metal-oxide-semiconductor M2, quenching tube metal-oxide-semiconductor M1, by metal-oxide-semiconductor M3, M4, M5, M6, M7 and current source I0And 10I0Structure
Into voltage comparator and the control shaping circuit that is made up of metal-oxide-semiconductor M8, M9, M10, M11, M12 and M13；
Metal-oxide-semiconductor M2 and metal-oxide-semiconductor M1 drain electrode is connected to the grid of metal-oxide-semiconductor M3 in A points and voltage comparator altogether, passes through through A points
Indium post and SPAD anode connect；Metal-oxide-semiconductor M1 source electrode meets power vd D；Metal-oxide-semiconductor M2 source ground；Metal-oxide-semiconductor M2 grid connects
The output end of nor gate；Metal-oxide-semiconductor M1 grid connects B points, while is connected to the drain electrode of metal-oxide-semiconductor M11 in control shaping circuit；
Metal-oxide-semiconductor M3 source electrode, metal-oxide-semiconductor M4 source electrode are connected to current source 10I altogether in voltage comparator0Output end, metal-oxide-semiconductor
M3 drain electrode is connected to metal-oxide-semiconductor M5 drain electrode and metal-oxide-semiconductor M7 grid simultaneously, and metal-oxide-semiconductor M4 drain electrode is connected to metal-oxide-semiconductor M6 leakage
Pole and grid, metal-oxide-semiconductor M4 grid connect reference voltage Vref；The grid of metal-oxide-semiconductor M5 grid and metal-oxide-semiconductor M6 connects altogether, metal-oxide-semiconductor M5
Source electrode, metal-oxide-semiconductor M6 source electrode, metal-oxide-semiconductor M7 source grounding；Metal-oxide-semiconductor M7 drain electrode connects current source I simultaneously0Output
End and the grid of metal-oxide-semiconductor M9, M10 in control shaping circuit；Current source I0And 10I0Input be connected to power supply ADD；
Metal-oxide-semiconductor M9, M10 drain electrode are connected to B points, metal-oxide-semiconductor M12, M13 grid and metal-oxide-semiconductor M11 altogether in control shaping circuit
Drain electrode；Metal-oxide-semiconductor M11 grid connects inverter output；Metal-oxide-semiconductor M10, M11, M13 source electrode meet power supply ADD；Metal-oxide-semiconductor M9's
Source electrode is connected with metal-oxide-semiconductor M8 drain electrode, and metal-oxide-semiconductor M8 source ground, metal-oxide-semiconductor M8 grid connects inverter output；Metal-oxide-semiconductor
M12, M13 drain electrode are linked as the output STOP of quenching circuit altogether；Metal-oxide-semiconductor M12 source ground.
The inverter input connects ARM signals, is exported by phase inverterSignal；Export STOP andSignal
By nor gate control charging valve M2 grid voltage.
Reference voltage Vref is produced by resistance R1, R2, R3 and metal-oxide-semiconductor M14, M15, M16, M17.
Resistance R1, R2, R3 are sequentially connected between power vd D and ground；Resistance R1, R2 common contact simultaneously with metal-oxide-semiconductor M14
Drain electrode, metal-oxide-semiconductor M15 source electrode is connected；The drain electrode with metal-oxide-semiconductor M16 simultaneously of resistance R2, R3 common contact, metal-oxide-semiconductor M17 source
Extremely it is connected；Metal-oxide-semiconductor M15, M16 grid are connected to inverter input altogether；Metal-oxide-semiconductor M14, M17 grid are all connected with being connected to anti-phase
Device output end；Metal-oxide-semiconductor M14 source electrode, metal-oxide-semiconductor M15 drain electrode, the drain electrode of metal-oxide-semiconductor M16 source electrode, metal-oxide-semiconductor M17 connect output altogether
Reference voltage Vref.
Current source 0.1I is also associated between A points and ground0。
SPAD charged to reverse-biased period as high relatively threshold value mode, preparation detection and quenching stage after charging terminates
For low relatively threshold value mode.
SPAD anode is connected by indium post with the A points in quenching circuit, the SPAD external reversed bias voltage of negative electrode.
Timing stopping marks of the output STOP of quenching circuit as timing circuit, timing circuit is with external signal START
The mark that starts as timing of rising edge.
The beneficial effect that the utility model is reached：
The utility model is the gate quenching circuit based on dual threshold comparator, can adapt to the triggering electricity of Larger Dynamic scope
Flow signal；Antijamming capability can be increased and reduce relative charge time.Gate quenching circuit of the present utility model fills in SPAD
Electricity to excessively reverse-biased period is high relatively threshold value mode, to increase antijamming capability and reduce relative charge time；Terminate in charging
Preparation detection and quenching stage afterwards is low relatively threshold value mode, to reduce avalanche current triggering difficulty.The electricity that SPAD is changed out
Stream very it is faint also can trigger comparator overturn so that reduce SPAD reversed bias voltage avalanche current is quenched.
Brief description of the drawings
Fig. 1 quenching circuits of the present utility model；
The timing diagram of Fig. 2 quenching circuits.
Embodiment
The utility model is further described below in conjunction with the accompanying drawings.Following examples are only used for clearly illustrating this
The technical scheme of utility model, and the scope of protection of the utility model can not be limited with this.
The each pixel cell of large area array laser radar includes a reading circuit unit and a corresponding SPAD detection
Device unit.Wherein, reading circuit unit is made up of quenching circuit and timing circuit.SPAD anode passes through indium post Indium
Bump is connected with quenching circuit, the SPAD external reversed bias voltage VB of negative electrode, and the output STOP of quenching circuit is timing circuit
Timing stopping mark.
Quenching circuit of the present utility model is as shown in Figure 1.
Quenching circuit forms：
(1) metal-oxide-semiconductor M2 is charging valve, and metal-oxide-semiconductor M1 is quenching tube.
(2) metal-oxide-semiconductor M3, M4, M5, M6, M7 and current source I0And 10I0Form voltage comparator.
(3) metal-oxide-semiconductor M8, M9, M10, M11, M12 and M13 forms control shaping circuit.
(4) current source 0.1I0The increased current source for the counteracting possible surface leakages of SPAD.
(5) resistance R1, R2, R3 and metal-oxide-semiconductor M14, M15, M16, M17 produce reference voltage Vref.
(6) ARM signals export by phase inverterSignal；STOP andBy nor gate control charging valve M2's
Grid voltage.
Metal-oxide-semiconductor M2 and metal-oxide-semiconductor M1 drain electrode is connected to the grid of metal-oxide-semiconductor M3 in A points and voltage comparator altogether, passes through through A points
Indium post Indium bump and SPAD anode connection；Metal-oxide-semiconductor M1 source electrode meets power vd D；Metal-oxide-semiconductor M2 source ground；MOS
Pipe M2 grid connects the output end of nor gate；Metal-oxide-semiconductor M1 grid connects B points, while is connected to metal-oxide-semiconductor in control shaping circuit
M11 drain electrode.Metal-oxide-semiconductor M3 source electrode, metal-oxide-semiconductor M4 source electrode are connected to current source 10I altogether0Output end, metal-oxide-semiconductor M3 drain electrode is same
When be connected to metal-oxide-semiconductor M5 drain electrode and metal-oxide-semiconductor M7 grid, metal-oxide-semiconductor M4 drain electrode is connected to metal-oxide-semiconductor M6 drain electrode and grid,
Metal-oxide-semiconductor M4 grid connects reference voltage Vref.The grid of metal-oxide-semiconductor M5 grid and metal-oxide-semiconductor M6 connects altogether, metal-oxide-semiconductor M5 source electrode,
Metal-oxide-semiconductor M6 source electrode, metal-oxide-semiconductor M7 source grounding.Metal-oxide-semiconductor M7 drain electrode connects current source I simultaneously0Output end and control
Metal-oxide-semiconductor M9, M10 grid in shaping circuit.Current source I0And 10I0Input be connected to power supply ADD.Control shaping circuit
Middle metal-oxide-semiconductor M9, M10 drain electrode are connected to the drain electrode of B points, metal-oxide-semiconductor M12, M13 grid and metal-oxide-semiconductor M11 altogether.Metal-oxide-semiconductor M11 grid
Pole connects inverter outputSignal.Metal-oxide-semiconductor M10, M11, M13 source electrode meet power supply ADD.Metal-oxide-semiconductor M9 source electrode and MOS
Pipe M8 drain electrode connection, metal-oxide-semiconductor M8 source ground, metal-oxide-semiconductor M8 grid connect inverter outputSignal.Metal-oxide-semiconductor
M12, M13 drain electrode are linked as the output STOP of quenching circuit altogether.Metal-oxide-semiconductor M12 source ground.
Be sequentially connected resistance R1, R2, R3 between power vd D and ground, resistance R1, R2 common contact simultaneously with metal-oxide-semiconductor M14
Drain electrode, metal-oxide-semiconductor M15 source electrode be connected, the drain electrode with metal-oxide-semiconductor M16 simultaneously of resistance R2, R3 common contact, metal-oxide-semiconductor M17 source
Extremely it is connected, metal-oxide-semiconductor M15, M16 grid are connected to the ARM signals of inverter input altogether, and metal-oxide-semiconductor M14, M17 grid are all connected with
It is connected to inverter outputSignal；Metal-oxide-semiconductor M14 source electrode, metal-oxide-semiconductor M15 drain electrode, metal-oxide-semiconductor M16 source electrode, MOS
Pipe M17 drain electrode connects output reference voltage Vref altogether.
Current source 0.1I is also associated between A points and ground0。
With reference to Fig. 2, when external signal START rising edge arrives, timing starts.ARM rising edge follows that START's is upper
Edge is risen, ARM is that high level continues only to need for 1 nanosecond.
START is height, and timing starts, and ARM is raised, the duration is several nanoseconds immediately after START is height.ARM is
During height, circuit charges to SPAD, is at inclined state.ARM from high to low after, SPAD charging terminates, in prepare visit
The survey stage.When photon arrives and is converted to certain current signal by SPAD, the output STOP of quenching circuit is uprised by low, directly
It is low to START.
The mark that timing circuit is started with START rising edge as timing, stopped with STOP rising edge as timing
Mark, then corresponding distance is the distance value of target between START rising edge and STOP rising edge.
Detailed operation is as follows：
(1) ARM=1, SPAD chargings are worked as.
ARM=1, M2 grid voltage are height, and A point voltages are pulled to ground, and SPAD was in reverse-biased, and its reversed bias voltage is VB
(VB>0)；The reference threshold level of voltage comparator isBecause C points current potential is high, B point current potentials
For height, quenching tube M1 grid voltage is height, thus M1 is turned off.Because threshold level now is higher.Circuit is in extremely short charging
In, even if A points are not pulled to 0 current potential, voltage comparator will not also malfunction, equivalent to reducing the charging interval.
(2) work as ARM=0, prepare detection.
ARM=0, M2 grid voltage are low, M2 shut-offs；M8 is turned on, M11 shut-offs.The reference threshold level drop of voltage comparator
ForM1 is turned off.Because A points are high-impedance state, and surface must be had by being in reverse-biased SPAD
Leakage current.Increase 0.1I0Current source offsets this electric leakage, to prevent the rise of A points voltage from malfunction voltage comparator, enters
And improve the reliability of circuit work.
(3) photon is triggered and is quenched.
Avalanche current is produced when photon arrives, electric current charges to node A, until A point voltages are more than
Voltage comparator is overturn, and C point voltages are turned on by high step-down, B point voltages by high step-down, quenching tube M1, pull-up A points to VDD,
SPAD reversed bias voltage is down to VB-VDD, the appropriate size for selecting VDD, the avalanche breakdown voltage for making VB-VDD be less than SPAD, i.e.,
SPAD avalanche conditions are quenched；Meanwhile STOP is uprised by low, mark timing terminates.
When timing terminates, START=0, detection is completed.Until the next photon detection of system reset progress, then repeat above-mentioned
Process.
Described above is only preferred embodiment of the present utility model, it is noted that for the common skill of the art
For art personnel, on the premise of the utility model technical principle is not departed from, some improvement and deformation can also be made, these change
Enter and deform and also should be regarded as the scope of protection of the utility model.
Claims (8)
1. a kind of gate quenching circuit of wide electric current input range, it is characterized in that, including charging valve metal-oxide-semiconductor M2, quenching tube metal-oxide-semiconductor
M1, by metal-oxide-semiconductor M3, M4, M5, M6, M7 and current source I0And 10I0The voltage comparator of composition and by metal-oxide-semiconductor M8, M9, M10,
The control shaping circuit that M11, M12 and M13 are formed；
Metal-oxide-semiconductor M2 and metal-oxide-semiconductor M1 drain electrode is connected to the grid of metal-oxide-semiconductor M3 in A points and voltage comparator altogether, passes through indium post through A points
It is connected with SPAD；Metal-oxide-semiconductor M1 source electrode meets power vd D；Metal-oxide-semiconductor M2 source ground；Metal-oxide-semiconductor M2 grid connects the defeated of nor gate
Go out end；Metal-oxide-semiconductor M1 grid connects B points, while is connected to the drain electrode of metal-oxide-semiconductor M11 in control shaping circuit；
Metal-oxide-semiconductor M3 source electrode, metal-oxide-semiconductor M4 source electrode are connected to current source 10I altogether in voltage comparator0Output end, metal-oxide-semiconductor M3's
Drain electrode is connected to metal-oxide-semiconductor M5 drain electrode and metal-oxide-semiconductor M7 grid simultaneously, metal-oxide-semiconductor M4 drain electrode be connected to metal-oxide-semiconductor M6 drain electrode and
Grid, metal-oxide-semiconductor M4 grid connect reference voltage Vref；The grid of metal-oxide-semiconductor M5 grid and metal-oxide-semiconductor M6 connects altogether, metal-oxide-semiconductor M5 source
Pole, metal-oxide-semiconductor M6 source electrode, metal-oxide-semiconductor M7 source grounding；Metal-oxide-semiconductor M7 drain electrode connects current source I simultaneously0Output end with
Control the grid of metal-oxide-semiconductor M9, M10 in shaping circuit；Current source I0And 10I0Input be connected to power supply ADD；
Metal-oxide-semiconductor M9, M10 drain electrode are connected to the leakage of B points, metal-oxide-semiconductor M12, M13 grid and metal-oxide-semiconductor M11 altogether in control shaping circuit
Pole；Metal-oxide-semiconductor M11 grid connects inverter output；Metal-oxide-semiconductor M10, M11, M13 source electrode meet power supply ADD；Metal-oxide-semiconductor M9 source electrode
Drain electrode with metal-oxide-semiconductor M8 is connected, and metal-oxide-semiconductor M8 source ground, metal-oxide-semiconductor M8 grid connects inverter output；Metal-oxide-semiconductor M12,
M13 drain electrode is linked as the output STOP of quenching circuit altogether；Metal-oxide-semiconductor M12 source ground.
2. a kind of gate quenching circuit of wide electric current input range according to claim 1, it is characterized in that, the phase inverter
Input termination ARM signals, are exported by phase inverterSignal；Export STOP andSignal is by nor gate control charging valve
M2 grid voltage.
3. a kind of gate quenching circuit of wide electric current input range according to claim 1, it is characterized in that, reference voltage
Vref is produced by resistance R1, R2, R3 and metal-oxide-semiconductor M14, M15, M16, M17.
4. a kind of gate quenching circuit of wide electric current input range according to claim 3, it is characterized in that, in power vd D
Resistance R1, R2, R3 are sequentially connected between ground；Resistance R1, R2 common contact drain electrode with metal-oxide-semiconductor M14 simultaneously, metal-oxide-semiconductor M15
Source electrode is connected；Resistance R2, R3 common contact are connected with metal-oxide-semiconductor M16 drain electrode, metal-oxide-semiconductor M17 source electrode simultaneously；Metal-oxide-semiconductor M15,
M16 grid is connected to inverter input altogether；Metal-oxide-semiconductor M14, M17 grid are all connected with being connected to inverter output；Metal-oxide-semiconductor M14
Source electrode, metal-oxide-semiconductor M15 drain electrode, the drain electrode of metal-oxide-semiconductor M16 source electrode, metal-oxide-semiconductor M17 connect output reference voltage Vref altogether.
5. a kind of gate quenching circuit of wide electric current input range according to claim 1, it is characterized in that, in A points and ground
Between be also associated with current source 0.1I0。
6. a kind of gate quenching circuit of wide electric current input range according to claim 1, it is characterized in that, SPAD is charged to
Reverse-biased period is spent as high relatively threshold value mode, preparation detection and quenching stage after charging terminates are low relatively threshold value mode.
7. a kind of gate quenching circuit of wide electric current input range according to claim 1, it is characterized in that, SPAD anode
It is connected by indium post with the A points in quenching circuit, the SPAD external reversed bias voltage of negative electrode.
8. a kind of gate quenching circuit of wide electric current input range according to claim 1, it is characterized in that, quenching circuit
Timing stopping marks of the STOP as timing circuit is exported, timing circuit is opened with external signal START rising edge as timing
The mark of beginning.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201720748074.2U CN206832359U (en) | 2017-06-26 | 2017-06-26 | A kind of gate quenching circuit of wide electric current input range |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201720748074.2U CN206832359U (en) | 2017-06-26 | 2017-06-26 | A kind of gate quenching circuit of wide electric current input range |
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| CN206832359U true CN206832359U (en) | 2018-01-02 |
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| CN201720748074.2U Expired - Fee Related CN206832359U (en) | 2017-06-26 | 2017-06-26 | A kind of gate quenching circuit of wide electric current input range |
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