CN205643697U - High -speed narrow pulse current amplifier based on CMOS technology - Google Patents
High -speed narrow pulse current amplifier based on CMOS technology Download PDFInfo
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- CN205643697U CN205643697U CN201620440560.3U CN201620440560U CN205643697U CN 205643697 U CN205643697 U CN 205643697U CN 201620440560 U CN201620440560 U CN 201620440560U CN 205643697 U CN205643697 U CN 205643697U
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Abstract
The utility model discloses a high -speed narrow pulse current amplifier based on CMOS technology, including the current input amplifier stage, from bias current source load, the first order from offset voltage amplifier, second level auto bias amplifier and shaping circuit, the current input amplifier stage is by the output impedance who improves the current input amplifier stage from the load of bias current source, is transformed into voltage signal to the electric current of APD detector unit output, enlargies from offset voltage amplifier and second level auto bias amplifier through the first order, carries out the plastic by shaping circuit again, and messenger output voltage STOP reaches digital pulse, power VCC supplies power for the current input amplifier stage through low pass filter circuit post -filter. The utility model discloses a current amplifier can set up and be used for leading current amplification in big area array laser radar pixel, can improve the output impedance of input amplifier stage, and then improves the gain of little signal voltage, need not extra bias circuit simultaneously, reduced the consumption, reduce pixel's area.
Description
Technical field
This utility model relates to a kind of current amplifier, belongs to technical field of integrated circuits.
Background technology
Laser radar is a kind of active probe skill that can obtain ground or air three-dimensional spatial information accurately, rapidly
Art, can be used to carry out to find range and degree of testing the speed etc., in military field to being widely applied.
Laser thunder operation principle is: laser pulse launched by laser radar, scans target, is received target by radar simultaneously
Echo-signal, laser echo signal is changed through optical-electrical converter and is amplified into timing circuit, measuring echo optical signal
The time of advent.The most each pixel cell provides distance value respectively, eventually passes computer disposal and obtains the range information of target, as
Fig. 1.
Compared with traditional surface sweeping imaging Laser thunder, large area array three-dimensional imaging laser radar does not has Scan Architecture, profile chi
Very little little, it is possible to capture target each point, frame frequency will not be limited by measuring distance, it is achieved that pulse constitutes one simultaneously
The 3D rendering that width is complete, substantially increases image taking speed.Thus it is especially suitable for becoming the instrument of captured in real time three-dimensional information, it is mesh
One important directions of front laser radar range imaging.Avalanche diode (APD) detector of large area array needs supporting large area array
Laser radar reading circuit.
Domestic laser radar signal reading circuit, still based on discrete device, uses High-speed Electric stream amplifier, high ratio
Relatively device chip coordinates high precision time interval measurement chip, and therefore scale is not very big, and resolution is relatively low.Battle array APD scale face to face
Reach 32x32 pixel cell, 64x64 pixel cell the highest time, laser radar reading circuit can only use single chip integrated
Method realizes.Use large scale integrated circuit technology to realize laser radar readout circuit chip, the body of control system can be reduced
Amass, alleviate weight, reduce power consumption, improve capacity of resisting disturbance, increase the advantage such as motility of reliability and use, have and weight
The practical significance wanted.
As in figure 2 it is shown, large area array laser radar pixel cell includes that a reading circuit unit and a corresponding APD visit
Survey device unit.Wherein reading circuit unit is made up of preposition current amplifier and timing circuit.
Return laser beam generally only has several nanoseconds, therefore it is required that the preposition current amplifier of reading circuit has big band
Wide；Meanwhile, timing circuit can only process digital signal, and when the reversed bias voltage of APD is less than its breakdown voltage, APD is in linearly
Amplification region, its maximum current gain is only in hundreds of left and right.This just requires that follow-up preposition current amplifier provides enough gains,
Output voltage STOP is made to reach digit pulse degree.
Utility model content
Technical problem to be solved in the utility model is to provide a kind of high-speed narrow pulse electric current based on CMOS technology and puts
Big device, improves the output impedance of input amplifier stage, and then improves small signal gain；Simultaneously without extra biasing circuit,
Reduce power consumption, reduce the area of pixel cell.
For solving above-mentioned technical problem, this utility model provides a kind of high-speed narrow pulse Current amplifier based on CMOS technology
Device, is characterized in that, inputs amplifier stage, self-bias current source load, first order self-bias voltage amplifier, the second level including electric current
Self biased amplifier and shaping circuit；
Electric current input amplifier stage is improved the output impedance of electric current input amplifier stage by self-bias current source load, and APD is visited
The electric current surveying the output of device unit is transformed into voltage signal, through first order self-bias voltage amplifier and second level self biased amplifier
It is amplified, then is carried out shaping by shaping circuit, make output voltage STOP reach digit pulse；
Power for electric current input amplifier stage after the low-pass filtered circuit filtering of power supply VCC.
Electric current input amplifier stage is made up of the first resistance, the second resistance, the first metal-oxide-semiconductor and the second metal-oxide-semiconductor；
First metal-oxide-semiconductor drains through the second resistance eutral grounding；The grid of the first metal-oxide-semiconductor respectively with the source electrode of the second metal-oxide-semiconductor, first
Resistance one end connects；Source electrode and the first resistance other end of the first metal-oxide-semiconductor are connected to low-pass filter circuit altogether；The grid of the second metal-oxide-semiconductor
Pole is connected to the common contact of the first metal-oxide-semiconductor drain electrode and the second resistance, and the drain electrode of the second metal-oxide-semiconductor is connected to self-bias current source and bears
Carry.
Self-bias current source load is made up of the 3rd metal-oxide-semiconductor, the 3rd resistance and the 6th metal-oxide-semiconductor；
3rd metal-oxide-semiconductor drain electrode and the 3rd resistance one end are connected to electric current input amplifier stage altogether, first order self-bias voltage amplifies
Device, the 3rd metal-oxide-semiconductor source ground, the 3rd metal-oxide-semiconductor grid and the 6th metal-oxide-semiconductor grid, the 3rd resistance other end connect altogether；6th MOS
Pipe source electrode, drain equal ground connection.
First order self-bias voltage amplifier is made up of the 4th metal-oxide-semiconductor, the 5th metal-oxide-semiconductor, the 4th resistance and the 9th metal-oxide-semiconductor；
4th metal-oxide-semiconductor grid is connected to self-bias current source load；4th metal-oxide-semiconductor source ground, the 4th metal-oxide-semiconductor drain electrode is even
It is connected to the 5th metal-oxide-semiconductor drain electrode, the 4th resistance one end and the common contact of second level self biased amplifier；5th metal-oxide-semiconductor source electrode connects electricity
Source VCC；5th metal-oxide-semiconductor grid, the 4th resistance other end are connected to the 9th metal-oxide-semiconductor grid altogether；9th metal-oxide-semiconductor source electrode, drain electrode all connect
It is connected to power supply VCC.
Second level self biased amplifier is by the 7th metal-oxide-semiconductor, the 8th metal-oxide-semiconductor, the 5th resistance R5Constitute with the 12nd metal-oxide-semiconductor；
7th metal-oxide-semiconductor grid is connected to first order self-bias voltage amplifier, and the 7th metal-oxide-semiconductor source electrode is connected to power supply VCC,
7th metal-oxide-semiconductor drain electrode is connected to the 8th metal-oxide-semiconductor, the 5th resistance one end and the common contact of phase inverter；8th metal-oxide-semiconductor source ground,
8th metal-oxide-semiconductor grid, the 5th resistance other end and the 12nd metal-oxide-semiconductor grid connect altogether；12nd metal-oxide-semiconductor source electrode, grounded drain.
Described shaping circuit is phase inverter or comparator.
Phase inverter is made up of the tenth metal-oxide-semiconductor and the 11st metal-oxide-semiconductor, the 14th metal-oxide-semiconductor and the 13rd metal-oxide-semiconductor；
Tenth metal-oxide-semiconductor grid, the 11st metal-oxide-semiconductor grid are connected to second level self biased amplifier altogether；Tenth metal-oxide-semiconductor drain electrode,
11st metal-oxide-semiconductor drain electrode connects altogether with the 14th metal-oxide-semiconductor grid, the 13rd metal-oxide-semiconductor grid；Tenth metal-oxide-semiconductor source electrode meets power supply VCC,
11st metal-oxide-semiconductor source ground；14th metal-oxide-semiconductor drain electrode, the 13rd metal-oxide-semiconductor drain electrode continuous cropping altogether are output voltage STOP；Tenth
Four metal-oxide-semiconductor source electrodes connect power supply VCC, the 13rd metal-oxide-semiconductor source ground.
Low-pass filter circuit is made up of the 0th metal-oxide-semiconductor, zero resistance and the 15th metal-oxide-semiconductor；
0th metal-oxide-semiconductor drain electrode is connected to power supply VCC, and the 0th metal-oxide-semiconductor source electrode is connected to electric current input amplifier stage, the 0th MOS
Tube grid connects altogether with zero resistance, the 15th metal-oxide-semiconductor grid；15th metal-oxide-semiconductor source electrode, grounded drain.
The beneficial effect that this utility model is reached:
Disclosed in this utility model, a kind of high-speed narrow pulse current amplifier based on CMOS technology, may be disposed at large area array
For preposition Current amplifier in laser radar pixel cell, the output impedance of input amplifier stage can be improved, and then improve small-signal
Voltage gain；Simultaneously without extra biasing circuit, reduce power consumption, reduce the area of pixel cell.
Accompanying drawing explanation
Fig. 1 is laser radar range imaging schematic diagram in prior art；
Fig. 2 pixel cell；
The preposition current amplifier of Fig. 3 this utility model；
Fig. 4 input current and the corresponding relation of output voltage.
Detailed description of the invention
Below in conjunction with the accompanying drawings this utility model is further described.Following example are only used for this is clearly described
The technical scheme of utility model, and protection domain of the present utility model can not be limited with this.
High-speed narrow pulse current amplifier based on CMOS technology of the present utility model is as it is shown on figure 3, the output electric current of APD
Including photoelectric current and dark current, it acts on current amplifier circuit metal-oxide-semiconductor M2Source electrode.The narrow arteries and veins of high speed based on CMOS technology
Rush current amplifier and include that electric current inputs amplifier stage, self-bias current source load, first order self-bias voltage amplifier, the second level
Self biased amplifier and phase inverter.Electric current input amplifier stage is improved the output of electric current input amplifier stage by self-bias current source load
Impedance, is transformed into voltage signal, through first order self-bias voltage amplifier and the second level the electric current of APD detector cells output
Self biased amplifier is amplified, then is carried out shaping by shaping circuits such as phase inverters, makes output voltage STOP reach digit pulse
Degree.Power for electric current input amplifier stage after the low-pass filtered circuit filtering of power supply VCC.
The electric current input amplifier stage of circuit is by resistance R1、R2, metal-oxide-semiconductor M1And M2Composition.Metal-oxide-semiconductor M1Drain electrode is through resistance R2Connect
Ground；Metal-oxide-semiconductor M1Grid respectively with metal-oxide-semiconductor M2Source electrode, resistance R1 one end connect；Metal-oxide-semiconductor M1Source electrode and the resistance R1 other end
It is connected to low-pass filter circuit altogether.Metal-oxide-semiconductor M2Grid be connected to metal-oxide-semiconductor M1Drain electrode and resistance R2Common contact, metal-oxide-semiconductor M2Leakage
Pole is connected to self-bias current source load.Wherein, metal-oxide-semiconductor M1And R2The negative feedback constituted improves metal-oxide-semiconductor M2Source voltage steady
Qualitative, reduce the dark current impact on amp DC operating point；Also reduce metal-oxide-semiconductor M simultaneously2The impedance of source class, and then
Metal-oxide-semiconductor M2The limit of source class pushes high frequency to, reduces the impact on current amplifier bandwidth of the APD diode parasitic capacitance.
Metal-oxide-semiconductor M3, resistance R3With metal-oxide-semiconductor M6Constitute self-bias current source load, improve the output impedance of input amplifier stage,
And then improve small signal gain.Simultaneously without extra biasing circuit, reduce power consumption, reduce the area of pixel cell.
Metal-oxide-semiconductor M3Drain electrode and resistance R3One end is connected to electric current input amplifier stage, first order self-bias voltage amplifier, metal-oxide-semiconductor M altogether3Source electrode
Ground connection, metal-oxide-semiconductor M3Grid and metal-oxide-semiconductor M6Grid, resistance R3The other end connects altogether.Metal-oxide-semiconductor M6Source electrode, drain equal ground connection.
From metal-oxide-semiconductor M2Drain electrode to ground output impedance be:
(1)
Wherein, gm3And CGS3It is metal-oxide-semiconductor M respectively3Mutual conductance and gate-source capacitance；CGS6And CGD6It is metal-oxide-semiconductor M respectively6Grid source
Electric capacity and gate leakage capacitance；R3It is resistance R3Resistance.
Know from formula (1), increase resistance R3, reduce metal-oxide-semiconductor M3Mutual conductance and increase metal-oxide-semiconductor M6Gate-source capacitance and grid leak
Electric capacity all can increase output impedance, and then improves the gain of input stage.
Metal-oxide-semiconductor M4、M5, resistance R4With metal-oxide-semiconductor M9Constitute first order self-bias voltage amplifier, amplify electric current input and amplify
The voltage signal of level output；In like manner, metal-oxide-semiconductor M7、M8, resistance R5With metal-oxide-semiconductor M12Constitute second level self biased amplifier, further
Amplify voltage signal.In first order self-bias voltage amplifier, metal-oxide-semiconductor M4Grid is connected to self-bias current source load；Metal-oxide-semiconductor
M4Source ground, metal-oxide-semiconductor M4Drain electrode is connected to metal-oxide-semiconductor M5Drain electrode, resistance R4Connecing altogether of one end and second level self biased amplifier
Point.Metal-oxide-semiconductor M5Source electrode meets power supply VCC；Metal-oxide-semiconductor M5Grid, the resistance R4 other end are connected to metal-oxide-semiconductor M altogether9Grid.Metal-oxide-semiconductor M9Source electrode,
Drain electrode is connected to power supply VCC.In the self biased amplifier of the second level, metal-oxide-semiconductor M7Grid is connected to first order self-bias voltage and puts
Big device, metal-oxide-semiconductor M7Source electrode is connected to power supply VCC, metal-oxide-semiconductor M7Drain electrode is connected to metal-oxide-semiconductor M8, resistance R5Being total to of one end and phase inverter
Contact.Metal-oxide-semiconductor M8Source ground, metal-oxide-semiconductor M8Grid and resistance R5The other end and metal-oxide-semiconductor M12Grid connects altogether.Metal-oxide-semiconductor M12Source electrode,
Grounded drain.
Metal-oxide-semiconductor M7The voltage of drain passes through metal-oxide-semiconductor M10And M11, metal-oxide-semiconductor M14And M13The phase inverter shaping constituted, makes output
Voltage STOP reaches digit pulse degree；Metal-oxide-semiconductor M7The voltage of drain also can be made by other voltage shaping circuit such as comparators
Output voltage STOP reaches digit pulse degree.In phase inverter, metal-oxide-semiconductor M10Grid, metal-oxide-semiconductor M11Grid is connected to the second level certainly altogether
Biased amplifier；Metal-oxide-semiconductor M10Drain electrode, metal-oxide-semiconductor M11Drain electrode and metal-oxide-semiconductor M14Grid, metal-oxide-semiconductor M13Grid connects altogether；Metal-oxide-semiconductor M10Source electrode
Meet power supply VCC, metal-oxide-semiconductor M11Source ground.Metal-oxide-semiconductor M14Drain electrode, metal-oxide-semiconductor M13Drain electrode continuous cropping altogether is output voltage STOP；Metal-oxide-semiconductor
M14Source electrode meets power supply VCC, metal-oxide-semiconductor M13Source ground.
The interference of power supply can be caused the mistake of current amplifier to respond by high-frequency count clock, and in order to obtain minimum pixel list
Elemental area, does not the most use the common mode disturbances of fully differential structure suppression power supply.Owing to the current signal of current amplifier input is micro-
Weak, and the input stage PSRR of non-fully differential is relatively low.
The power supply of electric current input amplifier stage is that power supply VCC is through metal-oxide-semiconductor M0, resistance R0, metal-oxide-semiconductor M15The low-pass filtering electricity constituted
Rood arrives, and this low-pass filter circuit simple in construction, without quiescent current.In low-pass filter circuit, metal-oxide-semiconductor M0Drain electrode is connected to power supply
VCC, metal-oxide-semiconductor M0Source electrode is connected to electric current input amplifier stage, metal-oxide-semiconductor M0Grid and resistance R0, metal-oxide-semiconductor M15Grid connects altogether.Metal-oxide-semiconductor
M15Source electrode, grounded drain.
For noise reduction process, circuit is generally operational in low temperature environment.When the temperature decreases, metal-oxide-semiconductor M1Threshold value increase, electricity
Resistance R1Electric current increase, i.e. metal-oxide-semiconductor M3Output electric current increase, formula (1) know, output impedance will reduce, and then reduce
The sensitivity of whole current amplifier.Select the resistance R with negative temperature coefficient1Suppress metal-oxide-semiconductor M3Electric current increase；In like manner,
Select the resistance R with negative temperature coefficient3R when improving low temperatureoutImpedance, improves gain.Therefore, the resistance of whole circuit
Select same type of negative temperature coefficient resister.
Fig. 4 is to input short duration current IN and the relation of output voltage STOP that pulsewidth is 5ns.Power supply VCC is 3.3V, mould
Intend electric current input and digit pulse voltage output operating lag only less than 2ns.
The above is only preferred implementation of the present utility model, it is noted that for the common skill of the art
For art personnel, on the premise of without departing from this utility model know-why, it is also possible to make some improvement and deformation, these change
Enter and deform and also should be regarded as protection domain of the present utility model.
Claims (8)
1. a high-speed narrow pulse current amplifier based on CMOS technology, is characterized in that, inputs amplifier stage, self-bias including electric current
Put current source load, first order self-bias voltage amplifier, second level self biased amplifier and shaping circuit；
Electric current input amplifier stage is improved the output impedance of electric current input amplifier stage by self-bias current source load, APD detector
The electric current of unit output is transformed into voltage signal, carries out through first order self-bias voltage amplifier and second level self biased amplifier
Amplify, then carried out shaping by shaping circuit, make output voltage STOP reach digit pulse；
Power for electric current input amplifier stage after the low-pass filtered circuit filtering of power supply VCC.
High-speed narrow pulse current amplifier based on CMOS technology the most according to claim 1, is characterized in that, electric current inputs
Amplifier stage is made up of the first resistance, the second resistance, the first metal-oxide-semiconductor and the second metal-oxide-semiconductor；
First metal-oxide-semiconductor drains through the second resistance eutral grounding；The grid of the first metal-oxide-semiconductor respectively with source electrode, first resistance of the second metal-oxide-semiconductor
One end connects；Source electrode and the first resistance other end of the first metal-oxide-semiconductor are connected to low-pass filter circuit altogether；The grid of the second metal-oxide-semiconductor is even
Being connected to the common contact of the first metal-oxide-semiconductor drain electrode and the second resistance, the drain electrode of the second metal-oxide-semiconductor is connected to self-bias current source load.
High-speed narrow pulse current amplifier based on CMOS technology the most according to claim 1, is characterized in that, automatic biasing electricity
The load of stream source is made up of the 3rd metal-oxide-semiconductor, the 3rd resistance and the 6th metal-oxide-semiconductor；
3rd metal-oxide-semiconductor drain electrode and the 3rd resistance one end are connected to electric current input amplifier stage, first order self-bias voltage amplifier altogether, the
Three metal-oxide-semiconductor source grounds, the 3rd metal-oxide-semiconductor grid and the 6th metal-oxide-semiconductor grid, the 3rd resistance other end connect altogether；6th metal-oxide-semiconductor source
Pole, drain equal ground connection.
High-speed narrow pulse current amplifier based on CMOS technology the most according to claim 1, is characterized in that, the first order is certainly
Bias voltage amplifier is made up of the 4th metal-oxide-semiconductor, the 5th metal-oxide-semiconductor, the 4th resistance and the 9th metal-oxide-semiconductor；
4th metal-oxide-semiconductor grid is connected to self-bias current source load；4th metal-oxide-semiconductor source ground, the 4th metal-oxide-semiconductor drain electrode is connected to
5th metal-oxide-semiconductor drain electrode, the 4th resistance one end and the common contact of second level self biased amplifier；5th metal-oxide-semiconductor source electrode connects power supply
VCC；5th metal-oxide-semiconductor grid, the 4th resistance other end are connected to the 9th metal-oxide-semiconductor grid altogether；9th metal-oxide-semiconductor source electrode, drain electrode are all connected with
To power supply VCC.
High-speed narrow pulse current amplifier based on CMOS technology the most according to claim 1, is characterized in that, the second level is certainly
Biased amplifier is made up of the 7th metal-oxide-semiconductor, the 8th metal-oxide-semiconductor, the 5th resistance and the 12nd metal-oxide-semiconductor；
7th metal-oxide-semiconductor grid is connected to first order self-bias voltage amplifier, and the 7th metal-oxide-semiconductor source electrode is connected to power supply VCC, and the 7th
Metal-oxide-semiconductor drain electrode is connected to the 8th metal-oxide-semiconductor, the 5th resistance one end and the common contact of phase inverter；8th metal-oxide-semiconductor source ground, the 8th
Metal-oxide-semiconductor grid, the 5th resistance other end and the 12nd metal-oxide-semiconductor grid connect altogether；12nd metal-oxide-semiconductor source electrode, grounded drain.
High-speed narrow pulse current amplifier based on CMOS technology the most according to claim 1, is characterized in that, described shaping
Circuit is phase inverter or comparator.
High-speed narrow pulse current amplifier based on CMOS technology the most according to claim 1, is characterized in that, phase inverter by
Tenth metal-oxide-semiconductor and the 11st metal-oxide-semiconductor, the 14th metal-oxide-semiconductor and the 13rd metal-oxide-semiconductor are constituted；
Tenth metal-oxide-semiconductor grid, the 11st metal-oxide-semiconductor grid are connected to second level self biased amplifier altogether；Tenth metal-oxide-semiconductor drain electrode, the tenth
One metal-oxide-semiconductor drain electrode connects altogether with the 14th metal-oxide-semiconductor grid, the 13rd metal-oxide-semiconductor grid；Tenth metal-oxide-semiconductor source electrode meets power supply VCC, and the tenth
One metal-oxide-semiconductor source ground；14th metal-oxide-semiconductor drain electrode, the 13rd metal-oxide-semiconductor drain electrode continuous cropping altogether are output voltage STOP；14th MOS
Pipe source electrode connects power supply VCC, the 13rd metal-oxide-semiconductor source ground.
High-speed narrow pulse current amplifier based on CMOS technology the most according to claim 1, is characterized in that, low-pass filtering
Circuit is made up of the 0th metal-oxide-semiconductor, zero resistance and the 15th metal-oxide-semiconductor；
0th metal-oxide-semiconductor drain electrode is connected to power supply VCC, and the 0th metal-oxide-semiconductor source electrode is connected to electric current input amplifier stage, the 0th metal-oxide-semiconductor grid
Pole connects altogether with zero resistance, the 15th metal-oxide-semiconductor grid；15th metal-oxide-semiconductor source electrode, grounded drain.
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| CN201620440560.3U CN205643697U (en) | 2016-05-16 | 2016-05-16 | High -speed narrow pulse current amplifier based on CMOS technology |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105974395A (en) * | 2016-05-16 | 2016-09-28 | 中国兵器工业集团第二四研究所苏州研发中心 | High-speed narrow pulse current amplifier based on CMOS technology |
| CN112255618A (en) * | 2020-09-29 | 2021-01-22 | 中国兵器工业集团第二一四研究所苏州研发中心 | Pixel-level time discrimination circuit |
-
2016
- 2016-05-16 CN CN201620440560.3U patent/CN205643697U/en active Active
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105974395A (en) * | 2016-05-16 | 2016-09-28 | 中国兵器工业集团第二四研究所苏州研发中心 | High-speed narrow pulse current amplifier based on CMOS technology |
| CN112255618A (en) * | 2020-09-29 | 2021-01-22 | 中国兵器工业集团第二一四研究所苏州研发中心 | Pixel-level time discrimination circuit |
| CN112255618B (en) * | 2020-09-29 | 2024-01-05 | 中国兵器工业集团第二一四研究所苏州研发中心 | Pixel-level moment identification circuit |
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