CN206818787U - A kind of zero cross detection circuit for synchronous buck code converter - Google Patents

A kind of zero cross detection circuit for synchronous buck code converter Download PDF

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Publication number
CN206818787U
CN206818787U CN201720775825.XU CN201720775825U CN206818787U CN 206818787 U CN206818787 U CN 206818787U CN 201720775825 U CN201720775825 U CN 201720775825U CN 206818787 U CN206818787 U CN 206818787U
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triode
npn triode
code converter
nmos tube
synchronous buck
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CN201720775825.XU
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Chinese (zh)
Inventor
许超群
易俊
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Tuoer Microelectronics Co ltd
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British Harvest (xiamen) Micro Electronics Technology Co Ltd
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Abstract

Buck convertor field is the utility model is related to, particularly a kind of zero cross detection circuit for synchronous buck code converter.The utility model discloses a kind of zero cross detection circuit for synchronous buck code converter, including zero-crossing comparator and multiplier, two inputs of the zero-crossing comparator connect the drain electrode of the output end of multiplier and the lock-in tube of synchronous buck code converter respectively, the input of the drive circuit of the output termination synchronous buck code converter of the zero-crossing comparator, the first input end of the multiplier connects the voltage output end of synchronous buck code converter, the second input termination positive temperature coefficient current source of the multiplier.The utility model has taken into full account temperature and set the output voltage deviation to caused by zero-crossing examination in synchronous buck code converter, improves the accuracy of zero passage detection.

Description

A kind of zero cross detection circuit for synchronous buck code converter
Technical field
The utility model belongs to buck convertor field, more particularly to a kind of mistake for synchronous buck code converter Zero detection circuit.
Background technology
In recent years, as the development of China's economic and the rise of electronics industry, consumer electronics product are particularly portable The features such as quick popularization of electronic equipment causes power technology to be intended to high-power, high energy efficiency, high integration.DC converter by It is widely applied in high efficiency in power-supply management system.
Synchronous buck code converter in DC converter, it has two kinds of mode of operations:Connect conduction mode (CCM) and DCM (DCM)., it is necessary to whether detect inductive current using zero cross detection circuit under DCM Zero passage, when it is zero to detect inductive current, then lock-in tube is turned off, so as to reduce power consumption to improve efficiency.
Fig. 1 gives the zero cross detection circuit that prior art is used for synchronous buck code converter, i.e., in buck convertor Upper setting Zero-cross comparator circuit, is mainly realized using a zero-crossing comparator A.Detection mode such as Fig. 2 institutes of its inductance L electric currents Show.IL is inductance L electric currents in Fig. 2, and Itrip is the zero crossing trigger value that zero-crossing comparator A is set, and Tdly is zero-crossing comparator A Delay.In view of zero-crossing comparator A delay Tdly, due to inductance L electric currents in this period for postponing in zero-crossing comparator A Continuing to reduce, therefore the Itrip values being arranged to than IL=0 are typically higher by certain limit and are used for offsetting due to zero-crossing comparator Detection error caused by A postpones.
PreferablyFrom formula (1) it can be seen that preferable Itrip is by inductance value L, output Voltage Vout, zero-crossing comparator A delay Tdly influence, and because Tdly is that comparator postpones in itself, L is outside outputting inductance, this The two is fixed.So the offset voltage Vos ideal values that zero-crossing comparator introduces should be
Vos=Itrip*Ron
Wherein, Ron is the conducting resistance of lock-in tube, is affected by temperature.And traditional zero-crossing examination be uncompensation or A fixed offset voltage Vos is introduced in zero-crossing comparator to compensate, can not accurately be offset because zero-crossing comparator A postpones Caused by detection error.
The content of the invention
The purpose of this utility model is to inscribe to provide one kind and taken into full account in synchronous buck type to become for solution is above-mentioned Temperature and set the output voltage deviation to caused by zero-crossing examination in parallel operation, improve the use of the accuracy of zero passage detection In the zero cross detection circuit of synchronous buck code converter.
Therefore, the utility model discloses a kind of zero cross detection circuit for synchronous buck code converter, including zero passage Comparator and multiplier, two inputs of the zero-crossing comparator connect the output end and synchronous buck code converter of multiplier respectively Lock-in tube drain electrode, the zero-crossing comparator output termination synchronous buck code converter drive circuit input, institute The first input end for stating multiplier connects the voltage output end of synchronous buck code converter, and the second input termination of the multiplier is just Temperature coefficient current source.
Further, the multiplier includes PNP triode M2-M5, NMOS tube M0-M1 and resistance R0-R1, the PNP The colelctor electrode that triode M2 emitter stage meets power supply VCC, the PNP triode M2 connects NMOS tube M0 drain electrode, the NMOS tube M0 source series resistance R0 ground connection, the grid of the NMOS tube M0 meet the voltage output end VOUT of synchronous buck code converter, The base stage of the PNP triode M2 and PNP triode M3 emitter stage connect positive temperature coefficient current source Iptat, the poles of PNP tri- Pipe M3 grounded collector, the grid of the NMOS tube M1 meet PNP triode M2 colelctor electrode, the PNP triode M3 and M4 Base stage and NMOS tube M1 source electrode connect bias current sources Itail, NMOS tube M1 drain electrode and meet power supply VCC, the PNP Triode M4 emitter stage and PNP triode M5 base stage connect constant temperature coefficient current source Iconst, the collection of the PNP triode M4 Electrode is grounded, and the emitter stage of the PNP triode M5 meets power supply VCC, and the collector series resistance R1 of the PNP triode M5 connects Ground, the node between the colelctor electrode and resistance R1 of the PNP triode M5 take over zero comparator as the output end vo s of multiplier In-phase input end.
Further, the NMOS tube M0-M1 is enhanced NMOS tube.
Further, the multiplier includes NPN triode M2, NPN triode M3, PNP triode M4, NPN triode M5, NMOS tube M0, PMOS M1 and resistance R0-R1, the grounded emitter of the NPN triode M2, the NPN triode M2's Colelctor electrode and PMOS M1 grid connect the output end of the first current mirror, and the source series resistance R0 of the NMOS tube M0 is grounded, The grid of the NMOS tube M0 meets the voltage output end VOUT of synchronous buck code converter, and the drain electrode of the NMOS tube M0 connects first The input of current mirror, the base stage of the NPN triode M2 and NPN triode M3 emitter stage connect positive temperature coefficient current source Iptat, the NPN triode M3 colelctor electrode meet power supply VCC, the base stage of the NPN triode M3 and PNP triode M4 and PMOS M1 source electrode connects bias current sources Itail, the grounded drain of the PMOS M1, the transmitting of the PNP triode M4 Pole and NPN triode M5 base stage meet constant temperature coefficient current source Iconst, and the colelctor electrode of the PNP triode M4 meets power supply VCC, The grounded emitter of the NPN triode M5, the colelctor electrode of the NPN triode M5 connect the input of the second current mirror, and second The output end series resistance R1 ground connection of current mirror, the node between the output end and resistance R1 of the second current mirror is as multiplier Output end vo s takes over the in-phase input end of zero comparator.
Further, the NMOS tube M0 is enhanced NMOS tube, and PMOS M1 is enhanced PMOS.
Further, the generation circuit of the positive temperature coefficient current source include NPN triode M6-M7, resistance R2-R3 and 3rd current mirror, the collector series resistance R2 of the NPN triode M6 connect power supply VCC, the emitter stage of the NPN triode M6 Ground connection, the base stage of the NPN triode M6 connects NPN triode M6 colelctor electrode and NPN triode M7 base stage simultaneously, described NPN triode M7 emitter stage series resistance R3 ground connection, the colelctor electrode of the NPN triode M7 connect the input of the 3rd current mirror End, the output end output positive temperature coefficient current source Iptat of the 3rd current mirror.
Further, the generation circuit of the positive temperature coefficient current source includes the electricity of NPN triode M6 resistance R2 and the 4th Mirror is flowed, the collector series resistance R2 of the NPN triode M6 connects the input of the 4th current mirror, the NPN triode M6's Grounded emitter, the base stage of the NPN triode M6 connect NPN triode M6 colelctor electrode, the output end of the 4th current mirror Export positive temperature coefficient current source Iptat.
Advantageous effects of the present utility model:
The utility model was used as after the output voltage of synchronous buck code converter is multiplied with positive temperature coefficient current source The offset voltage of zero comparator, take into full account that temperature and set output voltage are to zero passage in synchronous buck code converter Deviation caused by point detection, improve the accuracy of zero passage detection.And circuit structure is simple, it is easy to accomplish.
Brief description of the drawings
Fig. 1 is the zero cross detection circuit figure for synchronous buck code converter of prior art;
Fig. 2 is the zero passage detection method schematic diagram for synchronous buck code converter of prior art;
Fig. 3 is the zero cross detection circuit figure for synchronous buck code converter of the utility model embodiment one;
Fig. 4 is the multiplier circuit figure of the utility model embodiment two;
Fig. 5 is the generation circuit circuit diagram of the positive temperature coefficient current source of the utility model embodiment;
Fig. 6 is another generation circuit circuit diagram of the positive temperature coefficient current source of the utility model embodiment.
Embodiment
The utility model is further illustrated in conjunction with the drawings and specific embodiments.
Embodiment one
As shown in figure 3, a kind of zero cross detection circuit for synchronous buck code converter, including zero-crossing comparator A and multiply Musical instruments used in a Buddhist or Taoist mass, the lock-in tube M of the anti-phase input termination synchronous buck code converter of the zero-crossing comparator ALDrain electrode, zero-crossing comparator The output end vo s, the zero-crossing comparator A of A homophase input termination multiplier output termination synchronous buck code converter The input of drive circuit, the first input end of the multiplier meet the voltage output end VOUT of synchronous buck code converter, institute State the second input termination positive temperature coefficient current source Iptat of multiplier.
In this specific embodiment example, the multiplier includes PNP triode M2-M5, NMOS tube M0-M1 and resistance R0-R1, The colelctor electrode that the emitter stage of the PNP triode M2 meets power supply VCC, the PNP triode M2 connects NMOS tube M0 drain electrode, described NMOS tube M0 source series resistance R0 ground connection, the grid of the NMOS tube M0 connect the voltage output end of synchronous buck code converter VOUT, the base stage of the PNP triode M2 and PNP triode M3 emitter stage meet positive temperature coefficient current source Iptat, described PNP triode M3 grounded collector, the grid of the NMOS tube M1 connect PNP triode M2 colelctor electrode, the PNP triode M3 and M4 base stage and NMOS tube M1 source electrode meet bias current sources Itail, and the drain electrode of the NMOS tube M1 meets power supply VCC, The emitter stage of the PNP triode M4 and PNP triode M5 base stage connect constant temperature coefficient current source Iconst, the poles of PNP tri- Pipe M4 grounded collector, the emitter stage of the PNP triode M5 connect power supply VCC, the PNP triode M5 colelctor electrode series connection Resistance R1 is grounded, and the node between the colelctor electrode and resistance R1 of the PNP triode M5 is taken over as the output end vo s of multiplier Zero comparator A in-phase input end.
In this specific embodiment, the NMOS tube M0-M1 is enhanced NMOS tube.
Operation principle:Zero-crossing comparator A offset voltage Vos ideal values should beWherein, Vout is the output voltage of synchronous buck code converter, and Ron is lock-in tube MLConducting resistance, Tdly is zero-crossing comparator A Delay, L are the filter inductance of synchronous buck code converter.Ron is positive temperature coefficient, is increased, i.e. Ron as temperature raises =Ron_0* (1+aT), Ron_0 are lock-in tube M when temperature is 0LConducting resistance.For one determination design, Tdly with L is constant.Therefore, preferable offset voltage Vos is simplified to Vos=A*Vout* (1+aT).
In the present embodiment, the offset voltage of multiplier outputs Vos outputsWherein Iptat It is positive temperature coefficient current source, Iptat=Iptat_0* (1+aT), Iptat_0 are current values when temperature is 0, and Iconst is Constant temperature coefficient current source, therefore, the offset voltage Vos that the multiplier provides meet Vos=A*Vout* (1+aT), so as to The deviation to caused by zero-crossing examination is accurately offset due to temperature and set output voltage, it is accurate to improve zero passage detection Degree.
Embodiment two
The present embodiment is that the particular circuit configurations of multiplier are different from the difference of embodiment one, specifically, such as Fig. 4 institutes Show, the multiplier include NPN triode M2, NPN triode M3, PNP triode M4, NPN triode M5, NMOS tube M0, PMOS M1 and resistance R0-R1, the grounded emitter of the NPN triode M2, the colelctor electrode and PMOS of the NPN triode M2 Pipe M1 grid meets the output end of the first current mirror 1, the source series resistance R0 ground connection of the NMOS tube M0, the NMOS tube M0 The grid voltage output end VOUT, the NMOS tube M0 that connect synchronous buck code converter drain electrode connect the defeated of the first current mirror 1 Enter end, the power supply termination power VCC of the first current mirror 1, the base stage of the NPN triode M2 and NPN triode M3 emitter stage The colelctor electrode for meeting positive temperature coefficient current source Iptat, the NPN triode M3 meets power supply VCC, the NPN triode M3 and PNP Triode M4 base stage and PMOS M1 source electrode meet bias current sources Itail, and the grounded drain of the PMOS M1 is described PNP triode M4 emitter stage and NPN triode M5 base stage meet constant temperature coefficient current source Iconst, the PNP triode M4 Colelctor electrode meet power supply VCC, the grounded emitter of the NPN triode M5, the colelctor electrode of the NPN triode M5 connects the second electricity Flow the input of mirror 2, the output end series resistance R1 ground connection of the second current mirror 2, the power input termination power supply of the second current mirror 2 VCC, the node between the output end and resistance R1 of the second current mirror 2 take over zero comparator A's as the output end vo s of multiplier In-phase input end.
In this specific embodiment, the NMOS tube M0 is enhanced NMOS tube, and PMOS M1 is enhanced PMOS.
Its operation principle is similar to embodiment one, is referred to embodiment one, this is no longer described in detail.
In above-described embodiment, two kinds of preferred circuit figures of multiplier are given, certainly, in other embodiments, multiplier Existing multiplier can also be used, this is that those skilled in the art can realize easily, is no longer described in detail.
Positive temperature coefficient current source Iptat can be using the generation circuit of the positive temperature coefficient current source shown in Fig. 5 come real Existing, it includes NPN triode M6-M7, resistance R2-R3 and the 3rd current mirror, the colelctor electrode series connection of the NPN triode M6 Resistance R2 meets power supply VCC, the grounded emitter of the NPN triode M6, and the base stage of the NPN triode M6 meets NPN tri- simultaneously Pole pipe M6 colelctor electrode and NPN triode M7 base stage, the emitter stage series resistance R3 ground connection of the NPN triode M7 are described The power input that NPN triode M7 colelctor electrode connects the current mirror 3 of input the 3rd of the 3rd current mirror terminates power supply VCC, described The output end output positive temperature coefficient current source Iptat of 3rd current mirror.
Positive temperature coefficient current source Iptat can also using the generation circuit of the positive temperature coefficient current source shown in Fig. 6 come Realize, it includes NPN triode M6 resistance R2 and the 4th current mirror, and the collector series resistance R2 of the NPN triode M6 connects The input of 4th current mirror, the power input termination power supply VCC of the 4th current mirror 4, the emitter stage of the NPN triode M6 connect Ground, the base stage of the NPN triode M6 connect NPN triode M6 colelctor electrode, the positive temperature of output end output of the 4th current mirror Spend coefficient current source Iptat.
Certainly, positive temperature coefficient current source Iptat can also use the generation circuit of existing positive temperature coefficient current source To realize, this is that those skilled in the art can realize that this is no longer described in detail easily.
Constant temperature coefficient current source Iconst and bias current sources Itail realize that this is this area using existing circuit What technical staff can realize easily, this is no longer described in detail.
First current mirror 1, the second current mirror 2, the 3rd current mirror 3 and the 4th current mirror 4 use existing current mirroring circuit To realize, this is that those skilled in the art can realize that this is no longer described in detail easily.
Although specifically showing and describing the utility model with reference to preferred embodiment, those skilled in the art should This is understood, is not departing from the spirit and scope of the present utility model that appended claims are limited, in form and details On the utility model can be made a variety of changes, be the scope of protection of the utility model.

Claims (7)

  1. A kind of 1. zero cross detection circuit for synchronous buck code converter, it is characterised in that:Including zero-crossing comparator and multiplication Device, two inputs of the zero-crossing comparator connect the leakage of the output end of multiplier and the lock-in tube of synchronous buck code converter respectively Pole, the input of the drive circuit of the output termination synchronous buck code converter of the zero-crossing comparator, the of the multiplier The voltage output end of one input termination synchronous buck code converter, the second input termination positive temperature coefficient electric current of the multiplier Source.
  2. 2. the zero cross detection circuit according to claim 1 for synchronous buck code converter, it is characterised in that:It is described to multiply Musical instruments used in a Buddhist or Taoist mass includes PNP triode M2-M5, NMOS tube M0-M1 and resistance R0-R1, the emitter stage of the PNP triode M2 connect power supply VCC, the PNP triode M2 colelctor electrode connect NMOS tube M0 drain electrode, and the source series resistance R0 of the NMOS tube M0 is grounded, The grid of the NMOS tube M0 meets the voltage output end VOUT of synchronous buck code converter, the base stage of the PNP triode M2 and PNP triode M3 emitter stage meets positive temperature coefficient current source Iptat, and the grounded collector of the PNP triode M3 is described NMOS tube M1 grid connects PNP triode M2 colelctor electrode, the base stage of the PNP triode M3 and M4 and NMOS tube M1 source The drain electrode that pole meets bias current sources Itail, the NMOS tube M1 connects power supply VCC, the emitter stage and PNP of the PNP triode M4 Triode M5 base stage connects constant temperature coefficient current source Iconst, the grounded collector of the PNP triode M4, the poles of PNP tri- Pipe M5 emitter stage connects power supply VCC, the PNP triode M5 collector series resistance R1 ground connection, the PNP triode M5's Node between colelctor electrode and resistance R1 takes over the in-phase input end of zero comparator as the output end vo s of multiplier.
  3. 3. the zero cross detection circuit according to claim 2 for synchronous buck code converter, it is characterised in that:It is described NMOS tube M0-M1 is enhanced NMOS tube.
  4. 4. the zero cross detection circuit according to claim 1 for synchronous buck code converter, it is characterised in that:It is described to multiply Musical instruments used in a Buddhist or Taoist mass includes NPN triode M2, NPN triode M3, PNP triode M4, NPN triode M5, NMOS tube M0, PMOS M1 and electricity R0-R1 is hindered, the grounded emitter of the NPN triode M2, the colelctor electrode of the NPN triode M2 and PMOS M1 grid connect The output end of first current mirror, the source series resistance R0 ground connection of the NMOS tube M0, the grid of the NMOS tube M0 connect synchronization The voltage output end VOUT of buck convertor, the drain electrode of the NMOS tube M0 meet the input of the first current mirror, the NPN tri- Pole pipe M2 base stage and NPN triode M3 emitter stage connect positive temperature coefficient current source Iptat, the collection of the NPN triode M3 Electrode meets power supply VCC, and the base stage of the NPN triode M3 and PNP triode M4 and PMOS M1 source electrode connect bias current Source Itail, the grounded drain of the PMOS M1, the emitter stage of the PNP triode M4 and NPN triode M5 base stage connect perseverance Warm coefficient current source Iconst, the PNP triode M4 colelctor electrode meet power supply VCC, and the emitter stage of the NPN triode M5 connects Ground, the colelctor electrode of the NPN triode M5 connect the input of the second current mirror, and the output end series resistance R1 of the second current mirror connects Ground, the node between the output end and resistance R1 of the second current mirror take over the same of zero comparator as the output end vo s of multiplier Phase input.
  5. 5. the zero cross detection circuit according to claim 4 for synchronous buck code converter, it is characterised in that:It is described NMOS tube M0 is enhanced NMOS tube, and PMOS M1 is enhanced PMOS.
  6. 6. the zero cross detection circuit according to claim 1 for synchronous buck code converter, it is characterised in that:It is described just The generation circuit in temperature coefficient current source includes NPN triode M6-M7, resistance R2-R3 and the 3rd current mirror, the poles of NPN tri- Pipe M6 collector series resistance R2 meets power supply VCC, the grounded emitter of the NPN triode M6, the NPN triode M6's Base stage connects NPN triode M6 colelctor electrode and NPN triode M7 base stage, the emitter stage series connection of the NPN triode M7 simultaneously Resistance R3 is grounded, and the colelctor electrode of the NPN triode M7 connects the input of the 3rd current mirror, the output end of the 3rd current mirror Export positive temperature coefficient current source Iptat.
  7. 7. the zero cross detection circuit according to claim 1 for synchronous buck code converter, it is characterised in that:It is described just The generation circuit in temperature coefficient current source includes NPN triode M6 resistance R2 and the 4th current mirror, the collection of the NPN triode M6 Electrode Series Resistance R2 connects the input of the 4th current mirror, the grounded emitter of the NPN triode M6, the NPN triode M6 base stage connects NPN triode M6 colelctor electrode, the output end output positive temperature coefficient current source of the 4th current mirror Iptat。
CN201720775825.XU 2017-06-29 2017-06-29 A kind of zero cross detection circuit for synchronous buck code converter Withdrawn - After Issue CN206818787U (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107132405A (en) * 2017-06-29 2017-09-05 英麦科(厦门)微电子科技有限公司 A kind of zero cross detection circuit for synchronous buck code converter
CN109061278A (en) * 2018-06-19 2018-12-21 飞雕电器集团有限公司 A kind of zero cross detection circuit of super low-power consumption

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107132405A (en) * 2017-06-29 2017-09-05 英麦科(厦门)微电子科技有限公司 A kind of zero cross detection circuit for synchronous buck code converter
CN107132405B (en) * 2017-06-29 2023-05-02 拓尔微电子股份有限公司 Zero-crossing detection circuit for synchronous buck converter
CN109061278A (en) * 2018-06-19 2018-12-21 飞雕电器集团有限公司 A kind of zero cross detection circuit of super low-power consumption
CN109061278B (en) * 2018-06-19 2020-11-13 飞雕电器集团有限公司 Zero-crossing detection circuit with ultralow power consumption

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Patentee after: Tuoer Microelectronics Co.,Ltd.

Address before: Unit 116, No. 1702, Gangzhong Road, Xiamen area, China (Fujian) pilot Free Trade Zone, Xiamen, Fujian 361000

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