CN206627946U - A kind of Debug pinboards - Google Patents
A kind of Debug pinboards Download PDFInfo
- Publication number
- CN206627946U CN206627946U CN201720353167.5U CN201720353167U CN206627946U CN 206627946 U CN206627946 U CN 206627946U CN 201720353167 U CN201720353167 U CN 201720353167U CN 206627946 U CN206627946 U CN 206627946U
- Authority
- CN
- China
- Prior art keywords
- xdp
- wire
- debug
- connectors
- cable connector
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 108010076504 Protein Sorting Signals Proteins 0.000 claims 1
- 239000004065 semiconductor Substances 0.000 description 2
- 239000002699 waste material Substances 0.000 description 2
- 239000000463 material Substances 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
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- Debugging And Monitoring (AREA)
Abstract
The utility model discloses a kind of Debug pinboards, is related to connection expanding field;Mainly it is made up of wire and cable connector and XDP connectors, wire and cable connector is connected by cable with mainboard, the other end according to Power, SMBus, JTAG, Sideband, GND signal the XDP connectors that are linked in sequence, XDP JTAG, SMBus, Sideband, Power and GND signal is drawn out to pinboard by XDP connectors, pinboard can be used for extending Intel ITP tools, only need to dispose wire and cable connector on mainboard under normal circumstances, reduce mainboard PCB and take volume and cost.
Description
Technical field
The utility model discloses a kind of pinboard, is related to connection expanding field, specifically a kind of Debug pinboards.
Background technology
During server design, generally require to reserve various Debug interfaces for function debugging, problem analysis.But
In actual use, especially product volume postpartum, these Debug interfaces may be rarely employed.If these Debug interfaces are all
Retain, not only waste the PCB space of preciousness, can also increase product cost.
The utility model proposes a kind of Debug pinboards, mainly it is made up of wire and cable connector and XDP connectors, connector
It is connected by cable with mainboard, XDP JTAG, SMBus, Sideband, Power and GND signal is drawn out to pinboard, is transferred
Plate can be used for extending Intel ITP tools, only needs to dispose wire and cable connector under normal circumstances on mainboard, reduces master
Plate PCB takes volume and cost.
The utility model reserves Intel XDP interfaces to be used to reduce mainboard Debug on one wire and cable connector to mainboard
Interface takes volume, cost, convenient to dispose, and autgmentability is strong.
In order to facilitate debugging code, each semiconductor manufacturer design when typically can all add one everybody be generally referred to as
For JTAG interface, and different semiconductor calls is also different, on the basis of ITP, Intel define one it is new
Debugging interface XDP (eXtend Debug Port), standard packaging pattern be 60Pin.
Utility model content
The utility model is used for function debugging, problem analysis, but product volume postpartum for current Debug interfaces, these
Debug interfaces are rarely employed, and waste the PCB space of preciousness, the problem of also increasing product cost, there is provided a kind of Debug turns
Fishplate bar, only need to dispose wire and cable connector under normal circumstances on mainboard, reduce mainboard PCB and take volume and cost.
A kind of Debug pinboards, including wire and cable connector and the pin XDP connectors of standard 60, the wire and cable connector one
End be connected by cable with mainboard, the other end according to Power, SMBus, JTAG, Sideband, GND signal the institute that is linked in sequence
State XDP connectors.
The wire and cable connector is 12 pin wire and cable connectors.
The wire and cable connector is spring thimble.
The utility model has an advantageous effect in that compared with prior art:
The utility model proposes a kind of Debug pinboards, mainly it is made up of wire and cable connector and XDP connectors, cable connects
Connect device to be connected with mainboard by cable, the other end is linked in sequence according to Power, SMBus, JTAG, Sideband, GND signal
XDP JTAG, SMBus, Sideband, Power and GND signal is drawn out to switching by the XDP connectors, XDP connectors
Plate, pinboard can be used for extending Intel ITP tools, only need to dispose wire and cable connector under normal circumstances on mainboard,
Reduce mainboard PCB and take volume and cost.
Brief description of the drawings
Block schematic illustration when Fig. 1 the utility model is applied.
Embodiment
The utility model provides a kind of Debug pinboards, including wire and cable connector and the pin XDP connectors of standard 60, institute
State wire and cable connector one end to be connected with mainboard by cable, the other end is believed according to Power, SMBus, JTAG, Sideband, GND
Number the XDP connectors that are linked in sequence.
It is right below in conjunction with specific embodiment for the purpose of this utility model, technical scheme and advantage is more clearly understood
The utility model is further described.
According to practical use or space size, the size and material of Debug pinboards are determined, is generally fabricated near
Like rectangle
A kind of Debug pinboards, including 12 pin wire and cable connectors and the pin XDP connectors of standard 60,12 pin cables
Connector one end is connected by cable with mainboard wire and cable connector, the other end according to Power, SMBus, JTAG, Sideband,
The XDP connectors that are linked in sequence of GND signals.
Under Debug application scenarios, this external Debug pinboard of mainboard, can XDP interfaces needed for rapid deployment, it is normal to perform
Debug functions.Only need to dispose a wire and cable connector on mainboard, saving PCB space reduces board cost.
The pin pin of wherein above-mentioned 12 pin wire and cable connectors can be spring thimble, advantageously in connection.
Claims (3)
1. a kind of Debug pinboards, it is characterised in that including wire and cable connector and the pin XDP connectors of standard 60, the cable
Connector one end is connected by cable with mainboard, and the other end is suitable according to Power, SMBus, JTAG, Sideband, GND signal
Sequence connects the XDP connectors.
2. a kind of Debug pinboards according to claim 1, it is characterised in that the wire and cable connector is 12 pin cables
Connector.
3. a kind of Debug pinboards according to claim 2, it is characterised in that the wire and cable connector is spring thimble.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201720353167.5U CN206627946U (en) | 2017-04-06 | 2017-04-06 | A kind of Debug pinboards |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201720353167.5U CN206627946U (en) | 2017-04-06 | 2017-04-06 | A kind of Debug pinboards |
Publications (1)
Publication Number | Publication Date |
---|---|
CN206627946U true CN206627946U (en) | 2017-11-10 |
Family
ID=60207222
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201720353167.5U Expired - Fee Related CN206627946U (en) | 2017-04-06 | 2017-04-06 | A kind of Debug pinboards |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN206627946U (en) |
-
2017
- 2017-04-06 CN CN201720353167.5U patent/CN206627946U/en not_active Expired - Fee Related
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
GR01 | Patent grant | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20171110 Termination date: 20180406 |