CN109857695A - The interface switch system of server master board - Google Patents
The interface switch system of server master board Download PDFInfo
- Publication number
- CN109857695A CN109857695A CN201811608161.3A CN201811608161A CN109857695A CN 109857695 A CN109857695 A CN 109857695A CN 201811608161 A CN201811608161 A CN 201811608161A CN 109857695 A CN109857695 A CN 109857695A
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- China
- Prior art keywords
- interface
- server master
- logic level
- master board
- switch system
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Abstract
The invention discloses a kind of interface switch systems of server master board, and including South Bridge chip and the interface equipment connecting with South Bridge chip, South Bridge chip has multiple multiplexing pins；Wherein, when interface equipment is first kind interface, in response to the first logic level of interface equipment output, the definition corresponding to first kind interface is carried out to multiple multiplexing pins；When interface equipment is Second Type interface, in response to the second logic level of interface equipment output, the definition corresponding to Second Type interface is carried out to multiple multiplexing pins.Above-mentioned technical proposal through the invention does not need that cost can be saved using switching chip, and the saving development cycle saves PCB space simultaneously as saving switching chip.
Description
Technical field
The present invention relates to server technology fields, it particularly relates to a kind of interface switch system of server master board.
Background technique
With the development of internet+technology, the application of server master board is also more and more extensive, while all big enterprises also all face
Face huge cost pressure.Research and development of products for server frequently encounters requirement of the different special projects for functions of the equipments only
It is in individual local differences, for example, some clients need SATA (Serial Advanced Technology
Attachment, Serial Advanced Technology Attachment, a kind of connection hardware driver interface) type M.2 equipment support, some clients need
PCIE (Peripheral Component Interconnect Express, fast peripheral equipment interconnection) type is wanted M.2 to set
Standby support.
As shown in Figure 1, the method that current motherboard design producer generallys use is to pass through the analog of PERICOM
Switch PI3DBS12212AXUAE switching chip 16 or other similar switching chip progress SATA and PCIE signal are cut
It changes, this makes each M.2 equipment 14 need to increase the cost of 1 U.S. dollar or so.So, increased instead using the method for switching chip
Product cost.
Summary of the invention
In view of the above problems in the related art, the present invention proposes a kind of interface switch system of server master board, can
Save switching chip to carry out the switching of SATA and PCIE signal, and then reduces cost.
The technical scheme of the present invention is realized as follows:
According to an aspect of the invention, there is provided a kind of interface switch system of server master board, including South Bridge chip
The interface equipment connecting with South Bridge chip, South Bridge chip have multiple multiplexing pins；Wherein, when interface equipment is the first kind
When interface, in response to the first logic level of interface equipment output, multiple multiplexing pins are carried out to correspond to first kind interface
Definition；When interface equipment is Second Type interface, in response to the second logic level of interface equipment output, to multiple multiplexings
Pin carries out the definition corresponding to Second Type interface.
According to an embodiment of the invention, interface equipment is M.2 interface.
According to an embodiment of the invention, M.2 interface has for exporting the defeated of the first logic level and the second logic level
Exit port, M.2 the output port of interface is connected to the universal input and output port of South Bridge chip.
According to an embodiment of the invention, the basic input output system by server master board carries out multiple multiplexing pins
Corresponding definition.
According to an embodiment of the invention, the second logic level is low level when the first logic level is high level；When
When one logic level is low level, the second logic level is high level.
According to an embodiment of the invention, first kind interface be SATA interface and PCIE interface one of, the second class
Type interface be SATA interface and PCIE interface the other of.
Above-mentioned technical proposal of the invention does not need to be saved cost using switching chip, be saved the development cycle, together
Shi Yinwei saves switching chip, saves PCB space.
Detailed description of the invention
It in order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, below will be to institute in embodiment
Attached drawing to be used is needed to be briefly described, it should be apparent that, the accompanying drawings in the following description is only some implementations of the invention
Example, for those of ordinary skill in the art, without creative efforts, can also obtain according to these attached drawings
Obtain other attached drawings.
Fig. 1 is the structural schematic diagram switched in the prior art to M.2 equipment；
Fig. 2 is the schematic diagram of the interface switch system of server master board according to an embodiment of the present invention.
Specific embodiment
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation description, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on
Embodiment in the present invention, those of ordinary skill in the art's every other embodiment obtained belong to what the present invention protected
Range.
Fig. 2 shows the interface switch systems of server master board according to an embodiment of the present invention, including 22 He of South Bridge chip
The interface equipment connecting with South Bridge chip 22, South Bridge chip 22 have the multiple multiplexing pins (SSATA0/ of example as shown in figure 1
PCIE6、SSATA1/PCIE7、SSATA2/PCIE8、SSATA3/PCIE9)。
Wherein, when interface equipment 24 be the first kind interface when, in response to interface equipment 24 export the first logic level,
Definition corresponding to first kind interface is carried out to multiple multiplexing pins；When interface equipment 24 is Second Type interface, response
In the second logic level that interface equipment 24 exports, the definition corresponding to Second Type interface is carried out to multiple multiplexing pins.
The above-mentioned technical proposal of invention does not need to be saved cost using switching chip, be saved the development cycle, simultaneously
Because saving switching chip, PCB (printed circuit board) space is saved.
In one embodiment, interface equipment 24 is M.2 interface.M.2 interface have for export the first logic level and
The output port of second logic level, M.2 the output port of interface is connected to the universal input and output port of South Bridge chip 22.Tool
Body, the output port for exporting the first logic level and the second logic level is the PEDET of M.2 interface.
It should be appreciated that the second logic level is low electricity when the first logic level that interface equipment 24 exports is high level
It is flat；When the first logic level is low level, the second logic level is high level.First kind interface is SATA interface and PCIE
Interface one of, Second Type interface be SATA interface and PCIE interface the other of.
In one embodiment, phase can be carried out to multiple multiplexing pins by the basic input output system of server master board
The definition answered.
With continued reference to shown in Fig. 2, wherein insertion SATA type M.2 interface when, PEDET is low level, is inserted into PCIE type
M.2 when interface, PEDET is high level.Pass through the level height of the GPIO (universal input output) of South Bridge chip 22, BIOS (base
This input-output system) resource definitions of SATA/PCIE multiplexing pins may be implemented.In this way, after hardware link connects, only
Need to carry out in BIOS it is relevant setting can be realized different type M.2 interface switching use.In the present embodiment, south bridge
Chip 22 is the LBG chip in PCH.
The foregoing is merely illustrative of the preferred embodiments of the present invention, is not intended to limit the invention, all in essence of the invention
Within mind and principle, any modification, equivalent replacement, improvement and so on be should all be included in the protection scope of the present invention.
Claims (6)
1. a kind of interface switch system of server master board, which is characterized in that connect including South Bridge chip and with the South Bridge chip
The interface equipment connect, the South Bridge chip have multiple multiplexing pins；
Wherein, when the interface equipment be the first kind interface when, in response to the interface equipment output the first logic level,
Definition corresponding to the first kind interface is carried out to the multiple multiplexing pins；When the interface equipment connects for Second Type
Mouthful when, in response to the second logic level of interface equipment output, the multiple multiplexing pins are carried out to correspond to described the
The definition of two style interfaces.
2. the interface switch system of server master board according to claim 1, which is characterized in that the interface equipment is
M.2 interface.
3. the interface switch system of server master board according to claim 2, which is characterized in that the M.2 interface has
For exporting the output port of first logic level and second logic level, the output end of the M.2 interface
Mouth is connected to the universal input and output port of the South Bridge chip.
4. the interface switch system of server master board according to claim 1, which is characterized in that pass through the server master
The basic input output system of plate defines the multiple multiplexing pins accordingly.
5. the interface switch system of server master board according to claim 1, which is characterized in that when the first logic electricity
When putting down as high level, second logic level is low level；When first logic level is low level, described second is patrolled
Collecting level is high level.
6. the interface switch system of server master board according to claim 1, which is characterized in that the first kind interface
For SATA interface and PCIE interface one of, the Second Type interface be the SATA interface and the PCIE interface it
The other of.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811608161.3A CN109857695A (en) | 2018-12-27 | 2018-12-27 | The interface switch system of server master board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811608161.3A CN109857695A (en) | 2018-12-27 | 2018-12-27 | The interface switch system of server master board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN109857695A true CN109857695A (en) | 2019-06-07 |
Family
ID=66892593
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201811608161.3A Pending CN109857695A (en) | 2018-12-27 | 2018-12-27 | The interface switch system of server master board |
Country Status (1)
| Country | Link |
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| CN (1) | CN109857695A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112988640A (en) * | 2021-04-22 | 2021-06-18 | 成都万创科技股份有限公司 | Multi-reusability high-speed interface equipment and control method |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN203224819U (en) * | 2013-04-08 | 2013-10-02 | 深圳市祈飞科技有限公司 | Mainboard |
| CN103901946A (en) * | 2012-12-26 | 2014-07-02 | 鸿富锦精密工业(武汉)有限公司 | Mainboard |
| CN106230431A (en) * | 2016-08-04 | 2016-12-14 | 浪潮电子信息产业股份有限公司 | A kind of pin multiplexing method and CPLD chip |
| CN206805525U (en) * | 2017-05-12 | 2017-12-26 | 深圳市融达计算机有限公司 | A kind of SSD and MINI PCIE adaptive circuits |
| CN107704272A (en) * | 2017-10-24 | 2018-02-16 | 郑州云海信息技术有限公司 | A kind of mainboard and its BIOS configuration determination method, system, device and storage medium |
| CN107977334A (en) * | 2016-10-21 | 2018-05-01 | 宇瞻科技股份有限公司 | Electronic card and its detection method |
| CN208044591U (en) * | 2018-04-26 | 2018-11-02 | 郑州云海信息技术有限公司 | A kind of switching device and server that SATA and PCIE is shared |
-
2018
- 2018-12-27 CN CN201811608161.3A patent/CN109857695A/en active Pending
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103901946A (en) * | 2012-12-26 | 2014-07-02 | 鸿富锦精密工业(武汉)有限公司 | Mainboard |
| CN203224819U (en) * | 2013-04-08 | 2013-10-02 | 深圳市祈飞科技有限公司 | Mainboard |
| CN106230431A (en) * | 2016-08-04 | 2016-12-14 | 浪潮电子信息产业股份有限公司 | A kind of pin multiplexing method and CPLD chip |
| CN107977334A (en) * | 2016-10-21 | 2018-05-01 | 宇瞻科技股份有限公司 | Electronic card and its detection method |
| CN206805525U (en) * | 2017-05-12 | 2017-12-26 | 深圳市融达计算机有限公司 | A kind of SSD and MINI PCIE adaptive circuits |
| CN107704272A (en) * | 2017-10-24 | 2018-02-16 | 郑州云海信息技术有限公司 | A kind of mainboard and its BIOS configuration determination method, system, device and storage medium |
| CN208044591U (en) * | 2018-04-26 | 2018-11-02 | 郑州云海信息技术有限公司 | A kind of switching device and server that SATA and PCIE is shared |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112988640A (en) * | 2021-04-22 | 2021-06-18 | 成都万创科技股份有限公司 | Multi-reusability high-speed interface equipment and control method |
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Effective date of registration: 20190724 Address after: 100193 Beijing, Haidian District, northeast Wang West Road, building 8, No. 36 Applicant after: Dawning Information Industry (Beijing) Co., Ltd. Applicant after: CHINESE CORPORATION DAWNING INFORMATION INDUSTRY CHENGDU CO., LTD. Address before: 100193 Beijing, Haidian District, northeast Wang West Road, building 8, No. 36 Applicant before: Dawning Information Industry (Beijing) Co., Ltd. |
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Address after: 610213 Sichuan city of Chengdu province Tianfu Tianfu Avenue South Huayang Street No. 846 Applicant after: CHINESE CORPORATION DAWNING INFORMATION INDUSTRY CHENGDU CO., LTD. Applicant after: Shuguang Information Industrial (Beijing) Co., Ltd. Address before: 100193 Beijing, Haidian District, northeast Wang West Road, building 8, No. 36 Applicant before: Shuguang Information Industrial (Beijing) Co., Ltd. Applicant before: CHINESE CORPORATION DAWNING INFORMATION INDUSTRY CHENGDU CO., LTD. |
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Application publication date: 20190607 |
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