CN206533130U - The simple protection circuits of GPIO between a kind of board - Google Patents
The simple protection circuits of GPIO between a kind of board Download PDFInfo
- Publication number
- CN206533130U CN206533130U CN201621221945.7U CN201621221945U CN206533130U CN 206533130 U CN206533130 U CN 206533130U CN 201621221945 U CN201621221945 U CN 201621221945U CN 206533130 U CN206533130 U CN 206533130U
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- gpio
- diodes
- board
- parallel
- utility
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- 230000005611 electricity Effects 0.000 claims 1
- 238000004519 manufacturing process Methods 0.000 abstract description 5
- 230000006870 function Effects 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 2
- 230000035807 sensation Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000003032 molecular docking Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Abstract
The utility model provides the simple protection circuits of GPIO between a kind of board, including two diodes parallel with one another(D1、D2), one end and two diodes(D1、D2)The first resistor that is connected in parallel of positive pole(R1)And one end and two diodes(D1、D2)The second resistance being connected in parallel(R2), the utility model is mainly used in solving GPIO the problem of often burn out, such as:In production process, technical staff easily plugs GPIO on interface, interface easily with closing on interface short circuit.Add after this circuit, due to having after diode D1 and R2, it is ensured that GPIO is not burned.
Description
Technical field
The utility model is related to a kind of protection circuit, more specifically refers to the simple protection circuits of GPIO between a kind of board.
Background technology
In actual Electronic Design, situations below can be frequently encountered:
1. the UART of processor is burnt out, other functions of processor are all normal.
2. the GPIO of processor is burnt out, GPIO is particularly easy to burn out as the pin of output, and other functions of processor are just
Often.
3. point for core board and peripheral board design, be particularly easy in the GPIO of interface it is bad, and on core board
GPIO does not allow perishable, and other functions of processor are normal.
4. insert earphone, mobile phone plane plate can not detect earphone GPIO accesses, and other functions of system are normal.
It 5. there is many similar situations, can prove that processor only burns out indivedual GPIO, be burnt out without overall.
The reason for GPIO is burnt out, it is possible to be due to caused by production is installed;It is likely to be caused by hot plugging;It is likely to be instrument
During docking, there are high current or big voltage to pour into caused by GPIO;GPIO fan-in fan is not accounted for when being likely to be circuit design
Caused by output capacity.
Existing many technologies, are the protection for electrostatic or surge mostly.But in actual applications, GPIO burning
Badly often due to caused by electrostatic or surge.
Utility model content
Main purpose of the present utility model be to solve above-mentioned problem there is provided one kind it is simple in construction, easy to make,
The simple protection circuits of GPIO between the cheap board of cost of manufacture.
The technical solution adopted in the utility model is:The simple protection circuits of GPIO between a kind of board, including two mutually simultaneously
The diode of connection(D1、D2), one end and two diodes(D1、D2)The first resistor that is connected in parallel of positive pole(R1)And one
End and two diodes(D1、D2)The second resistance being connected in parallel(R2), wherein, the first resistor(R1)The other end be
VCC_IO ends, the second resistance(R2)The other end be GPIO_CORE ends, two diodes in parallel(D1、D2)For GPIO_
PERI ends.
Two diodes(D1、D2)For Schottky diode.
The first resistor(R1)Resistance be 47 Ω.The second resistance(R2)Resistance be 100 Ω.
The beneficial effects of the utility model are:
The problem of the utility model is mainly solved has:The utility model is mainly used in solving the problem of GPIO is often burnt out,
Such as:
In production process, technical staff easily plugs GPIO on interface, interface easily with closing on interface short circuit.Plus
Enter after this circuit, due to having after diode D1 and R2, it is ensured that GPIO is not burned.
In the development phase, our frequent hot plug UART are debugged, added after this circuit, it is also ensured that UART not by
Burn out.
3)When being docked between equipment 1 and equipment 2 by GPIO, because the reference voltage of equipment room is different, in equipment access
Moment, it is easy to there is electric current and pour in down a chimney into GPIO situations, and cause GPIO to burn out.
4)The sensation for having electric shock in interface is frequently found, is added after the circuit it is also ensured that GPIO is not burned.I.e.
The high pressure for having 90V is set to be inputted at GPIO interface, due to there is diode, without being broken down by high-voltage.For CMOS devices
Part, CMOS structure endophyte has SCR structure, when inputting or input pin is higher than VCC certain values(0.7V), electric current foot
Enough greatly, latch-up may be caused, cause chip to burn out.
5)Typical earphone interface circuit may result in GPIO and burn out, also may be used after adding the circuit due to often plug
To solve the problem of GPIO is burnt out.
Brief description of the drawings
Fig. 1 is circuit theory diagrams of the present utility model.
Embodiment
It is as shown in Figure 1 a kind of preferably specific embodiment of the present utility model, GPIO is simply protected between a kind of board
Circuit, including two diodes parallel with one another(D1、D2), one end and two diodes(D1、D2)Positive pole be connected in parallel
First resistor(R1)And one end and two diodes(D1、D2)The second resistance being connected in parallel(R2), wherein, this first
Resistance(R1)The other end be VCC_IO ends, the second resistance(R2)The other end be GPIO_CORE ends, this two in parallel two
Pole pipe(D1、D2)For GPIO_PERI ends.
Further, two diodes(D1、D2)For Schottky diode.
The first resistor(R1)Resistance be 47 Ω.The second resistance(R2)Resistance be 100 Ω.
The problem of the utility model is mainly solved has:The utility model is mainly used in solving the problem of GPIO is often burnt out,
Such as:
In production process, technical staff easily plugs GPIO on interface, interface easily with closing on interface short circuit.Plus
Enter after this circuit, due to having after diode D1 and R2, it is ensured that GPIO is not burned.
In the development phase, our frequent hot plug UART are debugged, added after this circuit, it is also ensured that UART not by
Burn out.
3)When being docked between equipment 1 and equipment 2 by GPIO, because the reference voltage of equipment room is different, in equipment access
Moment, it is easy to there is electric current and pour in down a chimney into GPIO situations, and cause GPIO to burn out.
4)The sensation for having electric shock in interface is frequently found, is added after the circuit it is also ensured that GPIO is not burned.I.e.
The high pressure for having 90V is set to be inputted at GPIO interface, due to there is diode, without being broken down by high-voltage.For CMOS devices
Part, CMOS structure endophyte has SCR structure, when inputting or input pin is higher than VCC certain values(0.7V), electric current foot
Enough greatly, latch-up may be caused, cause chip to burn out.
5)Typical earphone interface circuit may result in GPIO and burn out, also may be used after adding the circuit due to often plug
To solve the problem of GPIO is burnt out.
Circuit theory is analyzed:
When GPIO is as input, as shown in table 1.
Table 1
Table 2
Table 3
When GPIO as output is, as shown in table 4.
GPIO_CORE | GPIO_PERI | Remarks |
High level | High level | Diode is turned on, and GPIO_PERI is that a VCC_IO subtracts diode drop. |
Low level | High resistant | Diode ends, and GPIO_PERI is high resistant.In actual Electronic Design, high resistant is equal to low level. |
Table 4
Embodiment of the present utility model and accompanying drawing are intended merely to show design concept of the present utility model, the utility model
Protection domain should not necessarily be limited to this embodiment.
It can be seen from the above description that purpose of design of the present utility model can effectively be implemented.The portion of embodiment
Divide and illustrate the purpose of this utility model and implement function and structure theme, and including other equivalent substitutions.
Therefore, right of the present utility model, which is constituted, includes other equivalence enforcements, and the specific scope of claims are incorporated herein by reference.
Claims (3)
1. the simple protection circuits of GPIO between a kind of board, it is characterised in that:Including two diodes parallel with one another(D1、D2)、
One end and two diodes(D1、D2)The first resistor that is connected in parallel of positive pole(R1)And one end and two diodes
(D1、D2)The second resistance being connected in parallel(R2), wherein, the first resistor(R1)The other end be VCC_IO ends, this second electricity
Resistance(R2)The other end be GPIO_CORE ends, two diodes in parallel(D1、D2)For GPIO_PERI ends.
2. the simple protection circuits of GPIO between a kind of board as claimed in claim 1, it is characterised in that two diodes(D1、
D2)For Schottky diode.
3. the simple protection circuits of GPIO between a kind of board as claimed in claim 1, it is characterised in that the first resistor(R1)'s
Resistance is 47 Ω, the second resistance(R2)Resistance be 100 Ω.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201621221945.7U CN206533130U (en) | 2016-11-14 | 2016-11-14 | The simple protection circuits of GPIO between a kind of board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201621221945.7U CN206533130U (en) | 2016-11-14 | 2016-11-14 | The simple protection circuits of GPIO between a kind of board |
Publications (1)
Publication Number | Publication Date |
---|---|
CN206533130U true CN206533130U (en) | 2017-09-29 |
Family
ID=59922657
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201621221945.7U Expired - Fee Related CN206533130U (en) | 2016-11-14 | 2016-11-14 | The simple protection circuits of GPIO between a kind of board |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN206533130U (en) |
-
2016
- 2016-11-14 CN CN201621221945.7U patent/CN206533130U/en not_active Expired - Fee Related
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
GR01 | Patent grant | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20170929 |