CN203984030U - A kind of two charging circuits that are provided with buffer circuit - Google Patents
A kind of two charging circuits that are provided with buffer circuit Download PDFInfo
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- CN203984030U CN203984030U CN201420240902.8U CN201420240902U CN203984030U CN 203984030 U CN203984030 U CN 203984030U CN 201420240902 U CN201420240902 U CN 201420240902U CN 203984030 U CN203984030 U CN 203984030U
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Abstract
The utility model relates to mobile internet device field; relate in particular to a kind of two charging circuits that are provided with buffer circuit; comprise: USB charging circuit, DC charging circuit and buffer circuit; in the time adopting the charging of DC charging circuit; described buffer circuit can avoid direct current to pour in down a chimney to USB charging end; thereby protect the electronic equipment that now hangs over USB charging end, also ensured that the adapter of DC charging end is unlikely to overcurrent turn-off function or damage, improved the fail safe of power-supply device.
Description
Technical field
The utility model relates to mobile internet device field, relates in particular to a kind of two charging circuits that are provided with buffer circuit.
Background technology
Mobile internet device (Mobile Internet Device, be called for short MID), a kind of new " larger than smart phone, less than notebook " internet terminal, aly can improve high-end customer work efficiency, meet the demand of surfing the Net whenever and wherever possible, with comfortable, portable top pocket computer, the general pair charge modes that adopt of power supply of MID, be USB charging and DC (Direct Current, direct current) charging, but in the time that DC charges, direct current can pour in down a chimney to connecing on the electronic product of USB end, thereby electronic product is caused to damage, or cause DC charging adapter because of overcurrent turn-off function or damage.
Utility model content
The purpose of this utility model is to propose a kind of two charging circuits that are provided with buffer circuit, has avoided galvanic and has poured in down a chimney, and has improved the fail safe of power-supply device.
For reaching this object, the utility model by the following technical solutions:
A kind of two charging circuits that are provided with buffer circuit, comprise: USB charging circuit, DC charging circuit and buffer circuit, described USB charging circuit is connected by buffer circuit with DC charging circuit, described USB charging circuit comprises VBUS0 node, described DC charging circuit comprises VDC node, described buffer circuit comprises: Q38 field effect transistor, Q39 field effect transistor, R527 resistance, R528 resistance, R529 resistance, R534 resistance, D25 diode, wherein, one end of the drain electrode of Q38 field effect transistor and R527 resistance and VBUS0 node link together, the source electrode of the source electrode of Q38 field effect transistor and Q39 field effect transistor links together, the grid of the grid of Q38 field effect transistor and Q39 field effect transistor, the negative pole of D25 diode, one end of R528 resistance, one end of R534 resistance and one end of R529 link together, the positive pole of the other end of R527 resistance and D25 diode links together, the other end of the drain electrode of Q39 field effect transistor and R529 resistance and VDC node link together, the other end ground connection of R528 resistance.
Wherein, described DC charging circuit also comprises: J3 charging inlet, and the pin one of described J3 charging inlet is connected with described VDC node and DC5V power supply connects, the pin 4 of J3 charging inlet ground connection together with pin 5, in the time that DC charging circuit is not worked, pin 3 ground connection together with pin two of J3 charging inlet; In the time that DC charging circuit is worked, the pin two ground connection of J3 charging inlet, the pin 3 of J3 charging inlet is connected with the other end of R534 resistance.
Wherein, described USB charging circuit also comprises: J13 charging inlet and C341 electric capacity, the pin 5 of J13 charging inlet, pin 6, pin 7, pin 8, pin 9, pin one 0 is ground connection together with pin one 1, the pin two of J13 charging inlet connects the DM lead-in wire of OTG (On-The-GO) data wire, the pin 3 of J13 charging inlet connects the DP lead-in wire of OTG data wire, the pin 4 of J13 charging inlet connects the ID lead-in wire of OTG data wire, the pin one of J13 charging inlet and VCC node, one end of USB5V power supply and C341 electric capacity links together, the other end ground connection of C341 electric capacity.
Wherein, the filter capacitor that described C341 electric capacity is USB charging circuit.
Wherein, when described USB charging circuit work, Q38 field effect transistor and all conductings of Q39 field effect transistor, when described DC charging circuit work, Q38 field effect transistor and the not conductings of Q39 field effect transistor.
Wherein, described buffer circuit also comprises: R533 resistance, and one end of R533 resistance is connected with VBUS0 node, and the other end of R533 resistance is connected with VDC node.
Wherein, described DC charging circuit also comprises: R142 resistance and C1 electric capacity, and one end of R142 resistance is connected with DC5V power supply, and the other end of R142 resistance is connected with one end of C1 electric capacity, the other end ground connection of C1 electric capacity.
The beneficial effects of the utility model are: a kind of two charging circuits that are provided with buffer circuit; comprise: USB charging circuit, DC charging circuit and buffer circuit; in the time adopting the charging of DC charging circuit; described buffer circuit can avoid direct current to pour in down a chimney to USB charging end; thereby protect the electronic equipment that now hangs over USB charging end; also the adapter that has ensured DC charging end is unlikely to overcurrent turn-off function or damage, has improved the fail safe of power-supply device.
Brief description of the drawings
Fig. 1 is the buffer circuit that provides of the utility model embodiment mono-and the circuit diagram of DC charging circuit.
Fig. 2 is the circuit diagram of the USB charging circuit that provides of the utility model embodiment mono-.
Fig. 3 is the buffer circuit that provides of the utility model embodiment bis-and the circuit diagram of DC charging circuit.
Embodiment
Further illustrate the technical solution of the utility model below in conjunction with Fig. 1-Fig. 3 and by embodiment.
Embodiment mono-
Fig. 1 is the buffer circuit that provides of the utility model embodiment mono-and the circuit diagram of DC charging circuit.
A kind of two charging circuits that are provided with buffer circuit, comprise: USB charging circuit, DC charging circuit and buffer circuit, described USB charging circuit is connected by buffer circuit with DC charging circuit, described USB charging circuit comprises VBUS0 node, described DC charging circuit comprises VDC node, described buffer circuit comprises: Q38 field effect transistor, Q39 field effect transistor, R527 resistance, R528 resistance, R529 resistance, R534 resistance, D25 diode, wherein, one end of the drain electrode of Q38 field effect transistor and R527 resistance and VBUS0 node link together, the source electrode of the source electrode of Q38 field effect transistor and Q39 field effect transistor links together, the grid of the grid of Q38 field effect transistor and Q39 field effect transistor, the negative pole of D25 diode, one end of R528 resistance, one end of R534 resistance and one end of R529 link together, the positive pole of the other end of R527 resistance and D25 diode links together, the other end of the drain electrode of Q39 field effect transistor and R529 resistance and VDC node link together, the other end ground connection of R528 resistance.
In the present embodiment; in the time adopting the charging of DC charging circuit; DC5V power supply is powered to rear class; Q38 field effect transistor and the not conducting of Q39 field effect transistor; guarantee that DC5V power supply can not flow back to USB charging end; thereby protect the electronic equipment that now hangs over USB charging end, also ensured that the adapter of DC charging end is unlikely to overcurrent turn-off function or damage, improved the fail safe of power-supply device.
In the present embodiment, R529 resistance and R528 electric resistance partial pressure, while guaranteeing DC charging, Q39 field effect transistor is in cut-off state, in the time of single USB charging, R527 resistance adds D25 diode forward impedance and R534 electric resistance partial pressure, thereby meets the turn-on condition of Q38 field effect transistor and Q39 field effect transistor, and Q38 field effect transistor and Q39 field effect transistor are powered to rear end; When DC charging, when USB connects the electrical equipment such as PC, R527 resistance adds D25 diode forward impedance and R528 electric resistance partial pressure, does not meet the turn-on condition of Q38 field effect transistor and Q39 field effect transistor, Q38 field effect transistor and Q39 field effect transistor are all ended, to such an extent as to DC electric current can not pour in down a chimney to USB and hold.
In the present embodiment, described DC charging circuit also comprises: J3 charging inlet, the pin one of described J3 charging inlet is connected with described VDC node and DC5V power supply connects, the pin 4 of J3 charging inlet ground connection together with pin 5, in the time that DC charging circuit is not worked, pin 3 ground connection together with pin two of J3 charging inlet; In the time that DC charging circuit is worked, the pin two ground connection of J3 charging inlet, the pin 3 of J3 charging inlet is connected with the other end of R534 resistance.
As shown in Figure 2, in the present embodiment, described USB charging circuit also comprises: J13 charging inlet and C341 electric capacity, the pin 5 of J13 charging inlet, pin 6, pin 7, pin 8, pin 9, pin one 0 is ground connection together with pin one 1, the pin two of J13 charging inlet connects the DM lead-in wire of OTG data wire, the pin 3 of J13 charging inlet connects the DP lead-in wire of OTG data wire, the pin 4 of J13 charging inlet connects the ID lead-in wire of OTG data wire, the pin one of J13 charging inlet and VCC node, one end of USB5V power supply and C341 electric capacity links together, the other end ground connection of C341 electric capacity.
In the present embodiment, J13 is USB charging inlet, connects adapter 5V power supply or 5V power supply USB port.
In the present embodiment, the filter capacitor that described C341 electric capacity is USB charging circuit.
In the present embodiment, when described USB charging circuit work, Q38 field effect transistor and all conductings of Q39 field effect transistor, when described DC charging circuit work, Q38 field effect transistor and the not conductings of Q39 field effect transistor.
Embodiment bis-
As shown in Figure 3, in the present embodiment, described buffer circuit also comprises: R533 resistance, and one end of R533 resistance is connected with VBUS0 node, and the other end of R533 resistance is connected with VDC node.
In the present embodiment, described DC charging circuit also comprises: R142 resistance and C1 electric capacity, and one end of R142 resistance is connected with DC5V power supply, and the other end of R142 resistance is connected with one end of C1 electric capacity, the other end ground connection of C1 electric capacity.
The foregoing is only embodiment of the present utility model, these are described is in order to explain principle of the present utility model, and can not be taking any interpretation of structure as the restriction to the utility model protection range.Based on explanation herein, those skilled in the art does not need to pay performing creative labour can associate other specific implementation method of the present utility model, within these structures all will fall into protection range of the present utility model.
Claims (7)
1. one kind is provided with two charging circuits of buffer circuit, it is characterized in that, comprise: USB charging circuit, DC charging circuit and buffer circuit, described USB charging circuit is connected by buffer circuit with DC charging circuit, described USB charging circuit comprises VBUS0 node, described DC charging circuit comprises VDC node, described buffer circuit comprises: Q38 field effect transistor, Q39 field effect transistor, R527 resistance, R528 resistance, R529 resistance, R534 resistance, D25 diode, wherein, one end of the drain electrode of Q38 field effect transistor and R527 resistance and VBUS0 node link together, the source electrode of the source electrode of Q38 field effect transistor and Q39 field effect transistor links together, the grid of the grid of Q38 field effect transistor and Q39 field effect transistor, the negative pole of D25 diode, one end of R528 resistance, one end of R534 resistance and one end of R529 link together, the positive pole of the other end of R527 resistance and D25 diode links together, the other end of the drain electrode of Q39 field effect transistor and R529 resistance and VDC node link together, the other end ground connection of R528 resistance.
2. a kind of two charging circuits that are provided with buffer circuit according to claim 1, it is characterized in that, described DC charging circuit also comprises: J3 charging inlet, the pin one of described J3 charging inlet is connected with described VDC node and DC5V power supply connects, the pin 4 of J3 charging inlet ground connection together with pin 5, in the time that DC charging circuit is not worked, pin 3 ground connection together with pin two of J3 charging inlet; In the time that DC charging circuit is worked, the pin two ground connection of J3 charging inlet, the pin 3 of J3 charging inlet is connected with the other end of R534 resistance.
3. a kind of two charging circuits that are provided with buffer circuit according to claim 1, it is characterized in that, described USB charging circuit also comprises: J13 charging inlet and C341 electric capacity, the pin 5 of J13 charging inlet, pin 6, pin 7, pin 8, pin 9, pin one 0 is ground connection together with pin one 1, the pin two of J13 charging inlet connects the DM lead-in wire of OTG data wire, the pin 3 of J13 charging inlet connects the DP lead-in wire of OTG data wire, the pin 4 of J13 charging inlet connects the ID lead-in wire of OTG data wire, the pin one of J13 charging inlet and VCC node, one end of USB5V power supply and C341 electric capacity links together, the other end ground connection of C341 electric capacity.
4. a kind of two charging circuits that are provided with buffer circuit according to claim 3, is characterized in that, described C341 electric capacity is the filter capacitor of USB charging circuit.
5. a kind of two charging circuits that are provided with buffer circuit according to claim 1, it is characterized in that, when described USB charging circuit work, Q38 field effect transistor and all conductings of Q39 field effect transistor, when described DC charging circuit work, Q38 field effect transistor and the not conductings of Q39 field effect transistor.
6. a kind of two charging circuits that are provided with buffer circuit according to claim 1, is characterized in that, described buffer circuit also comprises: R533 resistance, and one end of R533 resistance is connected with VBUS0 node, and the other end of R533 resistance is connected with VDC node.
7. a kind of two charging circuits that are provided with buffer circuit according to claim 1, it is characterized in that, described DC charging circuit also comprises: R142 resistance and C1 electric capacity, one end of R142 resistance is connected with DC5V power supply, the other end of R142 resistance is connected with one end of C1 electric capacity, the other end ground connection of C1 electric capacity.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CN201420240902.8U CN203984030U (en) | 2014-05-12 | 2014-05-12 | A kind of two charging circuits that are provided with buffer circuit |
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CN201420240902.8U CN203984030U (en) | 2014-05-12 | 2014-05-12 | A kind of two charging circuits that are provided with buffer circuit |
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CN203984030U true CN203984030U (en) | 2014-12-03 |
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CN201420240902.8U Expired - Fee Related CN203984030U (en) | 2014-05-12 | 2014-05-12 | A kind of two charging circuits that are provided with buffer circuit |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107733025A (en) * | 2017-10-30 | 2018-02-23 | 深圳市亿道数码技术有限公司 | Double charging circuits and its operation method compatible with DC a kind of USB |
-
2014
- 2014-05-12 CN CN201420240902.8U patent/CN203984030U/en not_active Expired - Fee Related
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107733025A (en) * | 2017-10-30 | 2018-02-23 | 深圳市亿道数码技术有限公司 | Double charging circuits and its operation method compatible with DC a kind of USB |
CN107733025B (en) * | 2017-10-30 | 2023-11-21 | 深圳市亿道数码技术有限公司 | USB and DC compatible double-charging circuit and operation method thereof |
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C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20141203 Termination date: 20160512 |
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CF01 | Termination of patent right due to non-payment of annual fee |