CN206481286U - A kind of uniform wideband voltage controlled oscillator of band separation - Google Patents
A kind of uniform wideband voltage controlled oscillator of band separation Download PDFInfo
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Abstract
The utility model discloses a kind of uniform wideband voltage controlled oscillator of band separation, is made up of inductor capacitor resonant circuit and switched capacitor array circuit.Switched capacitor array circuit includes two sections of linear approximation switched capacitor arrays and digital logic control circuit.Traditional binary weights capacitor array is substituted using two sections of linear approximation capacitor arrays, the size of the switching capacity of two sections of linear approximation switched capacitor array access resonant tanks of the regulation of electrical circuit is controlled using Digital Logic according to the change of control code, so that the tuning curve interval of each nearby frequency bands tends to be uniform, the otherness at each frequency band tuning curve interval can be reduced, improve uniformity, by reduce band separation value reduce tuning gain with realize improvement frequency synthesizer phase noise purpose.
Description
Technical field
The utility model is related to technical field of integrated circuits, and in particular to a kind of uniform broadband voltage controlled oscillation of band separation
Device.
Background technology
In RF communication system, the phase noise performance of frequency synthesizer directly affects the bit error rate and carrier wave in communication
Frequency-tracking precision, influences selectivity and the sensitivity of receiver.In frequency synthesizer, except the phase of voltage controlled oscillator is made an uproar
Sound is directly affected outside the phase noise of frequency synthesizer, and the tuning gain of voltage controlled oscillator is also directly connected to frequency synthesizer
Loop bandwidth, and loop bandwidth directly affects the phase noise of frequency synthesizer.With the development of technology for radio frequency, docking
The performance requirement more and more higher such as the selectivity of receipts machine and sensitivity, this undoubtedly proposes higher choose to the design of voltage controlled oscillator
War.
It is often that focusing on for design is how excellent in the voltage-controlled oscillator circuit of in the past traditional Switch capacitor structure
In the phase noise performance for changing voltage controlled oscillator, and it have ignored and how to optimize the Kind of Switched Capacitor Array of voltage controlled oscillator and exchange
The influence of tuning gain.In the voltage controlled oscillator of traditional binary switchable-capacitor array structure, with switched capacitor array numerical control
The change of the numerical value of position, its band separation also changes therewith, and band separation and the band separation difference of low-frequency band of high frequency band
It is very big, so as to cause the tuning gain of each frequency band widely different.And the maximum system of multiband voltage controlled oscillator band separation
The about voltage tuning gain of voltage controlled oscillator.Therefore how to reduce band separation value reduces tuning gain, so as to improve frequency
The problem of phase noise of rate synthesizer is a worth discussion.
Utility model content
Technical problem to be solved in the utility model is the tuning gain difference of each frequency band of existing voltage controlled oscillator
Greatly, so that the problem of tuning gain of voltage controlled oscillator is high there is provided a kind of uniform wideband voltage controlled oscillator of band separation.
To solve the above problems, the utility model is achieved through the following technical solutions：
A kind of uniform wideband voltage controlled oscillator of band separation, including voltage controlled oscillator, the voltage controlled oscillator is by inductance
Capacitor resonant circuit and switched capacitor array circuit composition.Above-mentioned switched capacitor array circuit includes two sections of linear approximation switch electricity
Hold array and digital logic control circuit.Two sections of linear approximation switched capacitor arrays form battle array by 7 pairs of switched-capacitor circuit parallel connections
Row；Each pair switched-capacitor circuit is in series by 1 switch and 2 fixed capacities；Switch be serially connected in 2 fixed capacities it
Between；The other end of one of fixed capacity connects the oscillation output end VN of voltage controlled oscillator, another fixed capacity it is another
The oscillation output end VP of end connection voltage controlled oscillator.Digital Logic controls circuit by 3 OR gate OR1-OR3,3 and door AND1-
AND3 and wire composition；OR gate OR1 2 inputs connect external input signal K respectively0And K3, OR gate OR1 output
The switch b of the one pair of which switched-capacitor circuit of two sections of linear approximation switched capacitor arrays of end connection0；OR gate OR2 2 inputs
End connects external input signal K respectively1And K3, OR gate OR1 two sections of linear approximation switched capacitor arrays of output end connection are wherein
The switch b of a pair of switches condenser network1；OR gate OR3 2 inputs connect external input signal K respectively2And K3, OR gate OR1
Output end connect two sections of linear approximation switched capacitor arrays one pair of which switched-capacitor circuit switch b2；With door AND1's
2 inputs connect external input signal K respectively0And K3, two sections of linear approximation switching capacity battle arrays are connected with door AND1 output end
The switch b of the one pair of which switched-capacitor circuit of row3；External input signal K is connected respectively with door AND2 2 inputs1With
K3, the switch b of the one pair of which switched-capacitor circuit of two sections of linear approximation switched capacitor arrays is connected with door AND1 output end4；
External input signal K is connected respectively with door AND3 2 inputs2And K3, two sections of linear approximations are connected with door AND1 output end
The switch b of the one pair of which switched-capacitor circuit of switched capacitor array5；One end connection external input signal K of wire3, the other end
Connect the switch b of the one pair of which switched-capacitor circuit of two sections of linear approximation switched capacitor arrays6。
Above-mentioned inductor capacitor resonant circuit includes nmos pass transistor M3 and M4, PMOS transistor M1 and M2, inductance L, fixation
Electric capacity Cb1And Cb2And variable capacitance CVAR1And CVAR2；PMOS transistor M1 source electrode and the M2 of PMOS transistor source electrode are same
When connection power vd D；Nmos pass transistor M3 source electrode is connected ground GND simultaneously with nmos pass transistor M4 source electrode；PMOS transistor
M1 drain electrode, nmos pass transistor M3 drain electrode, PMOS transistor M2 grid and nmos pass transistor M4 grid and VCO
The oscillation output end VP of device is connected；PMOS transistor M2 drain electrode, nmos pass transistor M4 drain electrode, PMOS transistor M1 grid
It is connected with nmos pass transistor M3 grid with the oscillation output end VN of voltage controlled oscillator；Inductance L is connected to shaking for voltage controlled oscillator
Swing between output end VP and VN；Fixed capacity Cb1And Cb2After series connection, its one end connects the oscillation output end VP of voltage controlled oscillator,
The other end connects the oscillation output end VN of voltage controlled oscillator；Variable capacitance CVAR1And CVAR2Direction reversal connection, wherein between Access Control electricity
Press VTUNE；Variable capacitance CVAR1And CVAR2After series connection, its one end connects the oscillation output end VP of voltage controlled oscillator, other end connection
The oscillation output end VN of voltage controlled oscillator.
In such scheme, fixed capacity Cb1And Cb2For equivalent fixed capacity.
In such scheme, variable capacitance CVAR1And CVAR2For equivalent variable capacitance.
Compared with prior art, the utility model substitutes traditional binary weights using two sections of linear approximation capacitor arrays
Capacitor array, is accessed according to the change of control code using Digital Logic control two sections of linear approximation switched capacitor arrays of the regulation of electrical circuit
The size of the switching capacity of resonant tank so that the tuning curve interval of each nearby frequency bands tends to be uniform, you can to reduce each
The otherness at frequency band tuning curve interval, improves uniformity, and reduce tuning gain by reducing band separation value is changed with realizing
The purpose of kind frequency synthesizer phase noise.
Brief description of the drawings
Fig. 1 is a kind of structure principle chart of the uniform wideband voltage controlled oscillator of band separation.
Fig. 2 is two sections of linear approximation switched capacitor arrays.
Fig. 3 is that Digital Logic controls circuit.
Fig. 4 is change curve of the different capacitor array capacitances with control code K.
Fig. 5 compares for the nearby frequency bands spacing uniformity of different capacitor array modes.
Embodiment
According to document《Design Methodology for RF CMOS Phase Locked Loops》(C.Quemada
Deng work, Artech House, Inc.2009 is published) understand, frequency synthesizer phase noise and voltage controlled oscillator tuning gain
KVCORelation, such as formula (1), therefore the tuning gain K of reduction voltage controlled oscillatorVCOFrequency synthesizer phase noise L can be reduced
{ ω },
According to inductance capacitance resonance equation,It is general using numeral when realizing wideband voltage controlled oscillator
Signal controls capacitor array, so as to change the capacitance in resonant tank, to realize a series of different frequency bands, so as to widen frequency
Rate scope, therefore formula(2) can be further represented as,
Meanwhile, nearby frequency bands fkAnd fk-1Between frequency interval fresWith voltage controlled oscillator tuning gain KVCORelation can
To be expressed as shown in formula (3).And for the continuity of frequency tuning, must be requested that any frequency band f of high bandkLowest frequency
Rate be necessarily less than its close to low-frequency range frequency band fk-1Peak frequency.In maximum VT VTUNE, maxIn the case of constant, frequency
Spaced fresMaximum determine KVCOMinimum value.
fres=fk-fk-1≤KVCO·VTUNE, max (3)
From the above mentioned, by reducing nearby frequency bands fkAnd fk-1Between frequency interval fresMode can reduce tuning increase
Beneficial KVCO, so as to reduce the phase noise of frequency synthesizer.
Simultaneously by formula (2), it can be seen that electric capacity CkWith frequency fkIt is non-linear relation, in order to realize the uniform of band separation
Property, it is necessary to set electric capacity with control code K values into approximate index variation capacitor array, and what traditional binary weights method was realized
The switched capacitor array digit of capacitor array is identical with control digit, capacitance CKIt is linear with control code K, so as to obtain
Different frequency bands spacing value differ greatly.
Therefore, the utility model devises a kind of uniform wideband voltage controlled oscillator of band separation, it is mainly by inductance electricity
Hold resonance circuit and switched capacitor array circuit composition.The capacitor array realized by two sections of linear approximation methods is to reduce each frequency
The otherness of spaced value, so as to improve the uniformity of band separation.
Above-mentioned inductor capacitor resonant circuit includes inductance L, fixed capacity Cb1And Cb2, variable capacitance CVAR1And CVAR2、NMOS
Transistor M3 and M4 and PMOS transistor M1 and M2.Referring to Fig. 1.
One pair pmos transistor M1 and M2 constitutes cross-coupled pair pipe with a pair of NMOS transistors M3 and M4, is used as offer energy
The negative impedance circuit of amount, supplement vibration loss.PMOS transistor M1 source electrode and the M2 of PMOS transistor source electrode are connected simultaneously
Power vd D.PMOS transistor M1 drain electrode is connected with the oscillation output end VP of voltage controlled oscillator, PMOS transistor M2 drain electrode with
The oscillation output end VN of voltage controlled oscillator is connected.The oscillation output end VN phases of PMOS transistor M1 grid and voltage controlled oscillator
Even, PMOS transistor M2 grid is connected with the oscillation output end VP of voltage controlled oscillator.Nmos pass transistor M3 source electrode and NMOS
Transistor M4 source electrode connects ground GND simultaneously.Nmos pass transistor M3 drain electrode is connected with the oscillation output end VP of voltage controlled oscillator,
Nmos pass transistor M4 drain electrode is connected with the oscillation output end VN of voltage controlled oscillator.Nmos pass transistor M3 grid and VCO
The oscillation output end VN of device is connected, and nmos pass transistor M4 grid is connected with the oscillation output end VP of voltage controlled oscillator.
The inductance L of symmetric difference structure, is used as the inductance part of inductor capacitor resonant circuit in parallel.Inductance L is connected to
Between differential vibrating the output end VP and VN of oscillator.
A pair of equivalent fixed capacity Cb1And Cb2, it is used as a part for the electric capacity of inductor capacitor resonant circuit.Fixed capacity
Cb1And Cb2Series connection, wherein left side fixed capacity Cb1Left end and the right fixed capacity Cb2Right-hand member be connected respectively voltage-controlled shake
Swing 2 oscillation output ends VP and VN of device.
A pair of equivalent variable capacitance CVAR1And CVAR2It is used as another part of the electric capacity of inductor capacitor resonant circuit.It is variable
Electric capacity CVAR1And CVAR2Series connection, and direction reversal connection, middle Access Control voltage VTUNE, wherein left side variable capacitance CVAR1Left end
With the right variable capacitance CVAR2Right-hand member be connected respectively 2 oscillation output ends VP and VN of voltage controlled oscillator.Variable capacitance
CVAR1And CVAR2Capacitance with control voltage VTUNEIncrease and reduce, so as to adjust resonant frequency, realize voltage controlled oscillator
Voltage tuning function.
Above-mentioned switched capacitor array circuit includes two sections of linear approximation switched capacitor arrays and digital logic control circuit.
Two sections of linear approximation switched capacitor arrays are connected between 2 oscillation output ends VP and VN, and this capacitance group is by difference
The control of control voltage, its excursion changes with Digital Logic control circuit input control signal, makes voltage controlled oscillator work
Make in different frequency bands, its frequency range is uniform, and the change of tuning gain is uniform.Two sections of linear approximation switched capacitor arrays
Array is formed by 7 pairs of switched-capacitor circuit parallel connections.Each pair switched-capacitor circuit is by 1 switch and 2 fixed capacity series connection
Into.Switch is serially connected between 2 fixed capacities, when switch closure, left and right fixed capacity formation series connection, while the electricity being in series
Appearance forms resonant tank in parallel with inductance.By controlling the switch in the middle of each pair switching capacity, change capacitor and inductor resonance and return
The capacitance on road, so as to change resonant frequency.The other end of 1 fixed capacity connects the oscillation output end VP of voltage controlled oscillator,
The other end of another fixed capacity connects the oscillation output end VN of voltage controlled oscillator.Referring to Fig. 2.
Digital Logic controls 4 signals of circuit realiration to the conversion of 7 signals.Digital Logic controls circuit by 3 OR gates
OR1-OR3,3 and door AND1-AND3 and a wire are constituted.OR gate OR1 2 inputs connect external input signal respectively
K0And K3, the switch of the one pair of which switched-capacitor circuit of OR gate OR1 output end two sections of linear approximation switched capacitor arrays of connection
b0.OR gate OR2 2 inputs connect external input signal K respectively1And K3, OR gate OR1 output end connects two sections and linearly forces
The switch b of the one pair of which switched-capacitor circuit of nearly switched capacitor array1.OR gate OR3 2 inputs connect outside defeated respectively
Enter signal K2And K3, the one pair of which switched-capacitor circuit of OR gate OR1 output end two sections of linear approximation switched capacitor arrays of connection
Switch b2.External input signal K is connected respectively with door AND1 2 inputs0And K3, two are connected with door AND1 output end
The switch b of the one pair of which switched-capacitor circuit of section linear approximation switched capacitor array3.Distinguish with door AND2 2 inputs
Connect external input signal K1And K3, the one pair of which of two sections of linear approximation switched capacitor arrays is connected with door AND1 output end
The switch b of switched-capacitor circuit4.External input signal K is connected respectively with door AND3 2 inputs2And K3, with door AND1's
Output end connects the switch b of the one pair of which switched-capacitor circuit of two sections of linear approximation switched capacitor arrays5.One end of wire connects
Meet external input signal K3, the one pair of which switched-capacitor circuit that the other end connects two sections of linear approximation switched capacitor arrays opens
Close b6.4 external input signal K0-K3By outside control, output signal changes and changed with different control signals, realizes 4
Conversion of the signal to 7 signals.Referring to Fig. 3.
In the switched capacitor array of traditional binary weight permutatation, the switch of outside control digit and switching capacity group
Digit is identical, therefore does not need Digital Logic control circuit.For example in the case of 4 control codes, typically using binary weights
Method realizes capacitor array, and 4 split powered-down capacitances are respectively Cf、2Cf、、4Cf、8Cf, and basic electric capacity Cb.Therefore capacitance is with control
The change formula of code is formula (4), wherein binary number K=K0K1K2K3。
The present embodiment realizes capacitor array in the case of 4 control codes using two sections of linear approximation methods, altogether 7 pairs of switches
Capacitance is respectively Cf1、2Cf1、、4Cf1、Cf2、2Cf2、、4Cf2、Cfb, and basic electric capacity Cb.First paragraph linear capacitance is by Cf1、
2Cf1、、4Cf1Three pairs of switching electric capacity is constituted, and second segment linear capacitance is by Cf2、2Cf2、、4Cf2Three pairs of switching electric capacity is constituted, due to the
Two sections of initial capacitances are bigger than first paragraph initial capacitance, therefore by first paragraph linear capacitance Cf1、2Cf1、、4Cf1Three pairs of switching electric capacity is made
For a part for second segment initial capacitance, a pair of basic electric capacity C are supplemented on this basisfbTo reach required initial capacitance
Value.The algorithm of Digital Logic control circuit in the utility model is proposed for this, capacitance is formula (5) with the change formula of control code,
Wherein K=K0K1K2K3。
According to formula (5), the 7 bit switch condenser network such as Fig. 2 realizes that 7 split powered-down capacitances are respectively first linear altogether
The C of capacitor arrayf1、2Cf1、4Cf1, the C of the second linear capacitive arrayf2、2Cf2、4Cf2, the second basic electric capacity Cfb.Its arrangement mode
To switch b0Respectively connect a C for left and right endsf1, switch b1Respectively connect a 2C for left and right endsf1, switch b2Respectively go here and there left and right ends
Join a 4Cf1, switch b3Respectively connect a C for left and right endsf2, switch b4Respectively connect a 2C for left and right endsf2, switch b5Left and right
Respectively connect a 4C at two endsf2, switch b6Respectively connect a C for left and right endsfb.7 pairs of switching capacity parallel connections constitute 7 bit switch electric capacity battle arrays
Row.By controlling first group of linear capacitive array to switch, its capacitance can change and linear change with control code, form two sections
The front half section of linear approximation method's curve, as shown in Figure 4.By controlling the switch of second group of linear capacitive array, its capacitance can be with
The linear change with control code change, forms the second half section of two sections of linear approximation method's curves, as shown in Figure 4.Two groups linearly electric
Hold the straight line that array forms Different Slope respectively, approach preferable exponential curve.Furthermore, the initial capacitance of second half section is more than first half
The initial capacitance of section, therefore while from second group of linear capacitive array, all first group of linear capacitive arrays are chosen, and
On this basis, a pair of second basic capacitor arrays are increased, to supplement the initial capacitance of deficiency.
Relative to binary weights method, in the case of not increasing total capacitance area, the capacitance regulation that this method is realized is bent
Line more approaches ideal curve.Referring to Fig. 4, pair of binary weight permutatation and two sections of linear approximatiosses and ideal curve
Than, it is known that two sections of linear approximation methods can more approach ideal curve.
According to formula (5), the switch selection algorithm controls circuit realiration with Digital Logic, as shown in Figure 3.The circuit is by three
With door, three OR gates, a wire composition.Wherein K3With K0Connect OR gate OR1 input, b0Connect OR gate OR1 output；Its
Middle K3With K1Connect OR gate OR1 input, b1Connect OR gate OR1 output；Wherein K3With K2Connect OR gate OR1 input, b2Even
Connect OR gate OR1 output；Wherein K3With K0Connection and door AND1 input, b3Connection and door AND1 output；Wherein K3With K1Even
Connect the input with door AND2, b4Connection and door AND2 output；Wherein K3With K2Connection and door AND3 input, b5Connection and door
AND3 output；And K3With b6Connection.Pass through three OR gates and control the first linear capacitive arrays, it is possible to achieve two sections of lines in Fig. 4
Property approximatioss curve front half section, while it is not enough to supplement second segment linear capacitance initial capacitance, gate the first linear capacitance
All switches of array, to replenish initial capacitance not enough in resonant tank in second segment linear capacitance.Pass through three and gate
The second linear capacitive array is made, is served only for realizing the second half section of two sections of linear approximation method's curves in Fig. 4.And wire is directly choosing
Segment signal is connected to the second basic electric capacity, is also that the second basic electric capacity parallel connection is entered into second group of linear capacitance group, so as to reach humorous
The initial capacitance value shaken the need for loop.
For 4 control codes of this example, 16 frequency bands, frequency range as requested, determine K=0000 and K=altogether
The initial frequency f of two frequency bands under 111115And f0(note：Calculate and calculated at the original frequency of frequency band below, that is, make
CvarIt is zero), to calculate absolute uniform interval fres,ideal=(f15-f0)/15；Pass through f0C is calculated according to formula (2) and formula (5)b.Root
According to two sections of linear approximation modes, f is made7=f0+7fres,ideal, now K=0111, and C is calculated according to formula (2) and formula (5)f1。
Make f8=f0+8fres,ideal, now K=1000, and C is calculated according to formula (2) and formula (5)fb.F during last K=111115, according to
Formula (2) calculates C with formula (5)f2。
Under 180nm CMOS technologies, 2.9GHz- is devised using binary weights method and two sections of linear approximation methods respectively
3.5GHz wideband voltage controlled oscillator, f0=2.9GHz, f15=3.5GHz, so definitely averagely band separation is fres,ideal=
40MHz.It is as shown in Figure 5 that emulation obtains side frequency interval.Binary weights method obtains fres,max=59.65MHz, fres,min=
32.98MHz, fres,max/fres,min=1.8.Two sections of linear approximation methods obtain fres,max=43.57MHz, fres,min=
34.50MHz, fres,max/fres,min=1.26.The maximum band interval that two sections of linear approximation methods realize is less than binary weights method
The maximum band interval of realization, and close to 40MHz definitely averagely band separation fres,ideal, particularly band separation uniformity
It is very significantly improved, 1.8 times from the traditional binary method of weighting of the ratio of maximum band spacing value and minimum band separation value
Drop to 1.26 times of this method, have dropped 30%, therefore in the wideband voltage controlled oscillator that two sections of linear approximation methods realize, can
To obtain smaller tuning gain KVCO, so as to so that frequency synthesizer obtains performance of preferably mutually making an uproar.
The utility model controls circuit to be changed 4 control signals by Digital Logic, realizes that control 7 is split powered-down
The switch of appearance, compared to the structure of 4 pairs of general switching capacities, can more approach preferable capacitance curve.
It should be noted last that, above embodiment is only to illustrate the technical solution of the utility model rather than limit
System, although the utility model is described in detail with reference to example, it will be understood by those within the art that, can be right
The technical solution of the utility model is modified or equivalent substitution, without departing from the spirit and model of technical solutions of the utility model
Enclose, it all should cover among right of the present utility model.
Claims (4)
1. a kind of uniform wideband voltage controlled oscillator of band separation, including voltage controlled oscillator, it is characterised in that：The VCO
Device is made up of inductor capacitor resonant circuit and switched capacitor array circuit；
Above-mentioned switched capacitor array circuit includes two sections of linear approximation switched capacitor arrays and digital logic control circuit；
Two sections of linear approximation switched capacitor arrays form array by 7 pairs of switched-capacitor circuit parallel connections；Each pair switched-capacitor circuit is equal
It is in series by 1 switch and 2 fixed capacities；Switch is serially connected between 2 fixed capacities；One of fixed capacity it is another
One end connects the oscillation output end VN of voltage controlled oscillator, and the vibration of the other end connection voltage controlled oscillator of another fixed capacity is defeated
Go out to hold VP；
Digital Logic control circuit is made up of 3 OR gate OR1-OR3,3 with door AND1-AND3 and a wire；OR gate OR1's
2 inputs connect external input signal K respectively0And K3, OR gate OR1 two sections of linear approximation switching capacities battle arrays of output end connection
The switch b of the one pair of which switched-capacitor circuit of row0；OR gate OR2 2 inputs connect external input signal K respectively1And K3,
OR gate OR1 output end connects the switch b of the one pair of which switched-capacitor circuit of two sections of linear approximation switched capacitor arrays1；Or
Door OR3 2 inputs connect external input signal K respectively2And K3, OR gate OR1 two sections of linear approximations switches of output end connection
The switch b of the one pair of which switched-capacitor circuit of capacitor array2；Outside input letter is connected respectively with door AND1 2 inputs
Number K0And K3, the one pair of which switched-capacitor circuit of two sections of linear approximation switched capacitor arrays is connected with door AND1 output end
Switch b3；External input signal K is connected respectively with door AND2 2 inputs1And K3, two sections are connected with door AND1 output end
The switch b of the one pair of which switched-capacitor circuit of linear approximation switched capacitor array4；Connect respectively with door AND3 2 inputs
Meet external input signal K2And K3, the one pair of which for being connected two sections of linear approximation switched capacitor arrays with door AND1 output end opens
The switch b of powered-down capacitive circuit5；One end connection external input signal K of wire3, the other end two sections of linear approximation switching capacities of connection
The switch b of the one pair of which switched-capacitor circuit of array6。
2. the uniform wideband voltage controlled oscillator of a kind of band separation according to claim 1, it is characterised in that：
Above-mentioned inductor capacitor resonant circuit includes nmos pass transistor M3 and M4, PMOS transistor M1 and M2, inductance L, fixed capacity
Cb1And Cb2And variable capacitance CVAR1And CVAR2；
PMOS transistor M1 source electrode and the M2 of PMOS transistor source electrode connect power vd D simultaneously；Nmos pass transistor M3 source
Pole is connected ground GND simultaneously with nmos pass transistor M4 source electrode；PMOS transistor M1 drain electrode, nmos pass transistor M3 drain electrode,
PMOS transistor M2 grid and nmos pass transistor M4 grid are connected with the oscillation output end VP of voltage controlled oscillator；PMOS crystal
Pipe M2 drain electrode, nmos pass transistor M4 drain electrode, PMOS transistor M1 grid and nmos pass transistor M3 grid shake with voltage-controlled
The oscillation output end VN for swinging device is connected；
Inductance L is connected between the oscillation output end VP and VN of voltage controlled oscillator；
Fixed capacity Cb1And Cb2After series connection, its one end connects the oscillation output end VP of voltage controlled oscillator, and other end connection is voltage-controlled to shake
Swing the oscillation output end VN of device；
Variable capacitance CVAR1And CVAR2Direction reversal connection, wherein between access control voltage VTUNE；Variable capacitance CVAR1And CVAR2After series connection,
Its one end connects the oscillation output end VP of voltage controlled oscillator, and the other end connects the oscillation output end VN of voltage controlled oscillator.
3. the uniform wideband voltage controlled oscillator of a kind of band separation according to claim 2, it is characterised in that：Fixed capacity
Cb1And Cb2For equivalent fixed capacity.
4. the uniform wideband voltage controlled oscillator of a kind of band separation according to claim 2, it is characterised in that：Variable capacitance
CVAR1And CVAR2For equivalent variable capacitance.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110808727A (en) * | 2019-10-29 | 2020-02-18 | 上海华虹宏力半导体制造有限公司 | Programmable capacitor array circuit |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110808727A (en) * | 2019-10-29 | 2020-02-18 | 上海华虹宏力半导体制造有限公司 | Programmable capacitor array circuit |
| CN110808727B (en) * | 2019-10-29 | 2023-04-28 | 上海华虹宏力半导体制造有限公司 | Programmable capacitor array circuit |
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