CN206194782U - LED chip convenient to processing - Google Patents

LED chip convenient to processing Download PDF

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Publication number
CN206194782U
CN206194782U CN201621134842.7U CN201621134842U CN206194782U CN 206194782 U CN206194782 U CN 206194782U CN 201621134842 U CN201621134842 U CN 201621134842U CN 206194782 U CN206194782 U CN 206194782U
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CN
China
Prior art keywords
type semiconductor
layer
led chip
semiconductor layer
type
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Expired - Fee Related
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CN201621134842.7U
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Chinese (zh)
Inventor
黄胜明
张冬平
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Wuhu Xin Xin Microelectronics Co Ltd
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Wuhu Xin Xin Microelectronics Co Ltd
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Priority to CN201621134842.7U priority Critical patent/CN206194782U/en
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Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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Abstract

The utility model discloses a LED chip convenient to processing relates to the semiconductor chip field, the LED chip is from include on and down in proper order: the substrate, the substrate has upper surface and lower surface, be located N type semiconductor layer on the substrate upper surface, N type semiconductor layer is the notch cuttype, and N type semiconductor layer includes the procumbent first surface in top, the vertical procumbent third of second surface and bottom surface, and the second surface is the cockscomb structure, be located luminescent layer on the N type semiconductor, the luminescent layer is located the first surface, be located P type semiconductor layer on the luminescent layer, a substrate, P type semiconductor layer goes up and N type semiconductor third current barrier layer on the surface, formed at be in the P type electrode on the P type semiconductor layer in the current barrier layer, form with be in N type semiconductor layer third N type electrode on the surface in the current barrier layer, the utility model provides a LED chip among the prior art to produce rosin joint, off normal, short circuit etc. In SMT application of optimization easily not enough.

Description

A kind of LED chip for being easy to process
Technical field
The utility model is related to semiconductor chip field, more particularly to a kind of LED chip for being easy to process.
Background technology
Light emitting diode (Light-Emitting Diode, LED) is a kind of luminous semiconductor electronic component of energy.It is this Electronic component occurred early in 1962, and the feux rouges of low luminosity can only be sent in early days, and other monochromatic versions are developed afterwards, when Throughout visible ray, infrared ray and ultraviolet, luminosity also brings up to suitable luminosity to the light that can be sent to today.Because it has Energy-saving and environmental protection, safety, long lifespan, low-power consumption, low-heat, high brightness, waterproof, miniature, shockproof, easy light modulation, light beam are concentrated, safeguarded Easy the features such as, can be widely applied to the fields such as various instructions, display, decoration, backlight, general lighting.
Traditional LED chip packaging technology step is as follows:First, LED chip is fixed on branch by interface Heat Conduction Material In frame, i.e. die bond technique, now the metal electrode of LED chip face up;Second, chip electrode is realized by gold thread bonding technology With the connection of external circuit, LED chip is wired up using the resin of high transparency then, to protect luminescent device and encapsulation to tie Structure.
It is not enough that traditional LED chip packaging technology is primarily present following three points:The heat transfer efficiency of chip is low, multi-chip assembling Complexity it is high, and packaging efficiency is low.Specific manifestation is as follows:First, the heat transfer property of chip is subject to the heat conduction of boundary material The limitation of ability, especially market are increasing to the demand of high-power LED chip, and use the LED of conventional package technique The heat dissipation problem of chip is protruded all the more;Second, the neck applied with high-power, the multicoloured LED modules that multi-chip is constituted Domain is more and more extensive, and using conventional wire bonding technology, lead can occupy quite a few space, cause encapsulation volume excessive, It is unfavorable for the miniaturization of product, while low production efficiency;3rd, conventional package technological process is complicated, low production efficiency.
Utility model content
Technical problem to be solved in the utility model is to provide a kind of LED chip be easy to and process, to solve existing skill Caused above-mentioned multinomial defect in art.
To achieve the above object, the utility model provides following technical scheme:A kind of LED chip for being easy to process, institute Stating LED chip includes:
Substrate, the substrate has upper and lower surface;
N type semiconductor layer in the substrate top surface, the n type semiconductor layer is step type, n type semiconductor layer 3rd surface of first surface, vertical second surface and bottom tiling including top tiling, the second surface is sawtooth Shape;
Luminescent layer on the N-type semiconductor, the luminescent layer is located on first surface;
P type semiconductor layer on the luminescent layer;
Current barrier layer on the p type semiconductor layer and on the surface of N-type semiconductor the 3rd;
It is formed at the P-type electrode being on p type semiconductor layer in the current barrier layer;
Formed and the N-type electrode in the current barrier layer on the surface of n type semiconductor layer the 3rd.
Preferably, the current barrier layer is provided with sacrificial metal layer.
Preferably, the face of the area of the current barrier layer between the P-type electrode and N-type electrode and whole electrode surface The ratio between product is in the range of 1/3-1/2.
Preferably, the substrate lower surface is provided with thermal insulation layer.
Preferably, the thermal insulation layer lower surface is provided with aluminum thermal fin.
Beneficial effect using above technical scheme is:A kind of LED of the utility model structure, by by N-type electrode With the control of the area ratio of P-type electrode in rational scope, solving surface tension causes the defect of off normal rosin joint;By Salient point is grown on the pad of P-type electrode and N-type electrode, the difference in height between electrode pad has been effectively canceled out, effectively reduced Off normal rosin joint, improves packaging effect;Simultaneously as area (insulation spacing) control of the passivation layer between electrode is being closed In the range of reason, the short-circuit failure in SMT is effectively prevent, the second surface of n type semiconductor layer is serrated so that from LED The light that internal illumination area sends changes the angle of emergence of total reflection in jagged interface Multiple Scattering, increased light outgoing Probability, so as to improve the luminous efficiency of LED.The brightness ratio conventional method of this programme LED chip improves 3%, and insulation Heat-conducting layer and aluminum thermal fin effectively can radiate to LED chip, strengthen its service life.
Brief description of the drawings
Fig. 1 is structural representation of the present utility model.
Wherein, 1- substrates, 2-N type semiconductor layers, 3- luminescent layers, 4-P type semiconductor layers, 5-P type electrodes, 6- current blockings Layer, 7- thermal insulation layers, 8-N type electrodes, 9- sacrificial metal layers, 10- aluminum thermal fins, 21- first surfaces, 22- second surfaces, The surfaces of 23- the 3rd.
Specific embodiment
Describe preferred embodiment of the present utility model in detail below in conjunction with the accompanying drawings.
Fig. 1 shows specific embodiment of the present utility model:A kind of LED chip for being easy to process, the LED chip bag Include:
Substrate 1, the substrate 1 has upper and lower surface, and substrate 1 can be sapphire, SiC, GaN etc.;
N type semiconductor layer 2 on the upper surface of the substrate 1, the n type semiconductor layer 2 is step type, and N-type is partly led Body layer 2 includes the 3rd surface 23 of the first surface 21, vertical second surface 22 and bottom tiling of top tiling, described second Surface 22 is zigzag, and the vertex angle of sawtooth is 40 ° -47 °, a length of 1um-1.3um of triangle edges of sawtooth, LED chip Inside is additionally provided with internal illumination layer 3, such as quantum well radiation area, and the light sent from the LED chip internal illumination area is in zigzag Interface Multiple Scattering, change the angle of emergence of total reflection, the probability of light outgoing is increased, so as to improve the luminous effect of LED Rate, the LED chip brightness ratio conventional method of this programme improves 3%;
Luminescent layer 3 on the N-type semiconductor, the luminescent layer 3 is located on first surface 21, N shape semiconductor layers Material be N-type GaN;
P type semiconductor layer 4 on the luminescent layer 3, the material of p-shaped semiconductor layer is p-type GaN etc.;
Current barrier layer 6 on the p type semiconductor layer 4 and on the surface 23 of N-type semiconductor the 3rd, due to by electrode Between current barrier layer 6 area control in rational scope, effectively prevent the short-circuit failure in SMT;
It is formed at the P-type electrode 5 being on p type semiconductor layer 4 in the current barrier layer 6;
Formed and the N-type electrode 8 in the current barrier layer 6 on the surface 23 of n type semiconductor layer 2 the 3rd, electrode material Material can be a kind of metal material or various metals material shape in aluminium, silicon, titanium, tungsten, copper, silver, nickel, gold, silver, indium, tin etc. Into multilayer film or alloy.
In the present embodiment, the current barrier layer 6 is provided with sacrificial metal layer 9, protects LED chip, is carrying out SMT techniques When, remove sacrificial metal layer 9.
In the present embodiment, area and the whole electricity of the current barrier layer 6 between the P-type electrode 5 and N-type electrode 8 The area ratio of pole-face is in the range of 1/3-1/2.
In the present embodiment, the lower surface of the substrate 1 is provided with thermal insulation layer 7, can transmit the heat produced during LED operation Amount, and can insulate, prevent short circuit.
In the present embodiment, the lower surface of the thermal insulation layer 7 is provided with aluminum thermal fin 10, and thermal insulation layer 7 was transmitted The heat for coming is dissipated, and reduces the heat of LED chip, optimizes the operating temperature of LED chip.
The area of foregoing " electrode surface " refer to the area of two electrodes and insulated part and current barrier layer 6 area it With.
Based on above-mentioned:A kind of LED of the utility model structure, by by the area ratio of N-type electrode 8 and P-type electrode 5 In rational scope, solving surface tension causes the defect of off normal rosin joint for control;By in P-type electrode 5 and N-type electrode 8 Pad on grow salient point, effectively canceled out the difference in height between electrode pad, efficiently reduce off normal rosin joint, improve Packaging effect;Simultaneously as the area (insulation spacing) of the passivation layer between electrode is controlled in rational scope, it is effectively anti- The short-circuit failure in SMT is stopped, the second surface 22 of n type semiconductor layer 2 is serrated so that sent from LED internal illuminations area Light in jagged interface Multiple Scattering, change the angle of emergence of total reflection, the probability of light outgoing is increased, so as to improve The luminous efficiency of LED.The brightness ratio conventional method of this programme LED chip improves 3%, and thermal insulation layer 7 and aluminum dissipate Backing 10 effectively can radiate to LED chip, strengthen its service life.
Above-described is only preferred embodiment of the present utility model, it is noted that for the ordinary skill of this area For personnel, on the premise of the utility model creation design is not departed from, various modifications and improvements can be made, these all belong to In protection domain of the present utility model.

Claims (5)

1. it is a kind of be easy to processing LED chip, it is characterised in that:The LED chip includes:
Substrate, the substrate has upper and lower surface;
N type semiconductor layer in the substrate top surface, the n type semiconductor layer is step type, and n type semiconductor layer includes 3rd surface of the first surface, vertical second surface and bottom tiling of top tiling, the second surface is zigzag;
Luminescent layer on the N-type semiconductor, the luminescent layer is located on first surface;
P type semiconductor layer on the luminescent layer;
Current barrier layer on the p type semiconductor layer and on the surface of N-type semiconductor the 3rd;
It is formed at the P-type electrode being on p type semiconductor layer in the current barrier layer;
Formed and the N-type electrode in the current barrier layer on the surface of n type semiconductor layer the 3rd.
2. it is according to claim 1 it is a kind of be easy to processing LED chip, it is characterised in that set on the current barrier layer There is sacrificial metal layer.
3. a kind of LED chip for being easy to processing according to claim 1, it is characterised in that the P-type electrode and N-type electricity The area of the current barrier layer between pole is in the range of 1/3-1/2 with the area ratio of whole electrode surface.
4. it is according to claim 1 it is a kind of be easy to processing LED chip, it is characterised in that the substrate lower surface is provided with Thermal insulation layer.
5. it is according to claim 4 it is a kind of be easy to processing LED chip, it is characterised in that the thermal insulation layer following table Face is provided with aluminum thermal fin.
CN201621134842.7U 2016-10-19 2016-10-19 LED chip convenient to processing Expired - Fee Related CN206194782U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201621134842.7U CN206194782U (en) 2016-10-19 2016-10-19 LED chip convenient to processing

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201621134842.7U CN206194782U (en) 2016-10-19 2016-10-19 LED chip convenient to processing

Publications (1)

Publication Number Publication Date
CN206194782U true CN206194782U (en) 2017-05-24

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN201621134842.7U Expired - Fee Related CN206194782U (en) 2016-10-19 2016-10-19 LED chip convenient to processing

Country Status (1)

Country Link
CN (1) CN206194782U (en)

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GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20170524

Termination date: 20171019

CF01 Termination of patent right due to non-payment of annual fee