CN206164503U - Low stray microwave frequency synthesizer in miniaturized broadband - Google Patents
Low stray microwave frequency synthesizer in miniaturized broadband Download PDFInfo
- Publication number
- CN206164503U CN206164503U CN201621247582.4U CN201621247582U CN206164503U CN 206164503 U CN206164503 U CN 206164503U CN 201621247582 U CN201621247582 U CN 201621247582U CN 206164503 U CN206164503 U CN 206164503U
- Authority
- CN
- China
- Prior art keywords
- dds
- frequency
- control circuit
- except
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
The utility model discloses a realize the miniaturized microwave frequency synthesizer of the low heterogeneous in broadband, including the 100MHz that connects gradually constant temperature crystal oscillator, produce changeable signal and change PLLb circuit, the amplifier no. 2 of single -ended transformer, amplifier no. 1, realization frequency dividing ratio as AD9914 type DDS's reference clock signal's PLLa circuit, DDS, bi -polar, still include the FPGA control circuit with PLLa circuit, DDS and PLLb circuit connection. The utility model discloses regard high reference clock DDS output signal as the reference signal of phase -locked loop circuit, and DDS's reference clock can change, adopt this kind of frequency synthesis scheme, can improve DDS's output bandwidth, and then the doubling of frequency number of times of phase -locked loop has been reduced, simultaneously because DDS's reference is variable, can be through changing the intrinsic stray loop filter passband of keeping away from that reference signal made DDS exist, low output signal spurious suppression falls, broadband microwave frequency synthesizer's design circuit has been simplified greatly to this kind of mode, and the output signal index is effectively improved.
Description
Technical field
The utility model belongs to frequency synthesizer technique field, is related to a kind of minimized wide-band low spurious microwave synthesizer
Device.
Background technology
At present, the development trend of test equipment is miniaturization, modularization, standardization.Client it is generally desirable to function is different
Module be combined, you can build the test equipment for possessing many kinds of parameters power of test.This allows for component testing equipment
Module must possess miniaturization, modularization, standardized requirement.
Microwave Frequency Synthesizer is a kind of important Microwave Test Equipment, and the country rarely has the miniaturization of standard, modularization to produce
Product.This major limitation is more multiple in the implementation of the Microwave Frequency Synthesizer with broad frequency band and with superior performance index
It is miscellaneous, realize that miniaturization difficulty is larger.
The content of the invention
The technical problems to be solved in the utility model is:A kind of miniaturization, broadband, the conjunction of the microwave frequency of low spurious are provided
Grow up to be a useful person.
The technical scheme that the utility model is taken is:A kind of minimized wide-band low spurious Microwave Frequency Synthesizer, including
100MHz constant-temperature crystal oscillators and phase frequency detector one and FPGA control circuit, 100MHz constant-temperature crystal oscillator output ends are connected to frequency discrimination mirror
The reference input of phase device one, the output end of phase frequency detector one is connected to loop filter input, loop filter output
End is connected to the voltage-controlled end of voltage controlled oscillator one, and one point of one output end Jing power splitter of voltage controlled oscillator is two-way, wherein Jing all the way
Except the rf inputs that phase frequency detector one is connected to after Fractional-N frequency device one, FPGA control circuit is connected to except the control of Fractional-N frequency device one
End processed, FPGA control circuit is used to arrange except the N values of Fractional-N frequency device one change between 27-35;
Another road output end of power splitter one is connected to the reference signal end of the DDS of AD9914 types, FPGA control circuit with
The control end connection of DDS, FPGA control circuit is used to arrange the differential signal that DDS exports 500MHz-750MHz bandwidth, and DDS is defeated
Go out end and be connected to the input that both-end turns single-end transformer, both-end turns the output end of single-end transformer and is connected to the defeated of amplifier one
Enter end, the output end of amplifier one is connected to the reference input of phase frequency detector two, the output end connection of phase frequency detector two
To the input of loop filter two, loop filter output end is connected to the voltage-controlled end of voltage controlled oscillator two, voltage controlled oscillator
Two two points of output end Jing power splitters are two-way, wherein sequentially passing through the four-divider of connection, low pass filter all the way and except N point
The rf inputs of phase frequency detector two are connected to after frequency device two, another road is connected to amplifier two, FPGA control circuit connection
To the control end except Fractional-N frequency device two and the control end of four-divider, FPGA control circuit is for setting except the N values of Fractional-N frequency device exist
Change between 4-6.
The beneficial effects of the utility model:Compared with prior art, the utility model effect is as follows:
1)The utility model using high reference clock DDS output signals as phase-locked loop circuit reference signal, and the ginseng of DDS
Examining clock can change.Using this frequency synthesis scheme, the output bandwidth of DDS can be improved, and then reduce phaselocked loop
Frequency multiplication number of times, simultaneously because the reference of DDS is variable, can make the intrinsic spuious away from ring of DDS presence by changing reference signal
Path filter passband, reduces output signal spurious reduction.This mode enormously simplify the design of wide-band microwave frequency synthesizer
Circuit, and index signal output is effectively improved, so that Microwave Frequency Synthesizer realizes miniaturization, broadband, the effect of low spurious
Really;
2)The present invention makes full use of its high frequency resolution, Broadband emission, low miscellaneous using the application of high reference clock DDS
Scattered characteristic, can be improved can output signal frequency and bandwidth, while ensure that output by single phase-locked loop circuit
Signal has good index;
3)Two kinds of advantage technologies are combined, the miniaturization of wide-band microwave frequency synthesizer is realized in a simple and efficient manner and is set
Meter.
Description of the drawings
Fig. 1 is control attachment structure schematic diagram of the present utility model.
Specific embodiment
Below in conjunction with the accompanying drawings and specific embodiment is described further to the utility model.
Embodiment:As shown in figure 1, a kind of minimized wide-band low spurious Microwave Frequency Synthesizer, including 100MHz constant temperature crystalline substance
Shake 1, phase frequency detector 1, loop filter 1, voltage controlled oscillator 1, power splitter 1, except Fractional-N frequency device one 6, AD9914
Type DDS 7, both-end turns single-end transformer 8, amplifier 1, phase frequency detector 2 10, loop filter 2 14, voltage controlled oscillator
2 15, power splitter 2 16, four-divider 13, low pass filter 12, except Fractional-N frequency device 2 11, amplifier 2 17 and FPGA control electricity
Road 18;
The signal output part 101 of 100MHz constant-temperature crystal oscillators 1 is connected to the reference input of phase frequency detector 1, frequency and phase discrimination
The signal output part 102 of device 1 is connected to the input of loop filter 3, and the signal output part 103 of loop filter 3 is connected to pressure
The voltage-controlled end of controlled oscillator 1, one 5 points of one 4 signal output part of voltage controlled oscillator, 104 Jing power splitters are two-way, wherein believing all the way
The input of number output end 106 except the input of Fractional-N frequency device 1, except the signal output part 107 of Fractional-N frequency device 1 is connected to frequency and phase discrimination
The rf inputs of device 1, the signal control end 302 of FPGA control circuit is connected to except the control end of Fractional-N frequency device 1, FPGA
Control circuit 18 is used to arrange except the N values of Fractional-N frequency device one change between 27-35;
Another road signal output part 105 of power splitter 1 is connected to the reference signal end of the DDS of AD9914 types, FPGA controls
Circuit processed 18 is connected with the control end of DDS 7, arranges DDS 7 by FPGA control circuit 18 and exports 500MHz-750MHz bandwidth
Differential signal, the signal output parts 108 of DDS 7 are connected to the input that both-end turns single-end transformer 8, and both-end turns single-end transformer
8 signal output part 109 is connected to the input of amplifier 1 and carries out signal amplification, the signal output part 110 of amplifier 1
The reference input of phase frequency detector 2 10 is connected to, the signal output part 201 of phase frequency detector 2 10 is connected to loop filtering
The input of device 2 14, the signal output part 202 of loop filter 14 is connected to the voltage-controlled end of voltage controlled oscillator 2 15, VCO
2 16 points of 2 15 signal output part of device, 203 Jing power splitters are two-way, wherein all the way signal output part 204 sequentially passes through the four of connection
Frequency divider 13, low pass filter 14 and except the rf inputs that phase frequency detector 2 206 is connected to after Fractional-N frequency device 2 15, separately
All the way signal output part 208 is connected to Jing signal output parts 209 after amplifier 2 17 and obtains final wide-band microwave signal, FPGA controls
The signal output part 301 of circuit processed 18 is connected to the control end of four-divider 13, another signal output part 303 of FPGA control circuit 18
It is connected to except the control end of Fractional-N frequency device 2 11, FPGA control circuit is used to arrange except the N values of Fractional-N frequency device change between 4-6.
Above-mentioned phase frequency detector one, loop filter one, voltage controlled oscillator one, power splitter one, except Fractional-N frequency device one constitute one
Individual PLLa circuits, by FPGA control circuit control except Fractional-N frequency device changes change frequency dividing ratio, the 100MHz that export can constant-temperature crystal oscillator
Signal exports the reference clock signal of the signal as AD9914 types DDS of a changeable frequency Jing after the PLLa circuits;Loop is filtered
Ripple device two, voltage controlled oscillator two, power splitter two, four-divider, low pass filter, except Fractional-N frequency device two constitute a PLLb circuit,
FPGA control circuit control PLLb circuits except the frequency dividing ratio and four-divider of Fractional-N frequency device b, DDS reference clocks it is variable with point
The variable PLLb circuits of frequency ratio so that DDS output factors improve the noise restraint of radio frequency output signal away from carrier wave.
The above, specific embodiment only of the present utility model, but protection domain of the present utility model do not limit to
In this, any those familiar with the art can readily occur in change in the technical scope that the utility model is disclosed
Or replace, all should cover within protection domain of the present utility model, therefore, protection domain of the present utility model should be with the power
The protection domain that profit is required is defined.
Claims (1)
1. a kind of minimized wide-band low spurious Microwave Frequency Synthesizer, it is characterised in that:Including 100MHz constant-temperature crystal oscillators and frequency discrimination
Phase discriminator one and FPGA control circuit, 100MHz constant-temperature crystal oscillator output ends are connected to the reference input of phase frequency detector one,
The output end of phase frequency detector one is connected to loop filter input, and loop filter output end is connected to voltage controlled oscillator one
Voltage-controlled end, one point of one output end Jing power splitter of voltage controlled oscillator is two-way, wherein being connected to mirror Jing after except Fractional-N frequency device one all the way
The rf inputs of frequency phase discriminator one, FPGA control circuit is connected to except the control end of Fractional-N frequency device one, and FPGA control circuit is used for
Arrange except the N values of Fractional-N frequency device one change between 27-35;
Another road output end of power splitter one is connected to the reference signal end of the DDS of AD9914 types, and FPGA control circuit is with DDS's
Control end connects, and FPGA control circuit is used to arrange the differential signal that DDS exports 500MHz-750MHz bandwidth, and DDS output ends connect
The input that both-end turns single-end transformer is connected to, both-end turns the input that the output end of single-end transformer is connected to amplifier one,
The output end of amplifier one is connected to the reference input of phase frequency detector two, and the output end of phase frequency detector two is connected to loop
The input of wave filter two, loop filter output end is connected to the voltage-controlled end of voltage controlled oscillator two, and voltage controlled oscillator two is exported
Two points of Jing power splitters are held to be two-way, wherein sequentially passing through the four-divider of connection, low pass filter all the way and except Fractional-N frequency device two
The rf inputs of phase frequency detector two are connected to afterwards, and another road is connected to amplifier two, and FPGA control circuit is connected to except N point
The control end of frequency device two and the control end of four-divider, FPGA control circuit is used to arrange except the N values of Fractional-N frequency device are in 4-6 anaplasias
Change.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201621247582.4U CN206164503U (en) | 2016-11-22 | 2016-11-22 | Low stray microwave frequency synthesizer in miniaturized broadband |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201621247582.4U CN206164503U (en) | 2016-11-22 | 2016-11-22 | Low stray microwave frequency synthesizer in miniaturized broadband |
Publications (1)
Publication Number | Publication Date |
---|---|
CN206164503U true CN206164503U (en) | 2017-05-10 |
Family
ID=58660795
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201621247582.4U Active CN206164503U (en) | 2016-11-22 | 2016-11-22 | Low stray microwave frequency synthesizer in miniaturized broadband |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN206164503U (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108616275A (en) * | 2018-08-01 | 2018-10-02 | 无锡华测电子系统有限公司 | A kind of use for laboratory small microwave signal source |
CN108768392A (en) * | 2018-05-08 | 2018-11-06 | 成都大奇鹰科技有限公司 | A kind of broadband high-precision frequency synthesizer and frequency combining method |
CN109412589A (en) * | 2017-08-16 | 2019-03-01 | 天津乾铁科技有限公司 | A kind of optimization method that fractional synthesizer integral boundary is spuious and system |
CN110912555A (en) * | 2019-12-13 | 2020-03-24 | 贵州航天计量测试技术研究所 | Phase-locked loop circuit structure adopting high-speed D/A preset technology |
CN111228652A (en) * | 2020-03-27 | 2020-06-05 | 河南翔宇医疗设备股份有限公司 | Microwave solid-state power source circuit and microwave therapeutic instrument |
-
2016
- 2016-11-22 CN CN201621247582.4U patent/CN206164503U/en active Active
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109412589A (en) * | 2017-08-16 | 2019-03-01 | 天津乾铁科技有限公司 | A kind of optimization method that fractional synthesizer integral boundary is spuious and system |
CN109412589B (en) * | 2017-08-16 | 2024-04-05 | 天津乾铁科技有限公司 | Optimizing method and system for integer boundary spurious of fractional frequency synthesizer |
CN108768392A (en) * | 2018-05-08 | 2018-11-06 | 成都大奇鹰科技有限公司 | A kind of broadband high-precision frequency synthesizer and frequency combining method |
CN108616275A (en) * | 2018-08-01 | 2018-10-02 | 无锡华测电子系统有限公司 | A kind of use for laboratory small microwave signal source |
CN110912555A (en) * | 2019-12-13 | 2020-03-24 | 贵州航天计量测试技术研究所 | Phase-locked loop circuit structure adopting high-speed D/A preset technology |
CN111228652A (en) * | 2020-03-27 | 2020-06-05 | 河南翔宇医疗设备股份有限公司 | Microwave solid-state power source circuit and microwave therapeutic instrument |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN206164503U (en) | Low stray microwave frequency synthesizer in miniaturized broadband | |
CN105429641B (en) | A kind of error lock prevention high performance wideband Microwave Frequency Synthesizer | |
CN106385255B (en) | A kind of polycyclic apparatus for frequency synthesizing that low noise high-resolution is tunable and method | |
CN104202048B (en) | Broadband totally-integrated phase-locked loop frequency synthesizer | |
CN205584178U (en) | Realize frequency agility's broadband microwave frequency synthesizer | |
CN207427123U (en) | A kind of ultra wide band Low phase noise frequency source using phaselocked loop filtering principle | |
CN103986464B (en) | A kind of cycle of phase-locked loop parameter self-calibrating device and method | |
CN205232198U (en) | Mistake proofing lock high performance broadband microwave frequency synthesizer | |
CN102684685A (en) | phase locked loop and method thereof | |
CN102118164B (en) | Microwave frequency synthesizing method and synthesizer for exciting PLL (Phase Locking Loop) by DDS (digital display scope) internally provided with frequency mixer | |
CN116781070B (en) | Miniaturized point frequency source of high-quality frequency spectrum | |
CN110289858B (en) | Broadband fine stepping agile frequency conversion combination system | |
CN113794473B (en) | Generalized frequency synthesizer and synthesis method | |
CN212935881U (en) | Low-phase-noise frequency synthesizer module capable of rapidly setting frequency | |
CN105356878B (en) | A kind of implementation method and device of improved tricyclic wideband frequency synthesizer | |
CN106209089A (en) | A kind of single loop frequency division type broadband frequency synthesizer of phase locking | |
CN204836137U (en) | Frequency synthesizer | |
CN209134388U (en) | RF local oscillator signal calibration circuit | |
CN107181541A (en) | A kind of electromagnetic spectrum monitoring receiver self-checking circuit and receiver | |
CN201479116U (en) | Combined frequency hopping synthesizer | |
CN105372512B (en) | Radio-frequency measurement device with phase fixed function | |
CN211830748U (en) | C-band high-performance frequency synthesis system | |
CN209545557U (en) | A kind of Microwave Frequency Source | |
CN108270440A (en) | One species complex frequency synthesizer circuit | |
CN207677709U (en) | A kind of broadband frequency synthesizer based on cascade connection type PLL structures |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
GR01 | Patent grant | ||
GR01 | Patent grant |