CN206134685U - Hall integrated device - Google Patents
Hall integrated device Download PDFInfo
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- CN206134685U CN206134685U CN201620955325.XU CN201620955325U CN206134685U CN 206134685 U CN206134685 U CN 206134685U CN 201620955325 U CN201620955325 U CN 201620955325U CN 206134685 U CN206134685 U CN 206134685U
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- hall
- collecting zone
- hall element
- electrode
- signal amplification
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Abstract
The utility model belongs to the technical field of the sensing, hall integrated device, be in including compound semiconductor hall element and formation the signal amplifying element of hall element top is used for hall element's signal amplification, signal amplifying element is compound semiconductor homojunction transistor or compound semiconductor hetero junction transistor. Signal amplifying element sets up in the hall element top, and not only the integrated level is high, has avoided the influence of substrate kind to signal amplifying element moreover, and applicable hall element kind wide range has effectively reduced manufacturing cost.
Description
Technical field
The utility model is related to sensory field, and in particular to a kind of compound semiconductor linear Hall integrated device.
Background technology
Hall element is a kind of Magnetic Sensor based on Hall effect, is generally used for detecting magnetic field and its change.Hall unit
The sensitivity of part is closely related with the mobility of material.In order to further lift the sensitivity of Hall element, people adopt chemical combination
Thing semiconductor substituted for silicon, obtains the high compound semiconductor Hall element of high sensitivity, high linearity and temperature stability.
At present, conventional compound semiconductor Hall element includes GaAs Hall element, indium arsenide Hall element, antimony
Indium Hall element etc., there is wide market.
However, the signal of Hall element output itself is weaker, in actual applications, needs are matched with rear end amplifying circuit and made
With.In order to reduce the size of Hall element product, the structure together with silicon amplifier package by Hall element is developed.
But this mode is relatively complicated, technique does not have compatibility, and because bi-material has different temperature, pressure characteristic
Deng, in use, existence and stability and integrity problem.
At present, it has been reported that Hall element be mainly with silicon amplifier integration mode：Using ion implantation technology, in arsenic
Change and formed on gallium substrate Hall element functional areas and field-effect transistor functional areas, signal is carried out by field-effect transistor and is put
Greatly.However, this mode has problems in that, it is only used for manufacturing GaAs Hall device product, if be manufactured similarly to
Indium arsenide hall device product, substrate need to be replaced with indium arsenide, then cannot manufacture field-effect transistor.
Utility model content
For this purpose, to be solved in the utility model is the existing problem that Hall integrator part product is single, preparation cost is high.
To solve above-mentioned technical problem, the technical solution adopted in the utility model is as follows：
The utility model provides a kind of Hall integrator part, including compound semiconductor Hall element and is formed in described
Signal amplification component above Hall element, the signal for the Hall element amplifies；
The signal amplification component is compound semiconductor homogeneity junction transistors or compound semiconductor heterojunction transistor.
Alternatively, the signal amplification component is heterojunction transistor.
Alternatively, the Hall element includes substrate, functional layer and the first electrode being stacked.
Alternatively, the heterojunction transistor includes sub- collecting zone, collecting zone, base, launch site, the contact being stacked
Layer and second electrode, and the 3rd electrode and the 4th electrode on being respectively formed at the sub- collecting zone and the collecting zone.
Alternatively, the base area is less than the collecting zone area, and the 4th electrode is formed directly into the current collection
On the platform that area is formed with the base；The collecting zone area is less than the sub- collecting zone area, and the 3rd electrode is direct
It is formed on the platform that the collecting zone is formed with the sub- collecting zone.
Alternatively, projected area of the signal amplification component on the Hall element is close less than the Hall element
The surface area of the signal amplification component, the first electrode is formed directly into the signal amplification component with Hall unit
On the platform that part is formed；
Also include the corrosion barrier layer being formed between the Hall element and the signal amplification component.
Alternatively, also including the lattice graded bedding being formed between the functional layer and the corrosion barrier layer.
Alternatively, the Hall element is in GaAs Hall element, indium arsenide Hall element or indium antimonide Hall unit
One kind.
Above-mentioned technical proposal of the present utility model has compared to existing technology advantages below：
1st, a kind of Hall integrator part described in the utility model embodiment, including compound semiconductor Hall element and
The signal amplification component being formed in above the Hall element, the signal for the Hall element amplifies；The signal amplifies
Element is compound semiconductor homogeneity junction transistors or compound semiconductor heterojunction transistor.Signal amplification component is arranged on suddenly
Your element top, not only integrated level is high, sense in small space beneficial to Hall integrator part, detect, and avoids substrate
Impact of the species to signal amplification component, applicable Hall element category is wide, effectively reduces manufacturing cost.
2nd, the preparation method of a kind of Hall integrator part described in the utility model embodiment, technical maturity and process compatible
Property it is high, preparation cost is low, and product yield is high.
Description of the drawings
In order that content of the present utility model is more likely to be clearly understood, it is embodied as below according to of the present utility model
Example simultaneously combines accompanying drawing, and the utility model is described in further detail, wherein
Fig. 1 is the Hall integrator part structural representation described in the utility model embodiment；
Fig. 2 is the Hall integrator part epitaxial structure schematic diagram described in the utility model embodiment；
Reference is expressed as in figure：1- substrates, 2- functional layers, 3- corrosion barrier layers, 4- Asia collecting zone, 5- collecting zones,
6- bases, 7- launch sites, 8- contact layers, 91- first electrodes, 92- second electrodes, the electrodes of 93- the 3rd, the electrodes of 94- the 4th.
Specific embodiment
In order that the purpose of this utility model, technical scheme and advantage are clearer, below in conjunction with accompanying drawing to this practicality
New embodiment is described in further detail.
The utility model can be embodied in many different forms, and should not be construed as limited to enforcement set forth herein
Example.On the contrary, there is provided these embodiments so that the disclosure will be thorough and complete, and will it is of the present utility model design fill
Divide and convey to those skilled in the art, the utility model will only be defined by the appended claims.In the accompanying drawings, for clarity,
The size and relative size in layer and region can be exaggerated.It should be appreciated that when element such as layer, region or substrate are referred to as " shape
Into " or " being arranged on " another element " on " when, the element can be arranged directly on another element, or can also deposit
In intermediary element.Conversely, when element is referred to as on " being formed directly into " or " being set directly at " another element, there is no centre
Element.
Embodiment 1
The present embodiment provides a kind of Hall integrator part, as shown in figure 1, including compound semiconductor Hall element and shape
Into the signal amplification component above Hall element, the signal for Hall element amplifies；Also include be formed in Hall element and
Corrosion barrier layer 3 between signal amplification component；Signal amplification component is compound semiconductor homogeneity junction transistors or compound
Heterogeneous semiconductor junction transistors.
Used as one embodiment of the present utility model, in the present embodiment, signal amplification component is that compound semiconductor is heterogeneous
Junction transistors；Heterojunction transistor includes sub- collecting zone 4, collecting zone 5, base 6, launch site 7, the and of contact layer 8 being stacked
Second electrode 92, and the 3rd electrode 93 and the 4th electrode 94 being respectively formed on sub- collecting zone 4 and collecting zone 5.
Specifically, sub- collecting zone 4 is gallium arsenide layer, and thickness is 500nm；Collecting zone 5 is gallium arsenide layer, and thickness is 500nm；
Base 6 is gallium arsenide layer, and thickness is 90nm；Launch site 7 is indium gallium phosphorous layer, and thickness is 50nm；Contact layer 8 is gallium arsenide layer, thick
Spend for 300nm；3rd electrode 93, the 4th electrode 94 are Mo electrodes.
The area of base 6 is less than the area of collecting zone 5, and the 4th electrode 94 is formed directly into the platform that collecting zone 5 is formed with base 6
On；Less than the sub- area of collecting zone 4, the 3rd electrode 93 is formed directly into collecting zone 5 with the sub- formation of collecting zone 4 to the area of collecting zone 5
On platform.
Used as convertible embodiment of the present utility model, signal amplification component can also be heterogeneous for other compound semiconductors
The compound semiconductor homogeneity junction transistors such as junction transistors, thin film field-effect pipe (TFT), can realize mesh of the present utility model
, belong to protection domain of the present utility model.
Used as one embodiment of the present utility model, in the present embodiment, Hall element includes the substrate 1, work(being stacked
Ergosphere 2 and first electrode 91.Projected area of the signal amplification component on Hall element is amplified less than Hall element near signal
The surface area of element, first electrode 91 is formed directly on the platform that signal amplification component is formed with Hall element.
Specifically, substrate 1 is gallium arsenide substrate, and functional layer 2 is gallium arsenide layer, and thickness is 1 μm.
Used as convertible embodiment of the present utility model, Hall element can be GaAs Hall element, indium arsenide Hall
One kind in element or indium antimonide Hall unit, can realize the purpose of this utility model, belong to protection of the present utility model
Scope.
In the present embodiment, signal amplification component is arranged on Hall element top, not only integrated level it is high, beneficial to Hall integrator
Part is sensed in small space, detected, and avoids impact of the substrate species to signal amplification component, applicable Hall element
Category is wide, effectively reduces manufacturing cost.Meanwhile, it is processed using same material, physicochemical properties are identical or phase
Seemingly, the stability and reliability of device can be effectively improved.
The preparation method of above-mentioned Hall integrator part, as shown in Fig. 2 comprising the steps：
S1, stacked functional layer 2, corrosion barrier layer 3, sub- collecting zone 4, collecting zone 5, base are sequentially formed on substrate 1
6th, launch site 7, contact layer 8.
The preparation method of functional layer 2 is：With arsine (AsH3) for arsenic source, trimethyl gallium (TMGa) be gallium source, silane (SiH4)
For doped source, hydrogen (H2) it is carrier gas, growth temperature is 650 DEG C, and pressure is 100mbar, and V/III, than being 100, is grown.
The preparation method of corrosion barrier layer 3 is with phosphine (PH3) for phosphorus source, trimethyl indium (TMIn) be indium source, trimethyl
Gallium (TMGa) be gallium source, hydrogen (H2) it is carrier gas, growth temperature is 650 DEG C, and pressure is 100mbar, and V/III, than being 100, is carried out
Growth obtains indium gallium phosphorous layer.Corrosion barrier layer 3 can be (sub- by each functional layer of Hall element functional layer 2 and signal amplification component
Collecting zone 4 etc.) separate, when technique preparation is carried out to signal amplification component, corrosion barrier layer 3 can be with effective protection Hall element
Functional layer 2, after the completion of signal amplification component technique, removes corrosion barrier layer, then the functional layer 2 of Hall element is carried out plus
Work, it is ensured that signal amplification component preparation technology and Hall element preparation technology are mutually unaffected.
The preparation method of sub- collecting zone 4 is：With arsine (AsH3) for arsenic source, trimethyl gallium (TMGa) be gallium source, silane
(SiH4) be doped source, hydrogen (H2) it is carrier gas, growth temperature is 650 DEG C, and pressure is 100mbar, and V/III, than being 100, is carried out
Growth.
The preparation method of collecting zone 5 is：With arsine (AsH3) for arsenic source, trimethyl gallium (TMGa) be gallium source, silane (SiH4)
For doped source, hydrogen (H2) it is carrier gas, growth temperature is 650 DEG C, and pressure is 100mbar, and V/III, than being 100, is grown.
The preparation method of base 6 is：With arsine (AsH3) for arsenic source, trimethyl gallium (TMGa) be gallium source, carbon tetrabromide
(CBr4) be doped source, hydrogen (H2) it is carrier gas, growth temperature is 650 DEG C, and pressure is 100mbar, and V/III, than being 100, is carried out
Growth.
The preparation method of launch site 7 is：With phosphine (PH3) for phosphorus source, trimethyl indium (TMIn) be indium source, trimethyl gallium
(TMGa) be gallium source, silane (SiH4) be doped source, hydrogen (H2) it is carrier gas, growth temperature is 650 DEG C, and pressure is 100mbar,
V/III, than being 100, is grown.
The preparation method of contact layer 8 is：With arsine (AsH3) for arsenic source, trimethyl gallium (TMGa) be gallium source, silane (SiH4)
For doped source, hydrogen (H2) it is carrier gas, growth temperature is 650 DEG C, and pressure is 100mbar, and V/III, than being 100, is grown.
S2, base 6, launch site 7, contact layer 8 are patterned by photoetching and etching technics, form collecting zone 5 flat
Platform；
Sub- collecting zone 4, collecting zone 5 are patterned by photoetching and etching technics, forms the platform of collecting zone 5；
By selective corrosion, corrosion barrier layer 3 is removed, the platform of functional layer 2 is formed, so as to form epitaxial structure pattern.
S3, in functional layer 2 formed first electrode 91, on contact layer 8 formed second electrode 92, in the He of sub- collecting zone 4
Form the 3rd electrode 93 and the 4th electrode 94 on collecting zone 5 respectively.
The preparation method of above-mentioned Hall integrator part, also includes：
S4, connection chip internal circuits；
S5, thinning, scribing is carried out to substrate 1, pin is pulled out by gold thread routing；Carry out chip package.
Compared with technology, the present embodiment is repeated no more step S4, S5.
The preparation method of above-mentioned Hall integrator part, technical maturity and same material processing compatibility are high, and preparation cost is low,
Product yield is high.
Embodiment 2
The present embodiment provides a kind of Hall integrator part, its structure and preparation method with embodiment 1, except for the difference that：Function
Layer 2 be indium arsenide layer, thickness 500nm.Lattice graded bedding is additionally provided between functional layer 2 and corrosion barrier layer 3.
Because the lattice of indium arsenide and GaAs and its base material indium gallium phosphorous layer has mismatch, if directly raw on indium arsenide
Gallium arsenide layer or indium gallium phosphorous layer in long signal amplification component, then device performance meeting be greatly affected because of lattice mismatch, therefore,
Add lattice graded bedding, the lattice paprmeter for making material to match each other in the present embodiment, effectively increase the sensitivity of device.
Obviously, above-described embodiment is only intended to clearly illustrate example, and not to the restriction of embodiment.It is right
For those of ordinary skill in the art, can also make on the basis of the above description other multi-forms change or
Change.There is no need to be exhaustive to all of embodiment.And the obvious change thus extended out or
Among changing still in protection domain of the present utility model.
Claims (9)
1. a kind of Hall integrator part, it is characterised in that including compound semiconductor Hall element and be formed in the Hall
Signal amplification component above element, the signal for the Hall element amplifies；
The signal amplification component is compound semiconductor homogeneity junction transistors or compound semiconductor heterojunction transistor.
2. Hall integrator part according to claim 1, it is characterised in that the signal amplification component is heterogeneous crystalline solid
Pipe.
3. Hall integrator part according to claim 2, it is characterised in that the Hall element includes the lining being stacked
Bottom, functional layer and first electrode.
4. Hall integrator part according to claim 3, it is characterised in that the heterojunction transistor includes being stacked
Sub- collecting zone, collecting zone, base, launch site, contact layer and second electrode, and be respectively formed at the sub- collecting zone and institute
State the 3rd electrode and the 4th electrode on collecting zone.
5. Hall integrator part according to claim 4, it is characterised in that the base area is less than the collecting zone face
Product, the 4th electrode is formed directly on the platform that the collecting zone is formed with the base；
The collecting zone area be less than the sub- collecting zone area, the 3rd electrode be formed directly into the collecting zone with it is described
On the platform that sub- collecting zone is formed.
6. Hall integrator part according to claim 5, it is characterised in that the signal amplification component is in Hall unit
Projected area on part is less than surface area of the Hall element near the signal amplification component, and the first electrode is direct
It is formed on the platform that the signal amplification component is formed with the Hall element.
7. Hall integrator part according to claim 6, it is characterised in that also including being formed in the Hall element and institute
State the corrosion barrier layer between signal amplification component.
8. Hall integrator part according to claim 7, it is characterised in that also including be formed in the functional layer with it is described
Lattice graded bedding between corrosion barrier layer.
9. Hall integrator part according to claim 8, it is characterised in that the Hall element is GaAs Hall unit
One kind in part, indium arsenide Hall element or indium antimonide Hall unit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620955325.XU CN206134685U (en) | 2016-08-26 | 2016-08-26 | Hall integrated device |
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| CN201620955325.XU CN206134685U (en) | 2016-08-26 | 2016-08-26 | Hall integrated device |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106449692A (en) * | 2016-08-26 | 2017-02-22 | 苏州矩阵光电有限公司 | Hall integrated device and preparation method thereof |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106449692A (en) * | 2016-08-26 | 2017-02-22 | 苏州矩阵光电有限公司 | Hall integrated device and preparation method thereof |
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