CN209087910U - A kind of hall device of integrated amplifier part - Google Patents
A kind of hall device of integrated amplifier part Download PDFInfo
- Publication number
- CN209087910U CN209087910U CN201821661234.0U CN201821661234U CN209087910U CN 209087910 U CN209087910 U CN 209087910U CN 201821661234 U CN201821661234 U CN 201821661234U CN 209087910 U CN209087910 U CN 209087910U
- Authority
- CN
- China
- Prior art keywords
- semiconductor layer
- electrode
- hall
- hall device
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Landscapes
- Hall/Mr Elements (AREA)
Abstract
The utility model discloses a kind of hall devices of integrated amplifier part, comprising: the first semiconductor layer is formed on the substrate, first semiconductor layer is suitable as Hall functional layer；The second semiconductor layer of epitaxial growth on first semiconductor layer, forms two-dimensional electron gas between second semiconductor layer and first semiconductor layer；The second semiconductor layer of part is removed, the first semiconductor layer under it is exposed outside and comes；The first exposed semiconductor layer of part is removed, so that part exposed on first semiconductor layer is isolated with the part that do not reveal；Electrode is set on the first exposed semiconductor layer, forms hall device；Electrode is set on the second semiconductor layer on the first semiconductor layer not revealed, forms amplifying device.The utility model makes amplifying device and hall device shares the first semiconductor layer, and institute's semiconductor layer to be formed is only two layers, and processing step is less, to can greatly simplify process complexity compared with prior art.
Description
Technical field
The utility model relates to technical field of semiconductors, and in particular to a kind of hall device of integrated amplifier part.
Background technique
Semiconductor Hall devices are widely used in light because of its highly sensitive, high linearity and preferable temperature stability
Learn the fields such as stabilization, automatic control, brushless motor, car electrics.However, since the signal that hall device itself exports is weaker,
In practical applications, cooperation rear end amplifying circuit is generally required to use.For independently prepared and encapsulation hall device, independent system
Standby and encapsulation amplifying circuit, connects the two usually using plain conductor.These conducting wires are in electromagnetism or the adverse circumstances such as damp and hot
Lower exposure is easy to interfere small hall device output signal, so that using independently prepared and encapsulation amplifying circuit pair
When the output signal of independently prepared and encapsulation Hall element amplifies, amplified signal is easy distortion.On the other hand, by
In different (for example, hall device often uses GaAs in hall device and amplifying circuit material used in the preparation
GaAs substrate, and amplifying circuit often uses silicon Si substrate), it is difficult for the two to be directly integrated together.If can be by Hall
The signal of device carries out amplification in situ, is then being wired to packaged amplifying circuit, amplified hall signal
It can be good at resisting interference signal, thus the case where greatly mitigation signal is distorted.
In this regard, the prior art provides a kind of preparation method of the hall device structure of integrated amplifier part, it is obtained
Structure is as shown in Figure 1.This method comprises the following steps: stacked Hall functional layer 02, corrosion S1, are sequentially formed on substrate 01
Barrier layer 03, sub- collecting zone 04, collecting zone 05, base area 06, emitter region 07, contact layer 08, wherein Hall functional layer 02, sub- current collection
Area 04, collecting zone 05, base area 06 are all made of GaAs GaAs material, and emitter region 07 uses indium gallium phosphorus InGaP material, contact layer 08
Using GaAs GaAs material；S2, base area 06, emitter region 07, contact layer 08 are patterned by lithography and etching technique,
Form 05 platform of collecting zone；S3, first electrode 091 is formed in functional layer 02, second electrode 092 is formed on contact layer 08,
Third electrode 093 and the 4th electrode 094 are respectively formed on sub- collecting zone 04 and collecting zone 05；S4, connection chip internal circuits；
S5, substrate 01 is thinned, scribing, drawings crosses gold thread routing and pulls out pin, carries out chip package.The preparation method passes through corruption
Erosion barrier layer 03 separates each functional layer (sub- collecting zone 04 etc.) of Hall element functional layer 02 and signal amplification component, to signal
When amplifier element carries out technique preparation, by the functional layer 02 of 03 effective protection Hall element of corrosion barrier layer, when signal amplifies
After the completion of component technology, corrosion barrier layer is removed, then process to the functional layer 02 of Hall element, to guarantee signal amplification member
Part preparation process and Hall element preparation process are mutually unaffected.
However, above-mentioned preparation method needs multiple extension lithography alignment to obtain multilayered structure, processing step is more, and right
The required precision of processing step is higher, so that the process complexity of the above method is higher, it is less reproducible.
Summary of the invention
In view of this, the utility model embodiment provides a kind of hall device of integrated amplifier part, it is existing to solve
The higher problem of process complexity of the hall device preparation method of integrated amplifier part in technology.
According in a first aspect, the utility model embodiment provides a kind of hall device of integrated amplifier part, comprising: lining
Bottom；Hall device is arranged over the substrate, including the first semiconductor layer and the electricity being arranged on first semiconductor layer
Pole, first semiconductor layer are suitable as Hall functional layer；Amplifying device, setting over the substrate, including are stacked
The first semiconductor layer, the second semiconductor layer, and the electrode being arranged on second semiconductor layer, first semiconductor
Two-dimensional electron gas is formed between layer and second semiconductor layer；First semiconductor layer of the amplifying device and the Hall device
First semiconductor layer of part is isolated, and is formed by same processing step.
Optionally, the material of first semiconductor layer includes GaAs, and the material of second semiconductor layer includes
InGaP。
Optionally, the hall device of the integrated amplifier part further include: third semiconductor layer is arranged in the amplifier
On second semiconductor layer of part, and the second semiconductor layer, the third semiconductor layer are exposed in the middle part of the third semiconductor layer
It is suitable as ohmic contact layer；Correspondingly, the electrode of the amplifying device includes: first electrode, and setting is partly led in the third
On the second semiconductor layer exposed in the middle part of body layer；Second electrode, third electrode are arranged on the third semiconductor layer.
Optionally, the output electrode of the hall device is connect with the first electrode of the amplifying device by conducting wire.
The hall device of integrated amplifier part provided by the utility model embodiment, by making the first semiconductor layer and
Two-dimensional electron gas is formed between two semiconductor layers to form high electron mobility transistor amplifying device, the structure letter of amplifying device
Single, the complexity of manufacture craft is lower；And amplifying device and hall device is made to share the first semiconductor layer, institute is to be formed partly to be led
Body layer is only two layers, and processing step is less, can further decrease " hall device of integrated amplifier part " manufacture craft and answer
Miscellaneous degree.
Detailed description of the invention
It, below will be right in order to illustrate more clearly of specific embodiment of the present invention or technical solution in the prior art
Specific embodiment or attached drawing needed to be used in the description of the prior art are briefly described, it should be apparent that, it is described below
In attached drawing be that some embodiments of the utility model are not paying creativeness for those of ordinary skill in the art
Under the premise of labour, it is also possible to obtain other drawings based on these drawings.
Fig. 1 shows the structural schematic diagram of the hall device of integrated amplifier part as made from existing preparation method；
Fig. 2 shows according to the preparation method of the hall device of the integrated amplifier part of the utility model embodiment a kind of
Flow chart；
Fig. 3 A-3E shows the preparation method of the hall device of the integrated amplifier part according to the utility model embodiment
Each step schematic diagram；
Fig. 4 shows the preparation method of the hall device of another integrated amplifier part according to the utility model embodiment
Flow chart；
Fig. 5 A-5F shows the preparation method of the hall device of the integrated amplifier part according to the utility model embodiment
Each step schematic diagram.
Specific embodiment
It is practical new below in conjunction with this to keep the objectives, technical solutions, and advantages of the embodiments of the present invention clearer
Attached drawing in type embodiment, the technical scheme in the utility model embodiment is clearly and completely described, it is clear that is retouched
The embodiment stated is the utility model a part of the embodiment, instead of all the embodiments.Based on the implementation in the utility model
Example, those skilled in the art's every other embodiment obtained without creative efforts, belongs to this reality
With novel protected range.
Embodiment one
Fig. 2 shows according to the preparation method of the hall device of the integrated amplifier part of the utility model embodiment a kind of
Flow chart.As shown in Fig. 2, this method comprises the following steps:
S101: being formed on the substrate the first semiconductor layer, and the first semiconductor layer is suitable as Hall functional layer.
S102: the second semiconductor layer of epitaxial growth on the first semiconductor layer, the second semiconductor layer and the first semiconductor layer
Between form two-dimensional electron gas.
As shown in Figure 3A, 1 is substrate, and 2 be the first semiconductor layer, and 3 be the second semiconductor layer.
It should be noted that growth technology is the key technology to form two-dimensional electron gas.Growth technology
It enables to grow on face on the first semiconductor layer almost without interface trap, Lattice Matching the second semiconductor layer, shape
At hetero-junctions, two-dimensional electron gas thus can be formed.
S103: removal the second semiconductor layer of part exposes outside the first semiconductor layer under it and comes.As shown in Figure 3B.
S104: removal part exposed the first semiconductor layer so that part exposed on the first semiconductor layer with do not reveal
Part is isolated.As shown in Figure 3 C, the part in the first exposed semiconductor layer is eliminated.The first semiconductor layer entire so just divides
Part is not revealed for exposed parts and, and exposed parts are separated with part is not revealed.
S105: being arranged electrode on the first exposed semiconductor layer, forms hall device.As shown in Figure 3D, electrode is set
54 and 55.
S106: being arranged electrode on the second semiconductor layer on the first semiconductor layer not revealed, forms amplifying device.Such as figure
Shown in 3D, electrode 51,52 and 53 is set.Optionally, which is arranged before electrode on the second semiconductor layer, can be second
Ohmic contact layer is formed between semiconductor layer and electrode, formed ohmic contact layer method can on the second semiconductor layer with from
Son injection or other means increase the carrier concentration on the second semiconductor layer surface layer, can also be using outer as described in embodiment two
Prolong the method for growth ohmic contact layer, or other methods can also be used, the application is without limitation.Other in the present embodiment are set
The mode for setting electrode is similar (unless there are specified otherwise), and details are not described herein.
It should be added that " setting electrode " described in step S105 and S106 is not limited to shown in figure three
A electrode is also possible to that the electrode of other quantity is arranged, and is also possible to that electrode is arranged (for example, Hall in Fig. 3 D in other positions
The side of device should also be provided with a pair of electrodes), attached drawing 3D is only to give the signal of " setting electrode " step.
The preparation method of the hall device of integrated amplifier part provided by the utility model embodiment, make amplifying device with
Hall device shares the first semiconductor layer, and institute's semiconductor layer to be formed is only two layers, and processing step is less, thus with existing skill
Art, which is compared, can greatly simplify process complexity.
Embodiment two
Fig. 4 shows the preparation method of the hall device of another integrated amplifier part according to the utility model embodiment
Flow chart.As shown in figure 4, this method comprises the following steps:
S201: being epitaxially grown on the substrate the first semiconductor layer, and the first semiconductor layer is suitable as Hall functional layer.
Step S201 and S202 are formed by epitaxial growth technology, can be further decreased and be wanted to process equipment
Seek, simplify the complexity of technique.
S202: the second semiconductor layer of epitaxial growth on the first semiconductor layer, the second semiconductor layer and the first semiconductor layer
Between form two-dimensional electron gas.
As shown in Figure 5A, 1 is substrate, and 2 be the first semiconductor layer, and 3 be the second semiconductor layer.
S203: forming third semiconductor layer on the second semiconductor layer, and third semiconductor layer is suitable as ohmic contact layer.
As shown in Figure 5A, 4 be third semiconductor layer.
S204: removal the second semiconductor layer of part and ohmic contact layer thereon keep the first semiconductor layer under it exposed
Out.As shown in Figure 5 B.
S205: removal part exposed the first semiconductor layer so that part exposed on the first semiconductor layer with do not reveal
Part is isolated.As shown in Figure 5 C, the part in the first exposed semiconductor layer is eliminated.The first semiconductor layer entire so just divides
Part is not revealed for exposed parts and, and exposed parts are separated with part is not revealed.
S206: corresponding third semiconductor in the middle part of the second semiconductor layer surface on the first semiconductor layer that removal is not revealed
Layer.After step S205 in structure shown in obtained Fig. 5 C, there is the second semiconductor layer on the first semiconductor layer for not revealing, also
Third semiconductor layer, step S206 only removes corresponding third semiconductor layer in the middle part of the second semiconductor layer, and retains outside the middle part
The ohmic contact layer of side.Optionally, the part in " ohmic contact layer on the outside of the middle part " can also be further removed, residue is made
Ohmic contact layer formed corresponding at least two electrode positions piece.
S207: being arranged first electrode in the middle part of the second semiconductor layer surface, at least forms second on third semiconductor layer
Electrode, third electrode.
As shown in fig. 5e, the first electrode 51, second electrode 52 and third electrode 53 of amplifying device is respectively set.Due to
Corresponding third semiconductor layer has been removed in the middle part of two semiconductor layer surfaces, therefore first electrode 51 and the second semiconductor are direct
Contact, therebetween without ohmic contact layer, thus between first electrode 51 and the second semiconductor layer be Schottky contacts, with
In the concentration of control two-dimensional electron gas, and then control the size of output electric current.
S208: being arranged electrode on the first exposed semiconductor layer, forms hall device.As shown in fig. 5e, electrode is set
54 and 55.
It should be added that " setting electrode " described in step S207 and S208 is not limited to electricity shown in figure
Pole is also possible to that the electrode of other quantity is arranged, and is also possible to that electrode is arranged (for example, hall device in Fig. 5 E in other positions
Side should also be provided with a pair of electrodes), attached drawing 5E is only to give the signal of " setting electrode " step.
After above-mentioned steps S208, device can be packaged, be thinned, the operation such as scribing, by Hall device when encapsulation
The electrode of part and amplifying device is drawn out to outside packaging body, the hall device of integrated amplifier part when in use, further according to needs
The output end for the hall device reserved outside packaging body is connected to the input terminal of amplifying device reserved outside packaging body.Optionally,
Can also through the following steps S209 in package interior by the input electrode phase of the output electrode of hall device and amplifying device
Even.
S209: conducting wire is set between the output electrode and first electrode of hall device.
The first electrode 51 is the input electrode of amplifying device, does not show that in figure and connect with amplifying device input electrode
The output end of hall device which is specifically, specifically may refer to embodiment three.It should be readily apparent to one skilled in the art that suddenly
The output end of your device includes that the first output end and second output terminal can be by hall devices during actually realizing
The first electrode 51 of first output end and amplifying device connection, by the second electricity of the second output terminal of hall device and amplifying device
Pole 52 connects (alternatively, the third electrode 53 of the second output terminal of hall device and amplifying device can also be connected), and by the
Two output ends of two electrodes 52 and third electrode 53 as amplifying device.
The preparation method of the hall device of integrated amplifier part provided by the utility model embodiment, make amplifying device with
Hall device shares the first semiconductor layer, and institute's semiconductor layer to be formed is only two layers, and processing step is less, thus with existing skill
Art, which is compared, can greatly simplify process complexity.
As embodiment one or a kind of optional embodiment of embodiment two, step S101, S102 or step S201,
S202 can be on substrate (for example, by using half-insulating GaAs substrate, to be further simplified technology difficulty) one layer of epitaxial growth
GaAs, one layer of InGaP of epitaxial growth on GaAs layer.After sequentially forming the first semiconductor layer 2, the second semiconductor layer 3,
Also need be optionally removed the second semiconductor layer of part make the first semiconductor layer 2 under it expose outside come, further have
The second exposed semiconductor layer of part is removed to selection performance, therefore, the material A of the first semiconductor layer 2 and the second semiconductor layer 3
Material B need meet " removal A while, B will not be removed；And while removal B, A will not be removed ", and " A is suitable for
As Hall functional layer, two-dimensional electron gas is capable of forming between A and B ", for this purpose, the application proposes that A material can use GaAs, B
Material can use InGaP, to meet the requirement of the application processing step.It should be pointed out that this is provided by the present application
A kind of optional embodiment, practical A material and B material can also select satisfaction, and " while removal A, B will not be removed；And it goes
While except B, A will not be removed " and " A is suitable as Hall functional layer, and two-dimensional electron gas is capable of forming between A and B "
The application is without limitation for other materials (for example, A can also be InAs, accordingly B can be InAlSb).
As embodiment one or a kind of optional embodiment of embodiment two, led using the method for epitaxial growth the second half
Third semiconductor layer is formed on body layer, i.e., ohmic contact layer is formed using the method for epitaxial growth, can obtain higher electronics
Concentration and be easy and metal formed Ohmic contact.
Optionally, epitaxial growth technology described herein can be vapour phase epitaxy, liquid phase epitaxy, molecular beam epitaxy.
Embodiment three
The example of the utility model provides a kind of hall device of integrated amplifier part, the Hall device of the integrated amplifier part
Part can be prepared using embodiment one or two or its any one optional embodiment.As shown in Figure 3D, this integrates and puts
The hall device of big device includes substrate 1, and the hall device and amplifying device of setting over the substrate.
Hall device includes the first semiconductor layer 2 and the electrode being arranged on the first semiconductor layer 2 (such as 54 in figure
With 55).Amplifying device includes the first semiconductor layer 2 being stacked, the second semiconductor layer 3, and is arranged in the second semiconductor
Electrode (for example, 51,52 and 53 in figure) on layer 3.The first the half of first semiconductor layer 2 of amplifying device and hall device lead
Body layer 2 is isolated, and is formed by same processing step.
The hall device of above-mentioned integrated amplifier part forms two between the first semiconductor layer and the second semiconductor layer by making
Dimensional electron gas forms amplifying device, and the structure of amplifying device is simple, the complexity of manufacture craft is lower；And in amplifying device
One layer can prepare with Hall functional layer same layer, can further decrease " hall device of integrated amplifier part " manufacture craft
Complexity.
It should be added that the electrode that " electrode " in Fig. 3 D is only the hall device of the integrated amplifier part is set
A kind of situation set, the electrode in the present embodiment on hall device and amplifying device are also possible to other quantity, are arranged at other
Position (for example, the side of hall device should also be provided with a pair of electrodes in Fig. 3 D) is only to provide a kind of signal in figure.
Example IV
Fig. 1 shows the hall device structural schematic diagram of another integrated amplifier part according to the example of the utility model,
The hall device of the integrated amplifier part can using embodiment one or two or its any one optional embodiment preparation and
At.As shown in fig. 5e, the difference with embodiment three is, further includes third semiconductor layer 4, and the second the half of amplifying device are arranged in
In conductor layer 3, and the second semiconductor layer 3 is exposed at the middle part of third semiconductor layer 4, and third semiconductor layer 4 is suitable as ohm and connects
Contact layer.Correspondingly, the electrode of amplifying device includes first electrode 51, second electrode 52 and third electrode 53.
First electrode 51 is arranged on the second semiconductor layer 3 exposed in the middle part of third semiconductor layer 4, with the second semiconductor layer
Schottky contacts are formed, for controlling the concentration of two-dimensional electron gas, the concentration of two-dimensional electron gas is higher, and carrier mobility is got over
Height, so that the output current value of amplifying device is bigger.
Second electrode 52 and third electrode 53 are arranged on third semiconductor layer 4, pass through third semiconductor layer 4 and the second half
Conductor layer 3 forms good Ohmic contact.
As a kind of optional embodiment of embodiment three or four, as shown in Fig. 3 E and Fig. 5 F, the output electricity of hall device
Pole (be generally arranged at the side of hall device, as in figure black dot or half dot shown in) with the first electrode of amplifying device
51 are connected by conducting wire, and another output electrode of hall device and the second electrode 52 (or third electrode 53) of amplifying device are logical
Cross conducting wire connection, by the second electrode 52 of amplifying device and third electrode 53 as the output end of amplifying device namely this integrate
The output end of the hall device of amplifying device, will pass through the concentration of the output electrode control two-dimensional electron gas of hall device, into
And make the output current value of amplifying device amplification relationship proportional to the output valve of hall device.
It include GaAs embodiment three or a kind of optional embodiment of example IV, the material of the first semiconductor layer,
The material of second semiconductor layer includes InGaP.Specifically refer to embodiment two.
Although being described in conjunction with the accompanying the embodiments of the present invention, those skilled in the art can not depart from this
Various modifications and variations can be made in the case where the spirit and scope of utility model, and such modifications and variations are each fallen within by appended power
Benefit requires within limited range.
Claims (4)
1. a kind of hall device of integrated amplifier part characterized by comprising
Substrate；
Hall device, setting over the substrate, including the first semiconductor layer and are arranged on first semiconductor layer
Electrode, first semiconductor layer are suitable as Hall functional layer；
Amplifying device is arranged over the substrate, including the first semiconductor layer, the second semiconductor layer being stacked, Yi Jishe
The electrode on second semiconductor layer is set, forms two dimension electricity between first semiconductor layer and second semiconductor layer
Sub- gas；First semiconductor layer of the amplifying device is isolated with the first semiconductor layer of the hall device, and by same technique
Step is formed.
2. the hall device of integrated amplifier part according to claim 1, which is characterized in that first semiconductor layer
Material includes GaAs, and the material of second semiconductor layer includes InGaP.
3. the hall device of integrated amplifier part according to claim 1, which is characterized in that further include:
Third semiconductor layer is arranged on the second semiconductor layer of the amplifying device, and the middle part of the third semiconductor layer
Expose the second semiconductor layer, the third semiconductor layer is suitable as ohmic contact layer；Correspondingly, the electrode of the amplifying device
Include:
First electrode is arranged on the second semiconductor layer exposed in the middle part of the third semiconductor layer；
Second electrode, third electrode are arranged on the third semiconductor layer.
4. the hall device of integrated amplifier part according to claim 3, which is characterized in that the output of the hall device
Electrode is connect with the first electrode of the amplifying device by conducting wire.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821661234.0U CN209087910U (en) | 2018-10-12 | 2018-10-12 | A kind of hall device of integrated amplifier part |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821661234.0U CN209087910U (en) | 2018-10-12 | 2018-10-12 | A kind of hall device of integrated amplifier part |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN209087910U true CN209087910U (en) | 2019-07-09 |
Family
ID=67119022
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201821661234.0U Active CN209087910U (en) | 2018-10-12 | 2018-10-12 | A kind of hall device of integrated amplifier part |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN209087910U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109301062A (en) * | 2018-10-12 | 2019-02-01 | 苏州矩阵光电有限公司 | A kind of hall device and preparation method thereof of integrated amplifier part |
| CN115207207A (en) * | 2022-09-14 | 2022-10-18 | 深圳市柯雷科技开发有限公司 | Method for manufacturing pressure sensor with composite structure of nitride and magnetostrictive material |
-
2018
- 2018-10-12 CN CN201821661234.0U patent/CN209087910U/en active Active
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109301062A (en) * | 2018-10-12 | 2019-02-01 | 苏州矩阵光电有限公司 | A kind of hall device and preparation method thereof of integrated amplifier part |
| CN109301062B (en) * | 2018-10-12 | 2024-04-16 | 苏州矩阵光电有限公司 | Hall device integrated with amplifying device and preparation method thereof |
| CN115207207A (en) * | 2022-09-14 | 2022-10-18 | 深圳市柯雷科技开发有限公司 | Method for manufacturing pressure sensor with composite structure of nitride and magnetostrictive material |
| CN115207207B (en) * | 2022-09-14 | 2023-02-24 | 深圳市柯雷科技开发有限公司 | Method for manufacturing high-sensitivity pressure sensor based on composite nitride and magnetostrictive material structure |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP2522214B2 (en) | Semiconductor device and manufacturing method thereof | |
| CN209087910U (en) | A kind of hall device of integrated amplifier part | |
| CN107393956A (en) | Enhancement type high electron mobility transistor and preparation method comprising p-type superlattices | |
| CN107799590A (en) | The GaN base microwave power device and its manufacture method of a kind of big grid width | |
| EP0614233A2 (en) | Pin-type light receiving device, manufacture of the pin-type light receiving device and optoelectronic integrated circuit | |
| CN108519174B (en) | GaN bridge type absolute pressure sensor and manufacturing method thereof | |
| CN110783450A (en) | Magnetic field sensor based on gallium nitride/aluminum gallium nitrogen heterojunction | |
| US4967254A (en) | Semiconductor device | |
| US6784064B2 (en) | Heterojunction bipolar transistor and method of making heterojunction bipolar transistor | |
| CN109301062A (en) | A kind of hall device and preparation method thereof of integrated amplifier part | |
| US9606012B2 (en) | Semiconductor device and manufacturing method thereof | |
| TWI523219B (en) | Compound semiconductor lateral pnp bipolar transistors | |
| JPH06314813A (en) | P-i-n photosensitive element, its manufacture and photoelectronic integrated circuit | |
| CN110504297A (en) | Two-dimensional material transistor, preparation method and application based on two-dimensional electron gas regulation backgate | |
| JP4010337B2 (en) | Pin type light receiving element and method of manufacturing pin type light receiving element | |
| EP0605920B1 (en) | Cascode circuit structure with epitaxial bipolar transistors comprising a low-level base connection | |
| CN208904023U (en) | A kind of transistor | |
| WO2021103052A1 (en) | High-temperature three-dimensional hall sensor with real-time working temperature monitoring function and manufacturing method therefor | |
| TW506020B (en) | Hetero-bipolar transistor with T-formed emitter-terminal-contact and its production | |
| CN109269687A (en) | GaN minute-pressure pressure sensor and preparation method thereof | |
| CN114497244B (en) | Infrared detector chip and manufacturing method and application thereof | |
| CN110168751A (en) | Include the steps that the method for manufacturing optoelectronic device for etching growth substrates rear | |
| JPH07170000A (en) | Semiconductor device and its manufacture | |
| CN213692095U (en) | High-sensitivity Hall element | |
| CN214625049U (en) | All-dielectric isolation silicon magnetic sensitive triode |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant |