CN206099730U - Chip with developments slope compensation function - Google Patents
Chip with developments slope compensation function Download PDFInfo
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- CN206099730U CN206099730U CN201621045231.5U CN201621045231U CN206099730U CN 206099730 U CN206099730 U CN 206099730U CN 201621045231 U CN201621045231 U CN 201621045231U CN 206099730 U CN206099730 U CN 206099730U
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- comparator
- current source
- resistance
- chip
- slope compensation
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Abstract
The utility model relates to a chip with developments slope compensation function is equipped with dynamic slope compensating circuit on the chip, dynamic slope compensating circuit includes: subtraction circuit, voltage -controlled current source, electric capacity C and switch, subtraction circuit, voltage -controlled current source and electric capacity C connect gradually, the switch with electric capacity C is parallelly connected. Above -mentioned chip can carry out necessary control to the slope size that compensates through subtraction circuit and voltage -controlled current source, therefore can obtain suitable slope in the compensation process.
Description
Technical field
This utility model is related to a kind of chip with dynamic slope compensation function.
Background technology
The application of BUCK circuit clients varies, and its peak-current mode needs slope when dutycycle is more than 50%
Compensation so that system stability, adopt the slope compensation of which kind of mode with reach adapt to it is widest apply, be to need deeply to grind
The problem studied carefully.
Learnt by the principle of slope compensation, if slope benefit is few, open loop is still suffered from when dutycycle is more than 50%
Unstability, but if slope benefit is excessive, current-mode control will be changed into voltage-mode control, and the advantage of current-mode control will be to the greatest extent
Lose.So in compensation process, it is necessary to which the slope size to being compensated carries out necessary control, obtains suitable slope.
Utility model content
A kind of chip with dynamic slope compensation function that this utility model is provided to solve the above problems, it is described
Chip is provided with Dynamic Slope Compensation Circuit, and the Dynamic Slope Compensation Circuit includes：Subtraction circuit, voltage-controlled current source, electric capacity C
And switch, the subtraction circuit, the voltage-controlled current source and the electric capacity C are sequentially connected, described to switch with the electric capacity C simultaneously
Connection.
Preferably, subtraction circuit includes：Comparator U1, resistance R1, resistance R2, resistance R3 and resistance R4, the resistance R1
Connect the inverting input of the comparator U1, the resistance R4 connects the inverting input and outfan of the comparator U1,
The resistance R2 connects the in-phase input end of the comparator U1, and the resistance R3 is grounded and connects the homophase of the comparator U1
Input.
Preferably, the voltage-controlled current source includes：First order current source and scaled mirror current source.
Preferably, the first order current source includes：Resistance R6, comparator U2 and CMOS tube Q1, the resistance R6 ground connection
And connecting the inverting input and CMOS tube Q1 of the comparator U2, the outfan of the comparator U1 connects the comparator U2
In-phase input end, the outfan of the comparator U2 connects CMOS tube Q1.
Preferably, the scaled mirror current source includes：Comparator U3 and CMOS tube Q2, the CMOS tube Q1 connection are described
The in-phase input end of comparator U3, the outfan of the comparator U3 connect CMOS tube Q2, the CMOS tube Q2 connection electricity
Hold C.
Preferably, the switch is switching tube Q3.
The beneficial effects of the utility model are：Said chip in compensation process, by subtraction circuit and voltage controlled current
Source can carry out necessary control to the slope size for being compensated, therefore can obtain suitable slope.
Description of the drawings
The schematic diagram of the dynamic slope compensation that Fig. 1 is related to for this utility model；
The circuit diagram of the dynamic slope compensation that Fig. 2 is related to for this utility model；
The change in voltage schematic diagram of the dynamic slope compensation that Fig. 3 is related to for this utility model.
Specific embodiment
Below in conjunction with the accompanying drawings this utility model is further elaborated：
As shown in figure 1, chip is provided with Dynamic Slope Compensation Circuit, Dynamic Slope Compensation Circuit includes subtraction circuit, pressure
Control current source, electric capacity C and switch.Wherein, subtraction circuit, voltage-controlled current source and electric capacity C are sequentially connected, and switch in parallel with electric capacity C.
Subtraction circuit is used to realize subtraction；Voltage-controlled current source is for realizing constant-current charge for electric capacity C；Switch for realizing electric capacity
The discharge and recharge of C；Electric capacity C is grounded.
The operation principle of Dynamic Slope Compensation Circuit is as follows：The inverting input input voltage of subtraction circuit be Vin, homophase
It is Vout-0.5Vin by output voltage after subtraction circuit that input input voltage is Vout, voltage Vin and voltage Vout.
Using output voltage Vout-0.5Vin control voltage-controlled current source so that voltage-controlled current source it is current controlled in machine voltage Vout-
0.5Vin.Electric capacity C is charged by voltage-controlled current source, due to being constant-current charge, therefore charging voltage linearly rises.Clock is believed
Number by the discharge and recharge of on-off control electric capacity C, when clock signal is low level, switch off, electric capacity charges；Work as clock signal
For high level when, switch closure, electric capacity electric discharge.With the mechanical periodicity of clock, can be obtained by being controlled by electric capacity C
The slope compensation signal that the slope of Vout-0.5Vin voltages is dynamically adapted.
Specifically, as shown in Fig. 2 subtraction circuit includes：Comparator U1, resistance R1, resistance R2, resistance R3 and resistance R4,
Resistance R1 is input into Vin and connects the inverting input of comparator U1, and resistance R4 connects the inverting input of comparator U1 and output
End, resistance R2 input Vout simultaneously connect the in-phase input end of comparator U1, resistance R3 be grounded and connect comparator U1 homophase it is defeated
Enter end.Wherein, R1=2 × R4, R3=2 × R2, comparator U1 outfans output Vout-0.5Vin.
Voltage-controlled current source includes：First order current source and scaled mirror current source.First order current source includes：Resistance R6,
Comparator U2 and CMOS tube Q1, the size of first order current source are controlled by Vout-0.5Vin voltage differences.Resistance R6 is grounded and connects
The inverting input and CMOS tube Q1 of comparator U2, the outfan of comparator U1 connect the in-phase input end of comparator U2, compare
Outfan connection CMOS tube Q1 of device U2.Jing first order current sources, the electric current flow through in R6 is
Scaled mirror current source includes：Comparator U3 and CMOS tube Q2 and R5 and R7, scaled mirror current source is to electric capacity
Charge.CMOS tube Q1 connects the in-phase input end of comparator U3, and outfan connection CMOS tube Q2 of comparator U3, CMOS tube Q2 connect
Meet electric capacity C.Adjustment R5, R6, can adjust the size of scaled mirror current source.Jing after scaled mirror current source, the electric current of Q2 is flow through
For
Switch as switching tube Q3, electric capacity C is in parallel with switching tube Q3, switching tube Q3 by circuit clock signal control, in clock
The lower mirror current source of control carries out discharge and recharge to electric capacity C, and ramp signal thermal compensation signal is just obtained on electric capacity.
Electric capacity is charged using current source, slope compensation signal can be obtained on electric capacity, it is poor using input, output voltage
Current source is controlled, the slope compensation signal of slope variation can be obtained.Compensation slope as shown in Figure 3 is provided, which is oblique
Rate size is proportional to that output-input voltage is poor, so as to be prevented effectively from the compensation caused due to the change of voltage difference not enough or mistake
Compensation phenomenon.Wherein, solid line is the compensation slope of (difference of input and output voltage is maximum) under worst case, and dotted line is input and output
Difference in voltage compensates slope when reducing accordingly.This slope compensation signal is added on current sampling signal and forms new electricity
Stream feedback control signal, is input to one end of current sense comparator in UC3842 current mode pulse width controllers (PWM), with electric current
The error voltage of the detection comparator other end compares, and exports the controllable pulse signal of width, so as to realize dynamic slope compensation.
Said chip can be entered to the slope size for being compensated by subtraction circuit and voltage-controlled current source in compensation process
The necessary control of row, therefore suitable slope can be obtained.
Embodiment described above, simply preferred embodiments of the present utility model, not limiting enforcement model of the present utility model
Enclose, therefore the equivalence changes done of all constructions according to described in this utility model claim, feature and principle or modification, all should
It is included in this utility model patent claim.
Claims (6)
1. a kind of chip with dynamic slope compensation function, it is characterised in that the chip is provided with dynamic slope compensation electricity
Road, the Dynamic Slope Compensation Circuit include：Subtraction circuit, voltage-controlled current source, electric capacity C and switch, it is the subtraction circuit, described
Voltage-controlled current source and the electric capacity C are sequentially connected, and the switch is in parallel with the electric capacity C.
2. there is the chip of dynamic slope compensation function as claimed in claim 1, it is characterised in that subtraction circuit includes：Than
Compared with device U1, resistance R1, resistance R2, resistance R3 and resistance R4, the resistance R1 connects the inverting input of the comparator U1, institute
Inverting input and outfan that resistance R4 connects the comparator U1 are stated, the resistance R2 connects the homophase of the comparator U1
Input, the resistance R3 are grounded and connect the in-phase input end of the comparator U1.
3. there is the chip of dynamic slope compensation function as claimed in claim 2, it is characterised in that the voltage-controlled current source bag
Include：First order current source and scaled mirror current source.
4. there is the chip of dynamic slope compensation function as claimed in claim 3, it is characterised in that the first order current source
Including：Resistance R6, comparator U2 and CMOS tube Q1, the resistance R6 be grounded and connect the comparator U2 inverting input and
CMOS tube Q1, the outfan of the comparator U1 connect the in-phase input end of the comparator U2, the output of the comparator U2
End connection CMOS tube Q1.
5. there is the chip of dynamic slope compensation function as claimed in claim 4, it is characterised in that the scaled mirror electric current
Source includes：Comparator U3 and CMOS tube Q2, CMOS tube Q1 connect the in-phase input end of the comparator U3, the comparator
The outfan of U3 connects CMOS tube Q2, and CMOS tube Q2 connects electric capacity C.
6. there is the chip of dynamic slope compensation function as claimed in claim 5, it is characterised in that the switch is switching tube
Q3。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201621045231.5U CN206099730U (en) | 2016-09-08 | 2016-09-08 | Chip with developments slope compensation function |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201621045231.5U CN206099730U (en) | 2016-09-08 | 2016-09-08 | Chip with developments slope compensation function |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN206099730U true CN206099730U (en) | 2017-04-12 |
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ID=58476346
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201621045231.5U Expired - Fee Related CN206099730U (en) | 2016-09-08 | 2016-09-08 | Chip with developments slope compensation function |
Country Status (1)
| Country | Link |
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| CN (1) | CN206099730U (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108599535A (en) * | 2018-07-09 | 2018-09-28 | 成都信息工程大学 | A kind of self-adaptable slop compensation circuit suitable for Peak Current Mode BUCK converters |
| CN109980925A (en) * | 2019-04-15 | 2019-07-05 | 南京能芯半导体有限公司 | A kind of method that DC-DC converter of the lowest point current control accelerates dynamic response in the case where being lightly loaded skip cycle mode |
| CN110531744A (en) * | 2019-10-17 | 2019-12-03 | 北京和利时智能技术有限公司 | A kind of analog signals output circuit |
-
2016
- 2016-09-08 CN CN201621045231.5U patent/CN206099730U/en not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108599535A (en) * | 2018-07-09 | 2018-09-28 | 成都信息工程大学 | A kind of self-adaptable slop compensation circuit suitable for Peak Current Mode BUCK converters |
| CN109980925A (en) * | 2019-04-15 | 2019-07-05 | 南京能芯半导体有限公司 | A kind of method that DC-DC converter of the lowest point current control accelerates dynamic response in the case where being lightly loaded skip cycle mode |
| CN109980925B (en) * | 2019-04-15 | 2021-08-17 | 南京融芯微电子有限公司 | Method for accelerating dynamic response of valley bottom current controlled DCDC converter |
| CN110531744A (en) * | 2019-10-17 | 2019-12-03 | 北京和利时智能技术有限公司 | A kind of analog signals output circuit |
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|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20170412 Termination date: 20170908 |
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| CF01 | Termination of patent right due to non-payment of annual fee |