CN206040623U - 一种采用硅通孔及裸芯塑封的超薄指纹识别系统级封装件 - Google Patents

一种采用硅通孔及裸芯塑封的超薄指纹识别系统级封装件 Download PDF

Info

Publication number
CN206040623U
CN206040623U CN201621029544.1U CN201621029544U CN206040623U CN 206040623 U CN206040623 U CN 206040623U CN 201621029544 U CN201621029544 U CN 201621029544U CN 206040623 U CN206040623 U CN 206040623U
Authority
CN
China
Prior art keywords
chip
substrate
system level
plastic
naked core
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201621029544.1U
Other languages
English (en)
Inventor
谢建友
王奎
陈文钊
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Huatian Technology Xian Co Ltd
Original Assignee
Huatian Technology Xian Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Huatian Technology Xian Co Ltd filed Critical Huatian Technology Xian Co Ltd
Priority to CN201621029544.1U priority Critical patent/CN206040623U/zh
Application granted granted Critical
Publication of CN206040623U publication Critical patent/CN206040623U/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Measurement Of Length, Angles, Or The Like Using Electric Or Magnetic Means (AREA)

Abstract

一种采用硅通孔及裸芯塑封的超薄指纹识别系统级封装件，包括有传感芯片、锡球、填充胶、基板、塑封体，所述传感芯片上贯穿有硅通孔，传感芯片通过锡球和基板连接，填充胶填充锡球间区域，塑封体包裹传感芯片、填充胶和基板的大部分。本实用新型具有结构超薄、灵敏度高的特点。

Description

一种采用硅通孔及裸芯塑封的超薄指纹识别系统级封装件
技术领域
本实用新型涉及集成电路领域，具体是一种采用硅通孔及裸芯塑封的超薄指纹识别系统级封装件。
背景技术
随着终端产品的智能化程度不断提高，各种传感器芯片层出不穷。对于传感芯片，其最大的特征在于其芯片表面存在感应区域，该区域与其所要识别的外界刺激发生作用，产生芯片可以识别和处理的电信号。该区域与外界刺激的距离要尽可能短，以使得产生的信号可以被侦测。当前很多的芯片工艺，芯片焊盘一般也位于同一表面，若采用焊线方式将芯片焊盘引出，焊线高度不可避免会抬升感应区域与封装体外界的距离。
同时，一般元器件、功能芯片和传感芯片都是单独的器件或者封装件，缺乏集成度。
实用新型内容
为了解决上述现有技术存在的问题，本实用新型采用硅穿孔技术代替焊线工艺，将传感芯片表面的焊盘引至芯片背面，即利用硅穿孔结构来电连接芯片和封装基板，同时感应区表面裸露，使得产品灵敏度更高，封装更薄。同时,将元器件、功能芯片和感应芯片一并集成在同一基板上，可以提高封装件的整体集成度，优化处理结构。
一种采用硅通孔及裸芯塑封的超薄指纹识别系统级封装件，包括有传感芯片、锡球、填充胶、基板、塑封体；所述传感芯片上贯穿有硅通孔，传感芯片通过锡球和基板连接，填充胶填充锡球间区域，塑封体包裹传感芯片、填充胶和基板的大部分。
所述封装件有元器件，元器件与基板连接，其和传感芯片并排在同一基板上，并由塑封体包裹。
所述封装件有功能芯片，功能芯片位于感应芯片背部与基板之间的空间，通过锡球与基板连接，填充胶覆盖功能芯片和锡球。
所述功能芯片还可以通过粘胶与基板连接，金属线再连接功能芯片和基板，填充胶覆盖功能芯片和金属线。
所述封装件可以去除填充胶，直接通过塑封体包裹。
附图说明
图1为带有硅通孔和元件嵌入集成的封装件的示意图；
图2为元件嵌入集成中，功能芯片为引线连接的封装件的示意图；
图3为去除填充胶和功能芯片为引线连接的封装件的示意图；
图4为去除填充胶和功能芯片为倒装芯片连接的封装件的示意图。
图中：1-功能芯片，2-传感芯片，3-基板，4-锡球，5-元器件，6-塑封体，7-硅通孔，801-金属线，802-锡球，9-填充胶。
具体实施方式
一种采用硅通孔及裸芯塑封的超薄指纹识别系统级封装件，包括有传感芯片2、锡球4、填充胶9、基板3、塑封体6，所述传感芯片2上贯穿有硅通孔7，传感芯片2通过锡球4和基板3连接，填充胶9填充锡球4间区域，塑封体6包裹传感芯片2、填充胶9和基板3的大部分。所述封装件有元器件5，元器件5与基板3连接，其和传感芯片2并排在同一基板3上，并由塑封体6包裹。所述封装件有功能芯片1，功能芯片1位于感应芯片2背部与基板3之间的空间，通过锡球802与基板3连接，填充胶9覆盖功能芯片1和锡球802。所述功能芯片1还可以通过粘胶与基板3连接，金属线801再连接功能芯片1和基板3，填充胶9覆盖功能芯片1和金属线801。所述封装件去除填充胶9，直接通过塑封体6包裹。

Claims (5)

1.一种采用硅通孔及裸芯塑封的超薄指纹识别系统级封装件，包括有传感芯片(2)、锡球(4)、填充胶(9)、基板(3)、塑封体(6)，其特征在于，所述传感芯片(2)上贯穿有硅通孔(7)，传感芯片(2)通过锡球(4)和基板(3)连接，填充胶(9)填充锡球(4)间区域，塑封体(6)包裹传感芯片(2)、填充胶(9)和基板(3)的大部分。
2.根据权利要求1所述的一种采用硅通孔及裸芯塑封的超薄指纹识别系统级封装件，其特征在于，所述封装件有元器件(5)，元器件(5)与基板(3)连接，其和传感芯片(2)并排在同一基板(3)上，并由塑封体(6)包裹。
3.根据权利要求1所述的一种采用硅通孔及裸芯塑封的超薄指纹识别系统级封装件，其特征在于，所述封装件有功能芯片(1)，功能芯片(1)位于感应芯片(2)背部与基板(3)之间的空间，通过锡球(802)与基板(3)连接，填充胶(9)覆盖功能芯片(1)和锡球(802)。
4.根据权利要求3所述的一种采用硅通孔及裸芯塑封的超薄指纹识别系统级封装件，其特征在于，所述功能芯片(1)通过粘胶与基板(3)连接，金属线(801)再连接功能芯片(1)和基板(3)，填充胶(9)覆盖功能芯片(1)和金属线(801)。
5.根据权利要求1所述的一种采用硅通孔及裸芯塑封的超薄指纹识别系统级封装件，其特征在于，所述封装件去除填充胶(9)，直接通过塑封体(6)包裹。
CN201621029544.1U 2016-08-31 2016-08-31 一种采用硅通孔及裸芯塑封的超薄指纹识别系统级封装件 Active CN206040623U (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201621029544.1U CN206040623U (zh) 2016-08-31 2016-08-31 一种采用硅通孔及裸芯塑封的超薄指纹识别系统级封装件

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201621029544.1U CN206040623U (zh) 2016-08-31 2016-08-31 一种采用硅通孔及裸芯塑封的超薄指纹识别系统级封装件

Publications (1)

Publication Number Publication Date
CN206040623U true CN206040623U (zh) 2017-03-22

Family

ID=58298678

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201621029544.1U Active CN206040623U (zh) 2016-08-31 2016-08-31 一种采用硅通孔及裸芯塑封的超薄指纹识别系统级封装件

Country Status (1)

Country Link
CN (1) CN206040623U (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106252306A (zh) * 2016-08-31 2016-12-21 华天科技（西安）有限公司 一种采用硅通孔及裸芯塑封的超薄指纹识别系统级封装件

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106252306A (zh) * 2016-08-31 2016-12-21 华天科技（西安）有限公司 一种采用硅通孔及裸芯塑封的超薄指纹识别系统级封装件

Similar Documents

Publication Publication Date Title
EP3267485A3 (en) Sensor package structure
TW201614747A (en) Wire bond sensor package and method
EP2224482A3 (en) Integrated leadframe and bezel structure and device formed from same
EP3093877A3 (en) Semiconductor package and fabrication method thereof
HK1116298A1 (en) Integrated circuit package and manufacture method thereof
MY139752A (en) Encapsulated chip scale package having flip-chip on lead frame structure and method
KR102192847B1 (ko) 미세 기계 센서 장치
US9542598B2 (en) Package structure and fabrication method thereof
CN206040623U (zh) 一种采用硅通孔及裸芯塑封的超薄指纹识别系统级封装件
WO2006023184A3 (en) Qfn package and method therefor
US20210005522A1 (en) Lid structure and semiconductor device package including the same
CN107438855B (zh) 指纹芯片封装模组、指纹识别模组和封装方法
CN206098378U (zh) 一种先刻槽再打孔的裸芯塑封超薄指纹识别系统级封装件
CN206134670U (zh) 一种采用硅通孔及裸芯塑封的超薄指纹识别系统级封装件
CN206098377U (zh) 一种先刻槽再打孔的裸芯塑封超薄指纹识别系统级封装件
CN106252304A (zh) 一种采用硅通孔及裸芯塑封的超薄指纹识别系统级封装件
CN104576563A (zh) 一种埋入式传感芯片系统封装结构
CN106252306A (zh) 一种采用硅通孔及裸芯塑封的超薄指纹识别系统级封装件
JP2017051277A5 (zh)
CN107275239B (zh) 一种指纹识别芯片封装方法及封装结构
CN205810780U (zh) 一种基于露芯塑封工艺的tsv芯片封装件
CN113629023A (zh) 一种封装结构及其封装方法
CN106252305A (zh) 一种先刻槽再打孔的裸芯塑封超薄指纹识别系统级封装件
US20100230826A1 (en) Integrated circuit package assembly and packaging method thereof
TW200601533A (en) Leadframe with a chip pad for double side stacking and method for manufacturing the same

Legal Events

Date Code Title Description
C14 Grant of patent or utility model
GR01 Patent grant
EE01 Entry into force of recordation of patent licensing contract

Assignee: Huatian Science and Technology (Nanjing) Co.,Ltd.

Assignor: HUATIAN TECHNOLOGY (XI'AN) Co.,Ltd.

Contract record no.: X2021610000004

Denomination of utility model: An ultra thin fingerprint identification system level package with silicon via and bare core plastic packaging

Granted publication date: 20170322

License type: Common License

Record date: 20210526

EE01 Entry into force of recordation of patent licensing contract